blob: fb060bbb194f428ce7491dff16b22c3620ade139 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
|
From b4807003314579b069877df69eefbace4c7b6efa Mon Sep 17 00:00:00 2001
From: Chee Hong Ang <chee.hong.ang@intel.com>
Date: Sat, 18 May 2019 16:42:10 +0800
Subject: [PATCH 09/14] ARM: socfpga: Stratix10: Fix el3_exception_vectors
relocation issue
New toolchain has issue relocating the 32-bit pointer to address of
el3_exception_vectors in secure section. This patch make sure the
address pointer to the secure section is 64-bit.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
---
arch/arm/mach-socfpga/lowlevel_init.S | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-socfpga/lowlevel_init.S b/arch/arm/mach-socfpga/lowlevel_init.S
index 832785a682..342d5190b5 100644
--- a/arch/arm/mach-socfpga/lowlevel_init.S
+++ b/arch/arm/mach-socfpga/lowlevel_init.S
@@ -12,8 +12,7 @@
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_ARMV8_PSCI)
.align 3
_el3_exception_vectors:
- .word el3_exception_vectors;
- .word 0
+ .quad el3_exception_vectors;
#endif
ENTRY(lowlevel_init)
--
2.21.0
|