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-rw-r--r--recipes-bsp/u-boot/files/v2019.07/0011-Makefile-Add-target-to-generate-hex-output-for-combi.patch87
1 files changed, 0 insertions, 87 deletions
diff --git a/recipes-bsp/u-boot/files/v2019.07/0011-Makefile-Add-target-to-generate-hex-output-for-combi.patch b/recipes-bsp/u-boot/files/v2019.07/0011-Makefile-Add-target-to-generate-hex-output-for-combi.patch
deleted file mode 100644
index 640df20..0000000
--- a/recipes-bsp/u-boot/files/v2019.07/0011-Makefile-Add-target-to-generate-hex-output-for-combi.patch
+++ /dev/null
@@ -1,87 +0,0 @@
1From 56332c75a69a9f9ef7928e0f43d1fc509db9c866 Mon Sep 17 00:00:00 2001
2From: Dalon Westergreen <dalon.westergreen@intel.com>
3Date: Wed, 20 Mar 2019 11:21:20 -0700
4Subject: [PATCH 11/14] Makefile: Add target to generate hex output for
5 combined spl and dtb
6
7Stratix10 requires a hex image of the spl plus spl devicetree offset to
8the Stratix10 onchip memory located at SPL_TEXT_BASE. This patch adds
9a target to generate a hex file from the u-boot-spl binary including the
10dtb offset at SPL_TEST_BASE.
11
12Objcopy is used to convert the $(SPL_BIN).bin, which includes the spl
13dtb, to a hex file. the --change-address option is used to offset the
14hex to SPL_TEXT_BASE as objcopy on the spl binary will not result in
15a hex file appropriately offset at SPL_TEXT_BASE.
16
17Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
18
19---
20Changes in v3:
21 -> Cleanup commit message and better describe the problem being
22 resolved
23 -> Remove extraneous hunk
24 -> use SPL_BIN instead of u-boot-spl
25Changes in v2:
26 -> Move spl hex file generation to SPL Makefile
27 -> Create hexfile from $(SPL_BIN).bin which will include the dtb
28 ifneq(build_dtb,)
29---
30 Makefile | 8 +++-----
31 scripts/Makefile.spl | 7 +++++++
32 2 files changed, 10 insertions(+), 5 deletions(-)
33
34diff --git a/Makefile b/Makefile
35index 516260f46d..8236f095fc 100644
36--- a/Makefile
37+++ b/Makefile
38@@ -1136,11 +1136,6 @@ OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
39 $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
40 $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec)
41
42-OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex)
43-
44-spl/u-boot-spl.hex: spl/u-boot-spl FORCE
45- $(call if_changed,objcopy)
46-
47 binary_size_check: u-boot-nodtb.bin FORCE
48 @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
49 map_size=$(shell cat u-boot.map | \
50@@ -1721,6 +1716,9 @@ spl/u-boot-spl.bin: spl/u-boot-spl
51 @:
52 $(SPL_SIZE_CHECK)
53
54+spl/u-boot-spl.hex: spl/u-boot-spl
55+ @:
56+
57 spl/u-boot-spl: tools prepare \
58 $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
59 $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
60diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
61index 7af6b120b6..551002194e 100644
62--- a/scripts/Makefile.spl
63+++ b/scripts/Makefile.spl
64@@ -216,6 +216,8 @@ ifneq ($(CONFIG_TARGET_SOCFPGA_GEN5)$(CONFIG_TARGET_SOCFPGA_ARRIA10),)
65 ALL-y += $(obj)/$(SPL_BIN).sfp
66 endif
67
68+ALL-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += $(obj)/$(SPL_BIN).hex
69+
70 ifdef CONFIG_ARCH_SUNXI
71 ALL-y += $(obj)/sunxi-spl.bin
72
73@@ -363,6 +365,11 @@ endif
74 $(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE
75 $(call if_changed,mkimage)
76
77+OBJCOPYFLAGS_$(SPL_BIN).hex := -I binary -O ihex --change-address=$(CONFIG_SPL_TEXT_BASE)
78+
79+$(obj)/$(SPL_BIN).hex: $(obj)/$(SPL_BIN).bin FORCE
80+ $(call if_changed,objcopy)
81+
82 quiet_cmd_mksunxiboot = MKSUNXI $@
83 cmd_mksunxiboot = $(objtree)/tools/mksunxiboot \
84 --default-dt $(CONFIG_DEFAULT_DEVICE_TREE) $< $@
85--
862.21.0
87