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| author | Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> | 2020-03-09 09:29:21 +0000 |
|---|---|---|
| committer | Khem Raj <raj.khem@gmail.com> | 2020-03-09 22:12:35 -0700 |
| commit | 2a2a2f047061755326e9e8940a698aae204fc1ea (patch) | |
| tree | d1327df8421bc163d633473566cd21e9ab79b5d6 | |
| parent | 995805ad319491e09aacd5a0b690ff21074f03f7 (diff) | |
| download | meta-altera-2a2a2f047061755326e9e8940a698aae204fc1ea.tar.gz | |
machine: arria10: use supported page size for NAND flash
The supported page size for Arria 10 SoCs NAND flash are
512 bytes, 2KiB, 4KiB or 8KiB.
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
| -rw-r--r-- | conf/machine/arria10.conf | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/conf/machine/arria10.conf b/conf/machine/arria10.conf index 02b73df..9935b5a 100644 --- a/conf/machine/arria10.conf +++ b/conf/machine/arria10.conf | |||
| @@ -22,9 +22,10 @@ KERNEL_DEVICETREE ?= "\ | |||
| 22 | socfpga_arria10_socdk_nand.dtb \ | 22 | socfpga_arria10_socdk_nand.dtb \ |
| 23 | " | 23 | " |
| 24 | 24 | ||
| 25 | JFFS2_ERASEBLOCK ?= "${@bb.utils.contains("A10_IMAGE_TYPE", "NAND", "-e 0x20000", "", d)} \ | 25 | EXTRA_IMAGECMD_jffs2 ?= "\ |
| 26 | ${@bb.utils.contains("A10_IMAGE_TYPE", "QSPI", "-e 0x10000", "", d)}" | 26 | ${@bb.utils.contains("A10_IMAGE_TYPE", "NAND", "-e 0x20000 -s 0x200", "", d)} \ |
| 27 | EXTRA_IMAGECMD_jffs2 ?= "--squash -s 256 ${JFFS2_ERASEBLOCK}" | 27 | ${@bb.utils.contains("A10_IMAGE_TYPE", "QSPI", "-e 0x10000", "", d)} \ |
| 28 | " | ||
| 28 | 29 | ||
| 29 | SERIAL_CONSOLES ?= "115200;ttyS0" | 30 | SERIAL_CONSOLES ?= "115200;ttyS0" |
| 30 | 31 | ||