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1 files changed, 794 insertions, 353 deletions
diff --git a/doc/book-enea-linux-user-guide/doc/real_time_in_enea_linux.xml b/doc/book-enea-linux-user-guide/doc/real_time_in_enea_linux.xml
index fa60f93..ec56fd9 100644
--- a/doc/book-enea-linux-user-guide/doc/real_time_in_enea_linux.xml
+++ b/doc/book-enea-linux-user-guide/doc/real_time_in_enea_linux.xml
@@ -5,7 +5,7 @@
5 <para>The Enea Linux Standard and Real-Time Profiles are based on the same 5 <para>The Enea Linux Standard and Real-Time Profiles are based on the same
6 Yocto (poky) version but differ in kernel needs. The RT Profile uses the 6 Yocto (poky) version but differ in kernel needs. The RT Profile uses the
7 <ulink url="https://github.com/intel/linux-intel-lts/wiki">Intel 7 <ulink url="https://github.com/intel/linux-intel-lts/wiki">Intel
8 4.14/preempt-rt kernel</ulink>.</para> 8 4.19/preempt-rt kernel</ulink>.</para>
9 9
10 <table> 10 <table>
11 <title>Addtional packages provided in the RT profile</title> 11 <title>Addtional packages provided in the RT profile</title>
@@ -171,15 +171,19 @@
171 <section id="run_tests"> 171 <section id="run_tests">
172 <title>Stress Testcases</title> 172 <title>Stress Testcases</title>
173 173
174 <para>Below you will find several testcases for an RT image.</para> 174 <para>Below you will find several testcases for intel-corei7-64 and
175 raspberrypi3-64 RT images.</para>
175 176
176 <example id="testcase_one"> 177 <section id="run_tests_intel_corei7_64">
177 <title> 178 <title>Details on testcases for intel-corei7-64</title>
178 <emphasis role="bold">Test 1 (RT image)</emphasis>
179 </title>
180 179
181 <para> 180 <example id="intel_corei7_64_testcase_one">
182 <programlisting># Test case (1/6): rt_bmark.intlat.no_stress 181 <title>
182 <emphasis role="bold">Test 1 (RT image)</emphasis>
183 </title>
184
185 <para>
186 <programlisting># Test case (1/6): rt_bmark.intlat.no_stress
183# .............................................................................. 187# ..............................................................................
184# No stress requested 188# No stress requested
185# Starting cyclictest 189# Starting cyclictest
@@ -187,22 +191,22 @@
187.... 191....
188.... 192....
189# Min: 2 us 193# Min: 2 us
190# Avg: 3.0 us 194# Avg: 2.0 us
191# Max: 15 us 195# Max: 24 us
192# Max list: [5, 6, 7, 9, 10, 15] 196# Max list: [4, 6, 12, 14, 14, 24]
193# PASS 197# PASS
194 198
195 </programlisting> 199 </programlisting>
196 </para> 200 </para>
197 </example> 201 </example>
198 202
199 <example id="testcase_two"> 203 <example id="intel_corei7_64_testcase_two">
200 <title> 204 <title>
201 <emphasis role="bold">Test 2 (RT image)</emphasis> 205 <emphasis role="bold">Test 2 (RT image)</emphasis>
202 </title> 206 </title>
203 207
204 <para> 208 <para>
205 <programlisting># Test case (2/6): rt_bmark.intlat.cpu 209 <programlisting># Test case (2/6): rt_bmark.intlat.cpu
206# .............................................................................. 210# ..............................................................................
207# Starting stress(cpu) 211# Starting stress(cpu)
208# Command: 'stress -c 8' 212# Command: 'stress -c 8'
@@ -212,19 +216,18 @@
212.... 216....
213# Min: 2 us 217# Min: 2 us
214# Avg: 2.0 us 218# Avg: 2.0 us
215# Max: 11 us 219# Max: 10 us
216# Max list: [4, 5, 6, 9, 10, 11] 220# Max list: [4, 5, 6, 7, 10, 10]
217# PASS 221# PASS</programlisting>
218</programlisting> 222 </para>
219 </para> 223 </example>
220 </example> 224
221 225 <example id="intel_corei7_64_testcase_three">
222 <example id="testcase_three"> 226 <title>
223 <title> 227 <emphasis role="bold">Test 3 (RT image)</emphasis>
224 <emphasis role="bold">Test 3 (RT image)</emphasis> 228 </title>
225 </title> 229
226 230 <para>
227 <para>
228 <programlisting># Test case (3/6): rt_bmark.intlat.hdd 231 <programlisting># Test case (3/6): rt_bmark.intlat.hdd
229# .............................................................................. 232# ..............................................................................
230# Starting stress(hdd) 233# Starting stress(hdd)
@@ -234,21 +237,20 @@
234.... 237....
235.... 238....
236# Min: 2 us 239# Min: 2 us
237# Avg: 2.7 us 240# Avg: 2.0 us
238# Max: 14 us 241# Max: 24 us
239# Max list: [9, 10, 11, 12, 14, 14] 242# Max list: [7, 13, 14, 20, 24, 24]
240# PASS 243# PASS</programlisting>
241</programlisting> 244 </para>
242 </para> 245 </example>
243 </example> 246
244 247 <example id="intel_corei7_64_testcase_four">
245 <example id="testcase_four"> 248 <title>
246 <title> 249 <emphasis role="bold">Test 4 (RT image)</emphasis>
247 <emphasis role="bold">Test 4 (RT image)</emphasis> 250 </title>
248 </title> 251
249 252 <para>
250 <para> 253 <programlisting># Test case (4/6): rt_bmark.intlat.io
251 <programlisting># Test case (4/6): rt_bmark.intlat.io
252# .............................................................................. 254# ..............................................................................
253# Starting stress(io) 255# Starting stress(io)
254# Command: 'stress -i 8' 256# Command: 'stress -i 8'
@@ -257,21 +259,20 @@
257.... 259....
258.... 260....
259# Min: 2 us 261# Min: 2 us
260# Avg: 3.0 us 262# Avg: 2.0 us
261# Max: 15 us 263# Max: 13 us
262# Max list: [8, 9, 10, 12, 12, 15] 264# Max list: [5, 7, 7, 9, 11, 13]
263# PASS 265# PASS</programlisting>
264 </programlisting> 266 </para>
265 </para> 267 </example>
266 </example> 268
267 269 <example id="intel_corei7_64_testcase_five">
268 <example id="testcase_five"> 270 <title>
269 <title> 271 <emphasis role="bold">Test 5 (RT image)</emphasis>
270 <emphasis role="bold">Test 5 (RT image)</emphasis> 272 </title>
271 </title> 273
272 274 <para>
273 <para> 275 <programlisting># Test case (5/6): rt_bmark.intlat.vm
274 <programlisting># Test case (5/6): rt_bmark.intlat.vm
275# .............................................................................. 276# ..............................................................................
276# Starting stress(vm) 277# Starting stress(vm)
277# Command: 'stress -m 8 --vm-bytes 10M' 278# Command: 'stress -m 8 --vm-bytes 10M'
@@ -280,20 +281,20 @@
280.... 281....
281.... 282....
282# Min: 2 us 283# Min: 2 us
283# Avg: 4.2 us 284# Avg: 5 us
284# Max: 15 us 285# Max: 28 us
285# Max list: [10, 12, 12, 13, 13, 15] 286# Max list: [12, 13, 14, 15, 19, 28]
286 # PASS</programlisting> 287# PASS</programlisting>
287 </para> 288 </para>
288 </example> 289 </example>
289 290
290 <example id="testcase_six"> 291 <example id="intel_corei7_64_testcase_six">
291 <title> 292 <title>
292 <emphasis role="bold">Test 6 (RT image)</emphasis> 293 <emphasis role="bold">Test 6 (RT image)</emphasis>
293 </title> 294 </title>
294 295
295 <para> 296 <para>
296 <programlisting># Test case (6/6): rt_bmark.intlat.full 297 <programlisting># Test case (6/6): rt_bmark.intlat.full
297# .............................................................................. 298# ..............................................................................
298# Starting stress(io+cpu+hdd+vm) 299# Starting stress(io+cpu+hdd+vm)
299# Command: 'stress -i 8 -c 8 -d 8 --hdd-bytes 20M -m 8 --vm-bytes 10M' 300# Command: 'stress -i 8 -c 8 -d 8 --hdd-bytes 20M -m 8 --vm-bytes 10M'
@@ -302,316 +303,756 @@
302.... 303....
303.... 304....
304# Min: 2 us 305# Min: 2 us
305# Avg: 3.5 us 306# Avg: 3.6 us
306# Max: 19 us 307# Max: 18 us
307# Max list: [12, 14, 15, 16, 18, 19] 308# Max list: [12, 13, 14, 16, 16, 18]
309# PASS</programlisting>
310 </para>
311 </example>
312 </section>
313
314 <para>Repeat these tests for the Standard image and compare the results
315 (see the following tables).</para>
316
317 <table>
318 <title>Benchmark Numbers for the Standard Image</title>
319
320 <tgroup align="center" cols="7">
321 <colspec />
322
323 <colspec colname="2" />
324
325 <colspec />
326
327 <colspec />
328
329 <colspec />
330
331 <colspec />
332
333 <colspec colname="7" />
334
335 <thead>
336 <row>
337 <entry morerows="1" valign="middle">
338 <para>Latency [us]</para>
339 </entry>
340
341 <entry nameend="7" namest="2">
342 <para>Stress Type</para>
343 </entry>
344 </row>
345
346 <row>
347 <entry>
348 <para>no stress</para>
349 </entry>
350
351 <entry>
352 <para>cpu</para>
353 </entry>
354
355 <entry>
356 <para>Io</para>
357 </entry>
358
359 <entry>
360 <para>vm</para>
361 </entry>
362
363 <entry>
364 <para>hdd</para>
365 </entry>
366
367 <entry>
368 <para>full</para>
369 </entry>
370 </row>
371 </thead>
372
373 <tbody>
374 <row>
375 <entry>
376 <para>Min</para>
377 </entry>
378
379 <entry>
380 <para>2 </para>
381 </entry>
382
383 <entry>
384 <para>2 </para>
385 </entry>
386
387 <entry>
388 <para>2 </para>
389 </entry>
390
391 <entry>
392 <para>2 </para>
393 </entry>
394
395 <entry>
396 <para>2 </para>
397 </entry>
398
399 <entry>
400 <para>2 </para>
401 </entry>
402 </row>
403
404 <row>
405 <entry>
406 <para>average</para>
407 </entry>
408
409 <entry>
410 <para>2.0 </para>
411 </entry>
412
413 <entry>
414 <para>2.0 </para>
415 </entry>
416
417 <entry>
418 <para>2.0 </para>
419 </entry>
420
421 <entry>
422 <para>4.5 </para>
423 </entry>
424
425 <entry>
426 <para>2.0 </para>
427 </entry>
428
429 <entry>
430 <para>3.7 </para>
431 </entry>
432 </row>
433
434 <row>
435 <entry>
436 <para>max</para>
437 </entry>
438
439 <entry>
440 <para>36 </para>
441 </entry>
442
443 <entry>
444 <para>49 </para>
445 </entry>
446
447 <entry>
448 <para>60</para>
449 </entry>
450
451 <entry>
452 <para>270 </para>
453 </entry>
454
455 <entry>
456 <para>102 </para>
457 </entry>
458
459 <entry>
460 <para>254</para>
461 </entry>
462 </row>
463 </tbody>
464 </tgroup>
465 </table>
466
467 <table>
468 <title>Benchmark Numbers for the RT Image</title>
469
470 <tgroup align="center" cols="7">
471 <colspec />
472
473 <colspec colname="2" />
474
475 <colspec />
476
477 <colspec />
478
479 <colspec />
480
481 <colspec />
482
483 <colspec colname="7" />
484
485 <thead>
486 <row>
487 <entry morerows="1" valign="middle">
488 <para>Latency [us]</para>
489 </entry>
490
491 <entry nameend="7" namest="2">
492 <para>Stress Type</para>
493 </entry>
494 </row>
495
496 <row>
497 <entry>
498 <para>no stress</para>
499 </entry>
500
501 <entry>
502 <para>cpu</para>
503 </entry>
504
505 <entry>
506 <para>Io</para>
507 </entry>
508
509 <entry>
510 <para>vm</para>
511 </entry>
512
513 <entry>
514 <para>hdd</para>
515 </entry>
516
517 <entry>
518 <para>full</para>
519 </entry>
520 </row>
521 </thead>
522
523 <tbody>
524 <row>
525 <entry>
526 <para>Min</para>
527 </entry>
528
529 <entry>
530 <para>2 </para>
531 </entry>
532
533 <entry>
534 <para>2 </para>
535 </entry>
536
537 <entry>
538 <para>2 </para>
539 </entry>
540
541 <entry>
542 <para>2 </para>
543 </entry>
544
545 <entry>
546 <para>2 </para>
547 </entry>
548
549 <entry>
550 <para>2 </para>
551 </entry>
552 </row>
553
554 <row>
555 <entry>
556 <para>average</para>
557 </entry>
558
559 <entry>
560 <para>2.0 </para>
561 </entry>
562
563 <entry>
564 <para>2.0 </para>
565 </entry>
566
567 <entry>
568 <para>2.0 </para>
569 </entry>
570
571 <entry>
572 <para>5.0 </para>
573 </entry>
574
575 <entry>
576 <para>2.0 </para>
577 </entry>
578
579 <entry>
580 <para>3.6 </para>
581 </entry>
582 </row>
583
584 <row>
585 <entry>
586 <para>max</para>
587 </entry>
588
589 <entry>
590 <para>24 </para>
591 </entry>
592
593 <entry>
594 <para>10 </para>
595 </entry>
596
597 <entry>
598 <para>13 </para>
599 </entry>
600
601 <entry>
602 <para>28 </para>
603 </entry>
604
605 <entry>
606 <para>24 </para>
607 </entry>
608
609 <entry>
610 <para>18 </para>
611 </entry>
612 </row>
613 </tbody>
614 </tgroup>
615 </table>
616
617 <section id="run_tests_raspberrypi3_64">
618 <title>Details on testcases for raspberrypi3-64</title>
619
620 <example id="raspberrypi3_64_testcase_one">
621 <title>
622 <emphasis role="bold">Test 1 (RT image)</emphasis>
623 </title>
624
625 <para>
626 <programlisting># Test case (1/6): rt_bmark.intlat.no_stress
627# ..............................................................................
628# No stress requested
629# Starting cyclictest
630# Command: cyclictest -S -p 99 -q -i 100 -d 20 -l 30000
631....
632....
633# Min: 11 us
634# Avg: 28.4 us
635# Max: 135 us
636# Max list: [96, 99, 104, 110, 118, 135]
308# PASS 637# PASS
309 </programlisting>
310 </para>
311 </example>
312 </section>
313 638
314 <para>Repeat these tests for the Standard image and compare the results 639 </programlisting>
315 (see the following tables).</para> 640 </para>
641 </example>
642
643 <example id="raspberrypi3_64_testcase_two">
644 <title>
645 <emphasis role="bold">Test 2 (RT image)</emphasis>
646 </title>
647
648 <para>
649 <programlisting># Test case (2/6): rt_bmark.intlat.cpu
650# ..............................................................................
651# Starting stress(cpu)
652# Command: 'stress -c 8'
653# Starting cyclictest
654# Command: cyclictest -S -p 99 -q -i 100 -d 20 -l 30000
655....
656....
657# Min: 11 us
658# Avg: 29.5 us
659# Max: 130 us
660# Max list: [96, 103, 106, 109, 112, 130]
661# PASS</programlisting>
662 </para>
663 </example>
664
665 <example id="raspberrypi3_64_testcase_three">
666 <title>
667 <emphasis role="bold">Test 3 (RT image)</emphasis>
668 </title>
669
670 <para>
671 <programlisting># Test case (3/6): rt_bmark.intlat.hdd
672# ..............................................................................
673# Starting stress(hdd)
674# Command: 'stress -d 8 --hdd-bytes 20M'
675# Starting cyclictest
676# Command: cyclictest -S -p 99 -q -i 100 -d 20 -l 30000
677....
678....
679# Min: 11 us
680# Avg: 29.7 us
681# Max: 173 us
682# Max list: [117, 126, 132, 137, 147, 173]
683# PASS</programlisting>
684 </para>
685 </example>
686
687 <example id="raspberrypi3_64_testcase_four">
688 <title>
689 <emphasis role="bold">Test 4 (RT image)</emphasis>
690 </title>
691
692 <para>
693 <programlisting># Test case (4/6): rt_bmark.intlat.io
694# ..............................................................................
695# Starting stress(io)
696# Command: 'stress -i 8'
697# Starting cyclictest
698# Command : cyclictest -S -p 99 -q -i 100 -d 20 -l 30000
699....
700....
701# Min: 11 us
702# Avg: 27.6 us
703# Max: 137 us
704# Max list: [102, 108, 114, 123, 133, 137]
705# PASS</programlisting>
706 </para>
707 </example>
708
709 <example id="raspberrypi3_64_testcase_five">
710 <title>
711 <emphasis role="bold">Test 5 (RT image)</emphasis>
712 </title>
713
714 <para>
715 <programlisting># Test case (5/6): rt_bmark.intlat.vm
716# ..............................................................................
717# Starting stress(vm)
718# Command: 'stress -m 8 --vm-bytes 10M'
719# Starting cyclictest
720# Command: cyclictest -S -p 99 -q -i 100 -d 20 -l 30000
721....
722....
723# Min: 11 us
724# Avg: 33.8 us
725# Max: 150 us
726# Max list: [107, 116, 119, 124, 125, 150]
727# PASS</programlisting>
728 </para>
729 </example>
730
731 <example id="raspberrypi3_64_testcase_six">
732 <title>
733 <emphasis role="bold">Test 6 (RT image)</emphasis>
734 </title>
735
736 <para>
737 <programlisting># Test case (6/6): rt_bmark.intlat.full
738# ..............................................................................
739# Starting stress(io+cpu+hdd+vm)
740# Command: 'stress -i 8 -c 8 -d 8 --hdd-bytes 20M -m 8 --vm-bytes 10M'
741# Starting cyclictest
742# Command : cyclictest -S -p 99 -q -i 100 -d 20 -l 30000
743....
744....
745# Min: 11 us
746# Avg: 31.2 us
747# Max: 149 us
748# Max list: [124, 128, 134, 142, 144, 149]
749# PASS</programlisting>
750 </para>
751 </example>
752 </section>
753
754 <para>Repeat these tests for the Standard image and compare the results
755 (see the following tables).</para>
756
757 <table>
758 <title>Benchmark Numbers for the Standard Image</title>
759
760 <tgroup align="center" cols="7">
761 <colspec />
762
763 <colspec colname="2" />
316 764
317 <table> 765 <colspec />
318 <title>Benchmark Numbers for the Standard Image</title>
319 766
320 <tgroup align="center" cols="7"> 767 <colspec />
321 <colspec />
322 768
323 <colspec colname="2" /> 769 <colspec />
324 770
325 <colspec /> 771 <colspec />
326 772
327 <colspec /> 773 <colspec colname="7" />
328 774
329 <colspec /> 775 <thead>
776 <row>
777 <entry morerows="1" valign="middle">
778 <para>Latency [us]</para>
779 </entry>
330 780
331 <colspec /> 781 <entry nameend="7" namest="2">
782 <para>Stress Type</para>
783 </entry>
784 </row>
785
786 <row>
787 <entry>
788 <para>no stress</para>
789 </entry>
332 790
333 <colspec colname="7" /> 791 <entry>
792 <para>cpu</para>
793 </entry>
334 794
335 <thead> 795 <entry>
336 <row> 796 <para>Io</para>
337 <entry morerows="1" valign="middle"> 797 </entry>
338 <para>Latency [us]</para>
339 </entry>
340 798
341 <entry nameend="7" namest="2"> 799 <entry>
342 <para>Stress Type</para> 800 <para>vm</para>
343 </entry> 801 </entry>
344 </row>
345 802
346 <row> 803 <entry>
347 <entry> 804 <para>hdd</para>
348 <para>no stress</para> 805 </entry>
349 </entry>
350 806
351 <entry> 807 <entry>
352 <para>cpu</para> 808 <para>full</para>
353 </entry> 809 </entry>
810 </row>
811 </thead>
354 812
355 <entry> 813 <tbody>
356 <para>Io</para> 814 <row>
357 </entry> 815 <entry>
816 <para>Min</para>
817 </entry>
358 818
359 <entry> 819 <entry>
360 <para>vm</para> 820 <para>11 </para>
361 </entry> 821 </entry>
362 822
363 <entry> 823 <entry>
364 <para>hdd</para> 824 <para>12 </para>
365 </entry> 825 </entry>
366 826
367 <entry> 827 <entry>
368 <para>full</para> 828 <para>11 </para>
369 </entry> 829 </entry>
370 </row>
371 </thead>
372 830
373 <tbody> 831 <entry>
374 <row> 832 <para>11 </para>
375 <entry> 833 </entry>
376 <para>Min</para>
377 </entry>
378 834
379 <entry> 835 <entry>
380 <para>2 </para> 836 <para>9 </para>
381 </entry> 837 </entry>
382 838
383 <entry> 839 <entry>
384 <para>2 </para> 840 <para>10 </para>
385 </entry> 841 </entry>
842 </row>
386 843
387 <entry> 844 <row>
388 <para>1 </para> 845 <entry>
389 </entry> 846 <para>average</para>
847 </entry>
390 848
391 <entry> 849 <entry>
392 <para>2 </para> 850 <para>26.9 </para>
393 </entry> 851 </entry>
394 852
395 <entry> 853 <entry>
396 <para>1 </para> 854 <para>26.9 </para>
397 </entry> 855 </entry>
398 856
399 <entry> 857 <entry>
400 <para>2 </para> 858 <para>27.6 </para>
401 </entry> 859 </entry>
402 </row>
403 860
404 <row> 861 <entry>
405 <entry> 862 <para>31.1 </para>
406 <para>average</para> 863 </entry>
407 </entry>
408 864
409 <entry> 865 <entry>
410 <para>2.9 </para> 866 <para>43.8 </para>
411 </entry> 867 </entry>
412 868
413 <entry> 869 <entry>
414 <para>2.0 </para> 870 <para>45.8 </para>
415 </entry> 871 </entry>
872 </row>
416 873
417 <entry> 874 <row>
418 <para>2.7 </para> 875 <entry>
419 </entry> 876 <para>max</para>
877 </entry>
420 878
421 <entry> 879 <entry>
422 <para>4.2 </para> 880 <para>450 </para>
423 </entry> 881 </entry>
424 882
425 <entry> 883 <entry>
426 <para>3.0 </para> 884 <para>226 </para>
427 </entry> 885 </entry>
428 886
429 <entry> 887 <entry>
430 <para>4.5 </para> 888 <para>547 </para>
431 </entry> 889 </entry>
432 </row>
433
434 <row>
435 <entry>
436 <para>max</para>
437 </entry>
438
439 <entry>
440 <para>262 </para>
441 </entry>
442
443 <entry>
444 <para>82 </para>
445 </entry>
446
447 <entry>
448 <para>101</para>
449 </entry>
450
451 <entry>
452 <para>776 </para>
453 </entry>
454
455 <entry>
456 <para>122 </para>
457 </entry>
458
459 <entry>
460 <para>1428</para>
461 </entry>
462 </row>
463 </tbody>
464 </tgroup>
465 </table>
466
467 <table>
468 <title>Benchmark Numbers for the RT Image</title>
469
470 <tgroup align="center" cols="7">
471 <colspec />
472
473 <colspec colname="2" />
474
475 <colspec />
476
477 <colspec />
478 890
479 <colspec /> 891 <entry>
480 892 <para>481 </para>
481 <colspec /> 893 </entry>
482
483 <colspec colname="7" />
484
485 <thead>
486 <row>
487 <entry morerows="1" valign="middle">
488 <para>Latency [us]</para>
489 </entry>
490
491 <entry nameend="7" namest="2">
492 <para>Stress Type</para>
493 </entry>
494 </row>
495
496 <row>
497 <entry>
498 <para>no stress</para>
499 </entry>
500
501 <entry>
502 <para>cpu</para>
503 </entry>
504
505 <entry>
506 <para>Io</para>
507 </entry>
508 894
509 <entry> 895 <entry>
510 <para>vm</para> 896 <para>922 </para>
511 </entry> 897 </entry>
512
513 <entry>
514 <para>hdd</para>
515 </entry>
516
517 <entry>
518 <para>full</para>
519 </entry>
520 </row>
521 </thead>
522
523 <tbody>
524 <row>
525 <entry>
526 <para>Min</para>
527 </entry>
528
529 <entry>
530 <para>2 </para>
531 </entry>
532
533 <entry>
534 <para>2 </para>
535 </entry>
536
537 <entry>
538 <para>2 </para>
539 </entry>
540
541 <entry>
542 <para>2 </para>
543 </entry>
544
545 <entry>
546 <para>2 </para>
547 </entry>
548
549 <entry>
550 <para>2 </para>
551 </entry>
552 </row>
553
554 <row>
555 <entry>
556 <para>average</para>
557 </entry>
558
559 <entry>
560 <para>3.0 </para>
561 </entry>
562
563 <entry>
564 <para>2.0 </para>
565 </entry>
566 898
567 <entry> 899 <entry>
568 <para>3.0 </para> 900 <para>941 </para>
569 </entry> 901 </entry>
570 902 </row>
571 <entry> 903 </tbody>
572 <para>4.3 </para> 904 </tgroup>
573 </entry> 905 </table>
574 906
575 <entry> 907 <table>
576 <para>2.7 </para> 908 <title>Benchmark Numbers for the RT Image</title>
577 </entry> 909
578 910 <tgroup align="center" cols="7">
579 <entry> 911 <colspec />
580 <para>3.5 </para> 912
581 </entry> 913 <colspec colname="2" />
582 </row> 914
583 915 <colspec />
584 <row> 916
585 <entry> 917 <colspec />
586 <para>max</para> 918
587 </entry> 919 <colspec />
588 920
589 <entry> 921 <colspec />
590 <para>15 </para> 922
591 </entry> 923 <colspec colname="7" />
592 924
593 <entry> 925 <thead>
594 <para>13 </para> 926 <row>
595 </entry> 927 <entry morerows="1" valign="middle">
596 928 <para>Latency [us]</para>
597 <entry> 929 </entry>
598 <para>42 </para> 930
599 </entry> 931 <entry nameend="7" namest="2">
600 932 <para>Stress Type</para>
601 <entry> 933 </entry>
602 <para>20 </para> 934 </row>
603 </entry> 935
604 936 <row>
605 <entry> 937 <entry>
606 <para>16 </para> 938 <para>no stress</para>
607 </entry> 939 </entry>
608 940
609 <entry> 941 <entry>
610 <para>32 </para> 942 <para>cpu</para>
611 </entry> 943 </entry>
612 </row> 944
613 </tbody> 945 <entry>
614 </tgroup> 946 <para>Io</para>
615 </table> 947 </entry>
948
949 <entry>
950 <para>vm</para>
951 </entry>
952
953 <entry>
954 <para>hdd</para>
955 </entry>
956
957 <entry>
958 <para>full</para>
959 </entry>
960 </row>
961 </thead>
962
963 <tbody>
964 <row>
965 <entry>
966 <para>Min</para>
967 </entry>
968
969 <entry>
970 <para>11 </para>
971 </entry>
972
973 <entry>
974 <para>11 </para>
975 </entry>
976
977 <entry>
978 <para>11 </para>
979 </entry>
980
981 <entry>
982 <para>11 </para>
983 </entry>
984
985 <entry>
986 <para>11 </para>
987 </entry>
988
989 <entry>
990 <para>11 </para>
991 </entry>
992 </row>
993
994 <row>
995 <entry>
996 <para>average</para>
997 </entry>
998
999 <entry>
1000 <para>28.4 </para>
1001 </entry>
1002
1003 <entry>
1004 <para>29.5 </para>
1005 </entry>
1006
1007 <entry>
1008 <para>27.6 </para>
1009 </entry>
1010
1011 <entry>
1012 <para>33.8 </para>
1013 </entry>
1014
1015 <entry>
1016 <para>29.7 </para>
1017 </entry>
1018
1019 <entry>
1020 <para>31.2 </para>
1021 </entry>
1022 </row>
1023
1024 <row>
1025 <entry>
1026 <para>max</para>
1027 </entry>
1028
1029 <entry>
1030 <para>135 </para>
1031 </entry>
1032
1033 <entry>
1034 <para>130 </para>
1035 </entry>
1036
1037 <entry>
1038 <para>137 </para>
1039 </entry>
1040
1041 <entry>
1042 <para>150 </para>
1043 </entry>
1044
1045 <entry>
1046 <para>173 </para>
1047 </entry>
1048
1049 <entry>
1050 <para>149</para>
1051 </entry>
1052 </row>
1053 </tbody>
1054 </tgroup>
1055 </table>
1056 </section>
616 </section> 1057 </section>
617</chapter> 1058</chapter>
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