diff options
| -rw-r--r-- | meta/conf/machine/include/riscv/arch-riscv.inc | 3 | ||||
| -rw-r--r-- | meta/conf/machine/include/riscv/tune-riscv.inc | 16 |
2 files changed, 17 insertions, 2 deletions
diff --git a/meta/conf/machine/include/riscv/arch-riscv.inc b/meta/conf/machine/include/riscv/arch-riscv.inc index 8ed9874389..e3dbef7fe3 100644 --- a/meta/conf/machine/include/riscv/arch-riscv.inc +++ b/meta/conf/machine/include/riscv/arch-riscv.inc | |||
| @@ -4,7 +4,8 @@ DEFAULTTUNE ?= "riscv64" | |||
| 4 | 4 | ||
| 5 | TUNE_ARCH = "${TUNE_ARCH_tune-${DEFAULTTUNE}}" | 5 | TUNE_ARCH = "${TUNE_ARCH_tune-${DEFAULTTUNE}}" |
| 6 | TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}" | 6 | TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}" |
| 7 | TUNE_CCARGS .= "" | 7 | TUNE_CCARGS_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv64nf', ' -mabi=lp64', ' ', d)}" |
| 8 | TUNE_CCARGS_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv32nf', ' -mabi=ilp32', ' ', d)}" | ||
| 8 | 9 | ||
| 9 | # QEMU usermode fails with invalid instruction error (For riscv32) | 10 | # QEMU usermode fails with invalid instruction error (For riscv32) |
| 10 | MACHINE_FEATURES_BACKFILL_CONSIDERED_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv32', ' qemu-usermode', '', d)}" | 11 | MACHINE_FEATURES_BACKFILL_CONSIDERED_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv32', ' qemu-usermode', '', d)}" |
diff --git a/meta/conf/machine/include/riscv/tune-riscv.inc b/meta/conf/machine/include/riscv/tune-riscv.inc index 25d0463492..741eeb34db 100644 --- a/meta/conf/machine/include/riscv/tune-riscv.inc +++ b/meta/conf/machine/include/riscv/tune-riscv.inc | |||
| @@ -3,10 +3,14 @@ require conf/machine/include/riscv/arch-riscv.inc | |||
| 3 | TUNEVALID[riscv64] = "Enable 64-bit RISC-V optimizations" | 3 | TUNEVALID[riscv64] = "Enable 64-bit RISC-V optimizations" |
| 4 | TUNEVALID[riscv32] = "Enable 32-bit RISC-V optimizations" | 4 | TUNEVALID[riscv32] = "Enable 32-bit RISC-V optimizations" |
| 5 | 5 | ||
| 6 | TUNEVALID[riscv64nf] = "Enable 64-bit RISC-V optimizations no floating point" | ||
| 7 | TUNEVALID[riscv32nf] = "Enable 32-bit RISC-V optimizations no floating point" | ||
| 8 | |||
| 6 | TUNEVALID[bigendian] = "Big endian mode" | 9 | TUNEVALID[bigendian] = "Big endian mode" |
| 7 | 10 | ||
| 8 | AVAILTUNES += "riscv64 riscv32" | 11 | AVAILTUNES += "riscv64 riscv32 riscv64nf riscv32nf" |
| 9 | 12 | ||
| 13 | # Default | ||
| 10 | TUNE_FEATURES_tune-riscv64 = "riscv64" | 14 | TUNE_FEATURES_tune-riscv64 = "riscv64" |
| 11 | TUNE_ARCH_tune-riscv64 = "riscv64" | 15 | TUNE_ARCH_tune-riscv64 = "riscv64" |
| 12 | TUNE_PKGARCH_tune-riscv64 = "riscv64" | 16 | TUNE_PKGARCH_tune-riscv64 = "riscv64" |
| @@ -17,3 +21,13 @@ TUNE_ARCH_tune-riscv32 = "riscv32" | |||
| 17 | TUNE_PKGARCH_tune-riscv32 = "riscv32" | 21 | TUNE_PKGARCH_tune-riscv32 = "riscv32" |
| 18 | PACKAGE_EXTRA_ARCHS_tune-riscv32 = "riscv32" | 22 | PACKAGE_EXTRA_ARCHS_tune-riscv32 = "riscv32" |
| 19 | 23 | ||
| 24 | # No float | ||
| 25 | TUNE_FEATURES_tune-riscv64nf = "${TUNE_FEATURES_tune-riscv64} riscv64nf" | ||
| 26 | TUNE_ARCH_tune-riscv64nf = "riscv64" | ||
| 27 | TUNE_PKGARCH_tune-riscv64nf = "riscv64" | ||
| 28 | PACKAGE_EXTRA_ARCHS_tune-riscv64nf = "riscv64nf" | ||
| 29 | |||
| 30 | TUNE_FEATURES_tune-riscv32nf = "${TUNE_FEATURES_tune-riscv32} riscv32nf" | ||
| 31 | TUNE_ARCH_tune-riscv32nf = "riscv32" | ||
| 32 | TUNE_PKGARCH_tune-riscv32nf = "riscv32" | ||
| 33 | PACKAGE_EXTRA_ARCHS_tune-riscv32nf = "riscv32nf" | ||
