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-rw-r--r--meta/recipes-bsp/u-boot/u-boot-fw-utils_2015.10.bb (renamed from meta/recipes-bsp/u-boot/u-boot-fw-utils_2015.07.bb)6
-rw-r--r--meta/recipes-bsp/u-boot/u-boot-mkimage_2015.10.bb (renamed from meta/recipes-bsp/u-boot/u-boot-mkimage_2015.07.bb)6
-rw-r--r--meta/recipes-bsp/u-boot/u-boot/0001-powerpc-cpu-u-boot-.lds-remove-_GLOBAL_OFFSET_TABLE_.patch (renamed from meta/recipes-bsp/u-boot/u-boot/0001-u-boot-mpc85xx-u-boot-.lds-remove-_GLOBAL_OFFSET_TAB.patch)11
-rw-r--r--meta/recipes-bsp/u-boot/u-boot/0002-image.c-Fix-non-Android-booting-with-ramdisk-and-or-.patch36
-rw-r--r--meta/recipes-bsp/u-boot/u-boot/0003-common-board_f-enable-setup_board_part1-for-MIPS.patch59
-rw-r--r--meta/recipes-bsp/u-boot/u-boot/0004-MIPS-bootm-rework-and-fix-broken-bootm-code.patch254
-rw-r--r--meta/recipes-bsp/u-boot/u-boot/0005-MIPS-bootm-use-CONFIG_IS_ENABLED-everywhere.patch93
-rw-r--r--meta/recipes-bsp/u-boot/u-boot/0006-Replace-extern-inline-with-static-inline.patch1184
-rw-r--r--meta/recipes-bsp/u-boot/u-boot_2015.07.bb14
-rw-r--r--meta/recipes-bsp/u-boot/u-boot_2015.10.bb19
10 files changed, 1657 insertions, 25 deletions
diff --git a/meta/recipes-bsp/u-boot/u-boot-fw-utils_2015.07.bb b/meta/recipes-bsp/u-boot/u-boot-fw-utils_2015.10.bb
index 0df7a059d7..93c06e18c4 100644
--- a/meta/recipes-bsp/u-boot/u-boot-fw-utils_2015.07.bb
+++ b/meta/recipes-bsp/u-boot/u-boot-fw-utils_2015.10.bb
@@ -4,12 +4,12 @@ LIC_FILES_CHKSUM = "file://Licenses/README;md5=0507cd7da8e7ad6d6701926ec9b84c95"
4SECTION = "bootloader" 4SECTION = "bootloader"
5DEPENDS = "mtd-utils" 5DEPENDS = "mtd-utils"
6 6
7# This revision corresponds to the tag "v2015.07" 7# This revision corresponds to the tag "v2015.10"
8# We use the revision in order to avoid having to fetch it from the 8# We use the revision in order to avoid having to fetch it from the
9# repo during parse 9# repo during parse
10SRCREV = "33711bdd4a4dce942fb5ae85a68899a8357bdd94" 10SRCREV = "5ec0003b19cbdf06ccd6941237cbc0d1c3468e2d"
11 11
12PV = "v2015.07+git${SRCPV}" 12PV = "v2015.10+git${SRCPV}"
13 13
14SRC_URI = "git://git.denx.de/u-boot.git;branch=master" 14SRC_URI = "git://git.denx.de/u-boot.git;branch=master"
15 15
diff --git a/meta/recipes-bsp/u-boot/u-boot-mkimage_2015.07.bb b/meta/recipes-bsp/u-boot/u-boot-mkimage_2015.10.bb
index ba29bbb922..301b6e2bec 100644
--- a/meta/recipes-bsp/u-boot/u-boot-mkimage_2015.07.bb
+++ b/meta/recipes-bsp/u-boot/u-boot-mkimage_2015.10.bb
@@ -5,12 +5,12 @@ SECTION = "bootloader"
5 5
6DEPENDS = "openssl" 6DEPENDS = "openssl"
7 7
8# This revision corresponds to the tag "v2015.07" 8# This revision corresponds to the tag "v2015.10"
9# We use the revision in order to avoid having to fetch it from the 9# We use the revision in order to avoid having to fetch it from the
10# repo during parse 10# repo during parse
11SRCREV = "33711bdd4a4dce942fb5ae85a68899a8357bdd94" 11SRCREV = "5ec0003b19cbdf06ccd6941237cbc0d1c3468e2d"
12 12
13PV = "v2015.07+git${SRCPV}" 13PV = "v2015.10+git${SRCPV}"
14 14
15SRC_URI = "git://git.denx.de/u-boot.git;branch=master" 15SRC_URI = "git://git.denx.de/u-boot.git;branch=master"
16 16
diff --git a/meta/recipes-bsp/u-boot/u-boot/0001-u-boot-mpc85xx-u-boot-.lds-remove-_GLOBAL_OFFSET_TAB.patch b/meta/recipes-bsp/u-boot/u-boot/0001-powerpc-cpu-u-boot-.lds-remove-_GLOBAL_OFFSET_TABLE_.patch
index dfbcd45bea..b709acf40a 100644
--- a/meta/recipes-bsp/u-boot/u-boot/0001-u-boot-mpc85xx-u-boot-.lds-remove-_GLOBAL_OFFSET_TAB.patch
+++ b/meta/recipes-bsp/u-boot/u-boot/0001-powerpc-cpu-u-boot-.lds-remove-_GLOBAL_OFFSET_TABLE_.patch
@@ -1,7 +1,7 @@
1From 92598e1515b2ec3851af1f064075d0457f01272d Mon Sep 17 00:00:00 2001 1From 47092c85a2d3dea6fb3ffa59ae6fe737112db93e Mon Sep 17 00:00:00 2001
2From: Zhenhua Luo <zhenhua.luo@freescale.com> 2From: Zhenhua Luo <zhenhua.luo@freescale.com>
3Date: Mon, 9 Feb 2015 18:33:56 +0800 3Date: Mon, 9 Feb 2015 18:33:56 +0800
4Subject: [PATCH] powerpc/cpu/*/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ 4Subject: [PATCH 1/6] powerpc/cpu/*/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_
5 definition 5 definition
6Organization: O.S. Systems Software LTDA. 6Organization: O.S. Systems Software LTDA.
7 7
@@ -17,9 +17,10 @@ section should be used(https://sourceware.org/ml/binutils/2008-09/msg00122.html)
17Fixed the following build errors with binutils-2.25: 17Fixed the following build errors with binutils-2.25:
18| powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got 18| powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got
19 19
20Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
21
22Upstream-Status: Pending 20Upstream-Status: Pending
21
22Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
23Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
23--- 24---
24 arch/powerpc/cpu/mpc512x/u-boot.lds | 1 - 25 arch/powerpc/cpu/mpc512x/u-boot.lds | 1 -
25 arch/powerpc/cpu/mpc5xx/u-boot.lds | 1 - 26 arch/powerpc/cpu/mpc5xx/u-boot.lds | 1 -
@@ -180,5 +181,5 @@ index 1980508..55dd4e1 100644
180 KEEP(*(.fixup)) 181 KEEP(*(.fixup))
181 } 182 }
182-- 183--
1832.4.6 1842.6.2
184 185
diff --git a/meta/recipes-bsp/u-boot/u-boot/0002-image.c-Fix-non-Android-booting-with-ramdisk-and-or-.patch b/meta/recipes-bsp/u-boot/u-boot/0002-image.c-Fix-non-Android-booting-with-ramdisk-and-or-.patch
new file mode 100644
index 0000000000..0d1a714f4c
--- /dev/null
+++ b/meta/recipes-bsp/u-boot/u-boot/0002-image.c-Fix-non-Android-booting-with-ramdisk-and-or-.patch
@@ -0,0 +1,36 @@
1From 0a8c59720155c30f01d4cd1c53da3647a3f4decd Mon Sep 17 00:00:00 2001
2From: Tom Rini <trini@konsulko.com>
3Date: Tue, 27 Oct 2015 19:04:40 -0400
4Subject: [PATCH 2/6] image.c: Fix non-Android booting with ramdisk and/or
5 device tree
6Organization: O.S. Systems Software LTDA.
7
8In 1fec3c5 I added a check that if we had an Android image we default to
9trying the kernel address for a ramdisk. However when we don't have an
10Android image buf is NULL and we oops here. Ensure that we have 'buf'
11to check first.
12
13Upstream-Status: Backport [2016.01]
14
15Reported-by: elipe Balbi <balbi@ti.com>
16Signed-off-by: Tom Rini <trini@konsulko.com>
17---
18 common/image.c | 2 +-
19 1 file changed, 1 insertion(+), 1 deletion(-)
20
21diff --git a/common/image.c b/common/image.c
22index e607109..85c4f39 100644
23--- a/common/image.c
24+++ b/common/image.c
25@@ -913,7 +913,7 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
26 * Look for an Android boot image.
27 */
28 buf = map_sysmem(images->os.start, 0);
29- if (genimg_get_format(buf) == IMAGE_FORMAT_ANDROID)
30+ if (buf && genimg_get_format(buf) == IMAGE_FORMAT_ANDROID)
31 select = argv[0];
32 #endif
33
34--
352.6.2
36
diff --git a/meta/recipes-bsp/u-boot/u-boot/0003-common-board_f-enable-setup_board_part1-for-MIPS.patch b/meta/recipes-bsp/u-boot/u-boot/0003-common-board_f-enable-setup_board_part1-for-MIPS.patch
new file mode 100644
index 0000000000..45d20b8a4b
--- /dev/null
+++ b/meta/recipes-bsp/u-boot/u-boot/0003-common-board_f-enable-setup_board_part1-for-MIPS.patch
@@ -0,0 +1,59 @@
1From e5ebba40a3b8a1405e48d49dc873ffe2fa1963a1 Mon Sep 17 00:00:00 2001
2From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3Date: Sun, 1 Nov 2015 17:36:13 +0100
4Subject: [PATCH 3/6] common/board_f: enable setup_board_part1() for MIPS
5Organization: O.S. Systems Software LTDA.
6
7The variables bd_t:bi_memstart and bd_t:bi_memsize have to be
8initialized also on MIPS. Otherwise LMB and cmd_bdinfo do not
9correctly work. This currently breaks the booting of FIT images
10on MIPS. Enable the board_init_f hook setup_board_part1()
11for MIPS to fix this.
12
13Upstream-Status: Backport [2016.01]
14
15Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
16Reviewed-by: Tom Rini <trini@konsulko.com>
17Reviewed-by: Simon Glass <sjg@chromium.org>
18---
19 common/board_f.c | 8 ++++++--
20 1 file changed, 6 insertions(+), 2 deletions(-)
21
22diff --git a/common/board_f.c b/common/board_f.c
23index 613332e..33cc5c0 100644
24--- a/common/board_f.c
25+++ b/common/board_f.c
26@@ -551,7 +551,7 @@ static int display_new_sp(void)
27 return 0;
28 }
29
30-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
31+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
32 static int setup_board_part1(void)
33 {
34 bd_t *bd = gd->bd;
35@@ -580,7 +580,9 @@ static int setup_board_part1(void)
36
37 return 0;
38 }
39+#endif
40
41+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
42 static int setup_board_part2(void)
43 {
44 bd_t *bd = gd->bd;
45@@ -933,8 +935,10 @@ static init_fnc_t init_sequence_f[] = {
46 reserve_stacks,
47 setup_dram_config,
48 show_dram_config,
49-#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
50+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
51 setup_board_part1,
52+#endif
53+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
54 INIT_FUNC_WATCHDOG_RESET
55 setup_board_part2,
56 #endif
57--
582.6.2
59
diff --git a/meta/recipes-bsp/u-boot/u-boot/0004-MIPS-bootm-rework-and-fix-broken-bootm-code.patch b/meta/recipes-bsp/u-boot/u-boot/0004-MIPS-bootm-rework-and-fix-broken-bootm-code.patch
new file mode 100644
index 0000000000..5692c6056c
--- /dev/null
+++ b/meta/recipes-bsp/u-boot/u-boot/0004-MIPS-bootm-rework-and-fix-broken-bootm-code.patch
@@ -0,0 +1,254 @@
1From da9d99765476b10fe0a75140a2d4c1f284ffc333 Mon Sep 17 00:00:00 2001
2From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3Date: Sun, 1 Nov 2015 17:36:14 +0100
4Subject: [PATCH 4/6] MIPS: bootm: rework and fix broken bootm code
5Organization: O.S. Systems Software LTDA.
6
7The move to 'generic board' as well as changes in the generic
8bootm code broke the boot of FIT uImage's. Especially uImage's
9with additional initramfs images or FDT's do not work anymore.
10
11Refactor the bootm code to work again with the generic bootm code.
12
13Always relocate ramdisk and FDT in step 'bootm prep' because the
14generic bootm code does this only for legacy uImage's.
15
16Move the step 'bootm cmdline' to 'bootm prep' because the Linux
17kernel parameters rd_start and rd_size have to be initialized after
18the relocation of the ramdisk.
19
20Furthermore support the step 'bootm fake'.
21
22Upstream-Status: Backport [2016.01]
23
24Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
25Reviewed-by: Tom Rini <trini@konsulko.com>
26Reviewed-by: Simon Glass <sjg@chromium.org>
27---
28 arch/mips/lib/bootm.c | 163 ++++++++++++++++++++++++--------------------------
29 1 file changed, 78 insertions(+), 85 deletions(-)
30
31diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
32index 9c647aa..a7eddd3 100644
33--- a/arch/mips/lib/bootm.c
34+++ b/arch/mips/lib/bootm.c
35@@ -21,18 +21,6 @@ DECLARE_GLOBAL_DATA_PTR;
36 #define mips_boot_malta 0
37 #endif
38
39-#if defined(CONFIG_MIPS_BOOT_CMDLINE_LEGACY)
40-#define mips_boot_cmdline_legacy 1
41-#else
42-#define mips_boot_cmdline_legacy 0
43-#endif
44-
45-#if defined(CONFIG_MIPS_BOOT_ENV_LEGACY)
46-#define mips_boot_env_legacy 1
47-#else
48-#define mips_boot_env_legacy 0
49-#endif
50-
51 static int linux_argc;
52 static char **linux_argv;
53 static char *linux_argp;
54@@ -62,50 +50,6 @@ void arch_lmb_reserve(struct lmb *lmb)
55 lmb_reserve(lmb, sp, CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp);
56 }
57
58-static int boot_setup_linux(bootm_headers_t *images)
59-{
60- int ret;
61- ulong rd_len;
62-
63- rd_len = images->rd_end - images->rd_start;
64- ret = boot_ramdisk_high(&images->lmb, images->rd_start,
65- rd_len, &images->initrd_start, &images->initrd_end);
66- if (ret)
67- return ret;
68-
69-#if defined(CONFIG_MIPS_BOOT_FDT) && defined(CONFIG_OF_LIBFDT)
70- if (images->ft_len) {
71- boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
72-
73- ret = boot_relocate_fdt(&images->lmb, &images->ft_addr,
74- &images->ft_len);
75- if (ret)
76- return ret;
77- }
78-#endif
79-
80- return 0;
81-}
82-
83-static void boot_setup_fdt(bootm_headers_t *images)
84-{
85-#if defined(CONFIG_MIPS_BOOT_FDT) && defined(CONFIG_OF_LIBFDT)
86- u64 mem_start = 0;
87- u64 mem_size = gd->ram_size;
88-
89- debug("## setup FDT\n");
90-
91- fdt_chosen(images->ft_addr);
92- fdt_fixup_memory_banks(images->ft_addr, &mem_start, &mem_size, 1);
93- fdt_fixup_ethernet(images->ft_addr);
94- fdt_initrd(images->ft_addr, images->initrd_start, images->initrd_end);
95-
96-#if defined(CONFIG_OF_BOARD_SETUP)
97- ft_board_setup(images->ft_addr, gd->bd);
98-#endif
99-#endif
100-}
101-
102 static void linux_cmdline_init(void)
103 {
104 linux_argc = 1;
105@@ -197,18 +141,6 @@ static void linux_cmdline_append(bootm_headers_t *images)
106 }
107 }
108
109-static void boot_cmdline_linux(bootm_headers_t *images)
110-{
111- if (mips_boot_cmdline_legacy && !images->ft_len) {
112- linux_cmdline_legacy(images);
113-
114- if (!mips_boot_env_legacy)
115- linux_cmdline_append(images);
116-
117- linux_cmdline_dump();
118- }
119-}
120-
121 static void linux_env_init(void)
122 {
123 linux_env = (char **)(((ulong) linux_argp + 15) & ~15);
124@@ -288,13 +220,81 @@ static void linux_env_legacy(bootm_headers_t *images)
125 }
126 }
127
128+static int boot_reloc_ramdisk(bootm_headers_t *images)
129+{
130+ ulong rd_len = images->rd_end - images->rd_start;
131+
132+ /*
133+ * In case of legacy uImage's, relocation of ramdisk is already done
134+ * by do_bootm_states() and should not repeated in 'bootm prep'.
135+ */
136+ if (images->state & BOOTM_STATE_RAMDISK) {
137+ debug("## Ramdisk already relocated\n");
138+ return 0;
139+ }
140+
141+ return boot_ramdisk_high(&images->lmb, images->rd_start,
142+ rd_len, &images->initrd_start, &images->initrd_end);
143+}
144+
145+static int boot_reloc_fdt(bootm_headers_t *images)
146+{
147+ /*
148+ * In case of legacy uImage's, relocation of FDT is already done
149+ * by do_bootm_states() and should not repeated in 'bootm prep'.
150+ */
151+ if (images->state & BOOTM_STATE_FDT) {
152+ debug("## FDT already relocated\n");
153+ return 0;
154+ }
155+
156+#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
157+ boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
158+ return boot_relocate_fdt(&images->lmb, &images->ft_addr,
159+ &images->ft_len);
160+#else
161+ return 0;
162+#endif
163+}
164+
165+int arch_fixup_memory_node(void *blob)
166+{
167+#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
168+ u64 mem_start = 0;
169+ u64 mem_size = gd->ram_size;
170+
171+ return fdt_fixup_memory_banks(blob, &mem_start, &mem_size, 1);
172+#else
173+ return 0;
174+#endif
175+}
176+
177+static int boot_setup_fdt(bootm_headers_t *images)
178+{
179+ return image_setup_libfdt(images, images->ft_addr, images->ft_len,
180+ &images->lmb);
181+}
182+
183 static void boot_prep_linux(bootm_headers_t *images)
184 {
185- if (mips_boot_env_legacy && !images->ft_len)
186- linux_env_legacy(images);
187+ boot_reloc_ramdisk(images);
188
189- if (images->ft_len)
190+ if (CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && images->ft_len) {
191+ boot_reloc_fdt(images);
192 boot_setup_fdt(images);
193+ } else {
194+ if (CONFIG_IS_ENABLED(CONFIG_MIPS_BOOT_ENV_LEGACY))
195+ linux_env_legacy(images);
196+
197+ if (CONFIG_IS_ENABLED(MIPS_BOOT_CMDLINE_LEGACY)) {
198+ linux_cmdline_legacy(images);
199+
200+ if (!CONFIG_IS_ENABLED(CONFIG_MIPS_BOOT_ENV_LEGACY))
201+ linux_cmdline_append(images);
202+
203+ linux_cmdline_dump();
204+ }
205+ }
206 }
207
208 static void boot_jump_linux(bootm_headers_t *images)
209@@ -327,35 +327,28 @@ static void boot_jump_linux(bootm_headers_t *images)
210 int do_bootm_linux(int flag, int argc, char * const argv[],
211 bootm_headers_t *images)
212 {
213- int ret;
214-
215 /* No need for those on MIPS */
216 if (flag & BOOTM_STATE_OS_BD_T)
217 return -1;
218
219- if (flag & BOOTM_STATE_OS_CMDLINE) {
220- boot_cmdline_linux(images);
221+ /*
222+ * Cmdline init has been moved to 'bootm prep' because it has to be
223+ * done after relocation of ramdisk to always pass correct values
224+ * for rd_start and rd_size to Linux kernel.
225+ */
226+ if (flag & BOOTM_STATE_OS_CMDLINE)
227 return 0;
228- }
229
230 if (flag & BOOTM_STATE_OS_PREP) {
231 boot_prep_linux(images);
232 return 0;
233 }
234
235- if (flag & BOOTM_STATE_OS_GO) {
236+ if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
237 boot_jump_linux(images);
238 return 0;
239 }
240
241- ret = boot_setup_linux(images);
242- if (ret)
243- return ret;
244-
245- boot_cmdline_linux(images);
246- boot_prep_linux(images);
247- boot_jump_linux(images);
248-
249 /* does not return */
250 return 1;
251 }
252--
2532.6.2
254
diff --git a/meta/recipes-bsp/u-boot/u-boot/0005-MIPS-bootm-use-CONFIG_IS_ENABLED-everywhere.patch b/meta/recipes-bsp/u-boot/u-boot/0005-MIPS-bootm-use-CONFIG_IS_ENABLED-everywhere.patch
new file mode 100644
index 0000000000..210ca4dae7
--- /dev/null
+++ b/meta/recipes-bsp/u-boot/u-boot/0005-MIPS-bootm-use-CONFIG_IS_ENABLED-everywhere.patch
@@ -0,0 +1,93 @@
1From ebaf1eda6f3b8a339837bc0dbcbb9002d751ab75 Mon Sep 17 00:00:00 2001
2From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3Date: Sun, 1 Nov 2015 17:36:15 +0100
4Subject: [PATCH 5/6] MIPS: bootm: use CONFIG_IS_ENABLED() everywhere
5Organization: O.S. Systems Software LTDA.
6
7Upstream-Status: Backport [2016.01]
8
9Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
10Reviewed-by: Tom Rini <trini@konsulko.com>
11---
12 arch/mips/lib/bootm.c | 33 ++++++++++++++-------------------
13 1 file changed, 14 insertions(+), 19 deletions(-)
14
15diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
16index a7eddd3..eed159c 100644
17--- a/arch/mips/lib/bootm.c
18+++ b/arch/mips/lib/bootm.c
19@@ -15,12 +15,6 @@ DECLARE_GLOBAL_DATA_PTR;
20 #define LINUX_MAX_ENVS 256
21 #define LINUX_MAX_ARGS 256
22
23-#if defined(CONFIG_MALTA)
24-#define mips_boot_malta 1
25-#else
26-#define mips_boot_malta 0
27-#endif
28-
29 static int linux_argc;
30 static char **linux_argv;
31 static char *linux_argp;
32@@ -157,7 +151,7 @@ static void linux_env_set(const char *env_name, const char *env_val)
33 strcpy(linux_env_p, env_name);
34 linux_env_p += strlen(env_name);
35
36- if (mips_boot_malta) {
37+ if (CONFIG_IS_ENABLED(MALTA)) {
38 linux_env_p++;
39 linux_env[++linux_env_idx] = linux_env_p;
40 } else {
41@@ -178,14 +172,15 @@ static void linux_env_legacy(bootm_headers_t *images)
42 const char *cp;
43 ulong rd_start, rd_size;
44
45-#ifdef CONFIG_MEMSIZE_IN_BYTES
46- sprintf(env_buf, "%lu", (ulong)gd->ram_size);
47- debug("## Giving linux memsize in bytes, %lu\n", (ulong)gd->ram_size);
48-#else
49- sprintf(env_buf, "%lu", (ulong)(gd->ram_size >> 20));
50- debug("## Giving linux memsize in MB, %lu\n",
51- (ulong)(gd->ram_size >> 20));
52-#endif /* CONFIG_MEMSIZE_IN_BYTES */
53+ if (CONFIG_IS_ENABLED(MEMSIZE_IN_BYTES)) {
54+ sprintf(env_buf, "%lu", (ulong)gd->ram_size);
55+ debug("## Giving linux memsize in bytes, %lu\n",
56+ (ulong)gd->ram_size);
57+ } else {
58+ sprintf(env_buf, "%lu", (ulong)(gd->ram_size >> 20));
59+ debug("## Giving linux memsize in MB, %lu\n",
60+ (ulong)(gd->ram_size >> 20));
61+ }
62
63 rd_start = UNCACHED_SDRAM(images->initrd_start);
64 rd_size = images->initrd_end - images->initrd_start;
65@@ -214,7 +209,7 @@ static void linux_env_legacy(bootm_headers_t *images)
66 if (cp)
67 linux_env_set("eth1addr", cp);
68
69- if (mips_boot_malta) {
70+ if (CONFIG_IS_ENABLED(MALTA)) {
71 sprintf(env_buf, "%un8r", gd->baudrate);
72 linux_env_set("modetty0", env_buf);
73 }
74@@ -307,13 +302,13 @@ static void boot_jump_linux(bootm_headers_t *images)
75
76 bootstage_mark(BOOTSTAGE_ID_RUN_OS);
77
78- if (mips_boot_malta)
79+ if (CONFIG_IS_ENABLED(MALTA))
80 linux_extra = gd->ram_size;
81
82-#ifdef CONFIG_BOOTSTAGE_FDT
83+#if CONFIG_IS_ENABLED(BOOTSTAGE_FDT)
84 bootstage_fdt_add_report();
85 #endif
86-#ifdef CONFIG_BOOTSTAGE_REPORT
87+#if CONFIG_IS_ENABLED(BOOTSTAGE_REPORT)
88 bootstage_report();
89 #endif
90
91--
922.6.2
93
diff --git a/meta/recipes-bsp/u-boot/u-boot/0006-Replace-extern-inline-with-static-inline.patch b/meta/recipes-bsp/u-boot/u-boot/0006-Replace-extern-inline-with-static-inline.patch
new file mode 100644
index 0000000000..52ef687cc6
--- /dev/null
+++ b/meta/recipes-bsp/u-boot/u-boot/0006-Replace-extern-inline-with-static-inline.patch
@@ -0,0 +1,1184 @@
1From 69ce393f6ef57a8a0029df78dbdc9f9def2dbb8c Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?M=C3=A5ns=20Rullg=C3=A5rd?= <mans@mansr.com>
3Date: Fri, 6 Nov 2015 12:44:01 +0000
4Subject: [PATCH 6/6] Replace "extern inline" with "static inline"
5Organization: O.S. Systems Software LTDA.
6
7A number of headers define functions as "extern inline" which is
8causing problems with gcc5. The reason is that starting with
9version 5.1, gcc defaults to the standard C99 semantics for the
10inline keyword.
11
12Under the traditional GNU inline semantics, an "extern inline"
13function would never create an external definition, the same
14as inline *without* extern in C99. In C99, and "extern inline"
15definition is simply an external definition with an inline hint.
16In short, the meanings of inline with and without extern are
17swapped between GNU and C99.
18
19The upshot is that all these definitions in header files create
20an external definition wherever those headers are included,
21resulting in multiple definition errors at link time.
22
23Changing all these functions to "static inline" fixes the problem
24since this works as desired in all gcc versions. Although the
25semantics are slightly different (a static inline definition may
26result in an actual function being emitted), it works as intended
27in practice.
28
29This patch also removes extern prototype declarations for the
30changed functions where they existed.
31
32Upstream-Status: Submitted [https://patchwork.ozlabs.org/patch/540952/]
33
34Signed-off-by: Mans Rullgard <mans@mansr.com>
35Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
36---
37 arch/blackfin/include/asm/delay.h | 4 +--
38 arch/m68k/include/asm/bitops.h | 5 ++--
39 arch/m68k/include/asm/byteorder.h | 8 +++---
40 arch/m68k/include/asm/io.h | 40 ++++++++++++++---------------
41 arch/powerpc/include/asm/atomic.h | 8 +++---
42 arch/powerpc/include/asm/bitops.h | 35 ++++++++++---------------
43 arch/powerpc/include/asm/byteorder.h | 8 +++---
44 arch/powerpc/include/asm/io.h | 20 +++++++--------
45 arch/powerpc/include/asm/iopin_8260.h | 40 ++++++++++++++---------------
46 arch/powerpc/include/asm/iopin_8xx.h | 48 +++++++++++++++++------------------
47 arch/sparc/include/asm/irq.h | 4 +--
48 arch/sparc/include/asm/psr.h | 6 ++---
49 arch/sparc/include/asm/srmmu.h | 30 +++++++++++-----------
50 include/mpc8260.h | 2 +-
51 14 files changed, 125 insertions(+), 133 deletions(-)
52
53diff --git a/arch/blackfin/include/asm/delay.h b/arch/blackfin/include/asm/delay.h
54index 97401a7..f146efd 100644
55--- a/arch/blackfin/include/asm/delay.h
56+++ b/arch/blackfin/include/asm/delay.h
57@@ -16,7 +16,7 @@
58 * Delay routines, using a pre-computed "loops_per_second" value.
59 */
60
61-extern __inline__ void __delay(unsigned long loops)
62+static __inline__ void __delay(unsigned long loops)
63 {
64 __asm__ __volatile__("1:\t%0 += -1;\n\t"
65 "cc = %0 == 0;\n\t"
66@@ -31,7 +31,7 @@ extern __inline__ void __delay(unsigned long loops)
67 * first constant multiplications gets optimized away if the delay is
68 * a constant)
69 */
70-extern __inline__ void __udelay(unsigned long usecs)
71+static __inline__ void __udelay(unsigned long usecs)
72 {
73 __delay(usecs);
74 }
75diff --git a/arch/m68k/include/asm/bitops.h b/arch/m68k/include/asm/bitops.h
76index f9c434b..6b79a0d 100644
77--- a/arch/m68k/include/asm/bitops.h
78+++ b/arch/m68k/include/asm/bitops.h
79@@ -10,21 +10,20 @@
80 extern void set_bit(int nr, volatile void *addr);
81 extern void clear_bit(int nr, volatile void *addr);
82 extern void change_bit(int nr, volatile void *addr);
83-extern int test_and_set_bit(int nr, volatile void *addr);
84 extern int test_and_clear_bit(int nr, volatile void *addr);
85 extern int test_and_change_bit(int nr, volatile void *addr);
86
87 #ifdef __KERNEL__
88
89
90-extern inline int test_bit(int nr, __const__ volatile void *addr)
91+static inline int test_bit(int nr, __const__ volatile void *addr)
92 {
93 __const__ unsigned int *p = (__const__ unsigned int *) addr;
94
95 return (p[nr >> 5] & (1UL << (nr & 31))) != 0;
96 }
97
98-extern inline int test_and_set_bit(int nr, volatile void *vaddr)
99+static inline int test_and_set_bit(int nr, volatile void *vaddr)
100 {
101 char retval;
102
103diff --git a/arch/m68k/include/asm/byteorder.h b/arch/m68k/include/asm/byteorder.h
104index 908a99b..7244b75 100644
105--- a/arch/m68k/include/asm/byteorder.h
106+++ b/arch/m68k/include/asm/byteorder.h
107@@ -22,25 +22,25 @@
108 (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
109 (((__u32)(x)) >> 24) ))
110
111-extern __inline__ unsigned ld_le16(const volatile unsigned short *addr)
112+static __inline__ unsigned ld_le16(const volatile unsigned short *addr)
113 {
114 unsigned result = *addr;
115 return __sw16(result);
116 }
117
118-extern __inline__ void st_le16(volatile unsigned short *addr,
119+static __inline__ void st_le16(volatile unsigned short *addr,
120 const unsigned val)
121 {
122 *addr = __sw16(val);
123 }
124
125-extern __inline__ unsigned ld_le32(const volatile unsigned *addr)
126+static __inline__ unsigned ld_le32(const volatile unsigned *addr)
127 {
128 unsigned result = *addr;
129 return __sw32(result);
130 }
131
132-extern __inline__ void st_le32(volatile unsigned *addr, const unsigned val)
133+static __inline__ void st_le32(volatile unsigned *addr, const unsigned val)
134 {
135 *addr = __sw32(val);
136 }
137diff --git a/arch/m68k/include/asm/io.h b/arch/m68k/include/asm/io.h
138index 2d2a519..384308b 100644
139--- a/arch/m68k/include/asm/io.h
140+++ b/arch/m68k/include/asm/io.h
141@@ -67,28 +67,28 @@
142
143 #define mb() __asm__ __volatile__ ("" : : : "memory")
144
145-extern inline void _insb(volatile u8 * port, void *buf, int ns)
146+static inline void _insb(volatile u8 * port, void *buf, int ns)
147 {
148 u8 *data = (u8 *) buf;
149 while (ns--)
150 *data++ = *port;
151 }
152
153-extern inline void _outsb(volatile u8 * port, const void *buf, int ns)
154+static inline void _outsb(volatile u8 * port, const void *buf, int ns)
155 {
156 u8 *data = (u8 *) buf;
157 while (ns--)
158 *port = *data++;
159 }
160
161-extern inline void _insw(volatile u16 * port, void *buf, int ns)
162+static inline void _insw(volatile u16 * port, void *buf, int ns)
163 {
164 u16 *data = (u16 *) buf;
165 while (ns--)
166 *data++ = __sw16(*port);
167 }
168
169-extern inline void _outsw(volatile u16 * port, const void *buf, int ns)
170+static inline void _outsw(volatile u16 * port, const void *buf, int ns)
171 {
172 u16 *data = (u16 *) buf;
173 while (ns--) {
174@@ -97,14 +97,14 @@ extern inline void _outsw(volatile u16 * port, const void *buf, int ns)
175 }
176 }
177
178-extern inline void _insl(volatile u32 * port, void *buf, int nl)
179+static inline void _insl(volatile u32 * port, void *buf, int nl)
180 {
181 u32 *data = (u32 *) buf;
182 while (nl--)
183 *data++ = __sw32(*port);
184 }
185
186-extern inline void _outsl(volatile u32 * port, const void *buf, int nl)
187+static inline void _outsl(volatile u32 * port, const void *buf, int nl)
188 {
189 u32 *data = (u32 *) buf;
190 while (nl--) {
191@@ -113,14 +113,14 @@ extern inline void _outsl(volatile u32 * port, const void *buf, int nl)
192 }
193 }
194
195-extern inline void _insw_ns(volatile u16 * port, void *buf, int ns)
196+static inline void _insw_ns(volatile u16 * port, void *buf, int ns)
197 {
198 u16 *data = (u16 *) buf;
199 while (ns--)
200 *data++ = *port;
201 }
202
203-extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
204+static inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
205 {
206 u16 *data = (u16 *) buf;
207 while (ns--) {
208@@ -128,14 +128,14 @@ extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
209 }
210 }
211
212-extern inline void _insl_ns(volatile u32 * port, void *buf, int nl)
213+static inline void _insl_ns(volatile u32 * port, void *buf, int nl)
214 {
215 u32 *data = (u32 *) buf;
216 while (nl--)
217 *data++ = *port;
218 }
219
220-extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
221+static inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
222 {
223 u32 *data = (u32 *) buf;
224 while (nl--) {
225@@ -159,52 +159,52 @@ extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
226 /*
227 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
228 */
229-extern inline int in_8(volatile u8 * addr)
230+static inline int in_8(volatile u8 * addr)
231 {
232 return (int)*addr;
233 }
234
235-extern inline void out_8(volatile u8 * addr, int val)
236+static inline void out_8(volatile u8 * addr, int val)
237 {
238 *addr = (u8) val;
239 }
240
241-extern inline int in_le16(volatile u16 * addr)
242+static inline int in_le16(volatile u16 * addr)
243 {
244 return __sw16(*addr);
245 }
246
247-extern inline int in_be16(volatile u16 * addr)
248+static inline int in_be16(volatile u16 * addr)
249 {
250 return (*addr & 0xFFFF);
251 }
252
253-extern inline void out_le16(volatile u16 * addr, int val)
254+static inline void out_le16(volatile u16 * addr, int val)
255 {
256 *addr = __sw16(val);
257 }
258
259-extern inline void out_be16(volatile u16 * addr, int val)
260+static inline void out_be16(volatile u16 * addr, int val)
261 {
262 *addr = (u16) val;
263 }
264
265-extern inline unsigned in_le32(volatile u32 * addr)
266+static inline unsigned in_le32(volatile u32 * addr)
267 {
268 return __sw32(*addr);
269 }
270
271-extern inline unsigned in_be32(volatile u32 * addr)
272+static inline unsigned in_be32(volatile u32 * addr)
273 {
274 return (*addr);
275 }
276
277-extern inline void out_le32(volatile unsigned *addr, int val)
278+static inline void out_le32(volatile unsigned *addr, int val)
279 {
280 *addr = __sw32(val);
281 }
282
283-extern inline void out_be32(volatile unsigned *addr, int val)
284+static inline void out_be32(volatile unsigned *addr, int val)
285 {
286 *addr = val;
287 }
288diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
289index 43a2bb2..87efcca 100644
290--- a/arch/powerpc/include/asm/atomic.h
291+++ b/arch/powerpc/include/asm/atomic.h
292@@ -19,7 +19,7 @@ typedef struct { int counter; } atomic_t;
293 extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
294 extern void atomic_set_mask(unsigned long mask, unsigned long *addr);
295
296-extern __inline__ int atomic_add_return(int a, atomic_t *v)
297+static __inline__ int atomic_add_return(int a, atomic_t *v)
298 {
299 int t;
300
301@@ -35,7 +35,7 @@ extern __inline__ int atomic_add_return(int a, atomic_t *v)
302 return t;
303 }
304
305-extern __inline__ int atomic_sub_return(int a, atomic_t *v)
306+static __inline__ int atomic_sub_return(int a, atomic_t *v)
307 {
308 int t;
309
310@@ -51,7 +51,7 @@ extern __inline__ int atomic_sub_return(int a, atomic_t *v)
311 return t;
312 }
313
314-extern __inline__ int atomic_inc_return(atomic_t *v)
315+static __inline__ int atomic_inc_return(atomic_t *v)
316 {
317 int t;
318
319@@ -67,7 +67,7 @@ extern __inline__ int atomic_inc_return(atomic_t *v)
320 return t;
321 }
322
323-extern __inline__ int atomic_dec_return(atomic_t *v)
324+static __inline__ int atomic_dec_return(atomic_t *v)
325 {
326 int t;
327
328diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
329index a6bcf3c..986ca96 100644
330--- a/arch/powerpc/include/asm/bitops.h
331+++ b/arch/powerpc/include/asm/bitops.h
332@@ -7,13 +7,6 @@
333
334 #include <asm/byteorder.h>
335
336-extern void set_bit(int nr, volatile void *addr);
337-extern void clear_bit(int nr, volatile void *addr);
338-extern void change_bit(int nr, volatile void *addr);
339-extern int test_and_set_bit(int nr, volatile void *addr);
340-extern int test_and_clear_bit(int nr, volatile void *addr);
341-extern int test_and_change_bit(int nr, volatile void *addr);
342-
343 /*
344 * Arguably these bit operations don't imply any memory barrier or
345 * SMP ordering, but in fact a lot of drivers expect them to imply
346@@ -34,7 +27,7 @@ extern int test_and_change_bit(int nr, volatile void *addr);
347 * These used to be if'd out here because using : "cc" as a constraint
348 * resulted in errors from egcs. Things may be OK with gcc-2.95.
349 */
350-extern __inline__ void set_bit(int nr, volatile void * addr)
351+static __inline__ void set_bit(int nr, volatile void * addr)
352 {
353 unsigned long old;
354 unsigned long mask = 1 << (nr & 0x1f);
355@@ -51,7 +44,7 @@ extern __inline__ void set_bit(int nr, volatile void * addr)
356 : "cc" );
357 }
358
359-extern __inline__ void clear_bit(int nr, volatile void *addr)
360+static __inline__ void clear_bit(int nr, volatile void *addr)
361 {
362 unsigned long old;
363 unsigned long mask = 1 << (nr & 0x1f);
364@@ -68,7 +61,7 @@ extern __inline__ void clear_bit(int nr, volatile void *addr)
365 : "cc");
366 }
367
368-extern __inline__ void change_bit(int nr, volatile void *addr)
369+static __inline__ void change_bit(int nr, volatile void *addr)
370 {
371 unsigned long old;
372 unsigned long mask = 1 << (nr & 0x1f);
373@@ -85,7 +78,7 @@ extern __inline__ void change_bit(int nr, volatile void *addr)
374 : "cc");
375 }
376
377-extern __inline__ int test_and_set_bit(int nr, volatile void *addr)
378+static __inline__ int test_and_set_bit(int nr, volatile void *addr)
379 {
380 unsigned int old, t;
381 unsigned int mask = 1 << (nr & 0x1f);
382@@ -104,7 +97,7 @@ extern __inline__ int test_and_set_bit(int nr, volatile void *addr)
383 return (old & mask) != 0;
384 }
385
386-extern __inline__ int test_and_clear_bit(int nr, volatile void *addr)
387+static __inline__ int test_and_clear_bit(int nr, volatile void *addr)
388 {
389 unsigned int old, t;
390 unsigned int mask = 1 << (nr & 0x1f);
391@@ -123,7 +116,7 @@ extern __inline__ int test_and_clear_bit(int nr, volatile void *addr)
392 return (old & mask) != 0;
393 }
394
395-extern __inline__ int test_and_change_bit(int nr, volatile void *addr)
396+static __inline__ int test_and_change_bit(int nr, volatile void *addr)
397 {
398 unsigned int old, t;
399 unsigned int mask = 1 << (nr & 0x1f);
400@@ -143,7 +136,7 @@ extern __inline__ int test_and_change_bit(int nr, volatile void *addr)
401 }
402 #endif /* __INLINE_BITOPS */
403
404-extern __inline__ int test_bit(int nr, __const__ volatile void *addr)
405+static __inline__ int test_bit(int nr, __const__ volatile void *addr)
406 {
407 __const__ unsigned int *p = (__const__ unsigned int *) addr;
408
409@@ -152,7 +145,7 @@ extern __inline__ int test_bit(int nr, __const__ volatile void *addr)
410
411 /* Return the bit position of the most significant 1 bit in a word */
412 /* - the result is undefined when x == 0 */
413-extern __inline__ int __ilog2(unsigned int x)
414+static __inline__ int __ilog2(unsigned int x)
415 {
416 int lz;
417
418@@ -160,7 +153,7 @@ extern __inline__ int __ilog2(unsigned int x)
419 return 31 - lz;
420 }
421
422-extern __inline__ int ffz(unsigned int x)
423+static __inline__ int ffz(unsigned int x)
424 {
425 if ((x = ~x) == 0)
426 return 32;
427@@ -226,7 +219,7 @@ static inline int ffs64(u64 x)
428 * the libc and compiler builtin ffs routines, therefore
429 * differs in spirit from the above ffz (man ffs).
430 */
431-extern __inline__ int ffs(int x)
432+static __inline__ int ffs(int x)
433 {
434 return __ilog2(x & -x) + 1;
435 }
436@@ -250,7 +243,7 @@ extern __inline__ int ffs(int x)
437 #define find_first_zero_bit(addr, size) \
438 find_next_zero_bit((addr), (size), 0)
439
440-extern __inline__ unsigned long find_next_zero_bit(void * addr,
441+static __inline__ unsigned long find_next_zero_bit(void * addr,
442 unsigned long size, unsigned long offset)
443 {
444 unsigned int * p = ((unsigned int *) addr) + (offset >> 5);
445@@ -298,7 +291,7 @@ found_middle:
446 #define ext2_clear_bit(nr, addr) test_and_clear_bit((nr) ^ 0x18, addr)
447
448 #else
449-extern __inline__ int ext2_set_bit(int nr, void * addr)
450+static __inline__ int ext2_set_bit(int nr, void * addr)
451 {
452 int mask;
453 unsigned char *ADDR = (unsigned char *) addr;
454@@ -311,7 +304,7 @@ extern __inline__ int ext2_set_bit(int nr, void * addr)
455 return oldbit;
456 }
457
458-extern __inline__ int ext2_clear_bit(int nr, void * addr)
459+static __inline__ int ext2_clear_bit(int nr, void * addr)
460 {
461 int mask;
462 unsigned char *ADDR = (unsigned char *) addr;
463@@ -325,7 +318,7 @@ extern __inline__ int ext2_clear_bit(int nr, void * addr)
464 }
465 #endif /* __KERNEL__ */
466
467-extern __inline__ int ext2_test_bit(int nr, __const__ void * addr)
468+static __inline__ int ext2_test_bit(int nr, __const__ void * addr)
469 {
470 __const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
471
472diff --git a/arch/powerpc/include/asm/byteorder.h b/arch/powerpc/include/asm/byteorder.h
473index 3f5bcf6..f731d18 100644
474--- a/arch/powerpc/include/asm/byteorder.h
475+++ b/arch/powerpc/include/asm/byteorder.h
476@@ -5,7 +5,7 @@
477
478 #ifdef __GNUC__
479
480-extern __inline__ unsigned ld_le16(const volatile unsigned short *addr)
481+static __inline__ unsigned ld_le16(const volatile unsigned short *addr)
482 {
483 unsigned val;
484
485@@ -13,12 +13,12 @@ extern __inline__ unsigned ld_le16(const volatile unsigned short *addr)
486 return val;
487 }
488
489-extern __inline__ void st_le16(volatile unsigned short *addr, const unsigned val)
490+static __inline__ void st_le16(volatile unsigned short *addr, const unsigned val)
491 {
492 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
493 }
494
495-extern __inline__ unsigned ld_le32(const volatile unsigned *addr)
496+static __inline__ unsigned ld_le32(const volatile unsigned *addr)
497 {
498 unsigned val;
499
500@@ -26,7 +26,7 @@ extern __inline__ unsigned ld_le32(const volatile unsigned *addr)
501 return val;
502 }
503
504-extern __inline__ void st_le32(volatile unsigned *addr, const unsigned val)
505+static __inline__ void st_le32(volatile unsigned *addr, const unsigned val)
506 {
507 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
508 }
509diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
510index a5257e9..a54fc46 100644
511--- a/arch/powerpc/include/asm/io.h
512+++ b/arch/powerpc/include/asm/io.h
513@@ -163,7 +163,7 @@ static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
514 * is actually performed (i.e. the data has come back) before we start
515 * executing any following instructions.
516 */
517-extern inline u8 in_8(const volatile unsigned char __iomem *addr)
518+static inline u8 in_8(const volatile unsigned char __iomem *addr)
519 {
520 u8 ret;
521
522@@ -174,7 +174,7 @@ extern inline u8 in_8(const volatile unsigned char __iomem *addr)
523 return ret;
524 }
525
526-extern inline void out_8(volatile unsigned char __iomem *addr, u8 val)
527+static inline void out_8(volatile unsigned char __iomem *addr, u8 val)
528 {
529 __asm__ __volatile__("sync;\n"
530 "stb%U0%X0 %1,%0;\n"
531@@ -182,7 +182,7 @@ extern inline void out_8(volatile unsigned char __iomem *addr, u8 val)
532 : "r" (val));
533 }
534
535-extern inline u16 in_le16(const volatile unsigned short __iomem *addr)
536+static inline u16 in_le16(const volatile unsigned short __iomem *addr)
537 {
538 u16 ret;
539
540@@ -193,7 +193,7 @@ extern inline u16 in_le16(const volatile unsigned short __iomem *addr)
541 return ret;
542 }
543
544-extern inline u16 in_be16(const volatile unsigned short __iomem *addr)
545+static inline u16 in_be16(const volatile unsigned short __iomem *addr)
546 {
547 u16 ret;
548
549@@ -203,18 +203,18 @@ extern inline u16 in_be16(const volatile unsigned short __iomem *addr)
550 return ret;
551 }
552
553-extern inline void out_le16(volatile unsigned short __iomem *addr, u16 val)
554+static inline void out_le16(volatile unsigned short __iomem *addr, u16 val)
555 {
556 __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
557 "r" (val), "r" (addr));
558 }
559
560-extern inline void out_be16(volatile unsigned short __iomem *addr, u16 val)
561+static inline void out_be16(volatile unsigned short __iomem *addr, u16 val)
562 {
563 __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
564 }
565
566-extern inline u32 in_le32(const volatile unsigned __iomem *addr)
567+static inline u32 in_le32(const volatile unsigned __iomem *addr)
568 {
569 u32 ret;
570
571@@ -225,7 +225,7 @@ extern inline u32 in_le32(const volatile unsigned __iomem *addr)
572 return ret;
573 }
574
575-extern inline u32 in_be32(const volatile unsigned __iomem *addr)
576+static inline u32 in_be32(const volatile unsigned __iomem *addr)
577 {
578 u32 ret;
579
580@@ -235,13 +235,13 @@ extern inline u32 in_be32(const volatile unsigned __iomem *addr)
581 return ret;
582 }
583
584-extern inline void out_le32(volatile unsigned __iomem *addr, u32 val)
585+static inline void out_le32(volatile unsigned __iomem *addr, u32 val)
586 {
587 __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
588 "r" (val), "r" (addr));
589 }
590
591-extern inline void out_be32(volatile unsigned __iomem *addr, u32 val)
592+static inline void out_be32(volatile unsigned __iomem *addr, u32 val)
593 {
594 __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
595 }
596diff --git a/arch/powerpc/include/asm/iopin_8260.h b/arch/powerpc/include/asm/iopin_8260.h
597index 619f3a8..617584d 100644
598--- a/arch/powerpc/include/asm/iopin_8260.h
599+++ b/arch/powerpc/include/asm/iopin_8260.h
600@@ -23,140 +23,140 @@ iopin_t;
601 #define IOPIN_PORTC 2
602 #define IOPIN_PORTD 3
603
604-extern __inline__ void
605+static __inline__ void
606 iopin_set_high(iopin_t *iopin)
607 {
608 volatile uint *datp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdata;
609 datp[iopin->port * 8] |= (1 << (31 - iopin->pin));
610 }
611
612-extern __inline__ void
613+static __inline__ void
614 iopin_set_low(iopin_t *iopin)
615 {
616 volatile uint *datp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdata;
617 datp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
618 }
619
620-extern __inline__ uint
621+static __inline__ uint
622 iopin_is_high(iopin_t *iopin)
623 {
624 volatile uint *datp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdata;
625 return (datp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
626 }
627
628-extern __inline__ uint
629+static __inline__ uint
630 iopin_is_low(iopin_t *iopin)
631 {
632 volatile uint *datp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdata;
633 return ((datp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
634 }
635
636-extern __inline__ void
637+static __inline__ void
638 iopin_set_out(iopin_t *iopin)
639 {
640 volatile uint *dirp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdira;
641 dirp[iopin->port * 8] |= (1 << (31 - iopin->pin));
642 }
643
644-extern __inline__ void
645+static __inline__ void
646 iopin_set_in(iopin_t *iopin)
647 {
648 volatile uint *dirp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdira;
649 dirp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
650 }
651
652-extern __inline__ uint
653+static __inline__ uint
654 iopin_is_out(iopin_t *iopin)
655 {
656 volatile uint *dirp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdira;
657 return (dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
658 }
659
660-extern __inline__ uint
661+static __inline__ uint
662 iopin_is_in(iopin_t *iopin)
663 {
664 volatile uint *dirp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdira;
665 return ((dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
666 }
667
668-extern __inline__ void
669+static __inline__ void
670 iopin_set_odr(iopin_t *iopin)
671 {
672 volatile uint *odrp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_podra;
673 odrp[iopin->port * 8] |= (1 << (31 - iopin->pin));
674 }
675
676-extern __inline__ void
677+static __inline__ void
678 iopin_set_act(iopin_t *iopin)
679 {
680 volatile uint *odrp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_podra;
681 odrp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
682 }
683
684-extern __inline__ uint
685+static __inline__ uint
686 iopin_is_odr(iopin_t *iopin)
687 {
688 volatile uint *odrp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_podra;
689 return (odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
690 }
691
692-extern __inline__ uint
693+static __inline__ uint
694 iopin_is_act(iopin_t *iopin)
695 {
696 volatile uint *odrp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_podra;
697 return ((odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
698 }
699
700-extern __inline__ void
701+static __inline__ void
702 iopin_set_ded(iopin_t *iopin)
703 {
704 volatile uint *parp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_ppara;
705 parp[iopin->port * 8] |= (1 << (31 - iopin->pin));
706 }
707
708-extern __inline__ void
709+static __inline__ void
710 iopin_set_gen(iopin_t *iopin)
711 {
712 volatile uint *parp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_ppara;
713 parp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
714 }
715
716-extern __inline__ uint
717+static __inline__ uint
718 iopin_is_ded(iopin_t *iopin)
719 {
720 volatile uint *parp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_ppara;
721 return (parp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
722 }
723
724-extern __inline__ uint
725+static __inline__ uint
726 iopin_is_gen(iopin_t *iopin)
727 {
728 volatile uint *parp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_ppara;
729 return ((parp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
730 }
731
732-extern __inline__ void
733+static __inline__ void
734 iopin_set_opt2(iopin_t *iopin)
735 {
736 volatile uint *sorp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_psora;
737 sorp[iopin->port * 8] |= (1 << (31 - iopin->pin));
738 }
739
740-extern __inline__ void
741+static __inline__ void
742 iopin_set_opt1(iopin_t *iopin)
743 {
744 volatile uint *sorp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_psora;
745 sorp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
746 }
747
748-extern __inline__ uint
749+static __inline__ uint
750 iopin_is_opt2(iopin_t *iopin)
751 {
752 volatile uint *sorp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_psora;
753 return (sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
754 }
755
756-extern __inline__ uint
757+static __inline__ uint
758 iopin_is_opt1(iopin_t *iopin)
759 {
760 volatile uint *sorp = &((immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_psora;
761diff --git a/arch/powerpc/include/asm/iopin_8xx.h b/arch/powerpc/include/asm/iopin_8xx.h
762index 0123baf..8db0fa2 100644
763--- a/arch/powerpc/include/asm/iopin_8xx.h
764+++ b/arch/powerpc/include/asm/iopin_8xx.h
765@@ -26,7 +26,7 @@ typedef struct {
766 #define IOPIN_PORTC 2
767 #define IOPIN_PORTD 3
768
769-extern __inline__ void
770+static __inline__ void
771 iopin_set_high(iopin_t *iopin)
772 {
773 if (iopin->port == IOPIN_PORTA) {
774@@ -44,7 +44,7 @@ iopin_set_high(iopin_t *iopin)
775 }
776 }
777
778-extern __inline__ void
779+static __inline__ void
780 iopin_set_low(iopin_t *iopin)
781 {
782 if (iopin->port == IOPIN_PORTA) {
783@@ -62,7 +62,7 @@ iopin_set_low(iopin_t *iopin)
784 }
785 }
786
787-extern __inline__ uint
788+static __inline__ uint
789 iopin_is_high(iopin_t *iopin)
790 {
791 if (iopin->port == IOPIN_PORTA) {
792@@ -81,7 +81,7 @@ iopin_is_high(iopin_t *iopin)
793 return 0;
794 }
795
796-extern __inline__ uint
797+static __inline__ uint
798 iopin_is_low(iopin_t *iopin)
799 {
800 if (iopin->port == IOPIN_PORTA) {
801@@ -100,7 +100,7 @@ iopin_is_low(iopin_t *iopin)
802 return 0;
803 }
804
805-extern __inline__ void
806+static __inline__ void
807 iopin_set_out(iopin_t *iopin)
808 {
809 if (iopin->port == IOPIN_PORTA) {
810@@ -118,7 +118,7 @@ iopin_set_out(iopin_t *iopin)
811 }
812 }
813
814-extern __inline__ void
815+static __inline__ void
816 iopin_set_in(iopin_t *iopin)
817 {
818 if (iopin->port == IOPIN_PORTA) {
819@@ -136,7 +136,7 @@ iopin_set_in(iopin_t *iopin)
820 }
821 }
822
823-extern __inline__ uint
824+static __inline__ uint
825 iopin_is_out(iopin_t *iopin)
826 {
827 if (iopin->port == IOPIN_PORTA) {
828@@ -155,7 +155,7 @@ iopin_is_out(iopin_t *iopin)
829 return 0;
830 }
831
832-extern __inline__ uint
833+static __inline__ uint
834 iopin_is_in(iopin_t *iopin)
835 {
836 if (iopin->port == IOPIN_PORTA) {
837@@ -174,7 +174,7 @@ iopin_is_in(iopin_t *iopin)
838 return 0;
839 }
840
841-extern __inline__ void
842+static __inline__ void
843 iopin_set_odr(iopin_t *iopin)
844 {
845 if (iopin->port == IOPIN_PORTA) {
846@@ -186,7 +186,7 @@ iopin_set_odr(iopin_t *iopin)
847 }
848 }
849
850-extern __inline__ void
851+static __inline__ void
852 iopin_set_act(iopin_t *iopin)
853 {
854 if (iopin->port == IOPIN_PORTA) {
855@@ -198,7 +198,7 @@ iopin_set_act(iopin_t *iopin)
856 }
857 }
858
859-extern __inline__ uint
860+static __inline__ uint
861 iopin_is_odr(iopin_t *iopin)
862 {
863 if (iopin->port == IOPIN_PORTA) {
864@@ -211,7 +211,7 @@ iopin_is_odr(iopin_t *iopin)
865 return 0;
866 }
867
868-extern __inline__ uint
869+static __inline__ uint
870 iopin_is_act(iopin_t *iopin)
871 {
872 if (iopin->port == IOPIN_PORTA) {
873@@ -224,7 +224,7 @@ iopin_is_act(iopin_t *iopin)
874 return 0;
875 }
876
877-extern __inline__ void
878+static __inline__ void
879 iopin_set_ded(iopin_t *iopin)
880 {
881 if (iopin->port == IOPIN_PORTA) {
882@@ -242,7 +242,7 @@ iopin_set_ded(iopin_t *iopin)
883 }
884 }
885
886-extern __inline__ void
887+static __inline__ void
888 iopin_set_gen(iopin_t *iopin)
889 {
890 if (iopin->port == IOPIN_PORTA) {
891@@ -260,7 +260,7 @@ iopin_set_gen(iopin_t *iopin)
892 }
893 }
894
895-extern __inline__ uint
896+static __inline__ uint
897 iopin_is_ded(iopin_t *iopin)
898 {
899 if (iopin->port == IOPIN_PORTA) {
900@@ -279,7 +279,7 @@ iopin_is_ded(iopin_t *iopin)
901 return 0;
902 }
903
904-extern __inline__ uint
905+static __inline__ uint
906 iopin_is_gen(iopin_t *iopin)
907 {
908 if (iopin->port == IOPIN_PORTA) {
909@@ -298,7 +298,7 @@ iopin_is_gen(iopin_t *iopin)
910 return 0;
911 }
912
913-extern __inline__ void
914+static __inline__ void
915 iopin_set_opt2(iopin_t *iopin)
916 {
917 if (iopin->port == IOPIN_PORTC) {
918@@ -307,7 +307,7 @@ iopin_set_opt2(iopin_t *iopin)
919 }
920 }
921
922-extern __inline__ void
923+static __inline__ void
924 iopin_set_opt1(iopin_t *iopin)
925 {
926 if (iopin->port == IOPIN_PORTC) {
927@@ -316,7 +316,7 @@ iopin_set_opt1(iopin_t *iopin)
928 }
929 }
930
931-extern __inline__ uint
932+static __inline__ uint
933 iopin_is_opt2(iopin_t *iopin)
934 {
935 if (iopin->port == IOPIN_PORTC) {
936@@ -326,7 +326,7 @@ iopin_is_opt2(iopin_t *iopin)
937 return 0;
938 }
939
940-extern __inline__ uint
941+static __inline__ uint
942 iopin_is_opt1(iopin_t *iopin)
943 {
944 if (iopin->port == IOPIN_PORTC) {
945@@ -336,7 +336,7 @@ iopin_is_opt1(iopin_t *iopin)
946 return 0;
947 }
948
949-extern __inline__ void
950+static __inline__ void
951 iopin_set_falledge(iopin_t *iopin)
952 {
953 if (iopin->port == IOPIN_PORTC) {
954@@ -345,7 +345,7 @@ iopin_set_falledge(iopin_t *iopin)
955 }
956 }
957
958-extern __inline__ void
959+static __inline__ void
960 iopin_set_anyedge(iopin_t *iopin)
961 {
962 if (iopin->port == IOPIN_PORTC) {
963@@ -354,7 +354,7 @@ iopin_set_anyedge(iopin_t *iopin)
964 }
965 }
966
967-extern __inline__ uint
968+static __inline__ uint
969 iopin_is_falledge(iopin_t *iopin)
970 {
971 if (iopin->port == IOPIN_PORTC) {
972@@ -364,7 +364,7 @@ iopin_is_falledge(iopin_t *iopin)
973 return 0;
974 }
975
976-extern __inline__ uint
977+static __inline__ uint
978 iopin_is_anyedge(iopin_t *iopin)
979 {
980 if (iopin->port == IOPIN_PORTC) {
981diff --git a/arch/sparc/include/asm/irq.h b/arch/sparc/include/asm/irq.h
982index bbe0204..2faf7a0 100644
983--- a/arch/sparc/include/asm/irq.h
984+++ b/arch/sparc/include/asm/irq.h
985@@ -12,7 +12,7 @@
986 #include <asm/psr.h>
987
988 /* Set SPARC Processor Interrupt Level */
989-extern inline void set_pil(unsigned int level)
990+static inline void set_pil(unsigned int level)
991 {
992 unsigned int psr = get_psr();
993
994@@ -20,7 +20,7 @@ extern inline void set_pil(unsigned int level)
995 }
996
997 /* Get SPARC Processor Interrupt Level */
998-extern inline unsigned int get_pil(void)
999+static inline unsigned int get_pil(void)
1000 {
1001 unsigned int psr = get_psr();
1002 return (psr & PSR_PIL) >> PSR_PIL_OFS;
1003diff --git a/arch/sparc/include/asm/psr.h b/arch/sparc/include/asm/psr.h
1004index 70af8e0..a91bdc9 100644
1005--- a/arch/sparc/include/asm/psr.h
1006+++ b/arch/sparc/include/asm/psr.h
1007@@ -42,7 +42,7 @@
1008
1009 #ifndef __ASSEMBLY__
1010 /* Get the %psr register. */
1011-extern __inline__ unsigned int get_psr(void)
1012+static __inline__ unsigned int get_psr(void)
1013 {
1014 unsigned int psr;
1015 __asm__ __volatile__("rd %%psr, %0\n\t"
1016@@ -53,7 +53,7 @@ extern __inline__ unsigned int get_psr(void)
1017 return psr;
1018 }
1019
1020-extern __inline__ void put_psr(unsigned int new_psr)
1021+static __inline__ void put_psr(unsigned int new_psr)
1022 {
1023 __asm__ __volatile__("wr %0, 0x0, %%psr\n\t" "nop\n\t" "nop\n\t" "nop\n\t": /* no outputs */
1024 :"r"(new_psr)
1025@@ -67,7 +67,7 @@ extern __inline__ void put_psr(unsigned int new_psr)
1026
1027 extern unsigned int fsr_storage;
1028
1029-extern __inline__ unsigned int get_fsr(void)
1030+static __inline__ unsigned int get_fsr(void)
1031 {
1032 unsigned int fsr = 0;
1033
1034diff --git a/arch/sparc/include/asm/srmmu.h b/arch/sparc/include/asm/srmmu.h
1035index 74b1554..8da2f67 100644
1036--- a/arch/sparc/include/asm/srmmu.h
1037+++ b/arch/sparc/include/asm/srmmu.h
1038@@ -148,7 +148,7 @@ extern void *srmmu_nocache_pool;
1039 #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR))
1040
1041 /* Accessing the MMU control register. */
1042-extern __inline__ unsigned int srmmu_get_mmureg(void)
1043+static __inline__ unsigned int srmmu_get_mmureg(void)
1044 {
1045 unsigned int retval;
1046 __asm__ __volatile__("lda [%%g0] %1, %0\n\t":
1047@@ -156,14 +156,14 @@ extern __inline__ unsigned int srmmu_get_mmureg(void)
1048 return retval;
1049 }
1050
1051-extern __inline__ void srmmu_set_mmureg(unsigned long regval)
1052+static __inline__ void srmmu_set_mmureg(unsigned long regval)
1053 {
1054 __asm__ __volatile__("sta %0, [%%g0] %1\n\t"::"r"(regval),
1055 "i"(ASI_M_MMUREGS):"memory");
1056
1057 }
1058
1059-extern __inline__ void srmmu_set_ctable_ptr(unsigned long paddr)
1060+static __inline__ void srmmu_set_ctable_ptr(unsigned long paddr)
1061 {
1062 paddr = ((paddr >> 4) & SRMMU_CTX_PMASK);
1063 __asm__ __volatile__("sta %0, [%1] %2\n\t"::"r"(paddr),
1064@@ -171,7 +171,7 @@ extern __inline__ void srmmu_set_ctable_ptr(unsigned long paddr)
1065 "i"(ASI_M_MMUREGS):"memory");
1066 }
1067
1068-extern __inline__ unsigned long srmmu_get_ctable_ptr(void)
1069+static __inline__ unsigned long srmmu_get_ctable_ptr(void)
1070 {
1071 unsigned int retval;
1072
1073@@ -181,13 +181,13 @@ extern __inline__ unsigned long srmmu_get_ctable_ptr(void)
1074 return (retval & SRMMU_CTX_PMASK) << 4;
1075 }
1076
1077-extern __inline__ void srmmu_set_context(int context)
1078+static __inline__ void srmmu_set_context(int context)
1079 {
1080 __asm__ __volatile__("sta %0, [%1] %2\n\t"::"r"(context),
1081 "r"(SRMMU_CTX_REG), "i"(ASI_M_MMUREGS):"memory");
1082 }
1083
1084-extern __inline__ int srmmu_get_context(void)
1085+static __inline__ int srmmu_get_context(void)
1086 {
1087 register int retval;
1088 __asm__ __volatile__("lda [%1] %2, %0\n\t":
1089@@ -196,7 +196,7 @@ extern __inline__ int srmmu_get_context(void)
1090 return retval;
1091 }
1092
1093-extern __inline__ unsigned int srmmu_get_fstatus(void)
1094+static __inline__ unsigned int srmmu_get_fstatus(void)
1095 {
1096 unsigned int retval;
1097
1098@@ -206,7 +206,7 @@ extern __inline__ unsigned int srmmu_get_fstatus(void)
1099 return retval;
1100 }
1101
1102-extern __inline__ unsigned int srmmu_get_faddr(void)
1103+static __inline__ unsigned int srmmu_get_faddr(void)
1104 {
1105 unsigned int retval;
1106
1107@@ -217,7 +217,7 @@ extern __inline__ unsigned int srmmu_get_faddr(void)
1108 }
1109
1110 /* This is guaranteed on all SRMMU's. */
1111-extern __inline__ void srmmu_flush_whole_tlb(void)
1112+static __inline__ void srmmu_flush_whole_tlb(void)
1113 {
1114 __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(0x400), /* Flush entire TLB!! */
1115 "i"(ASI_M_FLUSH_PROBE):"memory");
1116@@ -225,14 +225,14 @@ extern __inline__ void srmmu_flush_whole_tlb(void)
1117 }
1118
1119 /* These flush types are not available on all chips... */
1120-extern __inline__ void srmmu_flush_tlb_ctx(void)
1121+static __inline__ void srmmu_flush_tlb_ctx(void)
1122 {
1123 __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(0x300), /* Flush TLB ctx.. */
1124 "i"(ASI_M_FLUSH_PROBE):"memory");
1125
1126 }
1127
1128-extern __inline__ void srmmu_flush_tlb_region(unsigned long addr)
1129+static __inline__ void srmmu_flush_tlb_region(unsigned long addr)
1130 {
1131 addr &= SRMMU_PGDIR_MASK;
1132 __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(addr | 0x200), /* Flush TLB region.. */
1133@@ -240,7 +240,7 @@ extern __inline__ void srmmu_flush_tlb_region(unsigned long addr)
1134
1135 }
1136
1137-extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr)
1138+static __inline__ void srmmu_flush_tlb_segment(unsigned long addr)
1139 {
1140 addr &= SRMMU_REAL_PMD_MASK;
1141 __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(addr | 0x100), /* Flush TLB segment.. */
1142@@ -248,7 +248,7 @@ extern __inline__ void srmmu_flush_tlb_segment(unsigned long addr)
1143
1144 }
1145
1146-extern __inline__ void srmmu_flush_tlb_page(unsigned long page)
1147+static __inline__ void srmmu_flush_tlb_page(unsigned long page)
1148 {
1149 page &= PAGE_MASK;
1150 __asm__ __volatile__("sta %%g0, [%0] %1\n\t"::"r"(page), /* Flush TLB page.. */
1151@@ -256,7 +256,7 @@ extern __inline__ void srmmu_flush_tlb_page(unsigned long page)
1152
1153 }
1154
1155-extern __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr)
1156+static __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr)
1157 {
1158 unsigned long retval;
1159
1160@@ -268,7 +268,7 @@ extern __inline__ unsigned long srmmu_hwprobe(unsigned long vaddr)
1161 return retval;
1162 }
1163
1164-extern __inline__ int srmmu_get_pte(unsigned long addr)
1165+static __inline__ int srmmu_get_pte(unsigned long addr)
1166 {
1167 register unsigned long entry;
1168
1169diff --git a/include/mpc8260.h b/include/mpc8260.h
1170index 9980c74..75f1b0c 100644
1171--- a/include/mpc8260.h
1172+++ b/include/mpc8260.h
1173@@ -892,7 +892,7 @@
1174 #define UPMC 3
1175
1176 #if !defined(__ASSEMBLY__) && defined(CONFIG_WATCHDOG)
1177-extern __inline__ void
1178+static __inline__ void
1179 reset_8260_watchdog(volatile immap_t *immr)
1180 {
1181 immr->im_siu_conf.sc_swsr = 0x556c;
1182--
11832.6.2
1184
diff --git a/meta/recipes-bsp/u-boot/u-boot_2015.07.bb b/meta/recipes-bsp/u-boot/u-boot_2015.07.bb
deleted file mode 100644
index 4746c33ec2..0000000000
--- a/meta/recipes-bsp/u-boot/u-boot_2015.07.bb
+++ /dev/null
@@ -1,14 +0,0 @@
1require u-boot.inc
2
3DEPENDS += "dtc-native"
4
5# This revision corresponds to the tag "v2015.07"
6# We use the revision in order to avoid having to fetch it from the
7# repo during parse
8SRCREV = "33711bdd4a4dce942fb5ae85a68899a8357bdd94"
9
10SRC_URI += "file://0001-u-boot-mpc85xx-u-boot-.lds-remove-_GLOBAL_OFFSET_TAB.patch"
11
12PV = "v2015.07+git${SRCPV}"
13
14EXTRA_OEMAKE_append = " KCFLAGS=-fgnu89-inline"
diff --git a/meta/recipes-bsp/u-boot/u-boot_2015.10.bb b/meta/recipes-bsp/u-boot/u-boot_2015.10.bb
new file mode 100644
index 0000000000..2abfcfa921
--- /dev/null
+++ b/meta/recipes-bsp/u-boot/u-boot_2015.10.bb
@@ -0,0 +1,19 @@
1require u-boot.inc
2
3DEPENDS += "dtc-native"
4
5# This revision corresponds to the tag "v2015.10"
6# We use the revision in order to avoid having to fetch it from the
7# repo during parse
8SRCREV = "5ec0003b19cbdf06ccd6941237cbc0d1c3468e2d"
9
10SRC_URI += " \
11 file://0001-powerpc-cpu-u-boot-.lds-remove-_GLOBAL_OFFSET_TABLE_.patch \
12 file://0002-image.c-Fix-non-Android-booting-with-ramdisk-and-or-.patch \
13 file://0003-common-board_f-enable-setup_board_part1-for-MIPS.patch \
14 file://0004-MIPS-bootm-rework-and-fix-broken-bootm-code.patch \
15 file://0005-MIPS-bootm-use-CONFIG_IS_ENABLED-everywhere.patch \
16 file://0006-Replace-extern-inline-with-static-inline.patch \
17"
18
19PV = "v2015.10+git${SRCPV}"
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-11-27 19:25:05 +0000