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authorRichard Purdie <richard@openedhand.com>2007-07-22 21:25:06 +0000
committerRichard Purdie <richard@openedhand.com>2007-07-22 21:25:06 +0000
commit6f183639f65a6c6aa34f6995df27958c28712915 (patch)
treea8dd8f3a8dcd56e861eab6d6fc2df43ad83d4a61 /meta
parent86ea901b138243d387c6e78bee3075c77a3c83e8 (diff)
downloadpoky-6f183639f65a6c6aa34f6995df27958c28712915.tar.gz
linux-rp: Add basic htcuniversal support (based on hh.org patches) and fix MMC problems over suspend/resume
git-svn-id: https://svn.o-hand.com/repos/poky/trunk@2205 311d38ba-8fff-0310-9ca6-ca027cbcb966
Diffstat (limited to 'meta')
-rw-r--r--meta/packages/linux/linux-rp-2.6.22/defconfig-akita2
-rw-r--r--meta/packages/linux/linux-rp-2.6.22/defconfig-c7x02
-rw-r--r--meta/packages/linux/linux-rp-2.6.22/defconfig-collie2
-rw-r--r--meta/packages/linux/linux-rp-2.6.22/defconfig-htcuniversal1287
-rw-r--r--meta/packages/linux/linux-rp-2.6.22/defconfig-hx20002
-rw-r--r--meta/packages/linux/linux-rp-2.6.22/defconfig-poodle2
-rw-r--r--meta/packages/linux/linux-rp-2.6.22/defconfig-spitz2
-rw-r--r--meta/packages/linux/linux-rp-2.6.22/defconfig-tosa1
-rw-r--r--meta/packages/linux/linux-rp-2.6.22/htcuni.patch7932
-rw-r--r--meta/packages/linux/linux-rp.inc3
-rw-r--r--meta/packages/linux/linux-rp_2.6.22.bb4
11 files changed, 9236 insertions, 3 deletions
diff --git a/meta/packages/linux/linux-rp-2.6.22/defconfig-akita b/meta/packages/linux/linux-rp-2.6.22/defconfig-akita
index d5ad38b1ea..edeaa414db 100644
--- a/meta/packages/linux/linux-rp-2.6.22/defconfig-akita
+++ b/meta/packages/linux/linux-rp-2.6.22/defconfig-akita
@@ -1407,6 +1407,8 @@ CONFIG_MMC=y
1407CONFIG_MMC_BLOCK=y 1407CONFIG_MMC_BLOCK=y
1408CONFIG_MMC_PXA=y 1408CONFIG_MMC_PXA=y
1409# CONFIG_MMC_TIFM_SD is not set 1409# CONFIG_MMC_TIFM_SD is not set
1410CONFIG_MMC_UNSAFE_RESUME=y
1411
1410 1412
1411# 1413#
1412# Real Time Clock 1414# Real Time Clock
diff --git a/meta/packages/linux/linux-rp-2.6.22/defconfig-c7x0 b/meta/packages/linux/linux-rp-2.6.22/defconfig-c7x0
index 1ff275cee5..c644187e96 100644
--- a/meta/packages/linux/linux-rp-2.6.22/defconfig-c7x0
+++ b/meta/packages/linux/linux-rp-2.6.22/defconfig-c7x0
@@ -1453,6 +1453,8 @@ CONFIG_MMC=y
1453CONFIG_MMC_BLOCK=y 1453CONFIG_MMC_BLOCK=y
1454CONFIG_MMC_PXA=y 1454CONFIG_MMC_PXA=y
1455# CONFIG_MMC_TIFM_SD is not set 1455# CONFIG_MMC_TIFM_SD is not set
1456CONFIG_MMC_UNSAFE_RESUME=y
1457
1456 1458
1457# 1459#
1458# Real Time Clock 1460# Real Time Clock
diff --git a/meta/packages/linux/linux-rp-2.6.22/defconfig-collie b/meta/packages/linux/linux-rp-2.6.22/defconfig-collie
index 422ed94df3..49d9596b92 100644
--- a/meta/packages/linux/linux-rp-2.6.22/defconfig-collie
+++ b/meta/packages/linux/linux-rp-2.6.22/defconfig-collie
@@ -1414,6 +1414,8 @@ CONFIG_MMC_DEBUG=y
1414CONFIG_MMC_BLOCK=m 1414CONFIG_MMC_BLOCK=m
1415# CONFIG_MMC_TIFM_SD is not set 1415# CONFIG_MMC_TIFM_SD is not set
1416CONFIG_MMC_SPI=m 1416CONFIG_MMC_SPI=m
1417CONFIG_MMC_UNSAFE_RESUME=y
1418
1417 1419
1418# 1420#
1419# Real Time Clock 1421# Real Time Clock
diff --git a/meta/packages/linux/linux-rp-2.6.22/defconfig-htcuniversal b/meta/packages/linux/linux-rp-2.6.22/defconfig-htcuniversal
new file mode 100644
index 0000000000..87cc5c081e
--- /dev/null
+++ b/meta/packages/linux/linux-rp-2.6.22/defconfig-htcuniversal
@@ -0,0 +1,1287 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.22
4# Thu Jul 19 00:38:46 2007
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10# CONFIG_GENERIC_CLOCKEVENTS is not set
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y
18CONFIG_GENERIC_IRQ_PROBE=y
19CONFIG_RWSEM_GENERIC_SPINLOCK=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ZONE_DMA=y
25CONFIG_ARCH_MTD_XIP=y
26CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28
29#
30# Code maturity level options
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_LOCK_KERNEL=y
35CONFIG_INIT_ENV_ARG_LIMIT=32
36
37#
38# General setup
39#
40CONFIG_LOCALVERSION=""
41CONFIG_LOCALVERSION_AUTO=y
42CONFIG_SWAP=y
43CONFIG_SYSVIPC=y
44# CONFIG_IPC_NS is not set
45CONFIG_SYSVIPC_SYSCTL=y
46# CONFIG_POSIX_MQUEUE is not set
47# CONFIG_BSD_PROCESS_ACCT is not set
48# CONFIG_TASKSTATS is not set
49# CONFIG_UTS_NS is not set
50# CONFIG_AUDIT is not set
51CONFIG_IKCONFIG=y
52CONFIG_IKCONFIG_PROC=y
53CONFIG_LOG_BUF_SHIFT=16
54CONFIG_SYSFS_DEPRECATED=y
55# CONFIG_RELAY is not set
56# CONFIG_BLK_DEV_INITRD is not set
57CONFIG_CC_OPTIMIZE_FOR_SIZE=y
58CONFIG_SYSCTL=y
59CONFIG_EMBEDDED=y
60# CONFIG_UID16 is not set
61CONFIG_SYSCTL_SYSCALL=y
62CONFIG_KALLSYMS=y
63# CONFIG_KALLSYMS_ALL is not set
64# CONFIG_KALLSYMS_EXTRA_PASS is not set
65CONFIG_HOTPLUG=y
66CONFIG_PRINTK=y
67CONFIG_BUG=y
68CONFIG_ELF_CORE=y
69CONFIG_BASE_FULL=y
70CONFIG_FUTEX=y
71CONFIG_ANON_INODES=y
72CONFIG_EPOLL=y
73CONFIG_SIGNALFD=y
74CONFIG_TIMERFD=y
75CONFIG_EVENTFD=y
76CONFIG_SHMEM=y
77CONFIG_VM_EVENT_COUNTERS=y
78CONFIG_SLAB=y
79# CONFIG_SLUB is not set
80# CONFIG_SLOB is not set
81CONFIG_RT_MUTEXES=y
82# CONFIG_TINY_SHMEM is not set
83CONFIG_BASE_SMALL=0
84
85#
86# Loadable module support
87#
88CONFIG_MODULES=y
89CONFIG_MODULE_UNLOAD=y
90CONFIG_MODULE_FORCE_UNLOAD=y
91# CONFIG_MODVERSIONS is not set
92# CONFIG_MODULE_SRCVERSION_ALL is not set
93CONFIG_KMOD=y
94
95#
96# Block layer
97#
98CONFIG_BLOCK=y
99# CONFIG_LBD is not set
100# CONFIG_BLK_DEV_IO_TRACE is not set
101# CONFIG_LSF is not set
102
103#
104# IO Schedulers
105#
106CONFIG_IOSCHED_NOOP=y
107CONFIG_IOSCHED_AS=y
108CONFIG_IOSCHED_DEADLINE=y
109# CONFIG_IOSCHED_CFQ is not set
110CONFIG_DEFAULT_AS=y
111# CONFIG_DEFAULT_DEADLINE is not set
112# CONFIG_DEFAULT_CFQ is not set
113# CONFIG_DEFAULT_NOOP is not set
114CONFIG_DEFAULT_IOSCHED="anticipatory"
115
116#
117# System Type
118#
119# CONFIG_ARCH_AAEC2000 is not set
120# CONFIG_ARCH_INTEGRATOR is not set
121# CONFIG_ARCH_REALVIEW is not set
122# CONFIG_ARCH_VERSATILE is not set
123# CONFIG_ARCH_AT91 is not set
124# CONFIG_ARCH_CLPS7500 is not set
125# CONFIG_ARCH_CLPS711X is not set
126# CONFIG_ARCH_CO285 is not set
127# CONFIG_ARCH_EBSA110 is not set
128# CONFIG_ARCH_EP93XX is not set
129# CONFIG_ARCH_FOOTBRIDGE is not set
130# CONFIG_ARCH_NETX is not set
131# CONFIG_ARCH_H720X is not set
132# CONFIG_ARCH_IMX is not set
133# CONFIG_ARCH_IOP13XX is not set
134# CONFIG_ARCH_IOP32X is not set
135# CONFIG_ARCH_IOP33X is not set
136# CONFIG_ARCH_IXP23XX is not set
137# CONFIG_ARCH_IXP2000 is not set
138# CONFIG_ARCH_IXP4XX is not set
139# CONFIG_ARCH_L7200 is not set
140# CONFIG_ARCH_KS8695 is not set
141# CONFIG_ARCH_NS9XXX is not set
142# CONFIG_ARCH_PNX4008 is not set
143CONFIG_ARCH_PXA=y
144# CONFIG_ARCH_RPC is not set
145# CONFIG_ARCH_SA1100 is not set
146# CONFIG_ARCH_S3C2410 is not set
147# CONFIG_ARCH_SHARK is not set
148# CONFIG_ARCH_LH7A40X is not set
149# CONFIG_ARCH_DAVINCI is not set
150# CONFIG_ARCH_OMAP is not set
151
152#
153# Intel PXA2xx Implementations
154#
155# CONFIG_ARCH_LUBBOCK is not set
156# CONFIG_MACH_LOGICPD_PXA270 is not set
157# CONFIG_MACH_MAINSTONE is not set
158# CONFIG_ARCH_PXA_IDP is not set
159# CONFIG_PXA_SHARPSL is not set
160# CONFIG_MACH_TRIZEPS4 is not set
161# CONFIG_MACH_HX2750 is not set
162CONFIG_MACH_HTCUNIVERSAL=y
163CONFIG_HTCUNIVERSAL_CORE=y
164CONFIG_HTCUNIVERSAL_UDC=y
165CONFIG_HTCUNIVERSAL_POWER=y
166CONFIG_HTCUNIVERSAL_BACKLIGHT=y
167CONFIG_HTCUNIVERSAL_LCD=y
168CONFIG_HTCUNIVERSAL_TS2=y
169CONFIG_HTCUNIVERSAL_BUTTONS=y
170CONFIG_HTCUNIVERSAL_BLUETOOTH=m
171CONFIG_HTCUNIVERSAL_ASIC3_LEDS=y
172CONFIG_HTCUNIVERSAL_PHONE=m
173# CONFIG_HTCUNIVERSAL_AK4641 is not set
174CONFIG_PXA27x=y
175# CONFIG_PXA_KEYS is not set
176
177#
178# Processor Type
179#
180CONFIG_CPU_32=y
181CONFIG_CPU_XSCALE=y
182CONFIG_CPU_32v5=y
183CONFIG_CPU_ABRT_EV5T=y
184CONFIG_CPU_CACHE_VIVT=y
185CONFIG_CPU_TLB_V4WBI=y
186CONFIG_CPU_CP15=y
187CONFIG_CPU_CP15_MMU=y
188
189#
190# Processor Features
191#
192CONFIG_ARM_THUMB=y
193# CONFIG_CPU_DCACHE_DISABLE is not set
194# CONFIG_OUTER_CACHE is not set
195CONFIG_IWMMXT=y
196CONFIG_XSCALE_PMU=y
197
198#
199# Bus support
200#
201# CONFIG_ARCH_SUPPORTS_MSI is not set
202
203#
204# PCCARD (PCMCIA/CardBus) support
205#
206# CONFIG_PCCARD is not set
207
208#
209# Kernel Features
210#
211# CONFIG_TICK_ONESHOT is not set
212CONFIG_PREEMPT=y
213CONFIG_NO_IDLE_HZ=y
214CONFIG_HZ=100
215CONFIG_AEABI=y
216CONFIG_OABI_COMPAT=y
217# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
218CONFIG_SELECT_MEMORY_MODEL=y
219CONFIG_FLATMEM_MANUAL=y
220# CONFIG_DISCONTIGMEM_MANUAL is not set
221# CONFIG_SPARSEMEM_MANUAL is not set
222CONFIG_FLATMEM=y
223CONFIG_FLAT_NODE_MEM_MAP=y
224# CONFIG_SPARSEMEM_STATIC is not set
225CONFIG_SPLIT_PTLOCK_CPUS=4096
226# CONFIG_RESOURCES_64BIT is not set
227CONFIG_ZONE_DMA_FLAG=1
228CONFIG_ALIGNMENT_TRAP=y
229
230#
231# Boot options
232#
233CONFIG_ZBOOT_ROM_TEXT=0x0
234CONFIG_ZBOOT_ROM_BSS=0x0
235CONFIG_CMDLINE="console=ttyS0,115200n8 console=tty1 noinitrd root=/dev/mtdblock2 rootfstype=jffs2 dyntick=enable quiet"
236# CONFIG_XIP_KERNEL is not set
237CONFIG_KEXEC=y
238
239#
240# CPU Frequency scaling
241#
242CONFIG_CPU_FREQ=y
243CONFIG_CPU_FREQ_TABLE=y
244CONFIG_CPU_FREQ_DEBUG=y
245CONFIG_CPU_FREQ_STAT=y
246CONFIG_CPU_FREQ_STAT_DETAILS=y
247# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
248CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
249CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
250# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
251CONFIG_CPU_FREQ_GOV_USERSPACE=y
252# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
253CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
254
255#
256# Floating point emulation
257#
258
259#
260# At least one emulation must be selected
261#
262CONFIG_FPE_NWFPE=y
263# CONFIG_FPE_NWFPE_XP is not set
264# CONFIG_FPE_FASTFPE is not set
265
266#
267# Userspace binary formats
268#
269CONFIG_BINFMT_ELF=y
270# CONFIG_BINFMT_AOUT is not set
271# CONFIG_BINFMT_MISC is not set
272
273#
274# Power management options
275#
276CONFIG_PM=y
277# CONFIG_PM_LEGACY is not set
278# CONFIG_PM_DEBUG is not set
279CONFIG_PM_SYSFS_DEPRECATED=y
280CONFIG_APM_EMULATION=y
281
282#
283# Networking
284#
285CONFIG_NET=y
286
287#
288# Networking options
289#
290CONFIG_PACKET=y
291CONFIG_PACKET_MMAP=y
292CONFIG_UNIX=y
293# CONFIG_NET_KEY is not set
294CONFIG_INET=y
295CONFIG_IP_MULTICAST=y
296# CONFIG_IP_ADVANCED_ROUTER is not set
297CONFIG_IP_FIB_HASH=y
298CONFIG_IP_PNP=y
299# CONFIG_IP_PNP_DHCP is not set
300# CONFIG_IP_PNP_BOOTP is not set
301# CONFIG_IP_PNP_RARP is not set
302# CONFIG_NET_IPIP is not set
303# CONFIG_NET_IPGRE is not set
304# CONFIG_IP_MROUTE is not set
305# CONFIG_ARPD is not set
306# CONFIG_SYN_COOKIES is not set
307# CONFIG_INET_AH is not set
308# CONFIG_INET_ESP is not set
309# CONFIG_INET_IPCOMP is not set
310# CONFIG_INET_XFRM_TUNNEL is not set
311# CONFIG_INET_TUNNEL is not set
312# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
313# CONFIG_INET_XFRM_MODE_TUNNEL is not set
314# CONFIG_INET_XFRM_MODE_BEET is not set
315# CONFIG_INET_DIAG is not set
316# CONFIG_TCP_CONG_ADVANCED is not set
317CONFIG_TCP_CONG_CUBIC=y
318CONFIG_DEFAULT_TCP_CONG="cubic"
319# CONFIG_TCP_MD5SIG is not set
320# CONFIG_IP_VS is not set
321# CONFIG_IPV6 is not set
322# CONFIG_INET6_XFRM_TUNNEL is not set
323# CONFIG_INET6_TUNNEL is not set
324# CONFIG_NETWORK_SECMARK is not set
325CONFIG_NETFILTER=y
326# CONFIG_NETFILTER_DEBUG is not set
327
328#
329# Core Netfilter Configuration
330#
331# CONFIG_NETFILTER_NETLINK is not set
332# CONFIG_NF_CONNTRACK_ENABLED is not set
333# CONFIG_NF_CONNTRACK is not set
334# CONFIG_NETFILTER_XTABLES is not set
335
336#
337# IP: Netfilter Configuration
338#
339# CONFIG_IP_NF_QUEUE is not set
340# CONFIG_IP_NF_IPTABLES is not set
341# CONFIG_IP_NF_ARPTABLES is not set
342# CONFIG_IP_DCCP is not set
343# CONFIG_IP_SCTP is not set
344# CONFIG_TIPC is not set
345# CONFIG_ATM is not set
346# CONFIG_BRIDGE is not set
347# CONFIG_VLAN_8021Q is not set
348# CONFIG_DECNET is not set
349# CONFIG_LLC2 is not set
350# CONFIG_IPX is not set
351# CONFIG_ATALK is not set
352# CONFIG_X25 is not set
353# CONFIG_LAPB is not set
354# CONFIG_ECONET is not set
355# CONFIG_WAN_ROUTER is not set
356
357#
358# QoS and/or fair queueing
359#
360# CONFIG_NET_SCHED is not set
361
362#
363# Network testing
364#
365# CONFIG_NET_PKTGEN is not set
366# CONFIG_HAMRADIO is not set
367CONFIG_IRDA=y
368
369#
370# IrDA protocols
371#
372CONFIG_IRLAN=y
373# CONFIG_IRNET is not set
374CONFIG_IRCOMM=y
375CONFIG_IRDA_ULTRA=y
376
377#
378# IrDA options
379#
380CONFIG_IRDA_CACHE_LAST_LSAP=y
381CONFIG_IRDA_FAST_RR=y
382CONFIG_IRDA_DEBUG=y
383
384#
385# Infrared-port device drivers
386#
387
388#
389# SIR device drivers
390#
391CONFIG_IRTTY_SIR=y
392
393#
394# Dongle support
395#
396# CONFIG_DONGLE is not set
397
398#
399# Old SIR device drivers
400#
401# CONFIG_IRPORT_SIR is not set
402
403#
404# Old Serial dongle support
405#
406
407#
408# FIR device drivers
409#
410CONFIG_PXA_FICP=y
411CONFIG_BT=m
412CONFIG_BT_L2CAP=m
413CONFIG_BT_SCO=m
414CONFIG_BT_RFCOMM=m
415CONFIG_BT_RFCOMM_TTY=y
416CONFIG_BT_BNEP=m
417CONFIG_BT_BNEP_MC_FILTER=y
418CONFIG_BT_BNEP_PROTO_FILTER=y
419CONFIG_BT_HIDP=m
420
421#
422# Bluetooth device drivers
423#
424CONFIG_BT_HCIUART=m
425CONFIG_BT_HCIUART_H4=y
426CONFIG_BT_HCIUART_BCSP=y
427# CONFIG_BT_HCIVHCI is not set
428# CONFIG_AF_RXRPC is not set
429
430#
431# Wireless
432#
433# CONFIG_CFG80211 is not set
434CONFIG_WIRELESS_EXT=y
435# CONFIG_MAC80211 is not set
436# CONFIG_IEEE80211 is not set
437# CONFIG_RFKILL is not set
438
439#
440# Device Drivers
441#
442
443#
444# Generic Driver Options
445#
446CONFIG_STANDALONE=y
447CONFIG_PREVENT_FIRMWARE_BUILD=y
448CONFIG_FW_LOADER=y
449# CONFIG_DEBUG_DRIVER is not set
450# CONFIG_DEBUG_DEVRES is not set
451# CONFIG_SYS_HYPERVISOR is not set
452
453#
454# Connector - unified userspace <-> kernelspace linker
455#
456# CONFIG_CONNECTOR is not set
457CONFIG_MTD=y
458CONFIG_MTD_DEBUG=y
459CONFIG_MTD_DEBUG_VERBOSE=0
460# CONFIG_MTD_CONCAT is not set
461CONFIG_MTD_PARTITIONS=y
462# CONFIG_MTD_REDBOOT_PARTS is not set
463# CONFIG_MTD_CMDLINE_PARTS is not set
464# CONFIG_MTD_AFS_PARTS is not set
465
466#
467# User Modules And Translation Layers
468#
469# CONFIG_MTD_CHAR is not set
470# CONFIG_MTD_BLKDEVS is not set
471# CONFIG_MTD_BLOCK is not set
472# CONFIG_MTD_BLOCK_RO is not set
473# CONFIG_FTL is not set
474# CONFIG_NFTL is not set
475# CONFIG_INFTL is not set
476# CONFIG_RFD_FTL is not set
477# CONFIG_SSFDC is not set
478
479#
480# RAM/ROM/Flash chip drivers
481#
482# CONFIG_MTD_CFI is not set
483# CONFIG_MTD_JEDECPROBE is not set
484CONFIG_MTD_MAP_BANK_WIDTH_1=y
485CONFIG_MTD_MAP_BANK_WIDTH_2=y
486CONFIG_MTD_MAP_BANK_WIDTH_4=y
487# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
488# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
489# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
490CONFIG_MTD_CFI_I1=y
491CONFIG_MTD_CFI_I2=y
492# CONFIG_MTD_CFI_I4 is not set
493# CONFIG_MTD_CFI_I8 is not set
494# CONFIG_MTD_RAM is not set
495# CONFIG_MTD_ROM is not set
496# CONFIG_MTD_ABSENT is not set
497
498#
499# Mapping drivers for chip access
500#
501# CONFIG_MTD_COMPLEX_MAPPINGS is not set
502# CONFIG_MTD_SHARP_SL is not set
503# CONFIG_MTD_PLATRAM is not set
504
505#
506# Self-contained MTD device drivers
507#
508# CONFIG_MTD_SLRAM is not set
509# CONFIG_MTD_PHRAM is not set
510CONFIG_MTD_MTDRAM=m
511CONFIG_MTDRAM_TOTAL_SIZE=4096
512CONFIG_MTDRAM_ERASE_SIZE=128
513# CONFIG_MTD_BLOCK2MTD is not set
514
515#
516# Disk-On-Chip Device Drivers
517#
518# CONFIG_MTD_DOC2000 is not set
519# CONFIG_MTD_DOC2001 is not set
520# CONFIG_MTD_DOC2001PLUS is not set
521# CONFIG_MTD_NAND is not set
522# CONFIG_MTD_ONENAND is not set
523
524#
525# UBI - Unsorted block images
526#
527# CONFIG_MTD_UBI is not set
528
529#
530# Parallel port support
531#
532# CONFIG_PARPORT is not set
533
534#
535# Plug and Play support
536#
537# CONFIG_PNPACPI is not set
538
539#
540# Block devices
541#
542# CONFIG_BLK_DEV_COW_COMMON is not set
543# CONFIG_BLK_DEV_LOOP is not set
544# CONFIG_BLK_DEV_NBD is not set
545# CONFIG_BLK_DEV_RAM is not set
546# CONFIG_CDROM_PKTCDVD is not set
547# CONFIG_ATA_OVER_ETH is not set
548# CONFIG_IDE is not set
549
550#
551# SCSI device support
552#
553# CONFIG_RAID_ATTRS is not set
554# CONFIG_SCSI is not set
555# CONFIG_SCSI_NETLINK is not set
556# CONFIG_ATA is not set
557
558#
559# Multi-device support (RAID and LVM)
560#
561# CONFIG_MD is not set
562
563#
564# Network device support
565#
566CONFIG_NETDEVICES=y
567# CONFIG_DUMMY is not set
568# CONFIG_BONDING is not set
569# CONFIG_EQUALIZER is not set
570# CONFIG_TUN is not set
571
572#
573# Ethernet (10 or 100Mbit)
574#
575# CONFIG_NET_ETHERNET is not set
576CONFIG_NETDEV_1000=y
577CONFIG_NETDEV_10000=y
578
579#
580# Wireless LAN
581#
582# CONFIG_WLAN_PRE80211 is not set
583# CONFIG_WLAN_80211 is not set
584# CONFIG_WAN is not set
585CONFIG_PPP=m
586# CONFIG_PPP_MULTILINK is not set
587# CONFIG_PPP_FILTER is not set
588CONFIG_PPP_ASYNC=m
589# CONFIG_PPP_SYNC_TTY is not set
590CONFIG_PPP_DEFLATE=m
591CONFIG_PPP_BSDCOMP=m
592CONFIG_PPP_MPPE=m
593# CONFIG_PPPOE is not set
594# CONFIG_SLIP is not set
595CONFIG_SLHC=m
596# CONFIG_SHAPER is not set
597# CONFIG_NETCONSOLE is not set
598# CONFIG_NETPOLL is not set
599# CONFIG_NET_POLL_CONTROLLER is not set
600
601#
602# ISDN subsystem
603#
604# CONFIG_ISDN is not set
605
606#
607# Input device support
608#
609CONFIG_INPUT=y
610# CONFIG_INPUT_FF_MEMLESS is not set
611# CONFIG_INPUT_POLLDEV is not set
612
613#
614# Userland interfaces
615#
616# CONFIG_INPUT_MOUSEDEV is not set
617# CONFIG_INPUT_JOYDEV is not set
618# CONFIG_INPUT_TSDEV is not set
619CONFIG_INPUT_EVDEV=y
620# CONFIG_INPUT_EVBUG is not set
621# CONFIG_INPUT_POWER is not set
622
623#
624# Input Device Drivers
625#
626CONFIG_INPUT_KEYBOARD=y
627# CONFIG_KEYBOARD_ATKBD is not set
628# CONFIG_KEYBOARD_SUNKBD is not set
629# CONFIG_KEYBOARD_LKKBD is not set
630# CONFIG_KEYBOARD_XTKBD is not set
631# CONFIG_KEYBOARD_NEWTON is not set
632# CONFIG_KEYBOARD_STOWAWAY is not set
633CONFIG_KEYBOARD_PXA27x=y
634CONFIG_KEYBOARD_GPIO=y
635CONFIG_INPUT_MOUSE=y
636# CONFIG_MOUSE_PS2 is not set
637# CONFIG_MOUSE_SERIAL is not set
638# CONFIG_MOUSE_APPLETOUCH is not set
639# CONFIG_MOUSE_VSXXXAA is not set
640# CONFIG_INPUT_JOYSTICK is not set
641# CONFIG_INPUT_TABLET is not set
642CONFIG_INPUT_TOUCHSCREEN=y
643# CONFIG_TOUCHSCREEN_GUNZE is not set
644# CONFIG_TOUCHSCREEN_ELO is not set
645# CONFIG_TOUCHSCREEN_MTOUCH is not set
646# CONFIG_TOUCHSCREEN_MK712 is not set
647# CONFIG_TOUCHSCREEN_PENMOUNT is not set
648# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
649# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
650# CONFIG_TOUCHSCREEN_UCB1400 is not set
651# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
652CONFIG_INPUT_MISC=y
653# CONFIG_INPUT_ATI_REMOTE is not set
654# CONFIG_INPUT_ATI_REMOTE2 is not set
655# CONFIG_INPUT_KEYSPAN_REMOTE is not set
656# CONFIG_INPUT_POWERMATE is not set
657# CONFIG_INPUT_YEALINK is not set
658CONFIG_INPUT_UINPUT=m
659
660#
661# Hardware I/O ports
662#
663# CONFIG_SERIO is not set
664# CONFIG_GAMEPORT is not set
665
666#
667# Character devices
668#
669CONFIG_VT=y
670CONFIG_VT_CONSOLE=y
671CONFIG_HW_CONSOLE=y
672# CONFIG_VT_HW_CONSOLE_BINDING is not set
673# CONFIG_SERIAL_NONSTANDARD is not set
674
675#
676# Serial drivers
677#
678# CONFIG_SERIAL_8250 is not set
679
680#
681# Non-8250 serial port support
682#
683CONFIG_SERIAL_PXA=y
684CONFIG_SERIAL_PXA_CONSOLE=y
685CONFIG_SERIAL_CORE=y
686CONFIG_SERIAL_CORE_CONSOLE=y
687CONFIG_UNIX98_PTYS=y
688CONFIG_LEGACY_PTYS=y
689CONFIG_LEGACY_PTY_COUNT=32
690
691#
692# IPMI
693#
694# CONFIG_IPMI_HANDLER is not set
695# CONFIG_WATCHDOG is not set
696# CONFIG_HW_RANDOM is not set
697# CONFIG_NVRAM is not set
698# CONFIG_R3964 is not set
699# CONFIG_RAW_DRIVER is not set
700
701#
702# TPM devices
703#
704# CONFIG_TCG_TPM is not set
705CONFIG_I2C=m
706CONFIG_I2C_BOARDINFO=y
707# CONFIG_I2C_CHARDEV is not set
708
709#
710# I2C Algorithms
711#
712# CONFIG_I2C_ALGOBIT is not set
713# CONFIG_I2C_ALGOPCF is not set
714# CONFIG_I2C_ALGOPCA is not set
715
716#
717# I2C Hardware Bus support
718#
719# CONFIG_I2C_GPIO is not set
720CONFIG_I2C_PXA=m
721# CONFIG_I2C_PXA_SLAVE is not set
722# CONFIG_I2C_OCORES is not set
723# CONFIG_I2C_PARPORT_LIGHT is not set
724# CONFIG_I2C_SIMTEC is not set
725# CONFIG_I2C_STUB is not set
726
727#
728# Miscellaneous I2C Chip support
729#
730# CONFIG_SENSORS_DS1337 is not set
731# CONFIG_SENSORS_DS1374 is not set
732# CONFIG_SENSORS_EEPROM is not set
733# CONFIG_SENSORS_PCF8574 is not set
734# CONFIG_SENSORS_PCA9539 is not set
735# CONFIG_SENSORS_PCF8591 is not set
736# CONFIG_SENSORS_MAX6875 is not set
737# CONFIG_I2C_DEBUG_CORE is not set
738# CONFIG_I2C_DEBUG_ALGO is not set
739# CONFIG_I2C_DEBUG_BUS is not set
740# CONFIG_I2C_DEBUG_CHIP is not set
741
742#
743# SPI support
744#
745# CONFIG_SPI is not set
746# CONFIG_SPI_MASTER is not set
747
748#
749# Dallas's 1-wire bus
750#
751CONFIG_W1=y
752
753#
754# 1-wire Bus Masters
755#
756# CONFIG_W1_MASTER_DS2482 is not set
757CONFIG_W1_MASTER_DS1WM=y
758
759#
760# 1-wire Slaves
761#
762# CONFIG_W1_SLAVE_THERM is not set
763# CONFIG_W1_SLAVE_SMEM is not set
764# CONFIG_W1_SLAVE_DS2433 is not set
765# CONFIG_HWMON is not set
766
767#
768# Misc devices
769#
770
771#
772# Multifunction device drivers
773#
774# CONFIG_MFD_SM501 is not set
775CONFIG_HTC_ASIC3=y
776
777#
778# Multi-Function Devices
779#
780
781#
782# LED devices
783#
784CONFIG_NEW_LEDS=y
785CONFIG_LEDS_CLASS=y
786
787#
788# LED drivers
789#
790CONFIG_LEDS_ASIC3=y
791
792#
793# LED Triggers
794#
795CONFIG_LEDS_TRIGGERS=y
796CONFIG_LEDS_TRIGGER_TIMER=y
797# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
798
799#
800# Multimedia devices
801#
802# CONFIG_VIDEO_DEV is not set
803# CONFIG_DVB_CORE is not set
804CONFIG_DAB=y
805
806#
807# Graphics support
808#
809CONFIG_BACKLIGHT_LCD_SUPPORT=y
810CONFIG_BACKLIGHT_CLASS_DEVICE=y
811CONFIG_LCD_CLASS_DEVICE=y
812CONFIG_BACKLIGHT_CORGI=y
813
814#
815# Display device support
816#
817# CONFIG_DISPLAY_SUPPORT is not set
818# CONFIG_VGASTATE is not set
819CONFIG_FB=y
820# CONFIG_FIRMWARE_EDID is not set
821# CONFIG_FB_DDC is not set
822CONFIG_FB_CFB_FILLRECT=y
823CONFIG_FB_CFB_COPYAREA=y
824CONFIG_FB_CFB_IMAGEBLIT=y
825# CONFIG_FB_SYS_FILLRECT is not set
826# CONFIG_FB_SYS_COPYAREA is not set
827# CONFIG_FB_SYS_IMAGEBLIT is not set
828# CONFIG_FB_SYS_FOPS is not set
829CONFIG_FB_DEFERRED_IO=y
830# CONFIG_FB_SVGALIB is not set
831# CONFIG_FB_MACMODES is not set
832# CONFIG_FB_BACKLIGHT is not set
833# CONFIG_FB_MODE_HELPERS is not set
834# CONFIG_FB_TILEBLITTING is not set
835
836#
837# Frame buffer hardware drivers
838#
839# CONFIG_FB_S1D13XXX is not set
840CONFIG_FB_PXA=y
841CONFIG_FB_PXA_LCD_QVGA=y
842# CONFIG_FB_PXA_LCD_VGA is not set
843# CONFIG_FB_PXA_OVERLAY is not set
844# CONFIG_FB_PXA_PARAMETERS is not set
845# CONFIG_FB_MBX is not set
846# CONFIG_FB_VIRTUAL is not set
847
848#
849# Console display driver support
850#
851# CONFIG_VGA_CONSOLE is not set
852CONFIG_DUMMY_CONSOLE=y
853CONFIG_FRAMEBUFFER_CONSOLE=y
854CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
855CONFIG_FONTS=y
856CONFIG_FONT_8x8=y
857# CONFIG_FONT_8x16 is not set
858# CONFIG_FONT_6x11 is not set
859# CONFIG_FONT_7x14 is not set
860# CONFIG_FONT_PEARL_8x8 is not set
861# CONFIG_FONT_ACORN_8x8 is not set
862# CONFIG_FONT_MINI_4x6 is not set
863# CONFIG_FONT_SUN8x16 is not set
864# CONFIG_FONT_SUN12x22 is not set
865# CONFIG_FONT_10x18 is not set
866CONFIG_LOGO=y
867CONFIG_LOGO_LINUX_MONO=y
868CONFIG_LOGO_LINUX_VGA16=y
869# CONFIG_LOGO_LINUX_CLUT224 is not set
870CONFIG_LOGO_OHAND_CLUT224=y
871# CONFIG_LOGO_OZ240_CLUT224 is not set
872# CONFIG_LOGO_OZ480_CLUT224 is not set
873# CONFIG_LOGO_OZ640_CLUT224 is not set
874
875#
876# Sound
877#
878CONFIG_SOUND=y
879
880#
881# Advanced Linux Sound Architecture
882#
883CONFIG_SND=m
884CONFIG_SND_TIMER=m
885CONFIG_SND_PCM=m
886# CONFIG_SND_SEQUENCER is not set
887CONFIG_SND_OSSEMUL=y
888CONFIG_SND_MIXER_OSS=m
889CONFIG_SND_PCM_OSS=m
890CONFIG_SND_PCM_OSS_PLUGINS=y
891# CONFIG_SND_DYNAMIC_MINORS is not set
892CONFIG_SND_SUPPORT_OLD_API=y
893CONFIG_SND_VERBOSE_PROCFS=y
894# CONFIG_SND_VERBOSE_PRINTK is not set
895# CONFIG_SND_DEBUG is not set
896
897#
898# Generic devices
899#
900# CONFIG_SND_DUMMY is not set
901# CONFIG_SND_MTPAV is not set
902# CONFIG_SND_SERIAL_U16550 is not set
903# CONFIG_SND_MPU401 is not set
904
905#
906# ALSA ARM devices
907#
908# CONFIG_SND_PXA2XX_AC97 is not set
909
910#
911# System on Chip audio support
912#
913# CONFIG_SND_SOC is not set
914
915#
916# Open Sound System
917#
918# CONFIG_SOUND_PRIME is not set
919
920#
921# HID Devices
922#
923CONFIG_HID=m
924# CONFIG_HID_DEBUG is not set
925
926#
927# USB support
928#
929CONFIG_USB_ARCH_HAS_HCD=y
930CONFIG_USB_ARCH_HAS_OHCI=y
931# CONFIG_USB_ARCH_HAS_EHCI is not set
932# CONFIG_USB is not set
933
934#
935# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
936#
937
938#
939# USB Gadget Support
940#
941CONFIG_USB_GADGET=y
942# CONFIG_USB_GADGET_DEBUG_FILES is not set
943CONFIG_USB_GADGET_SELECTED=y
944# CONFIG_USB_GADGET_FSL_USB2 is not set
945# CONFIG_USB_GADGET_NET2280 is not set
946# CONFIG_USB_GADGET_PXA2XX is not set
947CONFIG_USB_GADGET_PXA27X=y
948CONFIG_USB_PXA27X=y
949# CONFIG_USB_GADGET_GOKU is not set
950# CONFIG_USB_GADGET_LH7A40X is not set
951# CONFIG_USB_GADGET_OMAP is not set
952# CONFIG_USB_GADGET_AT91 is not set
953# CONFIG_USB_GADGET_DUMMY_HCD is not set
954# CONFIG_USB_GADGET_DUALSPEED is not set
955# CONFIG_USB_ZERO is not set
956CONFIG_USB_ETH=y
957CONFIG_USB_ETH_RNDIS=y
958# CONFIG_USB_GADGETFS is not set
959# CONFIG_USB_FILE_STORAGE is not set
960# CONFIG_USB_G_SERIAL is not set
961# CONFIG_USB_MIDI_GADGET is not set
962CONFIG_MMC=y
963# CONFIG_MMC_DEBUG is not set
964CONFIG_MMC_UNSAFE_RESUME=y
965
966#
967# MMC/SD Card Drivers
968#
969CONFIG_MMC_BLOCK=y
970
971#
972# MMC/SD Host Controller Drivers
973#
974# CONFIG_MMC_PXA is not set
975CONFIG_MMC_ASIC3=y
976
977#
978# Real Time Clock
979#
980CONFIG_RTC_LIB=y
981CONFIG_RTC_CLASS=y
982CONFIG_RTC_HCTOSYS=y
983CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
984CONFIG_RTC_DEBUG=y
985
986#
987# RTC interfaces
988#
989CONFIG_RTC_INTF_SYSFS=y
990CONFIG_RTC_INTF_PROC=y
991CONFIG_RTC_INTF_DEV=y
992# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
993# CONFIG_RTC_DRV_TEST is not set
994
995#
996# I2C RTC drivers
997#
998# CONFIG_RTC_DRV_DS1307 is not set
999# CONFIG_RTC_DRV_DS1672 is not set
1000# CONFIG_RTC_DRV_MAX6900 is not set
1001# CONFIG_RTC_DRV_RS5C372 is not set
1002# CONFIG_RTC_DRV_ISL1208 is not set
1003# CONFIG_RTC_DRV_X1205 is not set
1004# CONFIG_RTC_DRV_PCF8563 is not set
1005# CONFIG_RTC_DRV_PCF8583 is not set
1006
1007#
1008# SPI RTC drivers
1009#
1010
1011#
1012# Platform RTC drivers
1013#
1014# CONFIG_RTC_DRV_CMOS is not set
1015# CONFIG_RTC_DRV_DS1553 is not set
1016# CONFIG_RTC_DRV_DS1742 is not set
1017# CONFIG_RTC_DRV_M48T86 is not set
1018# CONFIG_RTC_DRV_V3020 is not set
1019
1020#
1021# on-CPU RTC drivers
1022#
1023CONFIG_RTC_DRV_SA1100=y
1024
1025#
1026# File systems
1027#
1028CONFIG_EXT2_FS=y
1029# CONFIG_EXT2_FS_XATTR is not set
1030# CONFIG_EXT2_FS_XIP is not set
1031CONFIG_EXT3_FS=y
1032# CONFIG_EXT3_FS_XATTR is not set
1033# CONFIG_EXT4DEV_FS is not set
1034CONFIG_JBD=y
1035# CONFIG_JBD_DEBUG is not set
1036# CONFIG_REISERFS_FS is not set
1037# CONFIG_JFS_FS is not set
1038# CONFIG_FS_POSIX_ACL is not set
1039# CONFIG_XFS_FS is not set
1040# CONFIG_GFS2_FS is not set
1041# CONFIG_OCFS2_FS is not set
1042# CONFIG_MINIX_FS is not set
1043# CONFIG_ROMFS_FS is not set
1044CONFIG_INOTIFY=y
1045CONFIG_INOTIFY_USER=y
1046# CONFIG_QUOTA is not set
1047CONFIG_DNOTIFY=y
1048# CONFIG_AUTOFS_FS is not set
1049# CONFIG_AUTOFS4_FS is not set
1050# CONFIG_FUSE_FS is not set
1051
1052#
1053# CD-ROM/DVD Filesystems
1054#
1055# CONFIG_ISO9660_FS is not set
1056# CONFIG_UDF_FS is not set
1057
1058#
1059# DOS/FAT/NT Filesystems
1060#
1061CONFIG_FAT_FS=y
1062CONFIG_MSDOS_FS=y
1063CONFIG_VFAT_FS=y
1064CONFIG_FAT_DEFAULT_CODEPAGE=437
1065CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1066# CONFIG_NTFS_FS is not set
1067
1068#
1069# Pseudo filesystems
1070#
1071CONFIG_PROC_FS=y
1072CONFIG_PROC_SYSCTL=y
1073CONFIG_SYSFS=y
1074CONFIG_TMPFS=y
1075# CONFIG_TMPFS_POSIX_ACL is not set
1076# CONFIG_HUGETLB_PAGE is not set
1077CONFIG_RAMFS=y
1078# CONFIG_CONFIGFS_FS is not set
1079
1080#
1081# Miscellaneous filesystems
1082#
1083# CONFIG_ADFS_FS is not set
1084# CONFIG_AFFS_FS is not set
1085# CONFIG_HFS_FS is not set
1086# CONFIG_HFSPLUS_FS is not set
1087# CONFIG_BEFS_FS is not set
1088# CONFIG_BFS_FS is not set
1089# CONFIG_EFS_FS is not set
1090# CONFIG_JFFS2_FS is not set
1091# CONFIG_CRAMFS is not set
1092# CONFIG_VXFS_FS is not set
1093# CONFIG_HPFS_FS is not set
1094# CONFIG_QNX4FS_FS is not set
1095# CONFIG_SYSV_FS is not set
1096# CONFIG_UFS_FS is not set
1097
1098#
1099# Network File Systems
1100#
1101CONFIG_NFS_FS=y
1102CONFIG_NFS_V3=y
1103# CONFIG_NFS_V3_ACL is not set
1104# CONFIG_NFS_V4 is not set
1105# CONFIG_NFS_DIRECTIO is not set
1106# CONFIG_NFSD is not set
1107CONFIG_ROOT_NFS=y
1108CONFIG_LOCKD=y
1109CONFIG_LOCKD_V4=y
1110CONFIG_NFS_COMMON=y
1111CONFIG_SUNRPC=y
1112# CONFIG_SUNRPC_BIND34 is not set
1113# CONFIG_RPCSEC_GSS_KRB5 is not set
1114# CONFIG_RPCSEC_GSS_SPKM3 is not set
1115# CONFIG_SMB_FS is not set
1116# CONFIG_CIFS is not set
1117# CONFIG_NCP_FS is not set
1118# CONFIG_CODA_FS is not set
1119# CONFIG_AFS_FS is not set
1120# CONFIG_9P_FS is not set
1121
1122#
1123# Partition Types
1124#
1125# CONFIG_PARTITION_ADVANCED is not set
1126CONFIG_MSDOS_PARTITION=y
1127
1128#
1129# Native Language Support
1130#
1131CONFIG_NLS=y
1132CONFIG_NLS_DEFAULT="iso8859-1"
1133CONFIG_NLS_CODEPAGE_437=y
1134# CONFIG_NLS_CODEPAGE_737 is not set
1135# CONFIG_NLS_CODEPAGE_775 is not set
1136# CONFIG_NLS_CODEPAGE_850 is not set
1137# CONFIG_NLS_CODEPAGE_852 is not set
1138# CONFIG_NLS_CODEPAGE_855 is not set
1139# CONFIG_NLS_CODEPAGE_857 is not set
1140# CONFIG_NLS_CODEPAGE_860 is not set
1141# CONFIG_NLS_CODEPAGE_861 is not set
1142# CONFIG_NLS_CODEPAGE_862 is not set
1143# CONFIG_NLS_CODEPAGE_863 is not set
1144# CONFIG_NLS_CODEPAGE_864 is not set
1145# CONFIG_NLS_CODEPAGE_865 is not set
1146# CONFIG_NLS_CODEPAGE_866 is not set
1147# CONFIG_NLS_CODEPAGE_869 is not set
1148# CONFIG_NLS_CODEPAGE_936 is not set
1149# CONFIG_NLS_CODEPAGE_950 is not set
1150# CONFIG_NLS_CODEPAGE_932 is not set
1151# CONFIG_NLS_CODEPAGE_949 is not set
1152# CONFIG_NLS_CODEPAGE_874 is not set
1153# CONFIG_NLS_ISO8859_8 is not set
1154CONFIG_NLS_CODEPAGE_1250=y
1155CONFIG_NLS_CODEPAGE_1251=y
1156# CONFIG_NLS_ASCII is not set
1157CONFIG_NLS_ISO8859_1=y
1158# CONFIG_NLS_ISO8859_2 is not set
1159# CONFIG_NLS_ISO8859_3 is not set
1160# CONFIG_NLS_ISO8859_4 is not set
1161# CONFIG_NLS_ISO8859_5 is not set
1162# CONFIG_NLS_ISO8859_6 is not set
1163# CONFIG_NLS_ISO8859_7 is not set
1164# CONFIG_NLS_ISO8859_9 is not set
1165# CONFIG_NLS_ISO8859_13 is not set
1166# CONFIG_NLS_ISO8859_14 is not set
1167# CONFIG_NLS_ISO8859_15 is not set
1168# CONFIG_NLS_KOI8_R is not set
1169# CONFIG_NLS_KOI8_U is not set
1170CONFIG_NLS_UTF8=y
1171
1172#
1173# Distributed Lock Manager
1174#
1175# CONFIG_DLM is not set
1176
1177#
1178# Profiling support
1179#
1180# CONFIG_PROFILING is not set
1181
1182#
1183# Kernel hacking
1184#
1185CONFIG_PRINTK_TIME=y
1186CONFIG_ENABLE_MUST_CHECK=y
1187# CONFIG_MAGIC_SYSRQ is not set
1188# CONFIG_UNUSED_SYMBOLS is not set
1189# CONFIG_DEBUG_FS is not set
1190# CONFIG_HEADERS_CHECK is not set
1191CONFIG_DEBUG_KERNEL=y
1192# CONFIG_DEBUG_SHIRQ is not set
1193CONFIG_DETECT_SOFTLOCKUP=y
1194# CONFIG_SCHEDSTATS is not set
1195# CONFIG_TIMER_STATS is not set
1196# CONFIG_DEBUG_SLAB is not set
1197CONFIG_DEBUG_PREEMPT=y
1198# CONFIG_DEBUG_RT_MUTEXES is not set
1199# CONFIG_RT_MUTEX_TESTER is not set
1200# CONFIG_DEBUG_SPINLOCK is not set
1201CONFIG_DEBUG_MUTEXES=y
1202# CONFIG_DEBUG_LOCK_ALLOC is not set
1203# CONFIG_PROVE_LOCKING is not set
1204# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1205# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1206# CONFIG_DEBUG_KOBJECT is not set
1207CONFIG_DEBUG_BUGVERBOSE=y
1208# CONFIG_DEBUG_INFO is not set
1209CONFIG_DEBUG_VM=y
1210# CONFIG_DEBUG_LIST is not set
1211CONFIG_FRAME_POINTER=y
1212CONFIG_FORCED_INLINING=y
1213# CONFIG_RCU_TORTURE_TEST is not set
1214# CONFIG_FAULT_INJECTION is not set
1215CONFIG_DEBUG_USER=y
1216CONFIG_DEBUG_ERRORS=y
1217CONFIG_DEBUG_LL=y
1218# CONFIG_DEBUG_ICEDCC is not set
1219
1220#
1221# Security options
1222#
1223# CONFIG_KEYS is not set
1224# CONFIG_SECURITY is not set
1225
1226#
1227# Cryptographic options
1228#
1229CONFIG_CRYPTO=y
1230CONFIG_CRYPTO_ALGAPI=y
1231CONFIG_CRYPTO_BLKCIPHER=m
1232CONFIG_CRYPTO_HASH=y
1233CONFIG_CRYPTO_MANAGER=y
1234CONFIG_CRYPTO_HMAC=y
1235# CONFIG_CRYPTO_XCBC is not set
1236# CONFIG_CRYPTO_NULL is not set
1237# CONFIG_CRYPTO_MD4 is not set
1238CONFIG_CRYPTO_MD5=y
1239CONFIG_CRYPTO_SHA1=y
1240# CONFIG_CRYPTO_SHA256 is not set
1241# CONFIG_CRYPTO_SHA512 is not set
1242# CONFIG_CRYPTO_WP512 is not set
1243# CONFIG_CRYPTO_TGR192 is not set
1244# CONFIG_CRYPTO_GF128MUL is not set
1245CONFIG_CRYPTO_ECB=m
1246# CONFIG_CRYPTO_CBC is not set
1247CONFIG_CRYPTO_PCBC=m
1248# CONFIG_CRYPTO_LRW is not set
1249# CONFIG_CRYPTO_CRYPTD is not set
1250CONFIG_CRYPTO_DES=y
1251# CONFIG_CRYPTO_FCRYPT is not set
1252# CONFIG_CRYPTO_BLOWFISH is not set
1253# CONFIG_CRYPTO_TWOFISH is not set
1254# CONFIG_CRYPTO_SERPENT is not set
1255# CONFIG_CRYPTO_AES is not set
1256# CONFIG_CRYPTO_CAST5 is not set
1257# CONFIG_CRYPTO_CAST6 is not set
1258# CONFIG_CRYPTO_TEA is not set
1259CONFIG_CRYPTO_ARC4=m
1260# CONFIG_CRYPTO_KHAZAD is not set
1261# CONFIG_CRYPTO_ANUBIS is not set
1262CONFIG_CRYPTO_DEFLATE=y
1263# CONFIG_CRYPTO_LZO is not set
1264# CONFIG_CRYPTO_MICHAEL_MIC is not set
1265# CONFIG_CRYPTO_CRC32C is not set
1266# CONFIG_CRYPTO_CAMELLIA is not set
1267# CONFIG_CRYPTO_TEST is not set
1268
1269#
1270# Hardware crypto devices
1271#
1272
1273#
1274# Library routines
1275#
1276CONFIG_BITREVERSE=y
1277CONFIG_CRC_CCITT=y
1278# CONFIG_CRC16 is not set
1279# CONFIG_CRC_ITU_T is not set
1280CONFIG_CRC32=y
1281# CONFIG_LIBCRC32C is not set
1282CONFIG_ZLIB_INFLATE=y
1283CONFIG_ZLIB_DEFLATE=y
1284CONFIG_PLIST=y
1285CONFIG_HAS_IOMEM=y
1286CONFIG_HAS_IOPORT=y
1287CONFIG_HAS_DMA=y
diff --git a/meta/packages/linux/linux-rp-2.6.22/defconfig-hx2000 b/meta/packages/linux/linux-rp-2.6.22/defconfig-hx2000
index 3169a42c8f..ee05db4e5a 100644
--- a/meta/packages/linux/linux-rp-2.6.22/defconfig-hx2000
+++ b/meta/packages/linux/linux-rp-2.6.22/defconfig-hx2000
@@ -871,6 +871,8 @@ CONFIG_MMC=y
871CONFIG_MMC_BLOCK=y 871CONFIG_MMC_BLOCK=y
872CONFIG_MMC_PXA=y 872CONFIG_MMC_PXA=y
873# CONFIG_MMC_TIFM_SD is not set 873# CONFIG_MMC_TIFM_SD is not set
874CONFIG_MMC_UNSAFE_RESUME=y
875
874 876
875# 877#
876# Real Time Clock 878# Real Time Clock
diff --git a/meta/packages/linux/linux-rp-2.6.22/defconfig-poodle b/meta/packages/linux/linux-rp-2.6.22/defconfig-poodle
index fa7b83df77..387b5e9bff 100644
--- a/meta/packages/linux/linux-rp-2.6.22/defconfig-poodle
+++ b/meta/packages/linux/linux-rp-2.6.22/defconfig-poodle
@@ -1371,6 +1371,8 @@ CONFIG_MMC=y
1371# CONFIG_MMC_DEBUG is not set 1371# CONFIG_MMC_DEBUG is not set
1372CONFIG_MMC_BLOCK=y 1372CONFIG_MMC_BLOCK=y
1373CONFIG_MMC_PXA=y 1373CONFIG_MMC_PXA=y
1374CONFIG_MMC_UNSAFE_RESUME=y
1375
1374 1376
1375# 1377#
1376# Real Time Clock 1378# Real Time Clock
diff --git a/meta/packages/linux/linux-rp-2.6.22/defconfig-spitz b/meta/packages/linux/linux-rp-2.6.22/defconfig-spitz
index dcf44841f1..6d833ac0fe 100644
--- a/meta/packages/linux/linux-rp-2.6.22/defconfig-spitz
+++ b/meta/packages/linux/linux-rp-2.6.22/defconfig-spitz
@@ -1348,7 +1348,7 @@ CONFIG_USB_G_SERIAL=m
1348# CONFIG_USB_MIDI_GADGET is not set 1348# CONFIG_USB_MIDI_GADGET is not set
1349CONFIG_MMC=y 1349CONFIG_MMC=y
1350# CONFIG_MMC_DEBUG is not set 1350# CONFIG_MMC_DEBUG is not set
1351# CONFIG_MMC_UNSAFE_RESUME is not set 1351CONFIG_MMC_UNSAFE_RESUME=y
1352 1352
1353# 1353#
1354# MMC/SD Card Drivers 1354# MMC/SD Card Drivers
diff --git a/meta/packages/linux/linux-rp-2.6.22/defconfig-tosa b/meta/packages/linux/linux-rp-2.6.22/defconfig-tosa
index 392acf47e9..74fc076608 100644
--- a/meta/packages/linux/linux-rp-2.6.22/defconfig-tosa
+++ b/meta/packages/linux/linux-rp-2.6.22/defconfig-tosa
@@ -1329,6 +1329,7 @@ CONFIG_MMC=y
1329# CONFIG_MMC_DEBUG is not set 1329# CONFIG_MMC_DEBUG is not set
1330CONFIG_MMC_BLOCK=y 1330CONFIG_MMC_BLOCK=y
1331CONFIG_MMC_PXA=y 1331CONFIG_MMC_PXA=y
1332CONFIG_MMC_UNSAFE_RESUME=y
1332 1333
1333# 1334#
1334# Real Time Clock 1335# Real Time Clock
diff --git a/meta/packages/linux/linux-rp-2.6.22/htcuni.patch b/meta/packages/linux/linux-rp-2.6.22/htcuni.patch
new file mode 100644
index 0000000000..590b2d86c0
--- /dev/null
+++ b/meta/packages/linux/linux-rp-2.6.22/htcuni.patch
@@ -0,0 +1,7932 @@
1---
2 arch/arm/mach-pxa/Kconfig | 2
3 arch/arm/mach-pxa/Makefile | 1
4 arch/arm/mach-pxa/htcuniversal/Kconfig | 80
5 arch/arm/mach-pxa/htcuniversal/Makefile | 19
6 arch/arm/mach-pxa/htcuniversal/htcuniversal.c | 470 +++++
7 arch/arm/mach-pxa/htcuniversal/htcuniversal_ak4641.c | 917 +++++++++++
8 arch/arm/mach-pxa/htcuniversal/htcuniversal_ak4641.h | 65
9 arch/arm/mach-pxa/htcuniversal/htcuniversal_asic3_leds.c | 143 +
10 arch/arm/mach-pxa/htcuniversal/htcuniversal_bl.c | 61
11 arch/arm/mach-pxa/htcuniversal/htcuniversal_bt.c | 135 +
12 arch/arm/mach-pxa/htcuniversal/htcuniversal_bt.h | 17
13 arch/arm/mach-pxa/htcuniversal/htcuniversal_buttons.c | 87 +
14 arch/arm/mach-pxa/htcuniversal/htcuniversal_core.c | 226 ++
15 arch/arm/mach-pxa/htcuniversal/htcuniversal_lcd.c | 212 ++
16 arch/arm/mach-pxa/htcuniversal/htcuniversal_phone.c | 167 ++
17 arch/arm/mach-pxa/htcuniversal/htcuniversal_phone.h | 16
18 arch/arm/mach-pxa/htcuniversal/htcuniversal_pm.c | 69
19 arch/arm/mach-pxa/htcuniversal/htcuniversal_power2.c | 97 +
20 arch/arm/mach-pxa/htcuniversal/htcuniversal_ts2.c | 490 ++++++
21 arch/arm/mach-pxa/htcuniversal/htcuniversal_udc.c | 71
22 arch/arm/mach-pxa/htcuniversal/tsc2046_ts.h | 20
23 arch/arm/mach-pxa/pm.c | 36
24 drivers/input/keyboard/Makefile | 2
25 drivers/input/keyboard/asic3_keys.c | 131 +
26 drivers/input/keyboard/pxa27x_keyboard.c | 2
27 drivers/leds/Kconfig | 7
28 drivers/leds/Makefile | 1
29 drivers/leds/leds-asic3.c | 189 ++
30 drivers/mfd/Kconfig | 3
31 drivers/mfd/Makefile | 2
32 drivers/mfd/asic3_base.c | 1208 +++++++++++++++
33 drivers/mfd/soc-core.c | 106 +
34 drivers/mfd/soc-core.h | 30
35 drivers/mmc/host/Kconfig | 8
36 drivers/mmc/host/Makefile | 2
37 drivers/mmc/host/asic3_mmc.c | 900 +++++++++++
38 drivers/mmc/host/asic3_mmc.h | 25
39 drivers/video/backlight/Kconfig | 2
40 drivers/video/backlight/corgi_bl.c | 4
41 include/asm-arm/arch-pxa/clock.h | 27
42 include/asm-arm/arch-pxa/htcuniversal-asic.h | 213 ++
43 include/asm-arm/arch-pxa/htcuniversal-gpio.h | 220 ++
44 include/asm-arm/arch-pxa/htcuniversal-init.h | 14
45 include/asm-arm/arch-pxa/htcuniversal.h | 3
46 include/asm-arm/arch-pxa/irqs.h | 2
47 include/asm-arm/arch-pxa/pxa-pm_ll.h | 6
48 include/asm-arm/arch-pxa/pxa-regs.h | 2
49 include/asm-arm/arch-pxa/sharpsl.h | 6
50 include/asm-arm/hardware/asic3_keys.h | 18
51 include/asm-arm/hardware/asic3_leds.h | 34
52 include/asm-arm/hardware/ipaq-asic3.h | 602 +++++++
53 include/linux/backlight.h | 7
54 include/linux/gpiodev.h | 44
55 include/linux/input_pda.h | 47
56 include/linux/ioport.h | 1
57 include/linux/pda_power.h | 31
58 include/linux/soc/asic3_base.h | 104 +
59 include/linux/soc/tmio_mmc.h | 17
60 58 files changed, 7407 insertions(+), 14 deletions(-)
61
62Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/Kconfig
63===================================================================
64--- /dev/null 1970-01-01 00:00:00.000000000 +0000
65+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/Kconfig 2007-07-19 11:41:55.000000000 +0100
66@@ -0,0 +1,80 @@
67+menuconfig MACH_HTCUNIVERSAL
68+ bool "HTC Universal"
69+ select PXA27x
70+ select BOARD_IRQ_MAP_BIG
71+ help
72+ Say Y here if you intend to run this kernel on a
73+ HTC Universal. Currently there is only basic support
74+ for this PDA.
75+
76+config HTCUNIVERSAL_CORE
77+ tristate "HTC Universal core"
78+ depends on MACH_HTCUNIVERSAL
79+ help
80+ This selection enables HTC Universal core support.
81+
82+config HTCUNIVERSAL_UDC
83+ bool "USB Device Controller support"
84+ depends on MACH_HTCUNIVERSAL && HTC_ASIC3 && USB_PXA27X
85+ help
86+ Enables HTC Universal specific USB detection
87+
88+config HTCUNIVERSAL_POWER
89+ tristate "HTC Universal power"
90+ depends on MACH_HTCUNIVERSAL && HTC_ASIC3
91+ help
92+ This selection enables HTC Universal power monitoring
93+ hardware support (through ASIC3).
94+
95+config HTCUNIVERSAL_BACKLIGHT
96+ bool "HTC Universal Backlight"
97+ depends on MACH_HTCUNIVERSAL && HTC_ASIC3 && BACKLIGHT_CLASS_DEVICE
98+ help
99+ This driver provides support for changing power and brightness
100+ on HTC Universal LCD backlight.
101+
102+config HTCUNIVERSAL_LCD
103+ tristate "HTC Universal LCD"
104+ depends on MACH_HTCUNIVERSAL && HTC_ASIC3 && LCD_CLASS_DEVICE
105+ help
106+ This driver provides support for changing power and brightness
107+ on HTC Universal LCD display.
108+
109+config HTCUNIVERSAL_TS2
110+ tristate "HTC Universal Touchscreen (old)"
111+ depends on MACH_HTCUNIVERSAL && HTC_ASIC3
112+ help
113+ Enable support for the HTC Universal Touchscreen Panel.
114+
115+config HTCUNIVERSAL_BUTTONS
116+ tristate "HTC Universal buttons support"
117+ depends on MACH_HTCUNIVERSAL && HTC_ASIC3
118+
119+config HTCUNIVERSAL_BLUETOOTH
120+ tristate "HTC Universal Bluetooth"
121+ depends on MACH_HTCUNIVERSAL && HTCUNIVERSAL_CORE && HTC_ASIC3
122+ help
123+ Enables support for the TI BRF6150 Bluetooth Module
124+ in the HTC Universal.
125+
126+config HTCUNIVERSAL_ASIC3_LEDS
127+ tristate "HTC Universal ASIC3 LED support"
128+ select LEDS_ASIC3
129+ depends on MACH_HTCUNIVERSAL && HTCUNIVERSAL_CORE && HTC_ASIC3
130+ ---help---
131+ Support for right (colors red+green+(amber)) and left (green+blue) led
132+ Off/on hook keys LED backlight
133+ Keyboard backlight
134+ Vibra
135+ Flashlight
136+
137+config HTCUNIVERSAL_PHONE
138+ tristate "HTC Universal Phone"
139+ depends on MACH_HTCUNIVERSAL && HTCUNIVERSAL_CORE && HTC_ASIC3
140+ help
141+ Enables support for the Qualcomm MSM6520 Phone Module
142+ in the HTC Universal.
143+
144+config HTCUNIVERSAL_AK4641
145+ depends on SND && I2C
146+ tristate
147Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/Makefile
148===================================================================
149--- /dev/null 1970-01-01 00:00:00.000000000 +0000
150+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/Makefile 2007-07-19 11:41:55.000000000 +0100
151@@ -0,0 +1,19 @@
152+#
153+# Makefile for HTC Universal
154+#
155+
156+snd-htcuniversal-ak4641-objs := htcuniversal_ak4641.o
157+
158+obj-$(CONFIG_MACH_HTCUNIVERSAL) += htcuniversal.o htcuniversal_pm.o
159+obj-$(CONFIG_HTCUNIVERSAL_CORE) += htcuniversal_core.o
160+obj-$(CONFIG_HTCUNIVERSAL_POWER) += htcuniversal_power2.o
161+obj-$(CONFIG_HTCUNIVERSAL_LCD) += htcuniversal_lcd.o
162+obj-$(CONFIG_HTCUNIVERSAL_BACKLIGHT) += htcuniversal_bl.o
163+obj-$(CONFIG_HTCUNIVERSAL_TS2) += htcuniversal_ts2.o
164+obj-$(CONFIG_HTCUNIVERSAL_BUTTONS) += htcuniversal_buttons.o
165+#obj-$(CONFIG_HTCUNIVERSAL_BLUETOOTH) += htcuniversal_bt.o
166+#obj-$(CONFIG_HTCUNIVERSAL_PHONE) += htcuniversal_phone.o
167+obj-$(CONFIG_HTCUNIVERSAL_ASIC3_LEDS) += htcuniversal_asic3_leds.o
168+obj-$(CONFIG_HTCUNIVERSAL_UDC) += htcuniversal_udc.o
169+
170+obj-$(CONFIG_HTCUNIVERSAL_AK4641) += htcuniversal_ak4641.o
171Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal.c
172===================================================================
173--- /dev/null 1970-01-01 00:00:00.000000000 +0000
174+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal.c 2007-07-19 11:41:55.000000000 +0100
175@@ -0,0 +1,470 @@
176+/*
177+ * Hardware definitions for HTC Universal
178+ *
179+ * Copyright (c) 2006 Oleg Gusev
180+ *
181+ * Use consistent with the GNU GPL is permitted,
182+ * provided that this copyright notice is
183+ * preserved in its entirety in all copies and derived works.
184+ *
185+ */
186+
187+#include <linux/kernel.h>
188+#include <linux/init.h>
189+#include <linux/platform_device.h>
190+#include <linux/irq.h>
191+#include <linux/input.h>
192+#include <linux/gpio_keys.h>
193+#include <linux/soc/asic3_base.h>
194+
195+#include <asm/mach-types.h>
196+#include <asm/hardware.h>
197+#include <asm/setup.h>
198+
199+#include <asm/mach/irq.h>
200+#include <asm/mach/arch.h>
201+
202+#include <asm/arch/bitfield.h>
203+#include <asm/arch/pxa-regs.h>
204+//#include <asm/arch/serial.h>
205+#include <asm/arch/pxa27x_keyboard.h>
206+#include <asm/arch/pxafb.h>
207+#include <asm/arch/irda.h>
208+#include <asm/arch/ohci.h>
209+
210+#include <asm/arch/htcuniversal.h>
211+#include <asm/arch/htcuniversal-gpio.h>
212+#include <asm/arch/htcuniversal-init.h>
213+#include <asm/arch/htcuniversal-asic.h>
214+
215+#include <asm/hardware/ipaq-asic3.h>
216+
217+#include "../generic.h"
218+
219+#include "htcuniversal_bt.h"
220+#include "htcuniversal_phone.h"
221+#include "tsc2046_ts.h"
222+
223+/*
224+ * IRDA
225+ */
226+
227+static void htcuniversal_irda_transceiver_mode(struct device *dev, int mode)
228+{
229+ /* */
230+}
231+
232+static struct pxaficp_platform_data htcuniversal_ficp_platform_data = {
233+ .transceiver_cap = IR_SIRMODE | IR_FIRMODE,
234+ .transceiver_mode = htcuniversal_irda_transceiver_mode,
235+};
236+
237+/*
238+ * Bluetooth - Relies on other loadable modules, like ASIC3 and Core,
239+ * so make the calls indirectly through pointers. Requires that the
240+ * htcuniversal_bt module be loaded before any attempt to use
241+ * bluetooth (obviously).
242+ */
243+
244+static struct htcuniversal_bt_funcs bt_funcs;
245+
246+static void
247+htcuniversal_bt_configure( int state )
248+{
249+ if (bt_funcs.configure != NULL)
250+ bt_funcs.configure( state );
251+}
252+
253+static struct htcuniversal_phone_funcs phone_funcs;
254+
255+static void
256+htcuniversal_phone_configure( int state )
257+{
258+ if (phone_funcs.configure != NULL)
259+ phone_funcs.configure( state );
260+}
261+
262+//void htcuniversal_ll_pm_init(void);
263+
264+extern struct platform_device htcuniversal_bl;
265+static struct platform_device htcuniversal_lcd = { .name = "htcuniversal_lcd", };
266+//static struct platform_device htcuniversal_kbd = { .name = "htcuniversal_kbd", };
267+static struct platform_device htcuniversal_buttons = { .name = "htcuniversal_buttons", };
268+//static struct platform_device htcuniversal_ts = { .name = "htcuniversal_ts", };
269+//static struct platform_device htcuniversal_bt = { .name = "htcuniversal_bt", };
270+//static struct platform_device htcuniversal_phone = { .name = "htcuniversal_phone", };
271+static struct platform_device htcuniversal_power = { .name = "htcuniversal_power", };
272+static struct platform_device htcuniversal_udc = { .name = "htcuniversal_udc", };
273+
274+static struct tsc2046_mach_info htcuniversal_ts_platform_data = {
275+ .port = 1,
276+ .clock = CKEN_SSP1,
277+ .pwrbit_X = 1,
278+ .pwrbit_Y = 1,
279+ .irq = 0 /* asic3 irq */
280+};
281+
282+static struct platform_device htcuniversal_ts = {
283+ .name = "htcuniversal_ts",
284+ .dev = {
285+ .platform_data = &htcuniversal_ts_platform_data,
286+ },
287+};
288+
289+
290+/* Bluetooth */
291+
292+static struct platform_device htcuniversal_bt = {
293+ .name = "htcuniversal_bt",
294+ .id = -1,
295+ .dev = {
296+ .platform_data = &bt_funcs,
297+ },
298+};
299+
300+static struct platform_device htcuniversal_phone = {
301+ .name = "htcuniversal_phone",
302+ .id = -1,
303+ .dev = {
304+ .platform_data = &phone_funcs,
305+ },
306+};
307+
308+/* PXA2xx Keys */
309+
310+static struct gpio_keys_button htcuniversal_button_table[] = {
311+ { KEY_POWER, GPIO_NR_HTCUNIVERSAL_KEY_ON_N, 1 },
312+};
313+
314+static struct gpio_keys_platform_data htcuniversal_pxa_keys_data = {
315+ .buttons = htcuniversal_button_table,
316+ .nbuttons = ARRAY_SIZE(htcuniversal_button_table),
317+};
318+
319+static struct platform_device htcuniversal_pxa_keys = {
320+ .name = "gpio-keys",
321+ .dev = {
322+ .platform_data = &htcuniversal_pxa_keys_data,
323+ },
324+ .id = -1,
325+};
326+
327+/****************************************************************
328+ * Keyboard
329+ ****************************************************************/
330+
331+static struct pxa27x_keyboard_platform_data htcuniversal_kbd = {
332+ .nr_rows = 8,
333+ .nr_cols = 8,
334+ .keycodes = {
335+ {
336+ /* row 0 */
337+ KEY_ENTER,
338+ KEY_MINUS,
339+ KEY_ESC,
340+ KEY_1,
341+ KEY_TAB,
342+ KEY_CAPSLOCK,
343+ KEY_LEFTSHIFT,
344+ KEY_RIGHTALT, /* Fn */
345+ }, { /* row 1 */
346+ KEY_COMMA,
347+ KEY_EQUAL,
348+ KEY_F1,
349+ KEY_2,
350+ KEY_Q,
351+ KEY_A,
352+ KEY_Z,
353+ KEY_LEFTCTRL,
354+ }, { /* row 2 */
355+ KEY_UP,
356+ KEY_I,
357+ KEY_F2,
358+ KEY_3,
359+ KEY_W,
360+ KEY_S,
361+ KEY_X,
362+ KEY_F6,
363+ }, { /* row 3 */
364+ KEY_DOT,
365+ KEY_O,
366+ KEY_F3,
367+ KEY_4,
368+ KEY_E,
369+ KEY_D,
370+ KEY_C,
371+ KEY_LEFTALT,
372+ }, { /* row 4 */
373+ KEY_F9,
374+ KEY_P,
375+ KEY_F4,
376+ KEY_5,
377+ KEY_R,
378+ KEY_F,
379+ KEY_V,
380+ KEY_SPACE,
381+ }, { /* row 5 */
382+ KEY_RIGHT,
383+ KEY_BACKSPACE,
384+ KEY_F5,
385+ KEY_6,
386+ KEY_T,
387+ KEY_G,
388+ KEY_B,
389+ KEY_F7,
390+ }, { /* row 6 */
391+ KEY_F9,
392+ KEY_K,
393+ KEY_9,
394+ KEY_7,
395+ KEY_Y,
396+ KEY_H,
397+ KEY_N,
398+ KEY_LEFT,
399+ }, { /* row 7 */
400+ KEY_F10,
401+ KEY_L,
402+ KEY_0,
403+ KEY_8,
404+ KEY_U,
405+ KEY_J,
406+ KEY_M,
407+ KEY_DOWN,
408+ },
409+ },
410+ .gpio_modes = {
411+ GPIO_NR_HTCUNIVERSAL_KP_MKIN0_MD,
412+ GPIO_NR_HTCUNIVERSAL_KP_MKIN1_MD,
413+ GPIO_NR_HTCUNIVERSAL_KP_MKIN2_MD,
414+ GPIO_NR_HTCUNIVERSAL_KP_MKIN3_MD,
415+ GPIO_NR_HTCUNIVERSAL_KP_MKIN4_MD,
416+ GPIO_NR_HTCUNIVERSAL_KP_MKIN5_MD,
417+ GPIO_NR_HTCUNIVERSAL_KP_MKIN6_MD,
418+ GPIO_NR_HTCUNIVERSAL_KP_MKIN7_MD,
419+ GPIO_NR_HTCUNIVERSAL_KP_MKOUT0_MD,
420+ GPIO_NR_HTCUNIVERSAL_KP_MKOUT1_MD,
421+ GPIO_NR_HTCUNIVERSAL_KP_MKOUT2_MD,
422+ GPIO_NR_HTCUNIVERSAL_KP_MKOUT3_MD,
423+ GPIO_NR_HTCUNIVERSAL_KP_MKOUT4_MD,
424+ GPIO_NR_HTCUNIVERSAL_KP_MKOUT5_MD,
425+ GPIO_NR_HTCUNIVERSAL_KP_MKOUT6_MD,
426+ GPIO_NR_HTCUNIVERSAL_KP_MKOUT7_MD,
427+ },
428+};
429+
430+static struct platform_device htcuniversal_pxa_keyboard = {
431+ .name = "pxa27x-keyboard",
432+ .id = -1,
433+ .dev = {
434+ .platform_data = &htcuniversal_kbd,
435+ },
436+};
437+/* Core Hardware Functions */
438+
439+struct platform_device htcuniversal_core = {
440+ .name = "htcuniversal_core",
441+ .id = 0,
442+ .dev = {
443+ .platform_data = NULL,
444+ },
445+};
446+
447+static struct platform_device *devices[] __initdata = {
448+ &htcuniversal_core,
449+// &htcuniversal_flash,
450+ &htcuniversal_pxa_keyboard,
451+ &htcuniversal_pxa_keys,
452+};
453+
454+static struct platform_device *htcuniversal_asic3_devices[] __initdata = {
455+ &htcuniversal_lcd,
456+#ifdef CONFIG_HTCUNIVERSAL_BACKLIGHT
457+ &htcuniversal_bl,
458+#endif
459+ &htcuniversal_buttons,
460+ &htcuniversal_ts,
461+ &htcuniversal_bt,
462+ &htcuniversal_phone,
463+ &htcuniversal_power,
464+ &htcuniversal_udc,
465+};
466+
467+static struct asic3_platform_data htcuniversal_asic3_platform_data = {
468+
469+ /* Setting ASIC3 GPIO registers to the below initialization states
470+ * HTC Universal asic3 information:
471+ * http://wiki.xda-developers.com/index.php?pagename=UniversalASIC3
472+ * http://wiki.xda-developers.com/index.php?pagename=ASIC3
473+ *
474+ * dir: Direction of the GPIO pin. 0: input, 1: output.
475+ * If unknown, set as output to avoid power consuming floating input nodes
476+ * init: Initial state of the GPIO bits
477+ *
478+ * These registers are configured as they are on Wince.
479+ */
480+ .gpio_a = {
481+ .dir = (1<<GPIOA_LCD_PWR5_ON) |
482+ (1<<GPIOA_FLASHLIGHT) |
483+ (1<<GPIOA_UNKNOWN9) |
484+ (1<<GPIOA_SPK_PWR2_ON) |
485+ (1<<GPIOA_UNKNOWN4) |
486+ (1<<GPIOA_EARPHONE_PWR_ON)|
487+ (1<<GPIOA_AUDIO_PWR_ON) |
488+ (1<<GPIOA_SPK_PWR1_ON) |
489+ (1<<GPIOA_I2C_EN),
490+ .init = (1<<GPIOA_LCD_PWR5_ON) |
491+ (1<<GPIOA_I2C_EN),
492+ .sleep_out = 0x0000,
493+ .batt_fault_out = 0x0000,
494+ .alt_function = 0x0000,
495+ .sleep_conf = 0x000c,
496+ },
497+ .gpio_b = {
498+ .dir = 0xc142,
499+ .init = 0x8842, // TODO: 0x0900
500+ .sleep_out = 0x0000,
501+ .batt_fault_out = 0x0000,
502+ .alt_function = 0x0000,
503+ .sleep_conf = 0x000c,
504+ },
505+ .gpio_c = {
506+ .dir = 0xc7e7,
507+ .init = 0xc6e0, // TODO: 0x8000
508+ .sleep_out = 0x0000,
509+ .batt_fault_out = 0x0000,
510+ .alt_function = 0x0007, // GPIOC_LED_RED | GPIOC_LED_GREEN | GPIOC_LED_BLUE
511+ .sleep_conf = 0x000c,
512+ },
513+ .gpio_d = {
514+ .dir = 0xffc0,
515+ .init = 0x7840, // TODO: 0x0000
516+ .sleep_out = 0x0000,
517+ .batt_fault_out = 0x0000,
518+ .alt_function = 0x0000,
519+ .sleep_conf = 0x0008,
520+ },
521+ .bus_shift = 1,
522+ .irq_base = HTCUNIVERSAL_ASIC3_IRQ_BASE,
523+
524+ .child_platform_devs = htcuniversal_asic3_devices,
525+ .num_child_platform_devs = ARRAY_SIZE(htcuniversal_asic3_devices),
526+};
527+
528+static struct resource htcuniversal_asic3_resources[] = {
529+ [0] = {
530+ .start = HTCUNIVERSAL_ASIC3_GPIO_PHYS,
531+ .end = HTCUNIVERSAL_ASIC3_GPIO_PHYS + IPAQ_ASIC3_MAP_SIZE,
532+ .flags = IORESOURCE_MEM,
533+ },
534+ [1] = {
535+ .start = HTCUNIVERSAL_IRQ(ASIC3_EXT_INT),
536+ .end = HTCUNIVERSAL_IRQ(ASIC3_EXT_INT),
537+ .flags = IORESOURCE_IRQ,
538+ },
539+ [2] = {
540+ .start = HTCUNIVERSAL_ASIC3_MMC_PHYS,
541+ .end = HTCUNIVERSAL_ASIC3_MMC_PHYS + IPAQ_ASIC3_MAP_SIZE,
542+ .flags = IORESOURCE_MEM,
543+ },
544+ [3] = {
545+ .start = HTCUNIVERSAL_IRQ(ASIC3_SDIO_INT_N),
546+ .flags = IORESOURCE_IRQ,
547+ },
548+};
549+
550+struct platform_device htcuniversal_asic3 = {
551+ .name = "asic3",
552+ .id = 0,
553+ .num_resources = ARRAY_SIZE(htcuniversal_asic3_resources),
554+ .resource = htcuniversal_asic3_resources,
555+ .dev = { .platform_data = &htcuniversal_asic3_platform_data, },
556+};
557+EXPORT_SYMBOL(htcuniversal_asic3);
558+
559+static struct pxafb_mode_info htcuniversal_lcd_modes[] = {
560+{
561+ .pixclock = 96153,
562+ .xres = 480,
563+ .yres = 640,
564+ .bpp = 16,
565+ .hsync_len = 4,
566+ .vsync_len = 1,
567+ .left_margin = 20,
568+ .right_margin = 8,
569+ .upper_margin = 7,
570+ .lower_margin = 8,
571+
572+// .sync = FB_SYNC_HOR_LOW_ACT|FB_SYNC_VERT_LOW_ACT,
573+
574+},
575+};
576+
577+static struct pxafb_mach_info sony_acx526akm = {
578+ .modes = htcuniversal_lcd_modes,
579+ .num_modes = ARRAY_SIZE(htcuniversal_lcd_modes),
580+
581+ /* fixme: use constants defined in pxafb.h */
582+ .lccr0 = 0x00000080,
583+ .lccr3 = 0x00400000,
584+// .lccr4 = 0x80000000,
585+};
586+
587+static void __init htcuniversal_init_irq(void)
588+{
589+ pxa_init_irq();
590+}
591+
592+//FIXME
593+//static struct platform_pxa_serial_funcs htcuniversal_pxa_bt_funcs = {
594+// .configure = htcuniversal_bt_configure,
595+//};
596+//static struct platform_pxa_serial_funcs htcuniversal_pxa_phone_funcs = {
597+// .configure = htcuniversal_phone_configure,
598+//};
599+
600+/* USB OHCI */
601+
602+static int htcuniversal_ohci_init(struct device *dev)
603+{
604+ /* missing GPIO setup here */
605+
606+ /* got the value from wince */
607+ UHCHR=UHCHR_CGR;
608+
609+ return 0;
610+}
611+
612+static struct pxaohci_platform_data htcuniversal_ohci_platform_data = {
613+ .port_mode = PMM_PERPORT_MODE,
614+ .init = htcuniversal_ohci_init,
615+};
616+
617+static void __init htcuniversal_map_io(void)
618+{
619+ pxa_map_io();
620+
621+// FIXME
622+// pxa_set_btuart_info(&htcuniversal_pxa_bt_funcs);
623+// pxa_set_ffuart_info(&htcuniversal_pxa_phone_funcs);
624+}
625+
626+static void __init htcuniversal_init(void)
627+{
628+ set_pxa_fb_info(&sony_acx526akm);
629+
630+ platform_device_register(&htcuniversal_asic3);
631+ platform_add_devices(devices, ARRAY_SIZE(devices) );
632+ pxa_set_ficp_info(&htcuniversal_ficp_platform_data);
633+ pxa_set_ohci_info(&htcuniversal_ohci_platform_data);
634+}
635+
636+MACHINE_START(HTCUNIVERSAL, "HTC Universal")
637+ /* Maintainer xanadux.org */
638+ .phys_io = 0x40000000,
639+ .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
640+ .boot_params = 0xa0000100,
641+ .map_io = htcuniversal_map_io,
642+ .init_irq = htcuniversal_init_irq,
643+ .init_machine = htcuniversal_init,
644+ .timer = &pxa_timer,
645+MACHINE_END
646Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_ak4641.c
647===================================================================
648--- /dev/null 1970-01-01 00:00:00.000000000 +0000
649+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_ak4641.c 2007-07-19 11:41:55.000000000 +0100
650@@ -0,0 +1,917 @@
651+/*
652+ * Audio support for codec Asahi Kasei AK4641
653+ *
654+ * This program is free software; you can redistribute it and/or modify
655+ * it under the terms of the GNU General Public License version 2 as
656+ * published by the Free Software Foundation.
657+ *
658+ * Copyright (c) 2006 Giorgio Padrin <giorgio@mandarinlogiq.org>
659+ *
660+ * History:
661+ *
662+ * 2006-03 Written -- Giorgio Padrin
663+ * 2006-09 Test and debug on machine (HP hx4700) -- Elshin Roman <roxmail@list.ru>
664+ *
665+ * AK4641 codec device driver
666+ *
667+ * Copyright (c) 2005 SDG Systems, LLC
668+ *
669+ * Based on code:
670+ * Copyright (c) 2002 Hewlett-Packard Company
671+ * Copyright (c) 2000 Nicolas Pitre <nico@cam.org>
672+ * Copyright (c) 2000 Lernout & Hauspie Speech Products, N.V.
673+ *
674+ * This program is free software; you can redistribute it and/or
675+ * modify it under the terms of the GNU General Public License.
676+ */
677+
678+#include <sound/driver.h>
679+
680+#include <linux/module.h>
681+#include <linux/init.h>
682+#include <linux/types.h>
683+#include <linux/string.h>
684+#include <linux/slab.h>
685+#include <linux/errno.h>
686+#include <linux/ioctl.h>
687+#include <linux/delay.h>
688+#include <linux/i2c.h>
689+
690+#include <sound/core.h>
691+#include <sound/control.h>
692+#include <sound/initval.h>
693+#include <sound/info.h>
694+
695+#include "htcuniversal_ak4641.h"
696+
697+/* Registers */
698+#define R_PM1 0x00
699+#define R_PM2 0x01
700+#define R_SEL1 0x02
701+#define R_SEL2 0x03
702+#define R_MODE1 0x04
703+#define R_MODE2 0x05
704+#define R_DAC 0x06
705+#define R_MIC 0x07
706+#define REG_TIMER 0x08
707+#define REG_ALC1 0x09
708+#define REG_ALC2 0x0a
709+#define R_PGA 0x0b
710+#define R_ATTL 0x0c
711+#define R_ATTR 0x0d
712+#define REG_VOL 0x0e
713+#define R_STATUS 0x0f
714+#define REG_EQLO 0x10
715+#define REG_EQMID 0x11
716+#define REG_EQHI 0x12
717+#define REG_BTIF 0x13
718+
719+/* Register flags */
720+/* REG_PWR1 */
721+#define R_PM1_PMADC 0x01
722+#define R_PM1_PMMIC 0x02
723+#define REG_PWR1_PMAUX 0x04
724+#define REG_PWR1_PMMO 0x08
725+#define R_PM1_PMLO 0x10
726+/* unused 0x20 */
727+/* unused 0x40 */
728+#define R_PM1_PMVCM 0x80
729+
730+/* REG_PWR2 */
731+#define R_PM2_PMDAC 0x01
732+/* unused 0x02 */
733+/* unused 0x04 */
734+#define R_PM2_PMMO2 0x08
735+#define REG_PWR2_MCKAC 0x10
736+/* unused 0x20 */
737+/* unused 0x40 */
738+#define R_PM2_MCKPD 0x80
739+
740+/* REG_SEL1 */
741+#define R_SEL1_PSMO2 0x01
742+/* unused 0x02 */
743+/* unused 0x04 */
744+/* unused 0x08 */
745+#define REG_SEL1_MICM 0x10
746+#define REG_SEL1_DACM 0x20
747+#define REG_SEL1_PSMO 0x40
748+#define REG_SEL1_MOGN 0x80
749+
750+/* REG_SEL2 */
751+#define R_SEL2_PSLOR 0x01
752+#define R_SEL2_PSLOL 0x02
753+#define REG_SEL2_AUXSI 0x04
754+/* unused 0x08 */
755+#define REG_SEL2_MICL 0x10
756+#define REG_SEL2_AUXL 0x20
757+/* unused 0x40 */
758+#define R_SEL2_DACL 0x80
759+
760+/* REG_MODE1 */
761+#define REG_MODE1_DIF0 0x01
762+#define REG_MODE1_DIF1 0x02
763+/* unused 0x04 */
764+/* unused 0x08 */
765+/* unused 0x10 */
766+/* unused 0x20 */
767+/* unused 0x40 */
768+/* unused 0x80 */
769+
770+/* REG_MODE2 */
771+/* unused 0x01 */
772+#define REG_MODE2_LOOP 0x02
773+#define REG_MODE2_HPM 0x04
774+/* unused 0x08 */
775+/* unused 0x10 */
776+#define REG_MODE2_MCK0 0x20
777+#define REG_MODE2_MCK1 0x40
778+/* unused 0x80 */
779+
780+/* REG_DAC */
781+#define REG_DAC_DEM0 0x01
782+#define REG_DAC_DEM1 0x02
783+#define REG_DAC_EQ 0x04
784+/* unused 0x08 */
785+#define R_DAC_DATTC 0x10
786+#define R_DAC_SMUTE 0x20
787+#define REG_DAC_TM 0x40
788+/* unused 0x80 */
789+
790+/* REG_MIC */
791+#define R_MIC_MGAIN 0x01
792+#define R_MIC_MSEL 0x02
793+#define R_MIC_MICAD 0x04
794+#define R_MIC_MPWRI 0x08
795+#define R_MIC_MPWRE 0x10
796+#define REG_MIC_AUXAD 0x20
797+/* unused 0x40 */
798+/* unused 0x80 */
799+
800+/* REG_TIMER */
801+
802+#define REG_TIMER_LTM0 0x01
803+#define REG_TIMER_LTM1 0x02
804+#define REG_TIMER_WTM0 0x04
805+#define REG_TIMER_WTM1 0x08
806+#define REG_TIMER_ZTM0 0x10
807+#define REG_TIMER_ZTM1 0x20
808+/* unused 0x40 */
809+/* unused 0x80 */
810+
811+#define REG_ALC1_LMTH 0x01
812+#define REG_ALC1_RATT 0x02
813+#define REG_ALC1_LMAT0 0x04
814+#define REG_ALC1_LMAT1 0x08
815+#define REG_ALC1_ZELM 0x10
816+#define REG_ALC1_ALC1 0x20
817+/* unused 0x40 */
818+/* unused 0x80 */
819+
820+/* REG_ALC2 */
821+
822+/* REG_PGA */
823+
824+/* REG_ATTL */
825+
826+/* REG_ATTR */
827+
828+/* REG_VOL */
829+#define REG_VOL_ATTM 0x80
830+
831+/* REG_STATUS */
832+#define R_STATUS_DTMIC 0x01
833+
834+/* REG_EQ controls use 4 bits for each of 5 EQ levels */
835+
836+/* Bluetooth not yet implemented */
837+#define REG_BTIF_PMAD2 0x01
838+#define REG_BTIF_PMDA2 0x02
839+#define REG_BTIF_PMBIF 0x04
840+#define REG_BTIF_ADC2 0x08
841+#define REG_BTIF_DAC2 0x10
842+#define REG_BTIF_BTFMT0 0x20
843+#define REG_BTIF_BTFMT1 0x40
844+/* unused 0x80 */
845+
846+/* begin {{ I2C }} */
847+
848+static struct i2c_driver snd_ak4641_i2c_driver = {
849+ .driver = {
850+ .name = "ak4641-i2c"
851+ },
852+};
853+
854+static int snd_ak4641_i2c_init(void)
855+{
856+ return i2c_add_driver(&snd_ak4641_i2c_driver);
857+}
858+
859+static void snd_ak4641_i2c_free(void)
860+{
861+ i2c_del_driver(&snd_ak4641_i2c_driver);
862+}
863+
864+static inline int snd_ak4641_i2c_probe(struct snd_ak4641 *ak)
865+{
866+ if (ak->i2c_client.adapter == NULL) return -EINVAL;
867+ ak->i2c_client.addr = 0x12;
868+ if (i2c_smbus_xfer(ak->i2c_client.adapter, ak->i2c_client.addr,
869+ 0, 0, 0, I2C_SMBUS_QUICK, NULL) < 0)
870+ return -ENODEV;
871+ else return 0;
872+}
873+
874+static int snd_ak4641_i2c_attach(struct snd_ak4641 *ak)
875+{
876+ int ret = 0;
877+ if ((ret = snd_ak4641_i2c_probe(ak)) < 0) return ret;
878+ snprintf(ak->i2c_client.name, sizeof(ak->i2c_client.name),
879+ "ak4641-i2c at %d-%04x",
880+ i2c_adapter_id(ak->i2c_client.adapter), ak->i2c_client.addr);
881+ return i2c_attach_client(&ak->i2c_client);
882+}
883+
884+static void snd_ak4641_i2c_detach(struct snd_ak4641 *ak)
885+{
886+ i2c_detach_client(&ak->i2c_client);
887+}
888+
889+/* end {{ I2C }} */
890+
891+
892+/* begin {{ Registers & Cache Ops }} */
893+
894+static int snd_ak4641_hwsync(struct snd_ak4641 *ak, int read, u8 reg)
895+{
896+ struct i2c_msg msgs[2];
897+ u8 buf[2];
898+ int ret;
899+
900+ snd_assert(reg < ARRAY_SIZE(ak->regs), return -EINVAL);
901+
902+ /* setup i2c msgs */
903+ msgs[0].addr = ak->i2c_client.addr;
904+ msgs[0].flags = 0;
905+ msgs[0].buf = buf;
906+ if (!read)
907+ msgs[0].len = 2;
908+ else {
909+ msgs[1].flags = I2C_M_RD;
910+ msgs[1].addr = msgs[0].addr;
911+ msgs[1].buf = msgs[0].buf + 1;
912+ msgs[0].len = 1;
913+ msgs[1].len = 1;
914+ }
915+
916+ buf[0] = reg;
917+
918+ /* regs[reg] -> buffer, on write */
919+ if (!read) buf[1] = ak->regs[reg];
920+
921+ /* i2c transfer */
922+ ret = i2c_transfer(ak->i2c_client.adapter, msgs, read ? 2 : 1);
923+ if (ret != (read ? 2 : 1)) return ret; /* transfer error */ //@@ error ret < 0, or not ?
924+
925+ /* regs[reg] <- buffer, on read */
926+ if (read) ak->regs[reg] = buf[1];
927+
928+ return 0;
929+}
930+
931+static inline int snd_ak4641_hwsync_read(struct snd_ak4641 *ak, u8 reg)
932+{
933+ return snd_ak4641_hwsync(ak, 1, reg);
934+}
935+
936+static inline int snd_ak4641_hwsync_write(struct snd_ak4641 *ak, u8 reg)
937+{
938+ return snd_ak4641_hwsync(ak, 0, reg);
939+}
940+
941+static int snd_ak4641_hwsync_read_all(struct snd_ak4641 *ak)
942+{
943+ u8 reg;
944+ for (reg = 0; reg < ARRAY_SIZE(ak->regs); reg++)
945+ if (snd_ak4641_hwsync_read(ak, reg) < 0) return -1;
946+ return 0;
947+}
948+
949+static int snd_ak4641_hwsync_write_all(struct snd_ak4641 *ak)
950+{
951+ u8 reg;
952+ for (reg = 0; reg < ARRAY_SIZE(ak->regs); reg++)
953+ if (snd_ak4641_hwsync_write(ak, reg) < 0) return -1;
954+ return 0;
955+}
956+
957+static int snd_ak4641_reg_changed(struct snd_ak4641 *ak, u8 reg)
958+{
959+ if ((reg != R_PGA && ak->powered_on) ||
960+ (reg == R_PGA && (ak->regs[R_PM1] & R_PM1_PMMIC)))
961+ return snd_ak4641_hwsync_write(ak, reg);
962+ return 0;
963+}
964+
965+/* end {{ Registers & Cache Ops }}*/
966+
967+
968+static inline void snd_ak4641_lock(struct snd_ak4641 *ak)
969+{
970+ down(&ak->sem);
971+}
972+
973+static inline void snd_ak4641_unlock(struct snd_ak4641 *ak)
974+{
975+ up(&ak->sem);
976+}
977+
978+#define WRITE_MASK(i, val, mask) (((i) & ~(mask)) | ((val) & (mask)))
979+
980+
981+/* begin {{ Controls }} */
982+
983+#define INV_RANGE(val, mask) \
984+ (~(val) & (mask))
985+
986+/*-begin----------------------------------------------------------*/
987+static int snd_ak4641_actl_playback_volume_info(struct snd_kcontrol *kcontrol,
988+ struct snd_ctl_elem_info *uinfo)
989+{
990+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
991+ uinfo->count = 2;
992+ uinfo->value.integer.min = 0;
993+ uinfo->value.integer.max = 0xff;
994+ return 0;
995+}
996+
997+static int snd_ak4641_actl_playback_volume_get(struct snd_kcontrol *kcontrol,
998+ struct snd_ctl_elem_value *ucontrol)
999+{
1000+ struct snd_ak4641 *ak = (struct snd_ak4641 *) kcontrol->private_data;
1001+
1002+ snd_ak4641_lock(ak);
1003+ ucontrol->value.integer.value[0] = INV_RANGE(ak->regs[R_ATTL], 0xff);
1004+ ucontrol->value.integer.value[1] = INV_RANGE(ak->regs[R_ATTR], 0xff);
1005+ snd_ak4641_unlock(ak);
1006+ return 0;
1007+}
1008+
1009+static int snd_ak4641_actl_playback_volume_put(struct snd_kcontrol *kcontrol,
1010+ struct snd_ctl_elem_value *ucontrol)
1011+{
1012+ struct snd_ak4641 *ak = (struct snd_ak4641 *) kcontrol->private_data;
1013+
1014+ snd_ak4641_lock(ak);
1015+ ak->regs[R_ATTL] = INV_RANGE(ucontrol->value.integer.value[0], 0xff);
1016+ ak->regs[R_ATTR] = INV_RANGE(ucontrol->value.integer.value[1], 0xff);
1017+ snd_ak4641_reg_changed(ak, R_ATTL);
1018+ snd_ak4641_reg_changed(ak, R_ATTR);
1019+ snd_ak4641_unlock(ak);
1020+ return 0;
1021+}
1022+/*-end------------------------------------------------------------*/
1023+
1024+/*-begin----------------------------------------------------------*/
1025+static int snd_ak4641_actl_mic_gain_info(struct snd_kcontrol *kcontrol,
1026+ struct snd_ctl_elem_info *uinfo)
1027+{
1028+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1029+ uinfo->count = 1;
1030+ uinfo->value.integer.min = 0;
1031+ uinfo->value.integer.max = 0x7f;
1032+ return 0;
1033+}
1034+
1035+static int snd_ak4641_actl_mic_gain_get(struct snd_kcontrol *kcontrol,
1036+ struct snd_ctl_elem_value *ucontrol)
1037+{
1038+ struct snd_ak4641 *ak = (struct snd_ak4641 *) kcontrol->private_data;
1039+
1040+ ucontrol->value.integer.value[0] = ak->regs[R_PGA];
1041+ return 0;
1042+}
1043+
1044+static int snd_ak4641_actl_mic_gain_put(struct snd_kcontrol *kcontrol,
1045+ struct snd_ctl_elem_value *ucontrol)
1046+{
1047+ struct snd_ak4641 *ak = (struct snd_ak4641 *) kcontrol->private_data;
1048+
1049+ snd_ak4641_lock(ak);
1050+ ak->regs[R_PGA] = ucontrol->value.integer.value[0];
1051+ snd_ak4641_reg_changed(ak, R_PGA);
1052+ snd_ak4641_unlock(ak);
1053+ return 0;
1054+}
1055+/*-end------------------------------------------------------------*/
1056+
1057+#define ACTL(ctl_name, _name) \
1058+static struct snd_kcontrol_new snd_ak4641_actl_ ## ctl_name = \
1059+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = _name, \
1060+ .info = snd_ak4641_actl_ ## ctl_name ## _info, \
1061+ .get = snd_ak4641_actl_ ## ctl_name ## _get, .put = snd_ak4641_actl_ ## ctl_name ## _put };
1062+
1063+ACTL(playback_volume, "Master Playback Volume")
1064+ACTL(mic_gain, "Mic Capture Gain")
1065+
1066+struct snd_ak4641_uctl_bool {
1067+ int (*get) (struct snd_ak4641 *uda);
1068+ int (*set) (struct snd_ak4641 *uda, int on);
1069+};
1070+
1071+static int snd_ak4641_actl_bool_info(struct snd_kcontrol *kcontrol,
1072+ struct snd_ctl_elem_info *uinfo)
1073+{
1074+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1075+ uinfo->count = 1;
1076+ return 0;
1077+}
1078+
1079+static int snd_ak4641_actl_bool_get(struct snd_kcontrol *kcontrol,
1080+ struct snd_ctl_elem_value *ucontrol)
1081+{
1082+ struct snd_ak4641 *ak = (struct snd_ak4641 *) kcontrol->private_data;
1083+ struct snd_ak4641_uctl_bool *uctl =
1084+ (struct snd_ak4641_uctl_bool *) kcontrol->private_value;
1085+
1086+ ucontrol->value.integer.value[0] = uctl->get(ak);
1087+ return 0;
1088+}
1089+
1090+static int snd_ak4641_actl_bool_put(struct snd_kcontrol *kcontrol,
1091+ struct snd_ctl_elem_value *ucontrol)
1092+{
1093+ struct snd_ak4641 *ak = (struct snd_ak4641 *) kcontrol->private_data;
1094+ struct snd_ak4641_uctl_bool *uctl =
1095+ (struct snd_ak4641_uctl_bool *) kcontrol->private_value;
1096+
1097+ return uctl->set(ak, ucontrol->value.integer.value[0]);
1098+}
1099+
1100+/*-begin----------------------------------------------------------*/
1101+static int snd_ak4641_uctl_playback_switch_get(struct snd_ak4641 *ak)
1102+{
1103+ return (ak->regs[R_DAC] & R_DAC_SMUTE) == 0x00;
1104+}
1105+
1106+static int snd_ak4641_uctl_playback_switch_set(struct snd_ak4641 *ak, int on)
1107+{
1108+ snd_ak4641_lock(ak);
1109+ ak->regs[R_DAC] = WRITE_MASK(ak->regs[R_DAC],
1110+ on ? 0x00 : R_DAC_SMUTE, R_DAC_SMUTE);
1111+ snd_ak4641_reg_changed(ak, R_DAC);
1112+ snd_ak4641_unlock(ak);
1113+ return 0;
1114+}
1115+/*-end------------------------------------------------------------*/
1116+
1117+/*-begin----------------------------------------------------------*/
1118+static int snd_ak4641_uctl_mic_boost_get(struct snd_ak4641 *ak)
1119+{
1120+ return (ak->regs[R_MIC] & R_MIC_MGAIN) == R_MIC_MGAIN;
1121+}
1122+
1123+static int snd_ak4641_uctl_mic_boost_set(struct snd_ak4641 *ak, int on)
1124+{
1125+ snd_ak4641_lock(ak);
1126+ ak->regs[R_MIC] = WRITE_MASK(ak->regs[R_MIC],
1127+ on ? R_MIC_MGAIN : 0x00, R_MIC_MGAIN);
1128+ snd_ak4641_reg_changed(ak, R_MIC);
1129+ snd_ak4641_unlock(ak);
1130+ return 0;
1131+}
1132+/*-end------------------------------------------------------------*/
1133+
1134+/*-begin----------------------------------------------------------*/
1135+static int snd_ak4641_uctl_mono_out_get(struct snd_ak4641 *ak)
1136+{
1137+ printk("mono_out status 0x%8.8x -> 0x%8.8x\n",ak->regs[R_SEL1], ak->regs[R_SEL1] & REG_SEL1_PSMO);
1138+ return (ak->regs[R_SEL1] & REG_SEL1_PSMO) == REG_SEL1_PSMO;
1139+}
1140+
1141+static int snd_ak4641_uctl_mono_out_set(struct snd_ak4641 *ak, int on)
1142+{
1143+ printk("phone mic enable called. on=%d\n",on);
1144+ snd_ak4641_lock(ak);
1145+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], on ? R_PM1_PMMIC : 0x00, R_PM1_PMMIC);
1146+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], on ? REG_PWR1_PMMO : 0x00, REG_PWR1_PMMO);
1147+ snd_ak4641_reg_changed(ak, R_PM1);
1148+
1149+ snd_ak4641_hwsync_write(ak, R_PGA); /* mic PGA gain is reset when PMMIC = 0 */
1150+
1151+ /* internal mic */
1152+ ak->regs[R_MIC] = WRITE_MASK(ak->regs[R_MIC], on ? R_MIC_MPWRI : 0x0, R_MIC_MPWRI);
1153+ ak->regs[R_MIC] = WRITE_MASK(ak->regs[R_MIC], 0x0, R_MIC_MSEL);
1154+ snd_ak4641_hwsync_write(ak, R_MIC);
1155+
1156+// ak->regs[REG_BTIF] = WRITE_MASK(ak->regs[REG_BTIF], 0x0, REG_BTIF_DAC2);
1157+// snd_ak4641_hwsync_write(ak, REG_BTIF);
1158+ /* */
1159+// ak->regs[REG_VOL] = WRITE_MASK(ak->regs[REG_VOL], on ? REG_VOL_ATTM : 0x00, REG_VOL_ATTM);
1160+// ak->regs[R_SEL1] = WRITE_MASK(ak->regs[R_SEL1], on ? REG_SEL1_MOGN : 0x00, REG_SEL1_MOGN);
1161+ ak->regs[R_SEL1] = WRITE_MASK(ak->regs[R_SEL1], on ? REG_SEL1_MICM : 0x00, REG_SEL1_MICM);
1162+ ak->regs[R_SEL1] = WRITE_MASK(ak->regs[R_SEL1], on ? REG_SEL1_PSMO : 0x00, REG_SEL1_PSMO);
1163+ snd_ak4641_reg_changed(ak, R_SEL1);
1164+ snd_ak4641_unlock(ak);
1165+ return 0;
1166+}
1167+/*-end------------------------------------------------------------*/
1168+
1169+#define ACTL_BOOL(ctl_name, _name) \
1170+static struct snd_ak4641_uctl_bool snd_ak4641_actl_ ## ctl_name ## _pvalue = \
1171+{ .get = snd_ak4641_uctl_ ## ctl_name ## _get, \
1172+ .set = snd_ak4641_uctl_ ## ctl_name ## _set }; \
1173+static struct snd_kcontrol_new snd_ak4641_actl_ ## ctl_name = \
1174+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = _name, .info = snd_ak4641_actl_bool_info, \
1175+ .get = snd_ak4641_actl_bool_get, .put = snd_ak4641_actl_bool_put, \
1176+ .private_value = (unsigned long) &snd_ak4641_actl_ ## ctl_name ## _pvalue };
1177+
1178+ACTL_BOOL(playback_switch, "Master Playback Switch")
1179+ACTL_BOOL(mic_boost, "Mic Boost (+20dB)")
1180+ACTL_BOOL(mono_out, "Phone mic enable")
1181+
1182+static void snd_ak4641_headphone_on(struct snd_ak4641 *ak, int on);
1183+static void snd_ak4641_speaker_on(struct snd_ak4641 *ak, int on);
1184+static void snd_ak4641_select_mic(struct snd_ak4641 *ak);
1185+
1186+void snd_ak4641_hp_connected(struct snd_ak4641 *ak, int connected)
1187+{
1188+ snd_ak4641_lock(ak);
1189+ if (connected != ak->hp_connected) {
1190+ ak->hp_connected = connected;
1191+
1192+ /* headphone or speaker, on playback */
1193+ if (ak->playback_on) {
1194+ if (connected) {
1195+ snd_ak4641_headphone_on(ak, 1);
1196+ snd_ak4641_speaker_on(ak, 0);
1197+ } else {
1198+ snd_ak4641_speaker_on(ak, 1);
1199+ snd_ak4641_headphone_on(ak, 0);
1200+ }
1201+ }
1202+
1203+ /* headset or internal mic, on capture */
1204+ if (ak->capture_on)
1205+ snd_ak4641_select_mic(ak);
1206+ }
1207+ snd_ak4641_unlock(ak);
1208+}
1209+
1210+/* end {{ Controls }} */
1211+
1212+
1213+/* begin {{ Headphone Detected Notification }} */
1214+
1215+static void snd_ak4641_hp_detected_w_fn(void *p)
1216+{
1217+ struct snd_ak4641 *ak = (struct snd_ak4641 *)p;
1218+
1219+ snd_ak4641_hp_connected(ak, ak->hp_detected.detected);
1220+}
1221+
1222+void snd_ak4641_hp_detected(struct snd_ak4641 *ak, int detected)
1223+{
1224+ if (detected != ak->hp_detected.detected) {
1225+ ak->hp_detected.detected = detected;
1226+ queue_work(ak->hp_detected.wq, &ak->hp_detected.w);
1227+ }
1228+}
1229+
1230+static int snd_ak4641_hp_detected_init(struct snd_ak4641 *ak)
1231+{
1232+ INIT_WORK(&ak->hp_detected.w, snd_ak4641_hp_detected_w_fn);
1233+ ak->hp_detected.detected = ak->hp_connected;
1234+ ak->hp_detected.wq = create_singlethread_workqueue("ak4641");
1235+ if (ak->hp_detected.wq) return 0;
1236+ else return -1;
1237+}
1238+
1239+static void snd_ak4641_hp_detected_free(struct snd_ak4641 *ak)
1240+{
1241+ destroy_workqueue(ak->hp_detected.wq);
1242+}
1243+
1244+/* end {{ Headphone Detected Notification }} */
1245+
1246+
1247+/* begin {{ Codec Control }} */
1248+
1249+static void snd_ak4641_headphone_on(struct snd_ak4641 *ak, int on)
1250+{
1251+ if (on) {
1252+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], R_PM1_PMLO, R_PM1_PMLO);
1253+ snd_ak4641_hwsync_write(ak, R_PM1);
1254+ ak->headphone_out_on(1);
1255+ ak->regs[R_SEL2] = WRITE_MASK(ak->regs[R_SEL2],
1256+ R_SEL2_PSLOL | R_SEL2_PSLOR,
1257+ R_SEL2_PSLOL | R_SEL2_PSLOR);
1258+ snd_ak4641_hwsync_write(ak, R_SEL2);
1259+ } else {
1260+ ak->regs[R_SEL2] = WRITE_MASK(ak->regs[R_SEL2],
1261+ 0x00, R_SEL2_PSLOL | R_SEL2_PSLOR);
1262+ snd_ak4641_hwsync_write(ak, R_SEL2);
1263+ ak->headphone_out_on(0);
1264+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], 0x00, R_PM1_PMLO);
1265+ snd_ak4641_hwsync_write(ak, R_PM1);
1266+ }
1267+}
1268+
1269+static void snd_ak4641_speaker_on(struct snd_ak4641 *ak, int on)
1270+{
1271+ if (on) {
1272+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], R_PM1_PMLO, R_PM1_PMLO);
1273+ snd_ak4641_hwsync_write(ak, R_PM1);
1274+ ak->speaker_out_on(1);
1275+ ak->regs[R_SEL2] = WRITE_MASK(ak->regs[R_SEL2],
1276+ R_SEL2_PSLOL | R_SEL2_PSLOR,
1277+ R_SEL2_PSLOL | R_SEL2_PSLOR);
1278+ snd_ak4641_hwsync_write(ak, R_SEL2);
1279+ } else {
1280+ ak->regs[R_SEL2] = WRITE_MASK(ak->regs[R_SEL2],
1281+ 0x00, R_SEL2_PSLOL | R_SEL2_PSLOR);
1282+ snd_ak4641_hwsync_write(ak, R_SEL2);
1283+ ak->speaker_out_on(0);
1284+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], 0x00, R_PM1_PMLO);
1285+ snd_ak4641_hwsync_write(ak, R_PM1);
1286+ }
1287+}
1288+
1289+static inline int snd_ak4641_power_on(struct snd_ak4641 *ak)
1290+{
1291+ ak->reset_pin(1);
1292+ ak->power_on_chip(1);
1293+ msleep(1);
1294+ ak->reset_pin(0);
1295+ ak->powered_on = 1;
1296+ return 0;
1297+}
1298+
1299+static inline int snd_ak4641_power_off(struct snd_ak4641 *ak)
1300+{
1301+ ak->powered_on = 0;
1302+ ak->power_on_chip(0);
1303+ return 0;
1304+}
1305+
1306+static inline void snd_ak4641_headphone_out_on(struct snd_ak4641 *ak, int on)
1307+{
1308+ if (ak->headphone_out_on) ak->headphone_out_on(on);
1309+}
1310+
1311+static inline void snd_ak4641_speaker_out_on(struct snd_ak4641 *ak, int on)
1312+{
1313+ if (ak->speaker_out_on) ak->speaker_out_on(on);
1314+}
1315+
1316+static int snd_ak4641_playback_on(struct snd_ak4641 *ak)
1317+{
1318+ if (ak->playback_on) return 0;
1319+
1320+ ak->regs[R_PM2] = WRITE_MASK(ak->regs[R_PM2],
1321+ R_PM2_PMDAC, R_PM2_MCKPD | R_PM2_PMDAC);
1322+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], R_PM1_PMLO, R_PM1_PMLO);
1323+ snd_ak4641_hwsync_write(ak, R_PM2);
1324+ snd_ak4641_hwsync_write(ak, R_PM1);
1325+ if (ak->hp_connected) snd_ak4641_headphone_on(ak, 1);
1326+ else snd_ak4641_speaker_on(ak, 1);
1327+
1328+ ak->playback_on = 1;
1329+
1330+ return 0;
1331+}
1332+
1333+static int snd_ak4641_playback_off(struct snd_ak4641 *ak)
1334+{
1335+ if (!ak->playback_on) return 0;
1336+
1337+ ak->playback_on = 0;
1338+
1339+ if (ak->hp_connected) snd_ak4641_headphone_on(ak, 0);
1340+ else snd_ak4641_speaker_on(ak, 0);
1341+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], 0x00, R_PM1_PMLO);
1342+ ak->regs[R_PM2] = WRITE_MASK(ak->regs[R_PM2],
1343+ (!ak->capture_on ? R_PM2_MCKPD : 0x00) | R_PM2_PMDAC,
1344+ R_PM2_MCKPD | R_PM2_PMDAC);
1345+ snd_ak4641_hwsync_write(ak, R_PM1);
1346+ snd_ak4641_hwsync_write(ak, R_PM2);
1347+
1348+ return 0;
1349+}
1350+
1351+static void snd_ak4641_select_mic(struct snd_ak4641 *ak)
1352+{
1353+ int mic = 0;
1354+ u8 r_mic;
1355+
1356+ if (ak->hp_connected) {
1357+ /* check headset mic */
1358+ ak->regs[R_MIC] = WRITE_MASK(ak->regs[R_MIC], R_MIC_MPWRE, R_MIC_MPWRE);
1359+ snd_ak4641_hwsync_write(ak, R_MIC);
1360+ snd_ak4641_hwsync_read(ak, R_STATUS);
1361+ mic = (ak->regs[R_STATUS] & R_STATUS_DTMIC) == R_STATUS_DTMIC;
1362+
1363+ printk("htcuniversal_ak4641_select_mic: mic=%d\n",mic);
1364+
1365+ r_mic = WRITE_MASK(ak->regs[R_MIC],
1366+ R_MIC_MSEL | (ak->capture_on ? R_MIC_MPWRE : 0x00),
1367+ R_MIC_MSEL | R_MIC_MPWRI | R_MIC_MPWRE);
1368+ }
1369+ else
1370+ r_mic = WRITE_MASK(ak->regs[R_MIC],
1371+ 0x00 | (ak->capture_on ? R_MIC_MPWRI : 0x00),
1372+ R_MIC_MSEL | R_MIC_MPWRI | R_MIC_MPWRE);
1373+
1374+ if (r_mic != ak->regs[R_MIC]) {
1375+ ak->regs[R_MIC] = r_mic;
1376+ snd_ak4641_hwsync_write(ak, R_MIC);
1377+ }
1378+}
1379+
1380+static int snd_ak4641_capture_on(struct snd_ak4641 *ak)
1381+{
1382+ if (ak->capture_on) return 0;
1383+
1384+ if (!ak->playback_on) {
1385+ ak->regs[R_PM2] = WRITE_MASK(ak->regs[R_PM2], 0x00, R_PM2_MCKPD);
1386+ snd_ak4641_hwsync_write(ak, R_PM2);
1387+ }
1388+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], R_PM1_PMMIC | R_PM1_PMADC,
1389+ R_PM1_PMMIC | R_PM1_PMADC);
1390+ snd_ak4641_hwsync_write(ak, R_PM1);
1391+ snd_ak4641_hwsync_write(ak, R_PGA); /* mic PGA gain is reset when PMMIC = 0 */
1392+
1393+ ak->capture_on = 1;
1394+
1395+ snd_ak4641_select_mic(ak);
1396+
1397+ msleep(47); /* accounts for ADC init cycle, time enough for fs >= 44.1 kHz */
1398+
1399+ return 0;
1400+}
1401+
1402+static int snd_ak4641_capture_off(struct snd_ak4641 *ak)
1403+{
1404+ if (!ak->capture_on) return 0;
1405+
1406+ ak->regs[R_MIC] = WRITE_MASK(ak->regs[R_MIC],
1407+ 0x00, R_MIC_MPWRI | R_MIC_MPWRE | R_MIC_MSEL);
1408+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], 0x00, R_PM1_PMMIC | R_PM1_PMADC);
1409+ snd_ak4641_hwsync_write(ak, R_MIC);
1410+ snd_ak4641_hwsync_write(ak, R_PM1);
1411+ if (!ak->playback_on) {
1412+ ak->regs[R_PM2] = WRITE_MASK(ak->regs[R_PM2], R_PM2_MCKPD, R_PM2_MCKPD);
1413+ snd_ak4641_hwsync_write(ak, R_PM2);
1414+ }
1415+
1416+ ak->capture_on = 0;
1417+
1418+ return 0;
1419+}
1420+
1421+int snd_ak4641_open_stream(struct snd_ak4641 *ak, int stream)
1422+{
1423+ snd_ak4641_lock(ak);
1424+ if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1425+ ak->playback_stream_opened = 1;
1426+ snd_ak4641_playback_on(ak);
1427+ } else {
1428+ ak->capture_stream_opened = 1;
1429+ snd_ak4641_capture_on(ak);
1430+ }
1431+ snd_ak4641_unlock(ak);
1432+ return 0;
1433+}
1434+
1435+int snd_ak4641_close_stream(struct snd_ak4641 *ak, int stream)
1436+{
1437+ snd_ak4641_lock(ak);
1438+ if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1439+ ak->playback_stream_opened = 0;
1440+ snd_ak4641_playback_off(ak);
1441+ } else {
1442+ ak->capture_stream_opened = 0;
1443+ snd_ak4641_capture_off(ak);
1444+ }
1445+ snd_ak4641_unlock(ak);
1446+ return 0;
1447+}
1448+
1449+static int snd_ak4641_init_regs(struct snd_ak4641 *ak)
1450+{
1451+ snd_ak4641_hwsync_read_all(ak);
1452+
1453+ //@@ MEMO: add some configs
1454+
1455+ ak->regs[R_PM1] = WRITE_MASK(ak->regs[R_PM1], R_PM1_PMVCM, R_PM1_PMVCM);
1456+ ak->regs[R_DAC] = WRITE_MASK(ak->regs[R_DAC], 0x00, R_DAC_DATTC);
1457+ snd_ak4641_hwsync_write(ak, R_PM1);
1458+ snd_ak4641_hwsync_write(ak, R_DAC);
1459+
1460+ return 0;
1461+}
1462+
1463+int snd_ak4641_suspend(struct snd_ak4641 *ak, pm_message_t state)
1464+{
1465+ snd_ak4641_lock(ak);
1466+ if (ak->playback_on) snd_ak4641_playback_off(ak);
1467+ if (ak->capture_on) snd_ak4641_capture_off(ak);
1468+ snd_ak4641_power_off(ak);
1469+ snd_ak4641_unlock(ak);
1470+ return 0;
1471+}
1472+
1473+int snd_ak4641_resume(struct snd_ak4641 *ak)
1474+{
1475+ snd_ak4641_lock(ak);
1476+ snd_ak4641_power_on(ak);
1477+ snd_ak4641_hwsync_write_all(ak);
1478+ if (ak->playback_stream_opened) snd_ak4641_playback_on(ak);
1479+ if (ak->capture_stream_opened) snd_ak4641_capture_on(ak);
1480+ snd_ak4641_unlock(ak);
1481+ return 0;
1482+}
1483+
1484+static void snd_ak4641_init_ak(struct snd_ak4641 *ak)
1485+{
1486+ init_MUTEX(&ak->sem);
1487+ ak->i2c_client.driver = &snd_ak4641_i2c_driver;
1488+}
1489+
1490+int snd_ak4641_activate(struct snd_ak4641 *ak)
1491+{
1492+ int ret = 0;
1493+
1494+ snd_ak4641_init_ak(ak);
1495+ snd_ak4641_lock(ak);
1496+ snd_ak4641_power_on(ak);
1497+ if ((ret = snd_ak4641_i2c_attach(ak)) < 0)
1498+ goto failed_i2c_attach;
1499+ snd_ak4641_init_regs(ak);
1500+ if ((ret = snd_ak4641_hp_detected_init(ak)) < 0)
1501+ goto failed_hp_detected_init;
1502+ snd_ak4641_unlock(ak);
1503+ return 0;
1504+
1505+ failed_hp_detected_init:
1506+ snd_ak4641_i2c_detach(ak);
1507+ failed_i2c_attach:
1508+ snd_ak4641_power_off(ak);
1509+ snd_ak4641_unlock(ak);
1510+ return ret;
1511+}
1512+
1513+void snd_ak4641_deactivate(struct snd_ak4641 *ak)
1514+{
1515+ snd_ak4641_lock(ak);
1516+ snd_ak4641_hp_detected_free(ak);
1517+ snd_ak4641_i2c_detach(ak);
1518+ snd_ak4641_power_off(ak);
1519+ snd_ak4641_unlock(ak);
1520+}
1521+
1522+int snd_ak4641_add_mixer_controls(struct snd_ak4641 *ak, struct snd_card *card)
1523+{
1524+ snd_ak4641_lock(ak);
1525+ snd_ctl_add(card, snd_ctl_new1(&snd_ak4641_actl_playback_volume, ak));
1526+ snd_ctl_add(card, snd_ctl_new1(&snd_ak4641_actl_playback_switch, ak));
1527+ snd_ctl_add(card, snd_ctl_new1(&snd_ak4641_actl_mic_gain, ak));
1528+ snd_ctl_add(card, snd_ctl_new1(&snd_ak4641_actl_mic_boost, ak));
1529+ snd_ctl_add(card, snd_ctl_new1(&snd_ak4641_actl_mono_out, ak));
1530+ snd_ak4641_unlock(ak);
1531+ return 0;
1532+}
1533+
1534+/* end {{ Codec Control }} */
1535+
1536+
1537+/* begin {{ Module }} */
1538+
1539+static int __init snd_ak4641_module_on_load(void)
1540+{
1541+ snd_ak4641_i2c_init();
1542+ return 0;
1543+}
1544+
1545+static void __exit snd_ak4641_module_on_unload(void)
1546+{
1547+ snd_ak4641_i2c_free();
1548+}
1549+
1550+module_init(snd_ak4641_module_on_load);
1551+module_exit(snd_ak4641_module_on_unload);
1552+
1553+EXPORT_SYMBOL(snd_ak4641_activate);
1554+EXPORT_SYMBOL(snd_ak4641_deactivate);
1555+EXPORT_SYMBOL(snd_ak4641_add_mixer_controls);
1556+EXPORT_SYMBOL(snd_ak4641_open_stream);
1557+EXPORT_SYMBOL(snd_ak4641_close_stream);
1558+EXPORT_SYMBOL(snd_ak4641_suspend);
1559+EXPORT_SYMBOL(snd_ak4641_resume);
1560+EXPORT_SYMBOL(snd_ak4641_hp_connected);
1561+EXPORT_SYMBOL(snd_ak4641_hp_detected);
1562+
1563+MODULE_AUTHOR("Giorgio Padrin");
1564+MODULE_DESCRIPTION("Audio support for codec Asahi Kasei AK4641");
1565+MODULE_LICENSE("GPL");
1566+
1567+/* end {{ Module }} */
1568Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_ak4641.h
1569===================================================================
1570--- /dev/null 1970-01-01 00:00:00.000000000 +0000
1571+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_ak4641.h 2007-07-19 11:41:55.000000000 +0100
1572@@ -0,0 +1,65 @@
1573+/*
1574+ * Audio support for codec Asahi Kasei AK4641
1575+ *
1576+ * This program is free software; you can redistribute it and/or modify
1577+ * it under the terms of the GNU General Public License version 2 as
1578+ * published by the Free Software Foundation.
1579+ *
1580+ * Copyright (c) 2006 Giorgio Padrin <giorgio@mandarinlogiq.org>
1581+ */
1582+
1583+#ifndef __SOUND_AK4641_H
1584+#define __SOUND_AK4641_H
1585+
1586+#include <linux/i2c.h>
1587+
1588+struct snd_ak4641 {
1589+ struct semaphore sem;
1590+
1591+ u8 regs[0x14]; /* registers cache */
1592+
1593+ unsigned int
1594+ powered_on:1,
1595+ playback_on:1,
1596+ playback_stream_opened:1,
1597+ capture_on:1,
1598+ capture_stream_opened:1;
1599+
1600+ unsigned int
1601+ hp_connected:1;
1602+
1603+ /* -- configuration (to fill before activation) -- */
1604+ void (*power_on_chip)(int on);
1605+ void (*reset_pin)(int on);
1606+ void (*headphone_out_on)(int on);
1607+ void (*speaker_out_on)(int on);
1608+
1609+ struct i2c_client i2c_client; /* to fill .adapter */
1610+ /* ----------------------------------------------- */
1611+
1612+ struct {
1613+ int detected;
1614+ struct workqueue_struct *wq;
1615+ struct work_struct w;
1616+ } hp_detected;
1617+};
1618+
1619+
1620+/* Note: opening, closing, suspending and resuming a stream
1621+ * require the clocks (MCLK and I2S ones) running
1622+ */
1623+
1624+/* don't forget to specify I2C adapter in i2c_client field */
1625+int snd_ak4641_activate(struct snd_ak4641 *ak);
1626+
1627+void snd_ak4641_deactivate(struct snd_ak4641 *ak);
1628+int snd_ak4641_add_mixer_controls(struct snd_ak4641 *ak, struct snd_card *card);
1629+int snd_ak4641_open_stream(struct snd_ak4641 *ak, int stream);
1630+int snd_ak4641_close_stream(struct snd_ak4641 *ak, int stream);
1631+int snd_ak4641_suspend(struct snd_ak4641 *ak, pm_message_t state);
1632+int snd_ak4641_resume(struct snd_ak4641 *ak);
1633+
1634+void snd_ak4641_hp_connected(struct snd_ak4641 *ak, int connected); /* non atomic context */
1635+void snd_ak4641_hp_detected(struct snd_ak4641 *ak, int detected); /* atomic context */
1636+
1637+#endif /* __SOUND_AK4641_H */
1638Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_asic3_leds.c
1639===================================================================
1640--- /dev/null 1970-01-01 00:00:00.000000000 +0000
1641+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_asic3_leds.c 2007-07-19 11:41:55.000000000 +0100
1642@@ -0,0 +1,143 @@
1643+/*
1644+ * LEDs support for the HP iPaq hx4700
1645+ *
1646+ * Copyright (c) 2006 Anton Vorontsov <cbou@mail.ru>
1647+ *
1648+ * This file is subject to the terms and conditions of the GNU General Public
1649+ * License. See the file COPYING in the main directory of this archive for
1650+ * more details.
1651+ *
1652+ */
1653+
1654+#include <linux/kernel.h>
1655+#include <linux/init.h>
1656+#include <linux/platform_device.h>
1657+#include <linux/leds.h>
1658+#include <linux/soc/asic3_base.h>
1659+
1660+#include <asm/hardware/ipaq-asic3.h>
1661+#include <asm/mach-types.h>
1662+#include <asm/hardware/asic3_leds.h>
1663+#include <asm/arch/htcuniversal-asic.h>
1664+
1665+//FIXME
1666+//DEFINE_LED_TRIGGER_SHARED_GLOBAL(htcuniversal_radio_trig);
1667+//EXPORT_LED_TRIGGER_SHARED(htcuniversal_radio_trig);
1668+
1669+static struct asic3_led htcuniversal_leds[] = {
1670+ {
1671+ .led_cdev = {
1672+ .name = "htcuniversal:red",
1673+ .default_trigger = "htcuniversal-charging",
1674+ },
1675+ .hw_num = 2,
1676+
1677+ },
1678+ {
1679+ .led_cdev = {
1680+ .name = "htcuniversal:green",
1681+ .default_trigger = "htcuniversal-chargefull",
1682+ },
1683+ .hw_num = 1,
1684+ },
1685+ {
1686+ .led_cdev = {
1687+ .name = "htcuniversal:wifi-bt",
1688+ .default_trigger = "htcuniversal-radio",
1689+ },
1690+ .hw_num = 0,
1691+ },
1692+ {
1693+ .led_cdev = {
1694+ .name = "htcuniversal:phonebuttons",
1695+ .default_trigger = "htcuniversal-phonebuttons",
1696+ },
1697+ .hw_num = -1,
1698+ .gpio_num = ('D'-'A')*16+GPIOD_BL_KEYP_PWR_ON,
1699+ },
1700+ {
1701+ .led_cdev = {
1702+ .name = "htcuniversal:vibra",
1703+ .default_trigger = "htcuniversal-vibra",
1704+ },
1705+ .hw_num = -1,
1706+ .gpio_num = ('D'-'A')*16+GPIOD_VIBRA_PWR_ON,
1707+ },
1708+ {
1709+ .led_cdev = {
1710+ .name = "htcuniversal:flashlight1",
1711+ .default_trigger = "htcuniversal-flashlight1",
1712+ },
1713+ .hw_num = -1,
1714+ .gpio_num = ('A'-'A')*16+GPIOA_FLASHLIGHT,
1715+ },
1716+ {
1717+ .led_cdev = {
1718+ .name = "htcuniversal:kbdbacklight",
1719+ .default_trigger = "htcuniversal-kbdbacklight",
1720+ },
1721+ .hw_num = -1,
1722+ .gpio_num = ('D'-'A')*16+GPIOD_BL_KEYB_PWR_ON,
1723+ },
1724+};
1725+
1726+void htcuniversal_leds_release(struct device *dev)
1727+{
1728+ return;
1729+}
1730+
1731+static
1732+struct asic3_leds_machinfo htcuniversal_leds_machinfo = {
1733+ .num_leds = ARRAY_SIZE(htcuniversal_leds),
1734+ .leds = htcuniversal_leds,
1735+ .asic3_pdev = &htcuniversal_asic3,
1736+};
1737+
1738+static
1739+struct platform_device htcuniversal_leds_pdev = {
1740+ .name = "asic3-leds",
1741+ .dev = {
1742+ .platform_data = &htcuniversal_leds_machinfo,
1743+ .release = htcuniversal_leds_release,
1744+ },
1745+};
1746+
1747+static
1748+int __init htcuniversal_leds_init(void)
1749+{
1750+ int ret;
1751+ printk("htcuniversal LEDs Driver\n");
1752+// led_trigger_register_shared("htcuniversal-radio", &htcuniversal_radio_trig);
1753+
1754+ ret = asic3_leds_register();
1755+ if (ret) goto asic3_leds_failed;
1756+
1757+ ret = platform_device_register(&htcuniversal_leds_pdev);
1758+ if (ret) goto platform_device_failed;
1759+
1760+ goto success;
1761+
1762+platform_device_failed:
1763+ asic3_leds_unregister();
1764+asic3_leds_failed:
1765+// led_trigger_unregister_shared(htcuniversal_radio_trig);
1766+ printk("htcuniversal LEDs Driver failed to init");
1767+success:
1768+ return ret;
1769+}
1770+
1771+static
1772+void __exit htcuniversal_leds_exit(void)
1773+{
1774+// led_trigger_unregister_shared(htcuniversal_radio_trig);
1775+ platform_device_unregister(&htcuniversal_leds_pdev);
1776+ asic3_leds_unregister();
1777+ return;
1778+}
1779+
1780+module_init(htcuniversal_leds_init);
1781+module_exit(htcuniversal_leds_exit);
1782+
1783+MODULE_AUTHOR("Anton Vorontsov <cbou@mail.ru>");
1784+MODULE_DESCRIPTION("htcuniversal LEDs driver");
1785+MODULE_LICENSE("GPL");
1786Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_bl.c
1787===================================================================
1788--- /dev/null 1970-01-01 00:00:00.000000000 +0000
1789+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_bl.c 2007-07-19 11:41:55.000000000 +0100
1790@@ -0,0 +1,61 @@
1791+/*
1792+ * Use consistent with the GNU GPL is permitted,
1793+ * provided that this copyright notice is
1794+ * preserved in its entirety in all copies and derived works.
1795+ *
1796+ * Copyright (C) 2006 Paul Sokolosvky
1797+ * Based on code from older versions of htcuniversal_lcd.c
1798+ *
1799+ */
1800+
1801+#include <linux/types.h>
1802+#include <linux/platform_device.h>
1803+#include <asm/arch/hardware.h> /* for pxa-regs.h (__REG) */
1804+#include <asm/arch/pxa-regs.h>
1805+#include <asm/mach-types.h> /* machine_is_htcuniversal */
1806+//#include <linux/corgi_bl.h>
1807+#include <linux/backlight.h>
1808+#include <linux/err.h>
1809+
1810+#include <asm/arch/htcuniversal-gpio.h>
1811+#include <asm/arch/htcuniversal-asic.h>
1812+#include <asm/hardware/ipaq-asic3.h>
1813+#include <linux/soc/asic3_base.h>
1814+
1815+#define HTCUNIVERSAL_MAX_INTENSITY 0xc7
1816+
1817+static void htcuniversal_set_bl_intensity(int intensity)
1818+{
1819+ PWM_CTRL1 = 1; /* pre-scaler */
1820+ PWM_PWDUTY1 = intensity; /* duty cycle */
1821+ PWM_PERVAL1 = HTCUNIVERSAL_MAX_INTENSITY+1; /* period */
1822+
1823+ if (intensity > 0) {
1824+ pxa_set_cken(CKEN_PWM1, 1);
1825+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev,
1826+ (1<<GPIOD_FL_PWR_ON), (1<<GPIOD_FL_PWR_ON));
1827+ } else {
1828+ pxa_set_cken(CKEN_PWM1, 0);
1829+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev,
1830+ (1<<GPIOD_FL_PWR_ON), 0);
1831+ }
1832+}
1833+
1834+
1835+static struct generic_bl_info htcuniversal_bl_machinfo = {
1836+ .default_intensity = HTCUNIVERSAL_MAX_INTENSITY / 4,
1837+ .limit_mask = 0xff,
1838+ .max_intensity = HTCUNIVERSAL_MAX_INTENSITY,
1839+ .set_bl_intensity = htcuniversal_set_bl_intensity,
1840+};
1841+
1842+struct platform_device htcuniversal_bl = {
1843+ .name = "corgi-bl",
1844+ .dev = {
1845+ .platform_data = &htcuniversal_bl_machinfo,
1846+ },
1847+};
1848+
1849+MODULE_AUTHOR("Paul Sokolovsky <pmiscml@gmail.com>");
1850+MODULE_DESCRIPTION("Backlight driver for HTC Universal");
1851+MODULE_LICENSE("GPL");
1852Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_bt.c
1853===================================================================
1854--- /dev/null 1970-01-01 00:00:00.000000000 +0000
1855+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_bt.c 2007-07-19 11:41:55.000000000 +0100
1856@@ -0,0 +1,135 @@
1857+/* Bluetooth interface driver for TI BRF6150 on HX4700
1858+ *
1859+ * Copyright (c) 2005 SDG Systems, LLC
1860+ *
1861+ * 2005-04-21 Todd Blumer Created.
1862+ */
1863+
1864+#include <linux/module.h>
1865+#include <linux/kernel.h>
1866+#include <linux/delay.h>
1867+#include <linux/platform_device.h>
1868+#include <linux/soc/asic3_base.h>
1869+
1870+#include <asm/hardware.h>
1871+//#include <asm/arch/serial.h>
1872+#include <asm/hardware/ipaq-asic3.h>
1873+#include <asm/arch/htcuniversal-gpio.h>
1874+#include <asm/arch/htcuniversal-asic.h>
1875+
1876+#include "htcuniversal_bt.h"
1877+
1878+static uint use_led=1;
1879+
1880+static void
1881+htcuniversal_bt_configure( int state )
1882+{
1883+ int tries;
1884+
1885+ printk( KERN_NOTICE "htcuniversal configure bluetooth: %d\n", state );
1886+ switch (state) {
1887+
1888+ case PXA_UART_CFG_PRE_STARTUP:
1889+ break;
1890+
1891+ case PXA_UART_CFG_POST_STARTUP:
1892+ /* pre-serial-up hardware configuration */
1893+ htcuniversal_egpio_enable(1<<EGPIO5_BT_3V3_ON);
1894+ mdelay(50);
1895+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_BT_PWR_ON, 1<<GPIOC_BT_PWR_ON);
1896+ mdelay(10);
1897+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_BT_RESET, 0);
1898+ mdelay(10);
1899+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_BT_RESET, 1<<GPIOC_BT_RESET);
1900+ mdelay(10);
1901+
1902+ /*
1903+ * BRF6150's RTS goes low when firmware is ready
1904+ * so check for CTS=1 (nCTS=0 -> CTS=1). Typical 150ms
1905+ */
1906+ tries = 0;
1907+ do {
1908+ mdelay(10);
1909+ } while ((BTMSR & MSR_CTS) == 0 && tries++ < 50);
1910+ if (use_led) {
1911+// htcuniversal_set_led(2, 16, 16);
1912+ }
1913+ break;
1914+
1915+ case PXA_UART_CFG_PRE_SHUTDOWN:
1916+ htcuniversal_egpio_disable(1<<EGPIO5_BT_3V3_ON );
1917+ mdelay(50);
1918+// htcuniversal_clear_led(2);
1919+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_BT_PWR_ON, 0);
1920+ break;
1921+
1922+ default:
1923+ break;
1924+ }
1925+}
1926+
1927+
1928+static int
1929+htcuniversal_bt_probe( struct platform_device *dev )
1930+{
1931+ struct htcuniversal_bt_funcs *funcs = dev->dev.platform_data;
1932+
1933+ /* configure bluetooth UART */
1934+ pxa_gpio_mode( GPIO_NR_HTCUNIVERSAL_BT_RXD_MD );
1935+ pxa_gpio_mode( GPIO_NR_HTCUNIVERSAL_BT_TXD_MD );
1936+ pxa_gpio_mode( GPIO_NR_HTCUNIVERSAL_BT_UART_CTS_MD );
1937+ pxa_gpio_mode( GPIO_NR_HTCUNIVERSAL_BT_UART_RTS_MD );
1938+
1939+ funcs->configure = htcuniversal_bt_configure;
1940+
1941+ /* Make sure the LED is off */
1942+// htcuniversal_clear_led(2);
1943+
1944+ return 0;
1945+}
1946+
1947+static int
1948+htcuniversal_bt_remove( struct platform_device *dev )
1949+{
1950+ struct htcuniversal_bt_funcs *funcs = dev->dev.platform_data;
1951+
1952+ funcs->configure = NULL;
1953+
1954+ /* Make sure the LED is off */
1955+// htcuniversal_clear_led(2);
1956+
1957+ return 0;
1958+}
1959+
1960+static struct platform_driver bt_driver = {
1961+ .driver = {
1962+ .name = "htcuniversal_bt",
1963+ },
1964+ .probe = htcuniversal_bt_probe,
1965+ .remove = htcuniversal_bt_remove,
1966+};
1967+
1968+module_param(use_led, uint, 0);
1969+
1970+static int __init
1971+htcuniversal_bt_init( void )
1972+{
1973+ printk(KERN_NOTICE "htcuniversal Bluetooth Driver\n");
1974+ return platform_driver_register( &bt_driver );
1975+}
1976+
1977+static void __exit
1978+htcuniversal_bt_exit( void )
1979+{
1980+ platform_driver_unregister( &bt_driver );
1981+}
1982+
1983+module_init( htcuniversal_bt_init );
1984+module_exit( htcuniversal_bt_exit );
1985+
1986+MODULE_AUTHOR("Todd Blumer, SDG Systems, LLC");
1987+MODULE_DESCRIPTION("HTC Universal Bluetooth Support Driver");
1988+MODULE_LICENSE("GPL");
1989+
1990+/* vim600: set noexpandtab sw=8 ts=8 :*/
1991+
1992Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_bt.h
1993===================================================================
1994--- /dev/null 1970-01-01 00:00:00.000000000 +0000
1995+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_bt.h 2007-07-19 11:41:55.000000000 +0100
1996@@ -0,0 +1,17 @@
1997+/*
1998+ * Bluetooth support file for calling bluetooth configuration functions
1999+ *
2000+ * Copyright (c) 2005 SDG Systems, LLC
2001+ *
2002+ * 2005-06 Todd Blumer Initial Revision
2003+ */
2004+
2005+#ifndef _HTCUNIVERSAL_BT_H
2006+#define _HTCUNIVERSAL_BT_H
2007+
2008+struct htcuniversal_bt_funcs {
2009+ void (*configure) ( int state );
2010+};
2011+
2012+
2013+#endif
2014Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_buttons.c
2015===================================================================
2016--- /dev/null 1970-01-01 00:00:00.000000000 +0000
2017+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_buttons.c 2007-07-19 11:41:55.000000000 +0100
2018@@ -0,0 +1,87 @@
2019+/*
2020+ * Buttons driver for HTC Universal
2021+ *
2022+ * This file is subject to the terms and conditions of the GNU General Public
2023+ * License.
2024+ *
2025+ * Copyright (C) 2005 Pawel Kolodziejski
2026+ * Copyright (C) 2003 Joshua Wise
2027+ *
2028+ */
2029+
2030+#include <linux/input.h>
2031+#include <linux/input_pda.h>
2032+#include <linux/module.h>
2033+#include <linux/init.h>
2034+#include <linux/interrupt.h>
2035+#include <linux/irq.h>
2036+#include <linux/platform_device.h>
2037+#include <linux/gpio_keys.h>
2038+#include <linux/soc/asic3_base.h>
2039+#include <asm/mach-types.h>
2040+#include <asm/hardware/asic3_keys.h>
2041+#include <asm/arch/htcuniversal-gpio.h>
2042+#include <asm/arch/htcuniversal-asic.h>
2043+
2044+static struct asic3_keys_button asic3_buttons[] = {
2045+//{KEY_SCREEN, ASIC3_GPIOA_IRQ_BASE+GPIOA_COVER_ROTATE_N, 1, "screen_cover", EV_SW},
2046+//{KEY_SWITCHVIDEOMODE, ASIC3_GPIOB_IRQ_BASE+GPIOB_CLAMSHELL_N, 1, "clamshell_rotate", EV_SW},
2047+//{KEY_KBDILLUMTOGGLE, ASIC3_GPIOB_IRQ_BASE+GPIOB_NIGHT_SENSOR, 1, "night_sensor", EV_SW},
2048+{SW_LID, ASIC3_GPIOA_IRQ_BASE+GPIOA_COVER_ROTATE_N, 1, "screen_cover", EV_SW},
2049+{SW_TABLET_MODE, ASIC3_GPIOB_IRQ_BASE+GPIOB_CLAMSHELL_N, 1, "clamshell_rotate", EV_SW},
2050+//{SW_NIGHT_SENSOR, ASIC3_GPIOB_IRQ_BASE+GPIOB_NIGHT_SENSOR, 1, "night_sensor", EV_SW},
2051+{KEY_F10, ASIC3_GPIOA_IRQ_BASE+GPIOA_BUTTON_BACKLIGHT_N, 1, "backlight_button"},
2052+{KEY_RECORD, ASIC3_GPIOA_IRQ_BASE+GPIOA_BUTTON_RECORD_N, 1, "record_button"},
2053+{KEY_CAMERA, ASIC3_GPIOA_IRQ_BASE+GPIOA_BUTTON_CAMERA_N, 1, "camera_button"},
2054+{KEY_VOLUMEDOWN, ASIC3_GPIOA_IRQ_BASE+GPIOA_VOL_UP_N, 1, "volume_slider_down"},
2055+{KEY_VOLUMEUP, ASIC3_GPIOA_IRQ_BASE+GPIOA_VOL_DOWN_N, 1, "volume_slider_up"},
2056+{KEY_KPENTER, ASIC3_GPIOD_IRQ_BASE+GPIOD_KEY_OK_N, 1, "select"},
2057+{KEY_RIGHT, ASIC3_GPIOD_IRQ_BASE+GPIOD_KEY_RIGHT_N, 1, "right"},
2058+{KEY_LEFT, ASIC3_GPIOD_IRQ_BASE+GPIOD_KEY_LEFT_N, 1, "left"},
2059+{KEY_DOWN, ASIC3_GPIOD_IRQ_BASE+GPIOD_KEY_DOWN_N, 1, "down"},
2060+{KEY_UP, ASIC3_GPIOD_IRQ_BASE+GPIOD_KEY_UP_N, 1, "up"},
2061+};
2062+
2063+static struct asic3_keys_platform_data asic3_keys_data = {
2064+ .buttons = asic3_buttons,
2065+ .nbuttons = ARRAY_SIZE(asic3_buttons),
2066+ .asic3_dev = &htcuniversal_asic3.dev,
2067+};
2068+
2069+static struct platform_device htcuniversal_keys_asic3 = {
2070+ .name = "asic3-keys",
2071+ .dev = { .platform_data = &asic3_keys_data, }
2072+};
2073+
2074+static int __init htcuniversal_buttons_probe(struct platform_device *dev)
2075+{
2076+ platform_device_register(&htcuniversal_keys_asic3);
2077+ return 0;
2078+}
2079+
2080+static struct platform_driver htcuniversal_buttons_driver = {
2081+ .driver = {
2082+ .name = "htcuniversal_buttons",
2083+ },
2084+ .probe = htcuniversal_buttons_probe,
2085+};
2086+
2087+static int __init htcuniversal_buttons_init(void)
2088+{
2089+ if (!machine_is_htcuniversal())
2090+ return -ENODEV;
2091+
2092+ return platform_driver_register(&htcuniversal_buttons_driver);
2093+}
2094+
2095+static void __exit htcuniversal_buttons_exit(void)
2096+{
2097+ platform_driver_unregister(&htcuniversal_buttons_driver);
2098+}
2099+
2100+module_init(htcuniversal_buttons_init);
2101+module_exit(htcuniversal_buttons_exit);
2102+
2103+MODULE_AUTHOR ("Joshua Wise, Pawel Kolodziejski, Paul Sokolosvky");
2104+MODULE_DESCRIPTION ("Buttons support for HTC Universal");
2105+MODULE_LICENSE ("GPL");
2106Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_core.c
2107===================================================================
2108--- /dev/null 1970-01-01 00:00:00.000000000 +0000
2109+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_core.c 2007-07-19 11:41:55.000000000 +0100
2110@@ -0,0 +1,226 @@
2111+/* Core Hardware driver for Hx4700 (Serial, ASIC3, EGPIOs)
2112+ *
2113+ * Copyright (c) 2005 SDG Systems, LLC
2114+ *
2115+ * 2005-03-29 Todd Blumer Converted basic structure to support hx4700
2116+ * 2005-04-30 Todd Blumer Add IRDA code from H2200
2117+ */
2118+
2119+#include <linux/module.h>
2120+#include <linux/version.h>
2121+#include <linux/interrupt.h>
2122+#include <linux/platform_device.h>
2123+#include <linux/delay.h>
2124+#include <linux/pm.h>
2125+#include <linux/irq.h>
2126+
2127+#include <asm/io.h>
2128+#include <asm/mach/irq.h>
2129+#include <asm/arch/pxa-regs.h>
2130+#include <asm/arch/pxa-pm_ll.h>
2131+#include <asm/arch/htcuniversal-gpio.h>
2132+#include <asm/arch/htcuniversal-asic.h>
2133+
2134+#include <linux/soc/asic3_base.h>
2135+#include <asm/hardware/ipaq-asic3.h>
2136+
2137+volatile u_int16_t *egpios;
2138+u_int16_t egpio_reg;
2139+
2140+static int htc_bootloader = 0; /* Is the stock HTC bootloader installed? */
2141+
2142+/*
2143+ * may make sense to put egpios elsewhere, but they're here now
2144+ * since they share some of the same address space with the TI WLAN
2145+ *
2146+ * EGPIO register is write-only
2147+ */
2148+
2149+void
2150+htcuniversal_egpio_enable( u_int16_t bits )
2151+{
2152+ unsigned long flags;
2153+
2154+ local_irq_save(flags);
2155+
2156+ egpio_reg |= bits;
2157+ *egpios = egpio_reg;
2158+
2159+ local_irq_restore(flags);
2160+}
2161+EXPORT_SYMBOL_GPL(htcuniversal_egpio_enable);
2162+
2163+void
2164+htcuniversal_egpio_disable( u_int16_t bits )
2165+{
2166+ unsigned long flags;
2167+
2168+ local_irq_save(flags);
2169+
2170+ egpio_reg &= ~bits;
2171+ *egpios = egpio_reg;
2172+
2173+ local_irq_restore(flags);
2174+}
2175+EXPORT_SYMBOL_GPL(htcuniversal_egpio_disable);
2176+
2177+#ifdef CONFIG_PM
2178+
2179+void htcuniversal_ll_pm_init(void);
2180+
2181+static int htcuniversal_suspend(struct platform_device *dev, pm_message_t state)
2182+{
2183+ /* Turn off external clocks here, because htcuniversal_power and asic3_mmc
2184+ * scared to do so to not hurt each other. (-5 mA) */
2185+
2186+
2187+ /* 0x20c2 is HTC clock value
2188+ * CLOCK_CDEX_SOURCE 2
2189+ * CLOCK_CDEX_SPI 0
2190+ * CLOCK_CDEX_OWM 0
2191+ *
2192+ * CLOCK_CDEX_PWM0 0
2193+ * CLOCK_CDEX_PWM1 0
2194+ * CLOCK_CDEX_LED0 1
2195+ * CLOCK_CDEX_LED1 1
2196+ *
2197+ * CLOCK_CDEX_LED2 0
2198+ * CLOCK_CDEX_SD_HOST 0
2199+ * CLOCK_CDEX_SD_BUS 0
2200+ * CLOCK_CDEX_SMBUS 0
2201+ *
2202+ * CLOCK_CDEX_CONTROL_CX 0
2203+ * CLOCK_CDEX_EX0 1
2204+ * CLOCK_CDEX_EX1 0
2205+ * */
2206+ asic3_set_clock_cdex(&htcuniversal_asic3.dev, 0xffff, CLOCK_CDEX_SOURCE1
2207+ |CLOCK_CDEX_LED0
2208+ |CLOCK_CDEX_LED1
2209+ |CLOCK_CDEX_LED2
2210+ |CLOCK_CDEX_EX0
2211+ |CLOCK_CDEX_EX1);
2212+
2213+ *egpios = 0; /* turn off all egpio power */
2214+
2215+ /* Wake up enable. */
2216+ PWER = PWER_GPIO0
2217+ | PWER_GPIO1 /* reset */
2218+ | PWER_GPIO9 /* USB */
2219+ | PWER_GPIO10 /* AC on USB */
2220+ | PWER_GPIO14 /* ASIC3 mux */
2221+ | PWER_RTC;
2222+ /* Wake up on falling edge. */
2223+ PFER = PWER_GPIO0
2224+ | PWER_GPIO1
2225+ | PWER_GPIO9
2226+ | PWER_GPIO10
2227+ | PWER_GPIO14;
2228+
2229+ /* Wake up on rising edge. */
2230+ PRER = PWER_GPIO0
2231+ | PWER_GPIO1
2232+ | PWER_GPIO9
2233+ | PWER_GPIO10;
2234+ /* 3.6864 MHz oscillator power-down enable */
2235+ PCFR = PCFR_OPDE | PCFR_PI2CEN | PCFR_GPROD | PCFR_GPR_EN;
2236+
2237+ PGSR0 = 0x09088004;
2238+ PGSR1 = 0x00020002;
2239+ PGSR2 = 0x8001c000;
2240+ PGSR3 = 0x00106284;
2241+
2242+ PSLR = 0xcc000000;
2243+
2244+#if 0
2245+ /*
2246+ * If we're using bootldr and not the stock HTC bootloader,
2247+ * we want to wake up periodically to see if the charge is full while
2248+ * it is suspended. We do this with the OS timer 4 in the pxa270.
2249+ */
2250+ if (!htc_bootloader) {
2251+ OMCR4 = 0x4b; /* Periodic, self-resetting, 1-second timer */
2252+ OSMR4 = 5; /* Wake up bootldr after x seconds so it can
2253+ figure out what to do with the LEDs. */
2254+ OIER |= 0x10; /* Enable interrupt source for Timer 4 */
2255+ OSCR4 = 0; /* This starts the timer */
2256+ }
2257+#endif
2258+
2259+ asic3_set_extcf_select(&htcuniversal_asic3.dev, ASIC3_EXTCF_OWM_EN, 0);
2260+
2261+ return 0;
2262+}
2263+
2264+static int htcuniversal_resume(struct platform_device *dev)
2265+{
2266+ htcuniversal_egpio_enable(0);
2267+
2268+ return 0;
2269+}
2270+#else
2271+# define htcuniversal_suspend NULL
2272+# define htcuniversal_resume NULL
2273+#endif
2274+
2275+static int
2276+htcuniversal_core_probe( struct platform_device *dev )
2277+{
2278+
2279+ printk( KERN_NOTICE "HTC Universal Core Hardware Driver\n" );
2280+
2281+ egpios = (volatile u_int16_t *)ioremap_nocache(HTCUNIVERSAL_EGPIO_BASE, sizeof *egpios );
2282+ if (!egpios)
2283+ return -ENODEV;
2284+ else
2285+ printk( KERN_NOTICE "HTC Universal Core: egpio at phy=0x%8.8x is at virt=0x%p\n",
2286+ HTCUNIVERSAL_EGPIO_BASE, egpios );
2287+
2288+ printk("Using stock HTC first stage bootloader\n");
2289+ htc_bootloader = 1;
2290+
2291+ htcuniversal_ll_pm_init();
2292+
2293+ return 0;
2294+}
2295+
2296+static int
2297+htcuniversal_core_remove( struct platform_device *dev )
2298+{
2299+
2300+ if (egpios != NULL)
2301+ iounmap( (void *)egpios );
2302+
2303+ return 0;
2304+}
2305+
2306+static struct platform_driver htcuniversal_core_driver = {
2307+ .driver = {
2308+ .name = "htcuniversal_core",
2309+ },
2310+ .probe = htcuniversal_core_probe,
2311+ .remove = htcuniversal_core_remove,
2312+ .suspend = htcuniversal_suspend,
2313+ .resume = htcuniversal_resume,
2314+};
2315+
2316+static int __init
2317+htcuniversal_core_init( void )
2318+{
2319+ return platform_driver_register( &htcuniversal_core_driver );
2320+}
2321+
2322+
2323+static void __exit
2324+htcuniversal_core_exit( void )
2325+{
2326+ platform_driver_unregister( &htcuniversal_core_driver );
2327+}
2328+
2329+module_init( htcuniversal_core_init );
2330+module_exit( htcuniversal_core_exit );
2331+
2332+MODULE_AUTHOR("Todd Blumer, SDG Systems, LLC");
2333+MODULE_DESCRIPTION("HTC Universal Core Hardware Driver");
2334+MODULE_LICENSE("GPL");
2335+
2336+/* vim600: set noexpandtab sw=8 ts=8 :*/
2337Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_lcd.c
2338===================================================================
2339--- /dev/null 1970-01-01 00:00:00.000000000 +0000
2340+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_lcd.c 2007-07-19 11:41:55.000000000 +0100
2341@@ -0,0 +1,212 @@
2342+/*
2343+ * Use consistent with the GNU GPL is permitted,
2344+ * provided that this copyright notice is
2345+ * preserved in its entirety in all copies and derived works.
2346+ *
2347+ * History:
2348+ *
2349+ * 2004-03-01 Eddi De Pieri Adapted for htcuniversal using h3900_lcd.c
2350+ * 2004 Shawn Anderson Lcd hacking on htcuniversal
2351+ * see h3900_lcd.c for more history.
2352+ *
2353+ */
2354+
2355+#include <linux/types.h>
2356+#include <asm/arch/hardware.h> /* for pxa-regs.h (__REG) */
2357+#include <linux/platform_device.h>
2358+#include <asm/arch/pxa-regs.h> /* LCCR[0,1,2,3]* */
2359+#include <asm/arch/bitfield.h> /* for pxa-regs.h (Fld, etc) */
2360+#include <asm/arch/pxafb.h> /* pxafb_mach_info, set_pxa_fb_info */
2361+#include <asm/mach-types.h> /* machine_is_htcuniversal */
2362+#include <linux/lcd.h> /* lcd_device */
2363+#include <linux/err.h>
2364+#include <linux/delay.h>
2365+
2366+#include <asm/arch/htcuniversal-gpio.h>
2367+#include <asm/arch/htcuniversal-asic.h>
2368+#include <asm/hardware/ipaq-asic3.h>
2369+#include <linux/soc/asic3_base.h>
2370+
2371+static int saved_lcdpower=-1;
2372+
2373+static int powerup_lcd(void)
2374+{
2375+ printk( KERN_INFO "htcuniversal powerup_lcd: called\n");
2376+
2377+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_LCD_PWR1_ON, 0);
2378+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_LCD_PWR2_ON, 0);
2379+ asic3_set_gpio_out_b(&htcuniversal_asic3.dev, 1<<GPIOB_LCD_PWR3_ON, 0);
2380+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev, 1<<GPIOD_LCD_PWR4_ON, 0);
2381+ asic3_set_gpio_out_a(&htcuniversal_asic3.dev, 1<<GPIOA_LCD_PWR5_ON, 0);
2382+#if 1
2383+ LCCR4|=LCCR4_PCDDIV;
2384+#endif
2385+ pxa_set_cken(CKEN_LCD, 0);
2386+
2387+ mdelay(100);
2388+ asic3_set_gpio_out_a(&htcuniversal_asic3.dev, 1<<GPIOA_LCD_PWR5_ON, 1<<GPIOA_LCD_PWR5_ON);
2389+ mdelay(5);
2390+ asic3_set_gpio_out_b(&htcuniversal_asic3.dev, 1<<GPIOB_LCD_PWR3_ON, 1<<GPIOB_LCD_PWR3_ON);
2391+ mdelay(2);
2392+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_LCD_PWR1_ON, 1<<GPIOC_LCD_PWR1_ON);
2393+ mdelay(2);
2394+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_LCD_PWR2_ON, 1<<GPIOC_LCD_PWR2_ON);
2395+ mdelay(20);
2396+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev, 1<<GPIOD_LCD_PWR4_ON, 1<<GPIOD_LCD_PWR4_ON);
2397+ mdelay(1);
2398+ pxa_set_cken(CKEN_LCD, 1);
2399+
2400+ SET_HTCUNIVERSAL_GPIO(LCD1,1);
2401+ SET_HTCUNIVERSAL_GPIO(LCD2,1);
2402+ return 0;
2403+}
2404+
2405+static int powerdown_lcd(void)
2406+{
2407+ printk( KERN_INFO "htcuniversal powerdown_lcd: called\n");
2408+
2409+#if 1
2410+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_LCD_PWR2_ON, 0);
2411+ mdelay(100);
2412+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev, 1<<GPIOD_LCD_PWR4_ON, 0);
2413+ mdelay(10);
2414+ asic3_set_gpio_out_a(&htcuniversal_asic3.dev, 1<<GPIOA_LCD_PWR5_ON, 0);
2415+ mdelay(1);
2416+ asic3_set_gpio_out_b(&htcuniversal_asic3.dev, 1<<GPIOB_LCD_PWR3_ON, 0);
2417+ mdelay(1);
2418+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_LCD_PWR1_ON, 0);
2419+ pxa_set_cken(CKEN_LCD, 0);
2420+
2421+ SET_HTCUNIVERSAL_GPIO(LCD1,0);
2422+ SET_HTCUNIVERSAL_GPIO(LCD2,0);
2423+#else
2424+ pxa_set_cken(CKEN_LCD, 0);
2425+
2426+ SET_HTCUNIVERSAL_GPIO(LCD1,0);
2427+ SET_HTCUNIVERSAL_GPIO(LCD2,0);
2428+
2429+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_LCD_PWR2_ON, 0);
2430+ mdelay(100);
2431+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev, 1<<GPIOD_LCD_PWR4_ON, 0);
2432+ mdelay(10);
2433+ asic3_set_gpio_out_a(&htcuniversal_asic3.dev, 1<<GPIOA_LCD_PWR5_ON, 0);
2434+ mdelay(1);
2435+ asic3_set_gpio_out_b(&htcuniversal_asic3.dev, 1<<GPIOB_LCD_PWR3_ON, 0);
2436+ mdelay(1);
2437+ asic3_set_gpio_out_c(&htcuniversal_asic3.dev, 1<<GPIOC_LCD_PWR1_ON, 0);
2438+#endif
2439+ return 0;
2440+}
2441+
2442+static int htcuniversal_lcd_set_power(struct lcd_device *lm, int power)
2443+{
2444+ /* Enable or disable power to the LCD (0: on; 4: off) */
2445+
2446+ if ( power < 1 ) {
2447+
2448+ powerup_lcd();
2449+
2450+ } else {
2451+
2452+ powerdown_lcd();
2453+
2454+ }
2455+
2456+ saved_lcdpower=power;
2457+
2458+ return 0;
2459+}
2460+
2461+static int htcuniversal_lcd_get_power(struct lcd_device *lm)
2462+{
2463+ /* Get the LCD panel power status (0: full on, 1..3: controller
2464+ * power on, flat panel power off, 4: full off) */
2465+
2466+ if (saved_lcdpower == -1)
2467+ {
2468+ htcuniversal_lcd_set_power(lm, 4);
2469+ saved_lcdpower=4;
2470+ }
2471+
2472+ return saved_lcdpower;
2473+}
2474+
2475+static struct lcd_ops htcuniversal_lcd_properties =
2476+{
2477+ .get_power = htcuniversal_lcd_get_power,
2478+ .set_power = htcuniversal_lcd_set_power,
2479+};
2480+
2481+static struct lcd_device *htcuniversal_lcd_dev;
2482+
2483+static int htcuniversal_lcd_probe(struct platform_device * dev)
2484+{
2485+ htcuniversal_lcd_dev = lcd_device_register("pxa2xx-fb", NULL,
2486+ &htcuniversal_lcd_properties);
2487+ if (IS_ERR(htcuniversal_lcd_dev)) {
2488+ printk("htcuniversal_lcd_probe: error registering devices\n");
2489+ return -1;
2490+ }
2491+
2492+ return 0;
2493+}
2494+
2495+static int htcuniversal_lcd_remove(struct platform_device * dev)
2496+{
2497+ htcuniversal_lcd_set_power(htcuniversal_lcd_dev, 4);
2498+ lcd_device_unregister(htcuniversal_lcd_dev);
2499+
2500+ return 0;
2501+}
2502+
2503+static int htcuniversal_lcd_suspend(struct platform_device * dev, pm_message_t state)
2504+{
2505+// printk("htcuniversal_lcd_suspend: called.\n");
2506+ htcuniversal_lcd_set_power(htcuniversal_lcd_dev, 4);
2507+ return 0;
2508+}
2509+
2510+static int htcuniversal_lcd_resume(struct platform_device * dev)
2511+{
2512+// printk("htcuniversal_lcd_resume: called.\n");
2513+
2514+ /* */
2515+#if 1
2516+ LCCR4|=LCCR4_PCDDIV;
2517+#endif
2518+
2519+ htcuniversal_lcd_set_power(htcuniversal_lcd_dev, 0);
2520+ return 0;
2521+}
2522+
2523+static struct platform_driver htcuniversal_lcd_driver = {
2524+ .driver = {
2525+ .name = "htcuniversal_lcd",
2526+ },
2527+ .probe = htcuniversal_lcd_probe,
2528+ .remove = htcuniversal_lcd_remove,
2529+ .suspend = htcuniversal_lcd_suspend,
2530+ .resume = htcuniversal_lcd_resume,
2531+};
2532+
2533+static int htcuniversal_lcd_init(void)
2534+{
2535+ if (!machine_is_htcuniversal())
2536+ return -ENODEV;
2537+
2538+ return platform_driver_register(&htcuniversal_lcd_driver);
2539+}
2540+
2541+static void htcuniversal_lcd_exit(void)
2542+{
2543+ lcd_device_unregister(htcuniversal_lcd_dev);
2544+ platform_driver_unregister(&htcuniversal_lcd_driver);
2545+}
2546+
2547+module_init(htcuniversal_lcd_init);
2548+module_exit(htcuniversal_lcd_exit);
2549+
2550+MODULE_AUTHOR("xanadux.org");
2551+MODULE_DESCRIPTION("Framebuffer driver for HTC Universal");
2552+MODULE_LICENSE("GPL");
2553+
2554Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_phone.c
2555===================================================================
2556--- /dev/null 1970-01-01 00:00:00.000000000 +0000
2557+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_phone.c 2007-07-19 11:41:55.000000000 +0100
2558@@ -0,0 +1,167 @@
2559+
2560+/* Phone interface driver for Qualcomm MSM6250 on HTC Universal
2561+ *
2562+ * Copyright (c) 2005 SDG Systems, LLC
2563+ *
2564+ * 2005-04-21 Todd Blumer Created.
2565+ */
2566+
2567+#include <linux/module.h>
2568+#include <linux/kernel.h>
2569+#include <linux/delay.h>
2570+#include <linux/platform_device.h>
2571+#include <linux/soc/asic3_base.h>
2572+
2573+#include <asm/hardware.h>
2574+#include <asm/arch/serial.h>
2575+#include <asm/hardware/ipaq-asic3.h>
2576+#include <asm/arch/htcuniversal-gpio.h>
2577+#include <asm/arch/htcuniversal-asic.h>
2578+
2579+#include "htcuniversal_phone.h"
2580+
2581+static void phone_reset(void)
2582+{
2583+ asic3_set_gpio_out_b(&htcuniversal_asic3.dev, 1<<GPIOB_BB_RESET2, 0);
2584+
2585+ SET_HTCUNIVERSAL_GPIO(PHONE_RESET,0);
2586+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev, 1<<GPIOD_BB_RESET1, 0);
2587+ mdelay(1);
2588+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev, 1<<GPIOD_BB_RESET1, 1<<GPIOD_BB_RESET1);
2589+ mdelay(20);
2590+ SET_HTCUNIVERSAL_GPIO(PHONE_RESET,1);
2591+ mdelay(200);
2592+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev, 1<<GPIOD_BB_RESET1, 0);
2593+}
2594+
2595+static void phone_off(void)
2596+{
2597+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev, 1<<GPIOD_BB_RESET1, 1<<GPIOD_BB_RESET1);
2598+ mdelay(2000);
2599+ asic3_set_gpio_out_d(&htcuniversal_asic3.dev, 1<<GPIOD_BB_RESET1, 0);
2600+
2601+ asic3_set_gpio_out_b(&htcuniversal_asic3.dev, 1<<GPIOB_BB_RESET2, 1<<GPIOB_BB_RESET2);
2602+ SET_HTCUNIVERSAL_GPIO(PHONE_OFF,0);
2603+}
2604+
2605+static void
2606+htcuniversal_phone_configure( int state )
2607+{
2608+ int tries;
2609+ unsigned short statusb;
2610+
2611+ printk( KERN_NOTICE "htcuniversal configure phone: %d\n", state );
2612+ switch (state) {
2613+
2614+ case PXA_UART_CFG_PRE_STARTUP:
2615+ break;
2616+
2617+ case PXA_UART_CFG_POST_STARTUP:
2618+ /* pre-serial-up hardware configuration */
2619+
2620+ SET_HTCUNIVERSAL_GPIO(PHONE_START,0); /* "bootloader" */
2621+ SET_HTCUNIVERSAL_GPIO(PHONE_UNKNOWN,0); /* not used */
2622+ SET_HTCUNIVERSAL_GPIO(PHONE_OFF,0); /* PHONE_OFF */
2623+
2624+ phone_reset();
2625+
2626+ SET_HTCUNIVERSAL_GPIO(PHONE_START,1); /* phone */
2627+
2628+ phone_reset();
2629+
2630+ asic3_set_gpio_dir_b(&htcuniversal_asic3.dev, 1<<GPIOB_BB_READY, 0);
2631+ asic3_set_gpio_dir_b(&htcuniversal_asic3.dev, 1<<GPIOB_BB_UNKNOWN3, 0);
2632+
2633+ /*
2634+ */
2635+ tries = 0;
2636+ do {
2637+ mdelay(10);
2638+ statusb = asic3_get_gpio_status_b( &htcuniversal_asic3.dev );
2639+ } while ( (statusb & (1<<GPIOB_UMTS_DCD)) == 0 && tries++ < 200);
2640+
2641+ printk("UMTS_DCD tries=%d of 200\n",tries);
2642+
2643+ tries = 0;
2644+ do {
2645+ SET_HTCUNIVERSAL_GPIO(PHONE_OFF,1);
2646+ mdelay(10);
2647+ SET_HTCUNIVERSAL_GPIO(PHONE_OFF,0);
2648+ mdelay(20);
2649+ statusb = asic3_get_gpio_status_b( &htcuniversal_asic3.dev );
2650+ } while ( (statusb & (1<<GPIOB_BB_READY)) == 0 && tries++ < 200);
2651+
2652+ printk("BB_READY tries=%d of 200\n",tries);
2653+
2654+ break;
2655+
2656+ case PXA_UART_CFG_PRE_SHUTDOWN:
2657+
2658+ phone_off();
2659+
2660+ break;
2661+
2662+ default:
2663+ break;
2664+ }
2665+}
2666+
2667+
2668+static int
2669+htcuniversal_phone_probe( struct platform_device *dev )
2670+{
2671+ struct htcuniversal_phone_funcs *funcs = dev->dev.platform_data;
2672+
2673+ /* configure phone UART */
2674+ pxa_gpio_mode( GPIO_NR_HTCUNIVERSAL_PHONE_RXD_MD );
2675+ pxa_gpio_mode( GPIO_NR_HTCUNIVERSAL_PHONE_TXD_MD );
2676+ pxa_gpio_mode( GPIO_NR_HTCUNIVERSAL_PHONE_UART_CTS_MD );
2677+ pxa_gpio_mode( GPIO_NR_HTCUNIVERSAL_PHONE_UART_RTS_MD );
2678+
2679+ funcs->configure = htcuniversal_phone_configure;
2680+
2681+ return 0;
2682+}
2683+
2684+static int
2685+htcuniversal_phone_remove( struct platform_device *dev )
2686+{
2687+ struct htcuniversal_phone_funcs *funcs = dev->dev.platform_data;
2688+
2689+ funcs->configure = NULL;
2690+
2691+ asic3_set_gpio_dir_b(&htcuniversal_asic3.dev, 1<<GPIOB_BB_READY, 1<<GPIOB_BB_READY);
2692+ asic3_set_gpio_dir_b(&htcuniversal_asic3.dev, 1<<GPIOB_BB_UNKNOWN3, 1<<GPIOB_BB_UNKNOWN3);
2693+
2694+ return 0;
2695+}
2696+
2697+static struct platform_driver phone_driver = {
2698+ .driver = {
2699+ .name = "htcuniversal_phone",
2700+ },
2701+ .probe = htcuniversal_phone_probe,
2702+ .remove = htcuniversal_phone_remove,
2703+};
2704+
2705+static int __init
2706+htcuniversal_phone_init( void )
2707+{
2708+ printk(KERN_NOTICE "htcuniversal Phone Driver\n");
2709+ return platform_driver_register( &phone_driver );
2710+}
2711+
2712+static void __exit
2713+htcuniversal_phone_exit( void )
2714+{
2715+ platform_driver_unregister( &phone_driver );
2716+}
2717+
2718+module_init( htcuniversal_phone_init );
2719+module_exit( htcuniversal_phone_exit );
2720+
2721+MODULE_AUTHOR("Todd Blumer, SDG Systems, LLC");
2722+MODULE_DESCRIPTION("HTC Universal Phone Support Driver");
2723+MODULE_LICENSE("GPL");
2724+
2725+/* vim600: set noexpandtab sw=8 ts=8 :*/
2726Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_phone.h
2727===================================================================
2728--- /dev/null 1970-01-01 00:00:00.000000000 +0000
2729+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_phone.h 2007-07-19 11:41:55.000000000 +0100
2730@@ -0,0 +1,16 @@
2731+/*
2732+ * Bluetooth support file for calling bluetooth configuration functions
2733+ *
2734+ * Copyright (c) 2005 SDG Systems, LLC
2735+ *
2736+ * 2005-06 Todd Blumer Initial Revision
2737+ */
2738+
2739+#ifndef _HTCUNIVERSAL_PHONE_H
2740+#define _HTCUNIVERSAL_PHONE_H
2741+
2742+struct htcuniversal_phone_funcs {
2743+ void (*configure) ( int state );
2744+};
2745+
2746+#endif
2747Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_pm.c
2748===================================================================
2749--- /dev/null 1970-01-01 00:00:00.000000000 +0000
2750+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_pm.c 2007-07-19 11:41:55.000000000 +0100
2751@@ -0,0 +1,69 @@
2752+/*
2753+ * MyPal 716 power management support for the original HTC IPL in DoC G3
2754+ *
2755+ * Use consistent with the GNU GPL is permitted, provided that this
2756+ * copyright notice is preserved in its entirety in all copies and
2757+ * derived works.
2758+ *
2759+ * Copyright (C) 2005 Pawel Kolodziejski
2760+ *
2761+ */
2762+
2763+#include <linux/kernel.h>
2764+#include <linux/module.h>
2765+#include <linux/device.h>
2766+#include <linux/pm.h>
2767+
2768+#include <asm/mach-types.h>
2769+#include <asm/hardware.h>
2770+#include <asm/arch/pxa-regs.h>
2771+#include <asm/arch/pxa-pm_ll.h>
2772+
2773+#ifdef CONFIG_PM
2774+
2775+static u32 *addr_a0040000;
2776+static u32 *addr_a0040004;
2777+static u32 *addr_a0040008;
2778+static u32 *addr_a004000c;
2779+
2780+static u32 save_a0040000;
2781+static u32 save_a0040004;
2782+static u32 save_a0040008;
2783+static u32 save_a004000c;
2784+
2785+static void htcuniversal_pxa_ll_pm_suspend(unsigned long resume_addr)
2786+{
2787+ save_a0040000 = *addr_a0040000;
2788+ save_a0040004 = *addr_a0040004;
2789+ save_a0040008 = *addr_a0040008;
2790+ save_a004000c = *addr_a004000c;
2791+
2792+ /* jump to PSPR */
2793+ *addr_a0040000 = 0xe3a00101; // mov r0, #0x40000000
2794+ *addr_a0040004 = 0xe380060f; // orr r0, r0, #0x0f000000
2795+ *addr_a0040008 = 0xe3800008; // orr r0, r0, #8
2796+ *addr_a004000c = 0xe590f000; // ldr pc, [r0]
2797+}
2798+
2799+static void htcuniversal_pxa_ll_pm_resume(void)
2800+{
2801+ *addr_a0040000 = save_a0040000;
2802+ *addr_a0040004 = save_a0040004;
2803+ *addr_a0040008 = save_a0040008;
2804+ *addr_a004000c = save_a004000c;
2805+}
2806+
2807+static struct pxa_ll_pm_ops htcuniversal_ll_pm_ops = {
2808+ .suspend = htcuniversal_pxa_ll_pm_suspend,
2809+ .resume = htcuniversal_pxa_ll_pm_resume,
2810+};
2811+
2812+void htcuniversal_ll_pm_init(void) {
2813+ addr_a0040000 = phys_to_virt(0xa0040000);
2814+ addr_a0040004 = phys_to_virt(0xa0040004);
2815+ addr_a0040008 = phys_to_virt(0xa0040008);
2816+ addr_a004000c = phys_to_virt(0xa004000c);
2817+
2818+ pxa_pm_set_ll_ops(&htcuniversal_ll_pm_ops);
2819+}
2820+#endif /* CONFIG_PM */
2821Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_power2.c
2822===================================================================
2823--- /dev/null 1970-01-01 00:00:00.000000000 +0000
2824+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_power2.c 2007-07-19 11:41:55.000000000 +0100
2825@@ -0,0 +1,97 @@
2826+/*
2827+ * pda_power driver for HTC Universal
2828+ *
2829+ * This program is free software; you can redistribute it and/or modify
2830+ * it under the terms of the GNU General Public License as published by
2831+ * the Free Software Foundation; either version 2 of the License, or (at
2832+ * your option) any later version.
2833+ *
2834+ */
2835+
2836+#include <linux/platform_device.h>
2837+#include <linux/module.h>
2838+#include <linux/pda_power.h>
2839+#include <linux/soc/asic3_base.h>
2840+
2841+#include <asm/mach-types.h>
2842+#include <asm/hardware.h>
2843+#include <asm/arch/htcuniversal-gpio.h>
2844+#include <asm/arch/htcuniversal-asic.h>
2845+
2846+static void charge_on(int flags)
2847+{
2848+ asic3_set_gpio_out_b(&htcuniversal_asic3.dev, 1<<GPIOB_CHARGE_EN, 0);
2849+}
2850+
2851+static int ac_on(void)
2852+{
2853+ return (GET_HTCUNIVERSAL_GPIO(POWER_DET) == 0);
2854+}
2855+
2856+static int usb_on(void)
2857+{
2858+ return (GET_HTCUNIVERSAL_GPIO(USB_DET) == 0);
2859+}
2860+
2861+static char *supplicants[] = {
2862+ "ds2760-battery.0", "backup-battery"
2863+};
2864+
2865+static struct pda_power_pdata power_pdata = {
2866+ .is_ac_online = ac_on,
2867+ .is_usb_online = usb_on,
2868+ .set_charge = charge_on,
2869+ .supplied_to = supplicants,
2870+ .num_supplicants = ARRAY_SIZE(supplicants),
2871+};
2872+
2873+static struct resource power_resources[] = {
2874+ [0] = {
2875+ .name = "ac",
2876+ .start = HTCUNIVERSAL_IRQ(POWER_DET),
2877+ .end = HTCUNIVERSAL_IRQ(POWER_DET),
2878+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE,
2879+ },
2880+ [1] = {
2881+ .name = "usb",
2882+ .start = HTCUNIVERSAL_IRQ(USB_DET),
2883+ .end = HTCUNIVERSAL_IRQ(USB_DET),
2884+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE,
2885+ },
2886+};
2887+
2888+static void dev_release(struct device *dev)
2889+{
2890+ return;
2891+}
2892+
2893+static struct platform_device power_dev =
2894+{
2895+ .name = "pda-power",
2896+ .id = -1,
2897+ .resource = power_resources,
2898+ .num_resources = ARRAY_SIZE(power_resources),
2899+ .dev =
2900+ {
2901+ .platform_data = &power_pdata,
2902+ .release = dev_release,
2903+ },
2904+};
2905+
2906+static int htcuniversal_power_init(void)
2907+{
2908+ return platform_device_register(&power_dev);
2909+}
2910+
2911+static void htcuniversal_power_exit(void)
2912+{
2913+ platform_device_unregister(&power_dev);
2914+
2915+ return;
2916+}
2917+
2918+module_init(htcuniversal_power_init);
2919+module_exit(htcuniversal_power_exit);
2920+
2921+MODULE_DESCRIPTION("Power driver for HTC Universal");
2922+MODULE_LICENSE("GPL");
2923Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_ts2.c
2924===================================================================
2925--- /dev/null 1970-01-01 00:00:00.000000000 +0000
2926+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_ts2.c 2007-07-19 11:41:55.000000000 +0100
2927@@ -0,0 +1,490 @@
2928+/* Touch screen driver for the TI something-or-other
2929+ *
2930+ * Copyright © 2005 SDG Systems, LLC
2931+ *
2932+ * Based on code that was based on the SAMCOP driver.
2933+ * Copyright © 2003, 2004 Compaq Computer Corporation.
2934+ *
2935+ * Use consistent with the GNU GPL is permitted,
2936+ * provided that this copyright notice is
2937+ * preserved in its entirety in all copies and derived works.
2938+ *
2939+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
2940+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
2941+ * FITNESS FOR ANY PARTICULAR PURPOSE.
2942+ *
2943+ * Author: Keith Packard <keith.packard@hp.com>
2944+ * May 2003
2945+ *
2946+ * Updates:
2947+ *
2948+ * 2004-02-11 Michael Opdenacker Renamed names from samcop to shamcop,
2949+ * Goal:support HAMCOP and SAMCOP.
2950+ * 2004-02-14 Michael Opdenacker Temporary fix for device id handling
2951+ *
2952+ * 2005-02-18 Aric Blumer Converted basic structure to support hx4700
2953+ *
2954+ * 2005-06-07 Aric Blumer Added tssim device handling so we can
2955+ * hook in the fbvncserver.
2956+ */
2957+
2958+#include <linux/module.h>
2959+#include <linux/version.h>
2960+
2961+#include <linux/init.h>
2962+#include <linux/fs.h>
2963+#include <linux/cdev.h>
2964+#include <linux/interrupt.h>
2965+#include <linux/sched.h>
2966+#include <linux/pm.h>
2967+#include <linux/delay.h>
2968+#include <linux/input.h>
2969+#include <linux/platform_device.h>
2970+#include <linux/irq.h>
2971+
2972+#include <asm/arch/hardware.h>
2973+#include <asm/mach/irq.h>
2974+#include <asm/io.h>
2975+
2976+/* remove me */
2977+#include <asm/arch/pxa-regs.h>
2978+#include <asm/arch/htcuniversal-gpio.h>
2979+#include <asm/arch/htcuniversal-asic.h>
2980+#include <asm/mach-types.h>
2981+
2982+#include <asm/hardware/ipaq-asic3.h>
2983+#include <linux/soc/asic3_base.h>
2984+
2985+
2986+#include "tsc2046_ts.h"
2987+
2988+enum touchscreen_state {
2989+ STATE_WAIT_FOR_TOUCH, /* Waiting for a PEN interrupt */
2990+ STATE_SAMPLING /* Actively sampling ADC */
2991+};
2992+
2993+struct touchscreen_data {
2994+ enum touchscreen_state state;
2995+ struct timer_list timer;
2996+ int irq;
2997+ struct input_dev *input;
2998+ /* */
2999+ int port;
3000+ int clock;
3001+ int pwrbit_X;
3002+ int pwrbit_Y;
3003+ int (*pen_down)(void);
3004+};
3005+
3006+static unsigned long poll_sample_time = 10; /* Sample every 10 milliseconds */
3007+
3008+static struct touchscreen_data *ts_data;
3009+
3010+static int irqblock;
3011+
3012+module_param(poll_sample_time, ulong, 0644);
3013+MODULE_PARM_DESC(poll_sample_time, "Poll sample time");
3014+
3015+static inline void
3016+report_touchpanel(struct touchscreen_data *ts, int pressure, int x, int y)
3017+{
3018+ input_report_abs(ts->input, ABS_PRESSURE, pressure);
3019+ input_report_abs(ts->input, ABS_X, x);
3020+ input_report_abs(ts->input, ABS_Y, y);
3021+ input_sync(ts->input);
3022+}
3023+
3024+static void start_read(struct touchscreen_data *touch);
3025+
3026+static irqreturn_t
3027+pen_isr(int irq, void *irq_desc)
3028+{
3029+ struct touchscreen_data *ts = ts_data;
3030+
3031+ if(irq == ts->irq /* && !irqblock */) {
3032+ irqblock = 1;
3033+
3034+ /*
3035+ * Disable the pen interrupt. It's reenabled when the user lifts the
3036+ * pen.
3037+ */
3038+ disable_irq(ts->irq);
3039+
3040+ if (ts->state == STATE_WAIT_FOR_TOUCH) {
3041+ ts->state = STATE_SAMPLING;
3042+ start_read(ts);
3043+ } else {
3044+ /* Shouldn't happen */
3045+ printk(KERN_ERR "Unexpected ts interrupt\n");
3046+ }
3047+
3048+ }
3049+ return IRQ_HANDLED;
3050+}
3051+
3052+static void
3053+ssp_init(int port, int clock)
3054+{
3055+
3056+ pxa_set_cken(clock, 0);
3057+
3058+ pxa_gpio_mode(GPIO_NR_HTCUNIVERSAL_TOUCHSCREEN_SPI_CLK_MD);
3059+ pxa_gpio_mode(GPIO_NR_HTCUNIVERSAL_TOUCHSCREEN_SPI_FRM_MD);
3060+ pxa_gpio_mode(GPIO_NR_HTCUNIVERSAL_TOUCHSCREEN_SPI_DO_MD);
3061+ pxa_gpio_mode(GPIO_NR_HTCUNIVERSAL_TOUCHSCREEN_SPI_DI_MD);
3062+
3063+ SET_HTCUNIVERSAL_GPIO(SPI_FRM,1);
3064+
3065+ /* *** Set up the SPI Registers *** */
3066+ SSCR0_P(port) =
3067+ SSCR0_EDSS /* Extended Data Size Select */
3068+ | SSCR0_SerClkDiv(7) /* Serial Clock Rate */
3069+ /* Synchronous Serial Enable (Disable for now) */
3070+ | SSCR0_Motorola /* Motorola SPI Interface */
3071+ | SSCR0_DataSize(8) /* Data Size Select (24-bit) */
3072+ ;
3073+ SSCR1_P(port) = 0;
3074+ SSPSP_P(port) = 0;
3075+
3076+ /* Clear the Status */
3077+ SSSR_P(port) = SSSR_P(port) & 0x00fcfffc;
3078+
3079+ /* Now enable it */
3080+ SSCR0_P(port) =
3081+ SSCR0_EDSS /* Extended Data Size Select */
3082+ | SSCR0_SerClkDiv(7) /* Serial Clock Rate */
3083+ | SSCR0_SSE /* Synchronous Serial Enable */
3084+ | SSCR0_Motorola /* Motorola SPI Interface */
3085+ | SSCR0_DataSize(8) /* Data Size Select (24-bit) */
3086+ ;
3087+
3088+ pxa_set_cken(clock, 1);
3089+}
3090+
3091+static void
3092+start_read(struct touchscreen_data *touch)
3093+{
3094+ unsigned long inc = (poll_sample_time * HZ) / 1000;
3095+ int i;
3096+
3097+ /* Write here to the serial port. We request X and Y only for now.
3098+ * Then we have to wait for poll_sample_time before we read out the serial
3099+ * port. Then, when we read it out, we check to see if the pen is still
3100+ * down. If so, then we issue another request here.
3101+ */
3102+#define TS_SAMPLES 7
3103+
3104+ /*
3105+ * We do four samples for each, and throw out the highest and lowest, then
3106+ * average the other two.
3107+ */
3108+
3109+ for(i = 0; i < TS_SAMPLES; i++) {
3110+ while(!(SSSR_P(touch->port) & SSSR_TNF))
3111+ ;
3112+ /* It's not full. Write the command for X */
3113+ SSDR_P(touch->port) = (TSC2046_SAMPLE_X|(touch->pwrbit_X))<<16;
3114+ }
3115+
3116+ for(i = 0; i < TS_SAMPLES; i++) {
3117+ while(!(SSSR_P(touch->port) & SSSR_TNF))
3118+ ;
3119+ /* It's not full. Write the command for Y */
3120+ SSDR_P(touch->port) = (TSC2046_SAMPLE_Y|(touch->pwrbit_Y))<<16;
3121+ }
3122+
3123+ /*
3124+ * Enable the timer. We should get an interrupt, but we want keep a timer
3125+ * to ensure that we can detect missing data
3126+ */
3127+ mod_timer(&touch->timer, jiffies + inc);
3128+}
3129+
3130+static void
3131+ts_timer_callback(unsigned long data)
3132+{
3133+ struct touchscreen_data *ts = (struct touchscreen_data *)data;
3134+ int x, a[TS_SAMPLES], y;
3135+ static int oldx, oldy;
3136+ int ssrval;
3137+
3138+ /*
3139+ * Check here to see if there is anything in the SPI FIFO. If so,
3140+ * return it if there has been a change. If not, then we have a
3141+ * timeout. Generate an erro somehow.
3142+ */
3143+ ssrval = SSSR_P(ts->port);
3144+
3145+ if(ssrval & SSSR_RNE) { /* Look at Rx Not Empty bit */
3146+ int number_of_entries_in_fifo;
3147+
3148+ /* The FIFO is not emtpy. Good! Now make sure there are at least two
3149+ * entries. (Should be two exactly.) */
3150+
3151+ number_of_entries_in_fifo = ((ssrval >> 12) & 0xf) + 1;
3152+
3153+ if(number_of_entries_in_fifo < TS_SAMPLES * 2) {
3154+ /* Not ready yet. Come back later. */
3155+ unsigned long inc = (poll_sample_time * HZ) / 1000;
3156+ mod_timer(&ts->timer, jiffies + inc);
3157+ return;
3158+ }
3159+
3160+ if(number_of_entries_in_fifo == TS_SAMPLES * 2) {
3161+ int i, j;
3162+
3163+ for(i = 0; i < TS_SAMPLES; i++) {
3164+ a[i] = SSDR_P(ts->port);
3165+ }
3166+ /* Sort them (bubble) */
3167+ for(j = TS_SAMPLES - 1; j > 0; j--) {
3168+ for(i = 0; i < j; i++) {
3169+ if(a[i] > a[i + 1]) {
3170+ int tmp;
3171+ tmp = a[i+1];
3172+ a[i+1] = a[i];
3173+ a[i] = tmp;
3174+ }
3175+ }
3176+ }
3177+
3178+ /* Take the average of the middle two */
3179+ /* x = (a[TS_SAMPLES/2 - 1] + a[TS_SAMPLES/2] + a[TS_SAMPLES/2+1] + a[TS_SAMPLES/2+2]) >> 2; */
3180+ x = a[TS_SAMPLES/2];
3181+
3182+ for(i = 0; i < TS_SAMPLES; i++) {
3183+ a[i] = SSDR_P(ts->port);
3184+ }
3185+ /* Sort them (bubble) */
3186+ for(j = TS_SAMPLES - 1; j > 0; j--) {
3187+ for(i = 0; i < j; i++) {
3188+ if(a[i] > a[i + 1]) {
3189+ int tmp;
3190+ tmp = a[i+1];
3191+ a[i+1] = a[i];
3192+ a[i] = tmp;
3193+ }
3194+ }
3195+ }
3196+
3197+
3198+ /* Take the average of the middle two */
3199+ /* y = (a[TS_SAMPLES/2 - 1] + a[TS_SAMPLES/2] + a[TS_SAMPLES/2+1] + a[TS_SAMPLES/2+2]) >> 2; */
3200+ y = a[TS_SAMPLES/2];
3201+ } else {
3202+ /* We have an error! Too many entries. */
3203+ printk(KERN_ERR "TS: Expected %d entries. Got %d\n", TS_SAMPLES*2, number_of_entries_in_fifo);
3204+ /* Try to clear the FIFO */
3205+ while(number_of_entries_in_fifo--) {
3206+ (void)SSDR_P(ts->port);
3207+ }
3208+
3209+ if (ts->pen_down())
3210+ start_read(ts);
3211+
3212+ return;
3213+ }
3214+ } else {
3215+ /* Not ready yet. Come back later. */
3216+ unsigned long inc = (poll_sample_time * HZ) / 1000;
3217+ mod_timer(&ts->timer, jiffies + inc);
3218+ return;
3219+ }
3220+
3221+ /*
3222+ * Now we check to see if the pen is still down. If it is, then call
3223+ * start_read().
3224+ */
3225+ if (ts->pen_down())
3226+ {
3227+ /* Still down */
3228+ if(oldx != x || oldy != y) {
3229+ oldx = x;
3230+ oldy = y;
3231+ report_touchpanel(ts, 1, x, y);
3232+ }
3233+ start_read(ts);
3234+ } else {
3235+ /* Up */
3236+ report_touchpanel(ts, 0, 0, 0);
3237+ irqblock = 0;
3238+ ts->state = STATE_WAIT_FOR_TOUCH;
3239+ /* Re-enable pen down interrupt */
3240+ enable_irq(ts->irq);
3241+ }
3242+}
3243+
3244+static int pen_down(void)
3245+{
3246+ return ( asic3_get_gpio_status_a( &htcuniversal_asic3.dev ) & (1<<GPIOA_TOUCHSCREEN_N)) == 0 ;
3247+}
3248+
3249+static int
3250+ts_probe (struct platform_device *dev)
3251+{
3252+ int retval;
3253+ struct touchscreen_data *ts;
3254+ struct tsc2046_mach_info *mach = dev->dev.platform_data;
3255+
3256+ printk("htcuniversal: ts_probe\n");
3257+
3258+ ts = ts_data = kmalloc (sizeof (*ts), GFP_KERNEL);
3259+ if (ts == NULL) {
3260+ printk( KERN_NOTICE "htcuniversal_ts: unable to allocate memory\n" );
3261+ return -ENOMEM;
3262+ }
3263+ memset (ts, 0, sizeof (*ts));
3264+
3265+ ts->input = input_allocate_device();
3266+ if (ts->input == NULL) {
3267+ printk( KERN_NOTICE "htcuniversal_ts: unable to allocation touchscreen input\n" );
3268+ kfree(ts);
3269+ return -ENOMEM;
3270+ }
3271+ ts->input->evbit[0] = BIT(EV_ABS);
3272+ ts->input->absbit[0] = BIT(ABS_X) | BIT(ABS_Y) | BIT(ABS_PRESSURE);
3273+ ts->input->absmin[ABS_X] = 0;
3274+ ts->input->absmax[ABS_X] = 32767;
3275+ ts->input->absmin[ABS_Y] = 0;
3276+ ts->input->absmax[ABS_Y] = 32767;
3277+ ts->input->absmin[ABS_PRESSURE] = 0;
3278+ ts->input->absmax[ABS_PRESSURE] = 1;
3279+
3280+ ts->input->name = "htcuniversal_ts";
3281+ ts->input->phys = "touchscreen/htcuniversal_ts";
3282+ ts->input->private = ts;
3283+
3284+ input_register_device(ts->input);
3285+
3286+ ts->timer.function = ts_timer_callback;
3287+ ts->timer.data = (unsigned long)ts;
3288+ ts->state = STATE_WAIT_FOR_TOUCH;
3289+ init_timer (&ts->timer);
3290+
3291+ platform_set_drvdata(dev, ts);
3292+
3293+ ts->port=-1;
3294+
3295+ if (mach) {
3296+ ts->port = mach->port;
3297+ ts->clock = mach->clock;
3298+ ts->pwrbit_X = mach->pwrbit_X;
3299+ ts->pwrbit_Y = mach->pwrbit_Y;
3300+
3301+ /* static irq */
3302+ if (mach->irq)
3303+ ts->irq = mach->irq;
3304+
3305+ if (mach->pen_down)
3306+ ts->pen_down=mach->pen_down;
3307+ }
3308+
3309+ if (ts->port == -1)
3310+ {
3311+ printk("tsc2046: your device is not supported by this driver\n");
3312+ return -ENODEV;
3313+ }
3314+
3315+ /* *** Initialize the SSP interface *** */
3316+ ssp_init(ts->port, ts->clock);
3317+
3318+ while(!(SSSR_P(ts->port) & SSSR_TNF))
3319+ ;
3320+ SSDR_P(ts->port) = (TSC2046_SAMPLE_X|(ts->pwrbit_X))<<16;
3321+
3322+ for(retval = 0; retval < 100; retval++) {
3323+ if(SSSR_P(ts->port) & SSSR_RNE) {
3324+ while(SSSR_P(ts->port) & SSSR_RNE) {
3325+ (void)SSDR_P(ts->port);
3326+ }
3327+ break;
3328+ }
3329+ mdelay(1);
3330+ }
3331+
3332+ if (machine_is_htcuniversal() )
3333+ {
3334+ ts->irq = asic3_irq_base( &htcuniversal_asic3.dev ) + ASIC3_GPIOA_IRQ_BASE + GPIOA_TOUCHSCREEN_N;
3335+ ts->pen_down=pen_down;
3336+ }
3337+
3338+ retval = request_irq(ts->irq, pen_isr, SA_INTERRUPT, "tsc2046_ts", ts);
3339+ if(retval) {
3340+ printk("Unable to get interrupt\n");
3341+ input_unregister_device (ts->input);
3342+ return -ENODEV;
3343+ }
3344+ set_irq_type(ts->irq, IRQ_TYPE_EDGE_FALLING);
3345+
3346+ return 0;
3347+}
3348+
3349+static int
3350+ts_remove (struct platform_device *dev)
3351+{
3352+ struct touchscreen_data *ts = platform_get_drvdata(dev);
3353+
3354+ input_unregister_device (ts->input);
3355+ del_timer_sync (&ts->timer);
3356+ free_irq (ts->irq, ts);
3357+ pxa_set_cken(ts->clock, 0);
3358+
3359+ kfree(ts);
3360+ return 0;
3361+}
3362+
3363+static int
3364+ts_suspend (struct platform_device *dev, pm_message_t state)
3365+{
3366+ struct touchscreen_data *ts = platform_get_drvdata(dev);
3367+
3368+ disable_irq(ts->irq);
3369+
3370+ printk("htcuniversal_ts2_suspend: called.\n");
3371+ return 0;
3372+}
3373+
3374+static int
3375+ts_resume (struct platform_device *dev)
3376+{
3377+ struct touchscreen_data *ts = platform_get_drvdata(dev);
3378+
3379+ ts->state = STATE_WAIT_FOR_TOUCH;
3380+ ssp_init(ts->port, ts->clock);
3381+ enable_irq(ts->irq);
3382+
3383+ printk("htcuniversal_ts2_resume: called.\n");
3384+ return 0;
3385+}
3386+
3387+static struct platform_driver ts_driver = {
3388+ .probe = ts_probe,
3389+ .remove = ts_remove,
3390+ .suspend = ts_suspend,
3391+ .resume = ts_resume,
3392+ .driver = {
3393+ .name = "htcuniversal_ts",
3394+ },
3395+};
3396+
3397+
3398+static int
3399+ts_module_init (void)
3400+{
3401+ printk(KERN_NOTICE "HTC Universal Touch Screen Driver\n");
3402+
3403+ return platform_driver_register(&ts_driver);
3404+}
3405+
3406+static void
3407+ts_module_cleanup (void)
3408+{
3409+ platform_driver_unregister (&ts_driver);
3410+}
3411+
3412+module_init(ts_module_init);
3413+module_exit(ts_module_cleanup);
3414+
3415+MODULE_LICENSE("GPL");
3416+MODULE_AUTHOR("Aric Blumer, SDG Systems, LLC");
3417+MODULE_DESCRIPTION("HTC Universal Touch Screen Driver");
3418Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_udc.c
3419===================================================================
3420--- /dev/null 1970-01-01 00:00:00.000000000 +0000
3421+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/htcuniversal_udc.c 2007-07-19 11:41:55.000000000 +0100
3422@@ -0,0 +1,71 @@
3423+
3424+/*
3425+ *
3426+ * htcuniversal_udc.c:
3427+ * htcuniversal specific code for the pxa27x usb device controller.
3428+ *
3429+ * Use consistent with the GNU GPL is permitted.
3430+ *
3431+ */
3432+
3433+#include <linux/module.h>
3434+#include <linux/init.h>
3435+#include <linux/platform_device.h>
3436+#include <asm/arch/hardware.h>
3437+#include <asm/arch/pxa-regs.h>
3438+#include <asm/arch/udc.h>
3439+#include <linux/soc/asic3_base.h>
3440+#include <asm/arch/htcuniversal-gpio.h>
3441+#include <asm/arch/htcuniversal-asic.h>
3442+
3443+static void htcuniversal_udc_command(int cmd)
3444+{
3445+ switch (cmd) {
3446+ case PXA2XX_UDC_CMD_DISCONNECT:
3447+ asic3_set_gpio_out_b(&htcuniversal_asic3.dev,
3448+ 1<<GPIOB_USB_PUEN, 0);
3449+// SET_HTCUNIVERSAL_GPIO(USB_PUEN,0);
3450+ break;
3451+ case PXA2XX_UDC_CMD_CONNECT:
3452+ asic3_set_gpio_out_b(&htcuniversal_asic3.dev,
3453+ 1<<GPIOB_USB_PUEN, 1<<GPIOB_USB_PUEN);
3454+// SET_HTCUNIVERSAL_GPIO(USB_PUEN,1);
3455+ break;
3456+ default:
3457+ printk("_udc_control: unknown command!\n");
3458+ break;
3459+ }
3460+}
3461+
3462+static int htcuniversal_udc_is_connected(void)
3463+{
3464+ return (GET_HTCUNIVERSAL_GPIO(USB_DET) != 0);
3465+}
3466+
3467+static struct pxa2xx_udc_mach_info htcuniversal_udc_info __initdata = {
3468+ .udc_is_connected = htcuniversal_udc_is_connected,
3469+ .udc_command = htcuniversal_udc_command,
3470+};
3471+
3472+static int htcuniversal_udc_probe(struct platform_device * dev)
3473+{
3474+ asic3_set_gpio_dir_b(&htcuniversal_asic3.dev, 1<<GPIOB_USB_PUEN, 1<<GPIOB_USB_PUEN);
3475+
3476+ pxa_set_udc_info(&htcuniversal_udc_info);
3477+ return 0;
3478+}
3479+
3480+static struct platform_driver htcuniversal_udc_driver = {
3481+ .driver = {
3482+ .name = "htcuniversal_udc",
3483+ },
3484+ .probe = htcuniversal_udc_probe,
3485+};
3486+
3487+static int __init htcuniversal_udc_init(void)
3488+{
3489+ return platform_driver_register(&htcuniversal_udc_driver);
3490+}
3491+
3492+module_init(htcuniversal_udc_init);
3493+MODULE_LICENSE("GPL");
3494Index: linux-2.6.22/arch/arm/mach-pxa/htcuniversal/tsc2046_ts.h
3495===================================================================
3496--- /dev/null 1970-01-01 00:00:00.000000000 +0000
3497+++ linux-2.6.22/arch/arm/mach-pxa/htcuniversal/tsc2046_ts.h 2007-07-19 11:41:55.000000000 +0100
3498@@ -0,0 +1,20 @@
3499+/*
3500+ * temporary TSC2046 touchscreen hack
3501+ */
3502+
3503+#ifndef _TSC2046_TS_H
3504+#define _TSC2046_TS_H
3505+
3506+struct tsc2046_mach_info {
3507+ int port;
3508+ int clock;
3509+ int pwrbit_X;
3510+ int pwrbit_Y;
3511+ int irq;
3512+ int (*pen_down)(void);
3513+};
3514+
3515+#define TSC2046_SAMPLE_X 0xd0
3516+#define TSC2046_SAMPLE_Y 0x90
3517+
3518+#endif
3519Index: linux-2.6.22/arch/arm/mach-pxa/Kconfig
3520===================================================================
3521--- linux-2.6.22.orig/arch/arm/mach-pxa/Kconfig 2007-07-19 11:41:52.000000000 +0100
3522+++ linux-2.6.22/arch/arm/mach-pxa/Kconfig 2007-07-19 11:41:55.000000000 +0100
3523@@ -46,6 +46,8 @@ config MACH_HX2750
3524 help
3525 This enables support for the HP iPAQ HX2750 handheld.
3526
3527+source "arch/arm/mach-pxa/htcuniversal/Kconfig"
3528+
3529 endchoice
3530
3531 if PXA_SHARPSL
3532Index: linux-2.6.22/arch/arm/mach-pxa/Makefile
3533===================================================================
3534--- linux-2.6.22.orig/arch/arm/mach-pxa/Makefile 2007-07-19 11:41:52.000000000 +0100
3535+++ linux-2.6.22/arch/arm/mach-pxa/Makefile 2007-07-19 11:41:55.000000000 +0100
3536@@ -19,6 +19,7 @@ obj-$(CONFIG_MACH_AKITA) += akita-ioexp.
3537 obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o sharpsl_pm.o poodle_pm.o
3538 obj-$(CONFIG_MACH_TOSA) += tosa.o
3539 obj-$(CONFIG_MACH_HX2750) += hx2750.o hx2750_test.o
3540+obj-$(CONFIG_MACH_HTCUNIVERSAL) += htcuniversal/
3541
3542 # Support for blinky lights
3543 led-y := leds.o
3544Index: linux-2.6.22/arch/arm/mach-pxa/pm.c
3545===================================================================
3546--- linux-2.6.22.orig/arch/arm/mach-pxa/pm.c 2007-07-19 11:41:51.000000000 +0100
3547+++ linux-2.6.22/arch/arm/mach-pxa/pm.c 2007-07-19 11:41:55.000000000 +0100
3548@@ -22,6 +22,7 @@
3549 #include <asm/system.h>
3550 #include <asm/arch/pm.h>
3551 #include <asm/arch/pxa-regs.h>
3552+#include <asm/arch/pxa-pm_ll.h>
3553 #include <asm/arch/lubbock.h>
3554 #include <asm/mach/time.h>
3555
3556@@ -75,12 +76,16 @@ enum { SLEEP_SAVE_START = 0,
3557 };
3558
3559
3560+static struct pxa_ll_pm_ops *ll_ops;
3561+
3562 int pxa_pm_enter(suspend_state_t state)
3563 {
3564 unsigned long sleep_save[SLEEP_SAVE_SIZE];
3565 unsigned long checksum = 0;
3566+ struct timespec delta, rtc;
3567 int i;
3568 extern void pxa_cpu_pm_enter(suspend_state_t state);
3569+ extern void pxa_cpu_resume(void);
3570
3571 #ifdef CONFIG_IWMMXT
3572 /* force any iWMMXt context to ram **/
3573@@ -88,6 +93,11 @@ int pxa_pm_enter(suspend_state_t state)
3574 iwmmxt_task_disable(NULL);
3575 #endif
3576
3577+ /* preserve current time */
3578+ rtc.tv_sec = RCNR;
3579+ rtc.tv_nsec = 0;
3580+ save_time_delta(&delta, &rtc);
3581+
3582 SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
3583 SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
3584 SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
3585@@ -123,6 +133,15 @@ int pxa_pm_enter(suspend_state_t state)
3586 /* Clear sleep reset status */
3587 RCSR = RCSR_SMR;
3588
3589+ /* Set resume return address */
3590+ PSPR = virt_to_phys(pxa_cpu_resume);
3591+
3592+ /* If we have special sus/res logic, use it */
3593+ if(ll_ops && ll_ops->suspend) {
3594+ extern void pxa_cpu_resume(void);
3595+ ll_ops->suspend(virt_to_phys(pxa_cpu_resume));
3596+ }
3597+
3598 /* before sleeping, calculate and save a checksum */
3599 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
3600 checksum += sleep_save[i];
3601@@ -138,6 +157,9 @@ int pxa_pm_enter(suspend_state_t state)
3602 for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
3603 checksum += sleep_save[i];
3604
3605+ if(ll_ops && ll_ops->resume)
3606+ ll_ops->resume();
3607+
3608 /* if invalid, display message and wait for a hardware reset */
3609 if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
3610 #ifdef CONFIG_ARCH_LUBBOCK
3611@@ -179,6 +201,10 @@ int pxa_pm_enter(suspend_state_t state)
3612
3613 RESTORE(PSTR);
3614
3615+ /* restore current time */
3616+ rtc.tv_sec = RCNR;
3617+ restore_time_delta(&delta, &rtc);
3618+
3619 #ifdef DEBUG
3620 printk(KERN_DEBUG "*** made it back from resume\n");
3621 #endif
3622@@ -188,6 +214,13 @@ int pxa_pm_enter(suspend_state_t state)
3623
3624 EXPORT_SYMBOL_GPL(pxa_pm_enter);
3625
3626+struct pxa_ll_pm_ops *pxa_pm_set_ll_ops(struct pxa_ll_pm_ops *new_ops) {
3627+ struct pxa_ll_pm_ops *old_ops = ll_ops;
3628+ ll_ops = new_ops;
3629+ return old_ops;
3630+}
3631+EXPORT_SYMBOL(pxa_pm_set_ll_ops);
3632+
3633 unsigned long sleep_phys_sp(void *sp)
3634 {
3635 return virt_to_phys(sp);
3636@@ -219,8 +252,9 @@ static struct pm_ops pxa_pm_ops = {
3637 .prepare = pxa_pm_prepare,
3638 .enter = pxa_pm_enter,
3639 .finish = pxa_pm_finish,
3640- .valid = pm_valid_only_mem,
3641+ .valid = pm_valid_only_mem,
3642 };
3643+//EXPORT_SYMBOL(pxa_pm_ops);
3644
3645 extern void pxa_cpu_resume(void);
3646
3647Index: linux-2.6.22/drivers/input/keyboard/pxa27x_keyboard.c
3648===================================================================
3649--- linux-2.6.22.orig/drivers/input/keyboard/pxa27x_keyboard.c 2007-07-19 11:41:50.000000000 +0100
3650+++ linux-2.6.22/drivers/input/keyboard/pxa27x_keyboard.c 2007-07-19 11:41:55.000000000 +0100
3651@@ -140,7 +140,7 @@ static int pxakbd_resume(struct platform
3652 KPREC = pdata->reg_kprec;
3653
3654 /* Enable unit clock */
3655- pxa_set_cken(CKEN19_KEYPAD, 1);
3656+ pxa_set_cken(CKEN_KEYPAD, 1);
3657 }
3658
3659 mutex_unlock(&input_dev->mutex);
3660Index: linux-2.6.22/drivers/leds/Kconfig
3661===================================================================
3662--- linux-2.6.22.orig/drivers/leds/Kconfig 2007-07-19 11:41:50.000000000 +0100
3663+++ linux-2.6.22/drivers/leds/Kconfig 2007-07-19 11:41:55.000000000 +0100
3664@@ -95,6 +95,13 @@ config LEDS_COBALT
3665 help
3666 This option enables support for the front LED on Cobalt Server
3667
3668+config LEDS_ASIC3
3669+ tristate "LED Support for the HTC ASIC3 chip"
3670+ depends LEDS_CLASS && HTC_ASIC3
3671+ help
3672+ This option enables support for the LEDs connected to the
3673+ HTC ASIC3 chip.
3674+
3675 comment "LED Triggers"
3676
3677 config LEDS_TRIGGERS
3678Index: linux-2.6.22/drivers/leds/Makefile
3679===================================================================
3680--- linux-2.6.22.orig/drivers/leds/Makefile 2007-07-19 11:41:50.000000000 +0100
3681+++ linux-2.6.22/drivers/leds/Makefile 2007-07-19 11:41:55.000000000 +0100
3682@@ -16,6 +16,7 @@ obj-$(CONFIG_LEDS_NET48XX) += leds-net4
3683 obj-$(CONFIG_LEDS_WRAP) += leds-wrap.o
3684 obj-$(CONFIG_LEDS_H1940) += leds-h1940.o
3685 obj-$(CONFIG_LEDS_COBALT) += leds-cobalt.o
3686+obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o
3687
3688 # LED Triggers
3689 obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o
3690Index: linux-2.6.22/drivers/leds/leds-asic3.c
3691===================================================================
3692--- /dev/null 1970-01-01 00:00:00.000000000 +0000
3693+++ linux-2.6.22/drivers/leds/leds-asic3.c 2007-07-19 11:41:55.000000000 +0100
3694@@ -0,0 +1,189 @@
3695+/*
3696+ * LEDs support for HTC ASIC3 devices.
3697+ *
3698+ * Copyright (c) 2006 Anton Vorontsov <cbou@mail.ru>
3699+ *
3700+ * This file is subject to the terms and conditions of the GNU General Public
3701+ * License. See the file COPYING in the main directory of this archive for
3702+ * more details.
3703+ *
3704+ */
3705+
3706+#include <linux/kernel.h>
3707+#include <linux/init.h>
3708+#include <linux/platform_device.h>
3709+#include <linux/leds.h>
3710+#include "leds.h"
3711+
3712+#include <asm/hardware/ipaq-asic3.h>
3713+#include <linux/soc/asic3_base.h>
3714+#include <asm/mach-types.h>
3715+#include <asm/hardware/asic3_leds.h>
3716+
3717+#ifdef DEBUG
3718+#define dbg(msg, ...) printk(msg, __VA_ARGS__)
3719+#else
3720+#define dbg(msg, ...)
3721+#endif
3722+
3723+static
3724+void asic3_leds_set(struct led_classdev *led_cdev, enum led_brightness b)
3725+{
3726+ struct asic3_led *led = container_of(led_cdev, struct asic3_led,
3727+ led_cdev);
3728+ struct asic3_leds_machinfo *machinfo = led->machinfo;
3729+ struct device *asic3_dev = &machinfo->asic3_pdev->dev;
3730+
3731+ dbg("%s:%s %d(%d)-%s %d\n", __FILE__, __FUNCTION__, led->hw_num,
3732+ led->gpio_num, led->led_cdev.name, b);
3733+
3734+ if (led->hw_num == -1) {
3735+ asic3_gpio_set_value(asic3_dev, led->gpio_num, b);
3736+ return;
3737+ }
3738+
3739+ if (b == LED_OFF) {
3740+ asic3_set_led(asic3_dev, led->hw_num, 0, 16, 6);
3741+ asic3_set_gpio_out_c(asic3_dev, led->hw_num, 0);
3742+ }
3743+ else {
3744+ asic3_set_gpio_out_c(asic3_dev, led->hw_num, led->hw_num);
3745+ #ifdef CONFIG_LEDS_TRIGGER_HWTIMER
3746+ if (led_cdev->trigger && led_cdev->trigger->is_led_supported &&
3747+ (led_cdev->trigger->is_led_supported(led_cdev) &
3748+ LED_SUPPORTS_HWTIMER)) {
3749+ struct hwtimer_data *td = led_cdev->trigger_data;
3750+ if (!td) return;
3751+ asic3_set_led(asic3_dev, led->hw_num, td->delay_on/8,
3752+ (td->delay_on + td->delay_off)/8, 6);
3753+ }
3754+ else
3755+ #endif
3756+ asic3_set_led(asic3_dev, led->hw_num, 16, 16, 6);
3757+ }
3758+
3759+ return;
3760+}
3761+
3762+static
3763+int asic3_leds_probe(struct platform_device *pdev)
3764+{
3765+ struct asic3_leds_machinfo *machinfo = pdev->dev.platform_data;
3766+ struct asic3_led *leds = machinfo->leds;
3767+ int ret, i = 0;
3768+
3769+ dbg("%s:%s\n", __FILE__, __FUNCTION__);
3770+
3771+ // Turn on clocks early, for the case if trigger would enable
3772+ // led immediately after led_classdev_register().
3773+ asic3_set_clock_cdex(&machinfo->asic3_pdev->dev,
3774+ CLOCK_CDEX_LED0 | CLOCK_CDEX_LED1 | CLOCK_CDEX_LED2,
3775+ CLOCK_CDEX_LED0 | CLOCK_CDEX_LED1 | CLOCK_CDEX_LED2);
3776+
3777+ for (i = 0; i < machinfo->num_leds; i++) {
3778+ leds[i].machinfo = machinfo;
3779+ leds[i].led_cdev.brightness_set = asic3_leds_set;
3780+ ret = led_classdev_register(&pdev->dev, &leds[i].led_cdev);
3781+ if (ret) {
3782+ printk(KERN_ERR "Error: can't register %s led\n",
3783+ leds[i].led_cdev.name);
3784+ goto out_err;
3785+ }
3786+ }
3787+
3788+ return 0;
3789+
3790+out_err:
3791+ while (--i >= 0) led_classdev_unregister(&leds[i].led_cdev);
3792+
3793+ asic3_set_clock_cdex(&machinfo->asic3_pdev->dev,
3794+ CLOCK_CDEX_LED0 | CLOCK_CDEX_LED1 | CLOCK_CDEX_LED2,
3795+ 0 | 0 | 0);
3796+
3797+ return ret;
3798+}
3799+
3800+static
3801+int asic3_leds_remove(struct platform_device *pdev)
3802+{
3803+ struct asic3_leds_machinfo *machinfo = pdev->dev.platform_data;
3804+ struct asic3_led *leds = machinfo->leds;
3805+ int i = 0;
3806+
3807+ dbg("%s:%s\n", __FILE__, __FUNCTION__);
3808+
3809+ for (i = 0; i < machinfo->num_leds; i++)
3810+ led_classdev_unregister(&leds[i].led_cdev);
3811+
3812+ asic3_set_clock_cdex(&machinfo->asic3_pdev->dev,
3813+ CLOCK_CDEX_LED0 | CLOCK_CDEX_LED1 | CLOCK_CDEX_LED2,
3814+ 0 | 0 | 0);
3815+
3816+ return 0;
3817+}
3818+
3819+#ifdef CONFIG_PM
3820+
3821+static
3822+int asic3_leds_suspend(struct platform_device *pdev, pm_message_t state)
3823+{
3824+ struct asic3_leds_machinfo *machinfo = pdev->dev.platform_data;
3825+ struct asic3_led *leds = machinfo->leds;
3826+ int i = 0;
3827+
3828+ dbg("%s:%s\n", __FILE__, __FUNCTION__);
3829+
3830+ for (i = 0; i < machinfo->num_leds; i++)
3831+ led_classdev_suspend(&leds[i].led_cdev);
3832+
3833+ return 0;
3834+}
3835+
3836+static
3837+int asic3_leds_resume(struct platform_device *pdev)
3838+{
3839+ struct asic3_leds_machinfo *machinfo = pdev->dev.platform_data;
3840+ struct asic3_led *leds = machinfo->leds;
3841+ int i = 0;
3842+
3843+ dbg("%s:%s\n", __FILE__, __FUNCTION__);
3844+
3845+ for (i = 0; i < machinfo->num_leds; i++)
3846+ led_classdev_resume(&leds[i].led_cdev);
3847+
3848+ return 0;
3849+}
3850+
3851+#endif
3852+
3853+static
3854+struct platform_driver asic3_leds_driver = {
3855+ .probe = asic3_leds_probe,
3856+ .remove = asic3_leds_remove,
3857+#ifdef CONFIG_PM
3858+ .suspend = asic3_leds_suspend,
3859+ .resume = asic3_leds_resume,
3860+#endif
3861+ .driver = {
3862+ .name = "asic3-leds",
3863+ },
3864+};
3865+
3866+int asic3_leds_register(void)
3867+{
3868+ dbg("%s:%s\n", __FILE__, __FUNCTION__);
3869+ return platform_driver_register(&asic3_leds_driver);
3870+}
3871+
3872+void asic3_leds_unregister(void)
3873+{
3874+ platform_driver_unregister(&asic3_leds_driver);
3875+ return;
3876+}
3877+
3878+EXPORT_SYMBOL_GPL(asic3_leds_register);
3879+EXPORT_SYMBOL_GPL(asic3_leds_unregister);
3880+
3881+MODULE_AUTHOR("Anton Vorontsov <cbou@mail.ru>");
3882+MODULE_DESCRIPTION("HTC ASIC3 LEDs driver");
3883+MODULE_LICENSE("GPL");
3884Index: linux-2.6.22/drivers/mfd/Kconfig
3885===================================================================
3886--- linux-2.6.22.orig/drivers/mfd/Kconfig 2007-07-19 11:41:51.000000000 +0100
3887+++ linux-2.6.22/drivers/mfd/Kconfig 2007-07-19 11:41:55.000000000 +0100
3888@@ -17,6 +17,9 @@ config MFD_SM501
3889
3890 endmenu
3891
3892+config HTC_ASIC3
3893+ tristate "HTC ASIC3 (iPAQ h1900/h3900/h4000/hx4700/rx3000) support"
3894+
3895 menu "Multimedia Capabilities Port drivers"
3896 depends on ARCH_SA1100
3897
3898Index: linux-2.6.22/drivers/mfd/Makefile
3899===================================================================
3900--- linux-2.6.22.orig/drivers/mfd/Makefile 2007-07-19 11:41:51.000000000 +0100
3901+++ linux-2.6.22/drivers/mfd/Makefile 2007-07-19 11:41:55.000000000 +0100
3902@@ -2,6 +2,8 @@
3903 # Makefile for multifunction miscellaneous devices
3904 #
3905
3906+obj-$(CONFIG_HTC_ASIC3) += asic3_base.o soc-core.o
3907+
3908 obj-$(CONFIG_MFD_SM501) += sm501.o
3909
3910 obj-$(CONFIG_MCP) += mcp-core.o
3911Index: linux-2.6.22/drivers/mfd/asic3_base.c
3912===================================================================
3913--- /dev/null 1970-01-01 00:00:00.000000000 +0000
3914+++ linux-2.6.22/drivers/mfd/asic3_base.c 2007-07-19 11:41:55.000000000 +0100
3915@@ -0,0 +1,1208 @@
3916+/*
3917+ * Driver interface to HTC "ASIC3"
3918+ *
3919+ * Copyright 2001 Compaq Computer Corporation.
3920+ * Copyright 2004-2005 Phil Blundell
3921+ *
3922+ * This program is free software; you can redistribute it and/or modify
3923+ * it under the terms of the GNU General Public License as published by
3924+ * the Free Software Foundation; either version 2 of the License, or
3925+ * (at your option) any later version.
3926+ *
3927+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
3928+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
3929+ * FITNESS FOR ANY PARTICULAR PURPOSE.
3930+ *
3931+ * Author: Andrew Christian
3932+ * <Andrew.Christian@compaq.com>
3933+ * October 2001
3934+ */
3935+
3936+#include <linux/module.h>
3937+#include <linux/version.h>
3938+#include <linux/platform_device.h>
3939+#include <linux/delay.h>
3940+#include <linux/init.h>
3941+#include <linux/irq.h>
3942+#include <linux/clk.h>
3943+#include <linux/ds1wm.h>
3944+#include <asm/arch/clock.h>
3945+
3946+#include <asm/hardware.h>
3947+#include <asm/irq.h>
3948+#include <asm/io.h>
3949+
3950+#include <asm/hardware/ipaq-asic3.h>
3951+#include <linux/soc/asic3_base.h>
3952+#include <linux/soc/tmio_mmc.h>
3953+#include "soc-core.h"
3954+
3955+
3956+struct asic3_data {
3957+ void *mapping;
3958+ unsigned int bus_shift;
3959+ int irq_base;
3960+ int irq_nr;
3961+
3962+ u16 irq_bothedge[4];
3963+ struct device *dev;
3964+
3965+ struct platform_device *mmc_dev;
3966+};
3967+
3968+static DEFINE_SPINLOCK(asic3_gpio_lock);
3969+
3970+static int asic3_remove(struct platform_device *dev);
3971+
3972+static inline unsigned long asic3_address(struct device *dev,
3973+ unsigned int reg)
3974+{
3975+ struct asic3_data *adata;
3976+
3977+ adata = (struct asic3_data *)dev->driver_data;
3978+
3979+ return (unsigned long)adata->mapping + (reg >> (2 - adata->bus_shift));
3980+}
3981+
3982+void asic3_write_register(struct device *dev, unsigned int reg, u32 value)
3983+{
3984+ __raw_writew(value, asic3_address(dev, reg));
3985+}
3986+EXPORT_SYMBOL(asic3_write_register);
3987+
3988+u32 asic3_read_register(struct device *dev, unsigned int reg)
3989+{
3990+ return __raw_readw(asic3_address(dev, reg));
3991+}
3992+EXPORT_SYMBOL(asic3_read_register);
3993+
3994+static inline void __asic3_write_register(struct asic3_data *asic,
3995+ unsigned int reg, u32 value)
3996+{
3997+ __raw_writew(value, (unsigned long)asic->mapping
3998+ + (reg >> (2 - asic->bus_shift)));
3999+}
4000+
4001+static inline u32 __asic3_read_register(struct asic3_data *asic,
4002+ unsigned int reg)
4003+{
4004+ return __raw_readw((unsigned long)asic->mapping
4005+ + (reg >> (2 - asic->bus_shift)));
4006+}
4007+
4008+#define ASIC3_GPIO_FN(get_fn_name, set_fn_name, REG) \
4009+u32 get_fn_name(struct device *dev) \
4010+{ \
4011+ return asic3_read_register(dev, REG); \
4012+} \
4013+EXPORT_SYMBOL(get_fn_name); \
4014+ \
4015+void set_fn_name(struct device *dev, u32 bits, u32 val) \
4016+{ \
4017+ unsigned long flags; \
4018+ \
4019+ spin_lock_irqsave(&asic3_gpio_lock, flags); \
4020+ val |= (asic3_read_register(dev, REG) & ~bits); \
4021+ asic3_write_register(dev, REG, val); \
4022+ spin_unlock_irqrestore(&asic3_gpio_lock, flags); \
4023+} \
4024+EXPORT_SYMBOL(set_fn_name);
4025+
4026+#define ASIC3_GPIO_REGISTER(ACTION, action, fn, FN) \
4027+ ASIC3_GPIO_FN(asic3_get_gpio_ ## action ## _ ## fn , \
4028+ asic3_set_gpio_ ## action ## _ ## fn , \
4029+ _IPAQ_ASIC3_GPIO_ ## FN ## _Base \
4030+ + _IPAQ_ASIC3_GPIO_ ## ACTION )
4031+
4032+#define ASIC3_GPIO_FUNCTIONS(fn, FN) \
4033+ ASIC3_GPIO_REGISTER(Direction, dir, fn, FN) \
4034+ ASIC3_GPIO_REGISTER(Out, out, fn, FN) \
4035+ ASIC3_GPIO_REGISTER(SleepMask, sleepmask, fn, FN) \
4036+ ASIC3_GPIO_REGISTER(SleepOut, sleepout, fn, FN) \
4037+ ASIC3_GPIO_REGISTER(BattFaultOut, battfaultout, fn, FN) \
4038+ ASIC3_GPIO_REGISTER(AltFunction, alt_fn, fn, FN) \
4039+ ASIC3_GPIO_REGISTER(SleepConf, sleepconf, fn, FN) \
4040+ ASIC3_GPIO_REGISTER(Status, status, fn, FN)
4041+
4042+#if 0
4043+ ASIC3_GPIO_REGISTER(Mask, mask, fn, FN)
4044+ ASIC3_GPIO_REGISTER(TriggerType, trigtype, fn, FN)
4045+ ASIC3_GPIO_REGISTER(EdgeTrigger, rising, fn, FN)
4046+ ASIC3_GPIO_REGISTER(LevelTrigger, triglevel, fn, FN)
4047+ ASIC3_GPIO_REGISTER(IntStatus, intstatus, fn, FN)
4048+#endif
4049+
4050+ASIC3_GPIO_FUNCTIONS(a, A)
4051+ASIC3_GPIO_FUNCTIONS(b, B)
4052+ASIC3_GPIO_FUNCTIONS(c, C)
4053+ASIC3_GPIO_FUNCTIONS(d, D)
4054+
4055+int asic3_gpio_get_value(struct device *dev, unsigned gpio)
4056+{
4057+ u32 mask = ASIC3_GPIO_bit(gpio);
4058+ printk("%s(%d)\n", __FUNCTION__, gpio);
4059+ switch (gpio >> 4) {
4060+ case _IPAQ_ASIC3_GPIO_BANK_A:
4061+ return asic3_get_gpio_status_a(dev) & mask;
4062+ case _IPAQ_ASIC3_GPIO_BANK_B:
4063+ return asic3_get_gpio_status_b(dev) & mask;
4064+ case _IPAQ_ASIC3_GPIO_BANK_C:
4065+ return asic3_get_gpio_status_c(dev) & mask;
4066+ case _IPAQ_ASIC3_GPIO_BANK_D:
4067+ return asic3_get_gpio_status_d(dev) & mask;
4068+ }
4069+
4070+ printk(KERN_ERR "%s: invalid GPIO value 0x%x", __FUNCTION__, gpio);
4071+ return 0;
4072+}
4073+EXPORT_SYMBOL(asic3_gpio_get_value);
4074+
4075+void asic3_gpio_set_value(struct device *dev, unsigned gpio, int val)
4076+{
4077+ u32 mask = ASIC3_GPIO_bit(gpio);
4078+ u32 bitval = 0;
4079+ if (val) bitval = mask;
4080+ printk("%s(%d, %d)\n", __FUNCTION__, gpio, val);
4081+
4082+ switch (gpio >> 4) {
4083+ case _IPAQ_ASIC3_GPIO_BANK_A:
4084+ asic3_set_gpio_out_a(dev, mask, bitval);
4085+ return;
4086+ case _IPAQ_ASIC3_GPIO_BANK_B:
4087+ asic3_set_gpio_out_b(dev, mask, bitval);
4088+ return;
4089+ case _IPAQ_ASIC3_GPIO_BANK_C:
4090+ asic3_set_gpio_out_c(dev, mask, bitval);
4091+ return;
4092+ case _IPAQ_ASIC3_GPIO_BANK_D:
4093+ asic3_set_gpio_out_d(dev, mask, bitval);
4094+ return;
4095+ }
4096+
4097+ printk(KERN_ERR "%s: invalid GPIO value 0x%x", __FUNCTION__, gpio);
4098+}
4099+EXPORT_SYMBOL(asic3_gpio_set_value);
4100+
4101+int asic3_irq_base(struct device *dev)
4102+{
4103+ struct asic3_data *asic = dev->driver_data;
4104+
4105+ return asic->irq_base;
4106+}
4107+EXPORT_SYMBOL(asic3_irq_base);
4108+
4109+static int asic3_gpio_to_irq(struct device *dev, unsigned gpio)
4110+{
4111+ struct asic3_data *asic = dev->driver_data;
4112+ printk("%s(%d)\n", __FUNCTION__, gpio);
4113+
4114+ return asic->irq_base + gpio;
4115+}
4116+
4117+void asic3_set_led(struct device *dev, int led_num, int duty_time,
4118+ int cycle_time, int timebase)
4119+{
4120+ struct asic3_data *asic = dev->driver_data;
4121+ unsigned int led_base;
4122+
4123+ /* it's a macro thing: see #define _IPAQ_ASIC_LED_0_Base for why you
4124+ * can't substitute led_num in the macros below...
4125+ */
4126+
4127+ switch (led_num) {
4128+ case 0:
4129+ led_base = _IPAQ_ASIC3_LED_0_Base;
4130+ break;
4131+ case 1:
4132+ led_base = _IPAQ_ASIC3_LED_1_Base;
4133+ break;
4134+ case 2:
4135+ led_base = _IPAQ_ASIC3_LED_2_Base;
4136+ break;
4137+ default:
4138+ printk(KERN_ERR "%s: invalid led number %d", __FUNCTION__,
4139+ led_num);
4140+ return;
4141+ }
4142+
4143+ __asic3_write_register(asic, led_base + _IPAQ_ASIC3_LED_TimeBase,
4144+ timebase | LED_EN);
4145+ __asic3_write_register(asic, led_base + _IPAQ_ASIC3_LED_PeriodTime,
4146+ cycle_time);
4147+ __asic3_write_register(asic, led_base + _IPAQ_ASIC3_LED_DutyTime,
4148+ 0);
4149+ udelay(20); /* asic voodoo - possibly need a whole duty cycle? */
4150+ __asic3_write_register(asic, led_base + _IPAQ_ASIC3_LED_DutyTime,
4151+ duty_time);
4152+}
4153+EXPORT_SYMBOL(asic3_set_led);
4154+
4155+void asic3_set_clock_sel(struct device *dev, u32 bits, u32 val)
4156+{
4157+ struct asic3_data *asic = dev->driver_data;
4158+ unsigned long flags;
4159+ u32 v;
4160+
4161+ spin_lock_irqsave(&asic3_gpio_lock, flags);
4162+ v = __asic3_read_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, SEL));
4163+ v = (v & ~bits) | val;
4164+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, SEL), v);
4165+ spin_unlock_irqrestore(&asic3_gpio_lock, flags);
4166+}
4167+EXPORT_SYMBOL(asic3_set_clock_sel);
4168+
4169+void asic3_set_clock_cdex(struct device *dev, u32 bits, u32 val)
4170+{
4171+ struct asic3_data *asic = dev->driver_data;
4172+ unsigned long flags;
4173+ u32 v;
4174+
4175+ spin_lock_irqsave(&asic3_gpio_lock, flags);
4176+ v = __asic3_read_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, CDEX));
4177+ v = (v & ~bits) | val;
4178+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, CDEX), v);
4179+ spin_unlock_irqrestore(&asic3_gpio_lock, flags);
4180+}
4181+EXPORT_SYMBOL(asic3_set_clock_cdex);
4182+
4183+static void asic3_clock_cdex_enable(struct clk *clk)
4184+{
4185+ struct asic3_data *asic = (struct asic3_data *)clk->parent->ctrlbit;
4186+ unsigned long flags, val;
4187+
4188+ local_irq_save(flags);
4189+
4190+ val = __asic3_read_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, CDEX));
4191+ val |= clk->ctrlbit;
4192+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, CDEX), val);
4193+
4194+ local_irq_restore(flags);
4195+}
4196+
4197+static void asic3_clock_cdex_disable(struct clk *clk)
4198+{
4199+ struct asic3_data *asic = (struct asic3_data *)clk->parent->ctrlbit;
4200+ unsigned long flags, val;
4201+
4202+ local_irq_save(flags);
4203+
4204+ val = __asic3_read_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, CDEX));
4205+ val &= ~clk->ctrlbit;
4206+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, CDEX), val);
4207+
4208+ local_irq_restore(flags);
4209+}
4210+
4211+/* base clocks */
4212+
4213+static struct clk clk_g = {
4214+ .name = "gclk",
4215+ .rate = 0,
4216+ .parent = NULL,
4217+};
4218+
4219+/* clock definitions */
4220+
4221+static struct clk asic3_clocks[] = {
4222+ {
4223+ .name = "spi",
4224+ .id = -1,
4225+ .parent = &clk_g,
4226+ .enable = asic3_clock_cdex_enable,
4227+ .disable = asic3_clock_cdex_disable,
4228+ .ctrlbit = CLOCK_CDEX_SPI,
4229+ },
4230+#ifdef CONFIG_HTC_ASIC3_DS1WM
4231+ {
4232+ .name = "ds1wm",
4233+ .id = -1,
4234+ .rate = 5000000,
4235+ .parent = &clk_g,
4236+ .enable = asic3_clock_cdex_enable,
4237+ .disable = asic3_clock_cdex_disable,
4238+ .ctrlbit = CLOCK_CDEX_OWM,
4239+ },
4240+#endif
4241+ {
4242+ .name = "pwm0",
4243+ .id = -1,
4244+ .parent = &clk_g,
4245+ .enable = asic3_clock_cdex_enable,
4246+ .disable = asic3_clock_cdex_disable,
4247+ .ctrlbit = CLOCK_CDEX_PWM0,
4248+ },
4249+ {
4250+ .name = "pwm1",
4251+ .id = -1,
4252+ .parent = &clk_g,
4253+ .enable = asic3_clock_cdex_enable,
4254+ .disable = asic3_clock_cdex_disable,
4255+ .ctrlbit = CLOCK_CDEX_PWM1,
4256+ },
4257+ {
4258+ .name = "led0",
4259+ .id = -1,
4260+ .parent = &clk_g,
4261+ .enable = asic3_clock_cdex_enable,
4262+ .disable = asic3_clock_cdex_disable,
4263+ .ctrlbit = CLOCK_CDEX_LED0,
4264+ },
4265+ {
4266+ .name = "led1",
4267+ .id = -1,
4268+ .parent = &clk_g,
4269+ .enable = asic3_clock_cdex_enable,
4270+ .disable = asic3_clock_cdex_disable,
4271+ .ctrlbit = CLOCK_CDEX_LED1,
4272+ },
4273+ {
4274+ .name = "led2",
4275+ .id = -1,
4276+ .parent = &clk_g,
4277+ .enable = asic3_clock_cdex_enable,
4278+ .disable = asic3_clock_cdex_disable,
4279+ .ctrlbit = CLOCK_CDEX_LED2,
4280+ },
4281+ {
4282+ .name = "smbus",
4283+ .id = -1,
4284+ .parent = &clk_g,
4285+ .enable = asic3_clock_cdex_enable,
4286+ .disable = asic3_clock_cdex_disable,
4287+ .ctrlbit = CLOCK_CDEX_SMBUS,
4288+ },
4289+ {
4290+ .name = "ex0",
4291+ .id = -1,
4292+ .parent = &clk_g,
4293+ .enable = asic3_clock_cdex_enable,
4294+ .disable = asic3_clock_cdex_disable,
4295+ .ctrlbit = CLOCK_CDEX_EX0,
4296+ },
4297+ {
4298+ .name = "ex1",
4299+ .id = -1,
4300+ .parent = &clk_g,
4301+ .enable = asic3_clock_cdex_enable,
4302+ .disable = asic3_clock_cdex_disable,
4303+ .ctrlbit = CLOCK_CDEX_EX1,
4304+ },
4305+};
4306+
4307+void asic3_set_extcf_select(struct device *dev, u32 bits, u32 val)
4308+{
4309+ struct asic3_data *asic = dev->driver_data;
4310+ unsigned long flags;
4311+ u32 v;
4312+
4313+ spin_lock_irqsave(&asic3_gpio_lock, flags);
4314+ v = __asic3_read_register(asic, IPAQ_ASIC3_OFFSET(EXTCF, Select));
4315+ v = (v & ~bits) | val;
4316+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(EXTCF, Select), v);
4317+ spin_unlock_irqrestore(&asic3_gpio_lock, flags);
4318+}
4319+EXPORT_SYMBOL(asic3_set_extcf_select);
4320+
4321+void asic3_set_extcf_reset(struct device *dev, u32 bits, u32 val)
4322+{
4323+ struct asic3_data *asic = dev->driver_data;
4324+ unsigned long flags;
4325+ u32 v;
4326+
4327+ spin_lock_irqsave(&asic3_gpio_lock, flags);
4328+ v = __asic3_read_register(asic, IPAQ_ASIC3_OFFSET(EXTCF, Reset));
4329+ v = (v & ~bits) | val;
4330+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(EXTCF, Reset), v);
4331+ spin_unlock_irqrestore(&asic3_gpio_lock, flags);
4332+}
4333+EXPORT_SYMBOL(asic3_set_extcf_reset);
4334+
4335+void asic3_set_sdhwctrl(struct device *dev, u32 bits, u32 val)
4336+{
4337+ struct asic3_data *asic = dev->driver_data;
4338+ unsigned long flags;
4339+ u32 v;
4340+
4341+ spin_lock_irqsave (&asic3_gpio_lock, flags);
4342+ v = __asic3_read_register(asic, IPAQ_ASIC3_OFFSET(SDHWCTRL, SDConf));
4343+ v = (v & ~bits) | val;
4344+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(SDHWCTRL, SDConf), v);
4345+ spin_unlock_irqrestore(&asic3_gpio_lock, flags);
4346+}
4347+EXPORT_SYMBOL(asic3_set_sdhwctrl);
4348+
4349+
4350+#define MAX_ASIC_ISR_LOOPS 20
4351+#define _IPAQ_ASIC3_GPIO_Base_INCR \
4352+ (_IPAQ_ASIC3_GPIO_B_Base - _IPAQ_ASIC3_GPIO_A_Base)
4353+
4354+static inline void asic3_irq_flip_edge(struct asic3_data *asic,
4355+ u32 base, int bit)
4356+{
4357+ u16 edge = __asic3_read_register(asic,
4358+ base + _IPAQ_ASIC3_GPIO_EdgeTrigger);
4359+ edge ^= bit;
4360+ __asic3_write_register(asic,
4361+ base + _IPAQ_ASIC3_GPIO_EdgeTrigger, edge);
4362+}
4363+
4364+static void asic3_irq_demux(unsigned int irq, struct irq_desc *desc)
4365+{
4366+ int iter;
4367+ struct asic3_data *asic;
4368+
4369+ /* Acknowledge the parrent (i.e. CPU's) IRQ */
4370+ desc->chip->ack(irq);
4371+
4372+ asic = desc->handler_data;
4373+
4374+ /* printk( KERN_NOTICE "asic3_irq_demux: irq=%d\n", irq ); */
4375+ for (iter = 0 ; iter < MAX_ASIC_ISR_LOOPS; iter++) {
4376+ u32 status;
4377+ int bank;
4378+
4379+ status = __asic3_read_register(asic,
4380+ IPAQ_ASIC3_OFFSET(INTR, PIntStat));
4381+ /* Check all ten register bits */
4382+ if ((status & 0x3ff) == 0)
4383+ break;
4384+
4385+ /* Handle GPIO IRQs */
4386+ for (bank = 0; bank < 4; bank++) {
4387+ if (status & (1 << bank)) {
4388+ unsigned long base, i, istat;
4389+
4390+ base = _IPAQ_ASIC3_GPIO_A_Base
4391+ + bank * _IPAQ_ASIC3_GPIO_Base_INCR;
4392+ istat = __asic3_read_register(asic,
4393+ base + _IPAQ_ASIC3_GPIO_IntStatus);
4394+ /* IntStatus is write 0 to clear */
4395+ /* XXX could miss interrupts! */
4396+ __asic3_write_register(asic,
4397+ base + _IPAQ_ASIC3_GPIO_IntStatus, 0);
4398+
4399+ for (i = 0; i < 16; i++) {
4400+ int bit = (1 << i);
4401+ unsigned int irqnr;
4402+ if (!(istat & bit))
4403+ continue;
4404+
4405+ irqnr = asic->irq_base
4406+ + (16 * bank) + i;
4407+ desc = irq_desc + irqnr;
4408+ desc->handle_irq(irqnr, desc);
4409+ if (asic->irq_bothedge[bank] & bit) {
4410+ asic3_irq_flip_edge(asic, base,
4411+ bit);
4412+ }
4413+ }
4414+ }
4415+ }
4416+
4417+ /* Handle remaining IRQs in the status register */
4418+ {
4419+ int i;
4420+
4421+ for (i = ASIC3_LED0_IRQ; i <= ASIC3_OWM_IRQ; i++) {
4422+ /* They start at bit 4 and go up */
4423+ if (status & (1 << (i - ASIC3_LED0_IRQ + 4))) {
4424+ desc = irq_desc + asic->irq_base + i;
4425+ desc->handle_irq(asic->irq_base + i,
4426+ desc);
4427+ }
4428+ }
4429+ }
4430+
4431+ }
4432+
4433+ if (iter >= MAX_ASIC_ISR_LOOPS)
4434+ printk(KERN_ERR "%s: interrupt processing overrun\n",
4435+ __FUNCTION__);
4436+}
4437+
4438+static inline int asic3_irq_to_bank(struct asic3_data *asic, int irq)
4439+{
4440+ int n;
4441+
4442+ n = (irq - asic->irq_base) >> 4;
4443+
4444+ return (n * (_IPAQ_ASIC3_GPIO_B_Base - _IPAQ_ASIC3_GPIO_A_Base));
4445+}
4446+
4447+static inline int asic3_irq_to_index(struct asic3_data *asic, int irq)
4448+{
4449+ return (irq - asic->irq_base) & 15;
4450+}
4451+
4452+static void asic3_mask_gpio_irq(unsigned int irq)
4453+{
4454+ struct asic3_data *asic = get_irq_chip_data(irq);
4455+ u32 val, bank, index;
4456+ unsigned long flags;
4457+
4458+ bank = asic3_irq_to_bank(asic, irq);
4459+ index = asic3_irq_to_index(asic, irq);
4460+
4461+ spin_lock_irqsave(&asic3_gpio_lock, flags);
4462+ val = __asic3_read_register(asic, bank + _IPAQ_ASIC3_GPIO_Mask);
4463+ val |= 1 << index;
4464+ __asic3_write_register(asic, bank + _IPAQ_ASIC3_GPIO_Mask, val);
4465+ spin_unlock_irqrestore(&asic3_gpio_lock, flags);
4466+}
4467+
4468+static void asic3_mask_irq(unsigned int irq)
4469+{
4470+ struct asic3_data *asic = get_irq_chip_data(irq);
4471+ int regval;
4472+
4473+ if (irq < ASIC3_NR_GPIO_IRQS) {
4474+ printk(KERN_ERR "asic3_base: gpio mask attempt, irq %d\n",
4475+ irq);
4476+ return;
4477+ }
4478+
4479+ regval = __asic3_read_register(asic,
4480+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask);
4481+
4482+ switch (irq - asic->irq_base) {
4483+ case ASIC3_LED0_IRQ:
4484+ __asic3_write_register(asic,
4485+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4486+ regval & ~ASIC3_INTMASK_MASK0);
4487+ break;
4488+ case ASIC3_LED1_IRQ:
4489+ __asic3_write_register(asic,
4490+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4491+ regval & ~ASIC3_INTMASK_MASK1);
4492+ break;
4493+ case ASIC3_LED2_IRQ:
4494+ __asic3_write_register(asic,
4495+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4496+ regval & ~ASIC3_INTMASK_MASK2);
4497+ break;
4498+ case ASIC3_SPI_IRQ:
4499+ __asic3_write_register(asic,
4500+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4501+ regval & ~ASIC3_INTMASK_MASK3);
4502+ break;
4503+ case ASIC3_SMBUS_IRQ:
4504+ __asic3_write_register(asic,
4505+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4506+ regval & ~ASIC3_INTMASK_MASK4);
4507+ break;
4508+ case ASIC3_OWM_IRQ:
4509+ __asic3_write_register(asic,
4510+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4511+ regval & ~ASIC3_INTMASK_MASK5);
4512+ break;
4513+ default:
4514+ printk(KERN_ERR "asic3_base: bad non-gpio irq %d\n", irq);
4515+ break;
4516+ }
4517+}
4518+
4519+static void asic3_unmask_gpio_irq(unsigned int irq)
4520+{
4521+ struct asic3_data *asic = get_irq_chip_data(irq);
4522+ u32 val, bank, index;
4523+ unsigned long flags;
4524+
4525+ bank = asic3_irq_to_bank(asic, irq);
4526+ index = asic3_irq_to_index(asic, irq);
4527+
4528+ spin_lock_irqsave(&asic3_gpio_lock, flags);
4529+ val = __asic3_read_register(asic, bank + _IPAQ_ASIC3_GPIO_Mask);
4530+ val &= ~(1 << index);
4531+ __asic3_write_register(asic, bank + _IPAQ_ASIC3_GPIO_Mask, val);
4532+ spin_unlock_irqrestore(&asic3_gpio_lock, flags);
4533+}
4534+
4535+static void asic3_unmask_irq(unsigned int irq)
4536+{
4537+ struct asic3_data *asic = get_irq_chip_data(irq);
4538+ int regval;
4539+
4540+ if (irq < ASIC3_NR_GPIO_IRQS) {
4541+ printk(KERN_ERR "asic3_base: gpio unmask attempt, irq %d\n",
4542+ irq);
4543+ return;
4544+ }
4545+
4546+ regval = __asic3_read_register(asic,
4547+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask);
4548+
4549+ switch (irq - asic->irq_base) {
4550+ case ASIC3_LED0_IRQ:
4551+ __asic3_write_register(asic,
4552+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4553+ regval | ASIC3_INTMASK_MASK0);
4554+ break;
4555+ case ASIC3_LED1_IRQ:
4556+ __asic3_write_register(asic,
4557+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4558+ regval | ASIC3_INTMASK_MASK1);
4559+ break;
4560+ case ASIC3_LED2_IRQ:
4561+ __asic3_write_register(asic,
4562+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4563+ regval | ASIC3_INTMASK_MASK2);
4564+ break;
4565+ case ASIC3_SPI_IRQ:
4566+ __asic3_write_register(asic,
4567+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4568+ regval | ASIC3_INTMASK_MASK3);
4569+ break;
4570+ case ASIC3_SMBUS_IRQ:
4571+ __asic3_write_register(asic,
4572+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4573+ regval | ASIC3_INTMASK_MASK4);
4574+ break;
4575+ case ASIC3_OWM_IRQ:
4576+ __asic3_write_register(asic,
4577+ _IPAQ_ASIC3_INTR_Base + _IPAQ_ASIC3_INTR_IntMask,
4578+ regval | ASIC3_INTMASK_MASK5);
4579+ break;
4580+ default:
4581+ printk(KERN_ERR "asic3_base: bad non-gpio irq %d\n", irq);
4582+ break;
4583+ }
4584+}
4585+
4586+static int asic3_gpio_irq_type(unsigned int irq, unsigned int type)
4587+{
4588+ struct asic3_data *asic = get_irq_chip_data(irq);
4589+ u32 bank, index;
4590+ unsigned long flags;
4591+ u16 trigger, level, edge, bit;
4592+
4593+ bank = asic3_irq_to_bank(asic, irq);
4594+ index = asic3_irq_to_index(asic, irq);
4595+ bit = 1<<index;
4596+
4597+ spin_lock_irqsave(&asic3_gpio_lock, flags);
4598+ level = __asic3_read_register(asic,
4599+ bank + _IPAQ_ASIC3_GPIO_LevelTrigger);
4600+ edge = __asic3_read_register(asic,
4601+ bank + _IPAQ_ASIC3_GPIO_EdgeTrigger);
4602+ trigger = __asic3_read_register(asic,
4603+ bank + _IPAQ_ASIC3_GPIO_TriggerType);
4604+ asic->irq_bothedge[(irq - asic->irq_base) >> 4] &= ~bit;
4605+
4606+ if (type == IRQT_RISING) {
4607+ trigger |= bit;
4608+ edge |= bit;
4609+ } else if (type == IRQT_FALLING) {
4610+ trigger |= bit;
4611+ edge &= ~bit;
4612+ } else if (type == IRQT_BOTHEDGE) {
4613+ trigger |= bit;
4614+ if (asic3_gpio_get_value(asic->dev, irq - asic->irq_base))
4615+ edge &= ~bit;
4616+ else
4617+ edge |= bit;
4618+ asic->irq_bothedge[(irq - asic->irq_base) >> 4] |= bit;
4619+ } else if (type == IRQT_LOW) {
4620+ trigger &= ~bit;
4621+ level &= ~bit;
4622+ } else if (type == IRQT_HIGH) {
4623+ trigger &= ~bit;
4624+ level |= bit;
4625+ } else {
4626+ /*
4627+ * if type == IRQT_NOEDGE, we should mask interrupts, but
4628+ * be careful to not unmask them if mask was also called.
4629+ * Probably need internal state for mask.
4630+ */
4631+ printk(KERN_NOTICE "asic3: irq type not changed.\n");
4632+ }
4633+ __asic3_write_register(asic, bank + _IPAQ_ASIC3_GPIO_LevelTrigger,
4634+ level);
4635+ __asic3_write_register(asic, bank + _IPAQ_ASIC3_GPIO_EdgeTrigger,
4636+ edge);
4637+ __asic3_write_register(asic, bank + _IPAQ_ASIC3_GPIO_TriggerType,
4638+ trigger);
4639+ spin_unlock_irqrestore(&asic3_gpio_lock, flags);
4640+ return 0;
4641+}
4642+
4643+static struct irq_chip asic3_gpio_irq_chip = {
4644+ .name = "ASIC3-GPIO",
4645+ .ack = asic3_mask_gpio_irq,
4646+ .mask = asic3_mask_gpio_irq,
4647+ .unmask = asic3_unmask_gpio_irq,
4648+ .set_type = asic3_gpio_irq_type,
4649+};
4650+
4651+static struct irq_chip asic3_irq_chip = {
4652+ .name = "ASIC3",
4653+ .ack = asic3_mask_irq,
4654+ .mask = asic3_mask_irq,
4655+ .unmask = asic3_unmask_irq,
4656+};
4657+
4658+static void asic3_release(struct device *dev)
4659+{
4660+ struct platform_device *sdev = to_platform_device(dev);
4661+
4662+ kfree(sdev->resource);
4663+ kfree(sdev);
4664+}
4665+
4666+int asic3_register_mmc(struct device *dev)
4667+{
4668+ struct platform_device *sdev = kzalloc(sizeof(*sdev), GFP_KERNEL);
4669+ struct tmio_mmc_hwconfig *mmc_config = kmalloc(sizeof(*mmc_config),
4670+ GFP_KERNEL);
4671+ struct platform_device *pdev = to_platform_device(dev);
4672+ struct asic3_data *asic = dev->driver_data;
4673+ struct asic3_platform_data *asic3_pdata = dev->platform_data;
4674+ struct resource *res;
4675+ int rc;
4676+
4677+ if (sdev == NULL || mmc_config == NULL)
4678+ return -ENOMEM;
4679+
4680+ if (asic3_pdata->tmio_mmc_hwconfig) {
4681+ memcpy(mmc_config, asic3_pdata->tmio_mmc_hwconfig,
4682+ sizeof(*mmc_config));
4683+ } else {
4684+ memset(mmc_config, 0, sizeof(*mmc_config));
4685+ }
4686+ mmc_config->address_shift = asic->bus_shift;
4687+
4688+ sdev->id = -1;
4689+ sdev->name = "asic3_mmc";
4690+ sdev->dev.parent = dev;
4691+ sdev->num_resources = 2;
4692+ sdev->dev.platform_data = mmc_config;
4693+ sdev->dev.release = asic3_release;
4694+
4695+ res = kzalloc(sdev->num_resources * sizeof(struct resource),
4696+ GFP_KERNEL);
4697+ if (res == NULL) {
4698+ kfree(sdev);
4699+ kfree(mmc_config);
4700+ return -ENOMEM;
4701+ }
4702+ sdev->resource = res;
4703+
4704+ res[0].start = pdev->resource[2].start;
4705+ res[0].end = pdev->resource[2].end;
4706+ res[0].flags = IORESOURCE_MEM;
4707+ res[1].start = res[1].end = pdev->resource[3].start;
4708+ res[1].flags = IORESOURCE_IRQ;
4709+
4710+ rc = platform_device_register(sdev);
4711+ if (rc) {
4712+ printk(KERN_ERR "asic3_base: "
4713+ "Could not register asic3_mmc device\n");
4714+ kfree(res);
4715+ kfree(sdev);
4716+ return rc;
4717+ }
4718+
4719+ asic->mmc_dev = sdev;
4720+
4721+ return 0;
4722+}
4723+EXPORT_SYMBOL(asic3_register_mmc);
4724+
4725+int asic3_unregister_mmc(struct device *dev)
4726+{
4727+ struct asic3_data *asic = dev->driver_data;
4728+ platform_device_unregister(asic->mmc_dev);
4729+ asic->mmc_dev = 0;
4730+
4731+ return 0;
4732+}
4733+EXPORT_SYMBOL(asic3_unregister_mmc);
4734+
4735+#ifdef CONFIG_HTC_ASIC3_DS1WM
4736+/*
4737+ * DS1WM subdevice
4738+ */
4739+
4740+static void asic3_ds1wm_enable(struct platform_device *ds1wm_dev)
4741+{
4742+ struct device *dev = ds1wm_dev->dev.parent;
4743+
4744+ /* Turn on external clocks and the OWM clock */
4745+ asic3_set_clock_cdex(dev,
4746+ CLOCK_CDEX_EX0 | CLOCK_CDEX_EX1 | CLOCK_CDEX_OWM,
4747+ CLOCK_CDEX_EX0 | CLOCK_CDEX_EX1 | CLOCK_CDEX_OWM);
4748+
4749+ mdelay(1);
4750+
4751+ asic3_set_extcf_reset(dev, ASIC3_EXTCF_OWM_RESET,
4752+ ASIC3_EXTCF_OWM_RESET);
4753+ mdelay(1);
4754+ asic3_set_extcf_reset(dev, ASIC3_EXTCF_OWM_RESET, 0);
4755+ mdelay(1);
4756+
4757+ /* Clear OWM_SMB, set OWM_EN */
4758+ asic3_set_extcf_select(dev,
4759+ ASIC3_EXTCF_OWM_SMB | ASIC3_EXTCF_OWM_EN,
4760+ 0 | ASIC3_EXTCF_OWM_EN);
4761+
4762+ mdelay(1);
4763+}
4764+
4765+static void asic3_ds1wm_disable(struct platform_device *ds1wm_dev)
4766+{
4767+ struct device *dev = ds1wm_dev->dev.parent;
4768+
4769+ asic3_set_extcf_select(dev,
4770+ ASIC3_EXTCF_OWM_SMB | ASIC3_EXTCF_OWM_EN,
4771+ 0 | 0);
4772+
4773+ asic3_set_clock_cdex(dev,
4774+ CLOCK_CDEX_EX0 | CLOCK_CDEX_EX1 | CLOCK_CDEX_OWM,
4775+ CLOCK_CDEX_EX0 | CLOCK_CDEX_EX1 | 0);
4776+}
4777+
4778+
4779+static struct resource asic3_ds1wm_resources[] = {
4780+ {
4781+ .start = _IPAQ_ASIC3_OWM_Base,
4782+ .end = _IPAQ_ASIC3_OWM_Base + 0x14 - 1,
4783+ .flags = IORESOURCE_MEM,
4784+ },
4785+ {
4786+ .start = ASIC3_OWM_IRQ,
4787+ .end = ASIC3_OWM_IRQ,
4788+ .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
4789+ IORESOURCE_IRQ_SOC_SUBDEVICE,
4790+ },
4791+};
4792+
4793+static struct ds1wm_platform_data ds1wm_pd = {
4794+ .enable = asic3_ds1wm_enable,
4795+ .disable = asic3_ds1wm_disable,
4796+};
4797+#endif
4798+
4799+static struct soc_device_data asic3_blocks[] = {
4800+#ifdef CONFIG_HTC_ASIC3_DS1WM
4801+ {
4802+ .name = "ds1wm",
4803+ .res = asic3_ds1wm_resources,
4804+ .num_resources = ARRAY_SIZE(asic3_ds1wm_resources),
4805+ .hwconfig = &ds1wm_pd,
4806+ },
4807+#endif
4808+};
4809+
4810+static int asic3_probe(struct platform_device *pdev)
4811+{
4812+ struct asic3_platform_data *pdata = pdev->dev.platform_data;
4813+ struct asic3_data *asic;
4814+ struct device *dev = &pdev->dev;
4815+ unsigned long clksel;
4816+ int i, rc;
4817+
4818+ asic = kzalloc(sizeof(struct asic3_data), GFP_KERNEL);
4819+ if (!asic)
4820+ return -ENOMEM;
4821+
4822+ platform_set_drvdata(pdev, asic);
4823+ asic->dev = &pdev->dev;
4824+
4825+ asic->mapping = ioremap(pdev->resource[0].start, IPAQ_ASIC3_MAP_SIZE);
4826+ if (!asic->mapping) {
4827+ printk(KERN_ERR "asic3: couldn't ioremap ASIC3\n");
4828+ kfree (asic);
4829+ return -ENOMEM;
4830+ }
4831+
4832+ if (pdata && pdata->bus_shift)
4833+ asic->bus_shift = pdata->bus_shift;
4834+ else
4835+ asic->bus_shift = 2;
4836+
4837+ /* XXX: should get correct SD clock values from pdata struct */
4838+ clksel = 0;
4839+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, SEL), clksel);
4840+
4841+ /* Register ASIC3's clocks. */
4842+ clk_g.ctrlbit = (int)asic;
4843+
4844+ if (clk_register(&clk_g) < 0)
4845+ printk(KERN_ERR "asic3: failed to register ASIC3 gclk\n");
4846+
4847+ for (i = 0; i < ARRAY_SIZE(asic3_clocks); i++) {
4848+ rc = clk_register(&asic3_clocks[i]);
4849+ if (rc < 0)
4850+ printk(KERN_ERR "asic3: "
4851+ "failed to register clock %s (%d)\n",
4852+ asic3_clocks[i].name, rc);
4853+ }
4854+
4855+ __asic3_write_register(asic, IPAQ_ASIC3_GPIO_OFFSET(A, Mask), 0xffff);
4856+ __asic3_write_register(asic, IPAQ_ASIC3_GPIO_OFFSET(B, Mask), 0xffff);
4857+ __asic3_write_register(asic, IPAQ_ASIC3_GPIO_OFFSET(C, Mask), 0xffff);
4858+ __asic3_write_register(asic, IPAQ_ASIC3_GPIO_OFFSET(D, Mask), 0xffff);
4859+
4860+ asic3_set_gpio_sleepmask_a(dev, 0xffff, 0xffff);
4861+ asic3_set_gpio_sleepmask_b(dev, 0xffff, 0xffff);
4862+ asic3_set_gpio_sleepmask_c(dev, 0xffff, 0xffff);
4863+ asic3_set_gpio_sleepmask_d(dev, 0xffff, 0xffff);
4864+
4865+ if (pdata) {
4866+ asic3_set_gpio_out_a(dev, 0xffff, pdata->gpio_a.init);
4867+ asic3_set_gpio_out_b(dev, 0xffff, pdata->gpio_b.init);
4868+ asic3_set_gpio_out_c(dev, 0xffff, pdata->gpio_c.init);
4869+ asic3_set_gpio_out_d(dev, 0xffff, pdata->gpio_d.init);
4870+
4871+ asic3_set_gpio_dir_a(dev, 0xffff, pdata->gpio_a.dir);
4872+ asic3_set_gpio_dir_b(dev, 0xffff, pdata->gpio_b.dir);
4873+ asic3_set_gpio_dir_c(dev, 0xffff, pdata->gpio_c.dir);
4874+ asic3_set_gpio_dir_d(dev, 0xffff, pdata->gpio_d.dir);
4875+
4876+ asic3_set_gpio_sleepmask_a(dev, 0xffff,
4877+ pdata->gpio_a.sleep_mask);
4878+ asic3_set_gpio_sleepmask_b(dev, 0xffff,
4879+ pdata->gpio_b.sleep_mask);
4880+ asic3_set_gpio_sleepmask_c(dev, 0xffff,
4881+ pdata->gpio_c.sleep_mask);
4882+ asic3_set_gpio_sleepmask_d(dev, 0xffff,
4883+ pdata->gpio_d.sleep_mask);
4884+
4885+ asic3_set_gpio_sleepout_a(dev, 0xffff,
4886+ pdata->gpio_a.sleep_out);
4887+ asic3_set_gpio_sleepout_b(dev, 0xffff,
4888+ pdata->gpio_b.sleep_out);
4889+ asic3_set_gpio_sleepout_c(dev, 0xffff,
4890+ pdata->gpio_c.sleep_out);
4891+ asic3_set_gpio_sleepout_d(dev, 0xffff,
4892+ pdata->gpio_d.sleep_out);
4893+
4894+ asic3_set_gpio_battfaultout_a(dev, 0xffff,
4895+ pdata->gpio_a.batt_fault_out);
4896+ asic3_set_gpio_battfaultout_b(dev, 0xffff,
4897+ pdata->gpio_b.batt_fault_out);
4898+ asic3_set_gpio_battfaultout_c(dev, 0xffff,
4899+ pdata->gpio_c.batt_fault_out);
4900+ asic3_set_gpio_battfaultout_d(dev, 0xffff,
4901+ pdata->gpio_d.batt_fault_out);
4902+
4903+ asic3_set_gpio_sleepconf_a(dev, 0xffff,
4904+ pdata->gpio_a.sleep_conf);
4905+ asic3_set_gpio_sleepconf_b(dev, 0xffff,
4906+ pdata->gpio_b.sleep_conf);
4907+ asic3_set_gpio_sleepconf_c(dev, 0xffff,
4908+ pdata->gpio_c.sleep_conf);
4909+ asic3_set_gpio_sleepconf_d(dev, 0xffff,
4910+ pdata->gpio_d.sleep_conf);
4911+
4912+ asic3_set_gpio_alt_fn_a(dev, 0xffff,
4913+ pdata->gpio_a.alt_function);
4914+ asic3_set_gpio_alt_fn_b(dev, 0xffff,
4915+ pdata->gpio_b.alt_function);
4916+ asic3_set_gpio_alt_fn_c(dev, 0xffff,
4917+ pdata->gpio_c.alt_function);
4918+ asic3_set_gpio_alt_fn_d(dev, 0xffff,
4919+ pdata->gpio_d.alt_function);
4920+ }
4921+
4922+ asic->irq_nr = -1;
4923+ asic->irq_base = -1;
4924+
4925+ if (pdev->num_resources > 1)
4926+ asic->irq_nr = pdev->resource[1].start;
4927+
4928+ if (asic->irq_nr != -1) {
4929+ unsigned int i;
4930+
4931+ if (!pdata->irq_base) {
4932+ printk(KERN_ERR "asic3: IRQ base not specified\n");
4933+ asic3_remove(pdev);
4934+ return -EINVAL;
4935+ }
4936+
4937+ asic->irq_base = pdata->irq_base;
4938+
4939+ /* turn on clock to IRQ controller */
4940+ clksel |= CLOCK_SEL_CX;
4941+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, SEL),
4942+ clksel);
4943+
4944+ printk(KERN_INFO "asic3: using irq %d-%d on irq %d\n",
4945+ asic->irq_base, asic->irq_base + ASIC3_NR_IRQS - 1,
4946+ asic->irq_nr);
4947+
4948+ for (i = 0 ; i < ASIC3_NR_IRQS ; i++) {
4949+ int irq = i + asic->irq_base;
4950+ if (i < ASIC3_NR_GPIO_IRQS) {
4951+ set_irq_chip(irq, &asic3_gpio_irq_chip);
4952+ set_irq_chip_data(irq, asic);
4953+ set_irq_handler(irq, handle_level_irq);
4954+ set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
4955+ } else {
4956+ /* The remaining IRQs are not GPIO */
4957+ set_irq_chip(irq, &asic3_irq_chip);
4958+ set_irq_chip_data(irq, asic);
4959+ set_irq_handler(irq, handle_level_irq);
4960+ set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
4961+ }
4962+ }
4963+
4964+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(INTR, IntMask),
4965+ ASIC3_INTMASK_GINTMASK);
4966+
4967+ set_irq_chained_handler(asic->irq_nr, asic3_irq_demux);
4968+ set_irq_type(asic->irq_nr, IRQT_RISING);
4969+ set_irq_data(asic->irq_nr, asic);
4970+ }
4971+
4972+#ifdef CONFIG_HTC_ASIC3_DS1WM
4973+ ds1wm_pd.bus_shift = asic->bus_shift;
4974+#endif
4975+
4976+ pdata->gpiodev_ops.get = asic3_gpio_get_value;
4977+ pdata->gpiodev_ops.set = asic3_gpio_set_value;
4978+ pdata->gpiodev_ops.to_irq = asic3_gpio_to_irq;
4979+
4980+ soc_add_devices(pdev, asic3_blocks, ARRAY_SIZE(asic3_blocks),
4981+ &pdev->resource[0],
4982+ asic->bus_shift - ASIC3_DEFAULT_ADDR_SHIFT,
4983+ asic->irq_base);
4984+
4985+ if (pdev->num_resources > 2) {
4986+ int rc;
4987+ rc = asic3_register_mmc(dev);
4988+ if (rc) {
4989+ asic3_remove(pdev);
4990+ return rc;
4991+ }
4992+ }
4993+
4994+ if (pdata && pdata->num_child_platform_devs != 0)
4995+ platform_add_devices(pdata->child_platform_devs,
4996+ pdata->num_child_platform_devs);
4997+
4998+ return 0;
4999+}
5000+
5001+static int asic3_remove(struct platform_device *pdev)
5002+{
5003+ struct asic3_platform_data *pdata = pdev->dev.platform_data;
5004+ struct asic3_data *asic = platform_get_drvdata(pdev);
5005+ int i;
5006+
5007+ if (pdata && pdata->num_child_platform_devs != 0) {
5008+ for (i = 0; i < pdata->num_child_platform_devs; i++) {
5009+ platform_device_unregister(
5010+ pdata->child_platform_devs[i]);
5011+ }
5012+ }
5013+
5014+ if (asic->irq_nr != -1) {
5015+ unsigned int i;
5016+
5017+ for (i = 0 ; i < ASIC3_NR_IRQS ; i++) {
5018+ int irq = i + asic->irq_base;
5019+ set_irq_flags(irq, 0);
5020+ set_irq_handler (irq, NULL);
5021+ set_irq_chip (irq, NULL);
5022+ set_irq_chip_data(irq, NULL);
5023+ }
5024+
5025+ set_irq_chained_handler(asic->irq_nr, NULL);
5026+ }
5027+
5028+ if (asic->mmc_dev)
5029+ asic3_unregister_mmc(&pdev->dev);
5030+
5031+ for (i = 0; i < ARRAY_SIZE(asic3_clocks); i++)
5032+ clk_unregister(&asic3_clocks[i]);
5033+ clk_unregister(&clk_g);
5034+
5035+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, SEL), 0);
5036+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(INTR, IntMask), 0);
5037+
5038+ iounmap(asic->mapping);
5039+
5040+ kfree(asic);
5041+
5042+ return 0;
5043+}
5044+
5045+static void asic3_shutdown(struct platform_device *pdev)
5046+{
5047+}
5048+
5049+#define ASIC3_SUSPEND_CDEX_MASK \
5050+ (CLOCK_CDEX_LED0 | CLOCK_CDEX_LED1 | CLOCK_CDEX_LED2)
5051+static unsigned short suspend_cdex;
5052+
5053+static int asic3_suspend(struct platform_device *pdev, pm_message_t state)
5054+{
5055+ struct asic3_data *asic = platform_get_drvdata(pdev);
5056+ suspend_cdex = __asic3_read_register(asic,
5057+ _IPAQ_ASIC3_CLOCK_Base + _IPAQ_ASIC3_CLOCK_CDEX);
5058+ /* The LEDs are still active during suspend */
5059+ __asic3_write_register(asic,
5060+ _IPAQ_ASIC3_CLOCK_Base + _IPAQ_ASIC3_CLOCK_CDEX,
5061+ suspend_cdex & ASIC3_SUSPEND_CDEX_MASK);
5062+ return 0;
5063+}
5064+
5065+static int asic3_resume(struct platform_device *pdev)
5066+{
5067+ struct asic3_data *asic = platform_get_drvdata(pdev);
5068+ unsigned short intmask;
5069+
5070+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(CLOCK, CDEX),
5071+ suspend_cdex);
5072+
5073+ if (asic->irq_nr != -1) {
5074+ /* Toggle the interrupt mask to try to get ASIC3 to show
5075+ * the CPU an interrupt edge. For more details see the
5076+ * kernel-discuss thread around 13 June 2005 with the
5077+ * subject "asic3 suspend / resume". */
5078+ intmask = __asic3_read_register(asic,
5079+ IPAQ_ASIC3_OFFSET(INTR, IntMask));
5080+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(INTR, IntMask),
5081+ intmask & ~ASIC3_INTMASK_GINTMASK);
5082+ mdelay(1);
5083+ __asic3_write_register(asic, IPAQ_ASIC3_OFFSET(INTR, IntMask),
5084+ intmask | ASIC3_INTMASK_GINTMASK);
5085+ }
5086+
5087+ return 0;
5088+}
5089+
5090+static struct platform_driver asic3_device_driver = {
5091+ .driver = {
5092+ .name = "asic3",
5093+ },
5094+ .probe = asic3_probe,
5095+ .remove = asic3_remove,
5096+ .suspend = asic3_suspend,
5097+ .resume = asic3_resume,
5098+ .shutdown = asic3_shutdown,
5099+};
5100+
5101+static int __init asic3_base_init(void)
5102+{
5103+ int retval = 0;
5104+ retval = platform_driver_register(&asic3_device_driver);
5105+ return retval;
5106+}
5107+
5108+static void __exit asic3_base_exit(void)
5109+{
5110+ platform_driver_unregister(&asic3_device_driver);
5111+}
5112+
5113+#ifdef MODULE
5114+module_init(asic3_base_init);
5115+#else /* start early for dependencies */
5116+subsys_initcall(asic3_base_init);
5117+#endif
5118+module_exit(asic3_base_exit);
5119+
5120+MODULE_LICENSE("GPL");
5121+MODULE_AUTHOR("Phil Blundell <pb@handhelds.org>");
5122+MODULE_DESCRIPTION("Core driver for HTC ASIC3");
5123+MODULE_SUPPORTED_DEVICE("asic3");
5124Index: linux-2.6.22/drivers/mfd/soc-core.c
5125===================================================================
5126--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5127+++ linux-2.6.22/drivers/mfd/soc-core.c 2007-07-19 11:41:55.000000000 +0100
5128@@ -0,0 +1,106 @@
5129+/*
5130+ * drivers/soc/soc-core.c
5131+ *
5132+ * core SoC support
5133+ * Copyright (c) 2006 Ian Molton
5134+ *
5135+ * This program is free software; you can redistribute it and/or modify
5136+ * it under the terms of the GNU General Public License version 2 as
5137+ * published by the Free Software Foundation.
5138+ *
5139+ * This file contains functionality used by many SoC type devices.
5140+ *
5141+ * Created: 2006-11-28
5142+ *
5143+ */
5144+
5145+#include <linux/ioport.h>
5146+#include <linux/slab.h>
5147+#include <linux/kernel.h>
5148+#include <linux/platform_device.h>
5149+#include "soc-core.h"
5150+
5151+void soc_free_devices(struct platform_device *devices, int nr_devs)
5152+{
5153+ struct platform_device *dev = devices;
5154+ int i;
5155+
5156+ for (i = 0; i < nr_devs; i++) {
5157+ struct resource *res = dev->resource;
5158+ platform_device_unregister(dev++);
5159+ kfree(res);
5160+ }
5161+ kfree(devices);
5162+}
5163+EXPORT_SYMBOL_GPL(soc_free_devices);
5164+
5165+#define SIGNED_SHIFT(val, shift) ((shift) >= 0 ? ((val) << (shift)) : ((val) >> -(shift)))
5166+
5167+struct platform_device *soc_add_devices(struct platform_device *dev,
5168+ struct soc_device_data *soc, int nr_devs,
5169+ struct resource *mem,
5170+ int relative_addr_shift, int irq_base)
5171+{
5172+ struct platform_device *devices;
5173+ int i, r, base;
5174+
5175+ devices = kzalloc(nr_devs * sizeof(struct platform_device), GFP_KERNEL);
5176+ if (!devices)
5177+ return NULL;
5178+
5179+ for (i = 0; i < nr_devs; i++) {
5180+ struct platform_device *sdev = &devices[i];
5181+ struct soc_device_data *blk = &soc[i];
5182+ struct resource *res;
5183+
5184+ sdev->id = -1;
5185+ sdev->name = blk->name;
5186+
5187+ sdev->dev.parent = &dev->dev;
5188+ sdev->dev.platform_data = (void *)blk->hwconfig;
5189+ sdev->num_resources = blk->num_resources;
5190+
5191+ /* Allocate space for the subdevice resources */
5192+ res = kzalloc (blk->num_resources * sizeof (struct resource), GFP_KERNEL);
5193+ if (!res)
5194+ goto fail;
5195+
5196+ for (r = 0 ; r < blk->num_resources ; r++) {
5197+ res[r].name = blk->res[r].name; // Fixme - should copy
5198+
5199+ /* Find out base to use */
5200+ base = 0;
5201+ if (blk->res[r].flags & IORESOURCE_MEM) {
5202+ base = mem->start;
5203+ } else if ((blk->res[r].flags & IORESOURCE_IRQ) &&
5204+ (blk->res[r].flags & IORESOURCE_IRQ_SOC_SUBDEVICE)) {
5205+ base = irq_base;
5206+ }
5207+
5208+ /* Adjust resource */
5209+ if (blk->res[r].flags & IORESOURCE_MEM) {
5210+ res[r].parent = mem;
5211+ res[r].start = base + SIGNED_SHIFT(blk->res[r].start, relative_addr_shift);
5212+ res[r].end = base + SIGNED_SHIFT(blk->res[r].end, relative_addr_shift);
5213+ } else {
5214+ res[r].start = base + blk->res[r].start;
5215+ res[r].end = base + blk->res[r].end;
5216+ }
5217+ res[r].flags = blk->res[r].flags;
5218+ }
5219+
5220+ sdev->resource = res;
5221+ if (platform_device_register(sdev)) {
5222+ kfree(res);
5223+ goto fail;
5224+ }
5225+
5226+ printk(KERN_INFO "SoC: registering %s\n", blk->name);
5227+ }
5228+ return devices;
5229+
5230+fail:
5231+ soc_free_devices(devices, i + 1);
5232+ return NULL;
5233+}
5234+EXPORT_SYMBOL_GPL(soc_add_devices);
5235Index: linux-2.6.22/drivers/mfd/soc-core.h
5236===================================================================
5237--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5238+++ linux-2.6.22/drivers/mfd/soc-core.h 2007-07-19 11:41:55.000000000 +0100
5239@@ -0,0 +1,30 @@
5240+/*
5241+ * drivers/soc/soc-core.h
5242+ *
5243+ * core SoC support
5244+ * Copyright (c) 2006 Ian Molton
5245+ *
5246+ * This program is free software; you can redistribute it and/or modify
5247+ * it under the terms of the GNU General Public License version 2 as
5248+ * published by the Free Software Foundation.
5249+ *
5250+ * This file contains prototypes for the functions in soc-core.c
5251+ *
5252+ * Created: 2006-11-28
5253+ *
5254+ */
5255+
5256+struct soc_device_data {
5257+ char *name;
5258+ struct resource *res;
5259+ int num_resources;
5260+ void *hwconfig; /* platform_data to pass to the subdevice */
5261+};
5262+
5263+struct platform_device *soc_add_devices(struct platform_device *dev,
5264+ struct soc_device_data *soc, int n_devs,
5265+ struct resource *mem,
5266+ int relative_addr_shift, int irq_base);
5267+
5268+void soc_free_devices(struct platform_device *devices, int nr_devs);
5269+
5270Index: linux-2.6.22/include/asm-arm/arch-pxa/clock.h
5271===================================================================
5272--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5273+++ linux-2.6.22/include/asm-arm/arch-pxa/clock.h 2007-07-19 11:41:55.000000000 +0100
5274@@ -0,0 +1,27 @@
5275+/*
5276+ * linux/include/asm-arm/arch-pxa/clock.h
5277+ *
5278+ * Copyright (C) 2006 Erik Hovland
5279+ *
5280+ * This program is free software; you can redistribute it and/or modify
5281+ * it under the terms of the GNU General Public License version 2 as
5282+ * published by the Free Software Foundation.
5283+ */
5284+
5285+struct clk {
5286+ struct list_head node;
5287+ struct module *owner;
5288+ struct clk *parent;
5289+ const char *name;
5290+ int id;
5291+ unsigned int enabled;
5292+ unsigned long rate;
5293+ unsigned long ctrlbit;
5294+
5295+ void (*enable)(struct clk *);
5296+ void (*disable)(struct clk *);
5297+};
5298+
5299+
5300+extern int clk_register(struct clk *clk);
5301+extern void clk_unregister(struct clk *clk);
5302Index: linux-2.6.22/include/asm-arm/arch-pxa/htcuniversal-asic.h
5303===================================================================
5304--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5305+++ linux-2.6.22/include/asm-arm/arch-pxa/htcuniversal-asic.h 2007-07-19 11:41:55.000000000 +0100
5306@@ -0,0 +1,213 @@
5307+/*
5308+ * include/asm/arm/arch-pxa/htcuniversal-asic.h
5309+ *
5310+ * Authors: Giuseppe Zompatori <giuseppe_zompatori@yahoo.it>
5311+ *
5312+ * based on previews work, see below:
5313+ *
5314+ * include/asm/arm/arch-pxa/hx4700-asic.h
5315+ * Copyright (c) 2004 SDG Systems, LLC
5316+ *
5317+ */
5318+
5319+#ifndef _HTCUNIVERSAL_ASIC_H_
5320+#define _HTCUNIVERSAL_ASIC_H_
5321+
5322+#include <asm/hardware/ipaq-asic3.h>
5323+
5324+/* ASIC3 */
5325+
5326+#define HTCUNIVERSAL_ASIC3_GPIO_PHYS PXA_CS4_PHYS
5327+#define HTCUNIVERSAL_ASIC3_MMC_PHYS PXA_CS3_PHYS
5328+
5329+/* TODO: some information is missing here */
5330+
5331+/* ASIC3 GPIO A bank */
5332+
5333+#define GPIOA_I2C_EN 0 /* Output */
5334+#define GPIOA_SPK_PWR1_ON 1 /* Output */
5335+#define GPIOA_AUDIO_PWR_ON 2 /* Output */
5336+#define GPIOA_EARPHONE_PWR_ON 3 /* Output */
5337+
5338+#define GPIOA_UNKNOWN4 4 /* Output */
5339+#define GPIOA_BUTTON_BACKLIGHT_N 5 /* Input */
5340+#define GPIOA_SPK_PWR2_ON 6 /* Output */
5341+#define GPIOA_BUTTON_RECORD_N 7 /* Input */
5342+
5343+#define GPIOA_BUTTON_CAMERA_N 8 /* Input */
5344+#define GPIOA_UNKNOWN9 9 /* Output */
5345+#define GPIOA_FLASHLIGHT 10 /* Output */
5346+#define GPIOA_COVER_ROTATE_N 11 /* Input */
5347+
5348+#define GPIOA_TOUCHSCREEN_N 12 /* Input */
5349+#define GPIOA_VOL_UP_N 13 /* Input */
5350+#define GPIOA_VOL_DOWN_N 14 /* Input */
5351+#define GPIOA_LCD_PWR5_ON 15 /* Output */
5352+
5353+/* ASIC3 GPIO B bank */
5354+
5355+#define GPIOB_BB_READY 0 /* Input */
5356+#define GPIOB_CODEC_PDN 1 /* Output */
5357+#define GPIOB_UNKNOWN2 2 /* Input */
5358+#define GPIOB_BB_UNKNOWN3 3 /* Input */
5359+
5360+#define GPIOB_BT_IRQ 4 /* Input */
5361+#define GPIOB_CLAMSHELL_N 5 /* Input */
5362+#define GPIOB_LCD_PWR3_ON 6 /* Output */
5363+#define GPIOB_BB_ALERT 7 /* Input */
5364+
5365+#define GPIOB_BB_RESET2 8 /* Output */
5366+#define GPIOB_EARPHONE_N 9 /* Input */
5367+#define GPIOB_MICRECORD_N 10 /* Input */
5368+#define GPIOB_NIGHT_SENSOR 11 /* Input */
5369+
5370+#define GPIOB_UMTS_DCD 12 /* Input */
5371+#define GPIOB_UNKNOWN13 13 /* Input */
5372+#define GPIOB_CHARGE_EN 14 /* Output */
5373+#define GPIOB_USB_PUEN 15 /* Output */
5374+
5375+/* ASIC3 GPIO C bank */
5376+
5377+#define GPIOC_LED_BTWIFI 0 /* Output */
5378+#define GPIOC_LED_RED 1 /* Output */
5379+#define GPIOC_LED_GREEN 2 /* Output */
5380+#define GPIOC_BOARDID3 3 /* Input */
5381+
5382+#define GPIOC_WIFI_IRQ_N 4 /* Input */
5383+#define GPIOC_WIFI_RESET 5 /* Output */
5384+#define GPIOC_WIFI_PWR1_ON 6 /* Output */
5385+#define GPIOC_BT_RESET 7 /* Output */
5386+
5387+#define GPIOC_UNKNOWN8 8 /* Output */
5388+#define GPIOC_LCD_PWR1_ON 9 /* Output */
5389+#define GPIOC_LCD_PWR2_ON 10 /* Output */
5390+#define GPIOC_BOARDID2 11 /* Input */
5391+
5392+#define GPIOC_BOARDID1 12 /* Input */
5393+#define GPIOC_BOARDID0 13 /* Input */
5394+#define GPIOC_BT_PWR_ON 14 /* Output */
5395+#define GPIOC_CHARGE_ON 15 /* Output */
5396+
5397+/* ASIC3 GPIO D bank */
5398+
5399+#define GPIOD_KEY_OK_N 0 /* Input */
5400+#define GPIOD_KEY_RIGHT_N 1 /* Input */
5401+#define GPIOD_KEY_LEFT_N 2 /* Input */
5402+#define GPIOD_KEY_DOWN_N 3 /* Input */
5403+
5404+#define GPIOD_KEY_UP_N 4 /* Input */
5405+#define GPIOD_SDIO_DET 5 /* Input */
5406+#define GPIOD_WIFI_PWR2_ON 6 /* Output */
5407+#define GPIOD_HW_REBOOT 7 /* Output */
5408+
5409+#define GPIOD_BB_RESET1 8 /* Output */
5410+#define GPIOD_UNKNOWN9 9 /* Output */
5411+#define GPIOD_VIBRA_PWR_ON 10 /* Output */
5412+#define GPIOD_WIFI_PWR3_ON 11 /* Output */
5413+
5414+#define GPIOD_FL_PWR_ON 12 /* Output */
5415+#define GPIOD_LCD_PWR4_ON 13 /* Output */
5416+#define GPIOD_BL_KEYP_PWR_ON 14 /* Output */
5417+#define GPIOD_BL_KEYB_PWR_ON 15 /* Output */
5418+
5419+extern struct platform_device htcuniversal_asic3;
5420+
5421+/* ASIC3 GPIO A bank */
5422+
5423+#define GPIO_I2C_EN 0*16+GPIOA_I2C_EN
5424+#define GPIO_SPK_PWR1_ON 0*16+GPIOA_SPK_PWR1_ON
5425+#define GPIO_AUDIO_PWR_ON 0*16+GPIOA_AUDIO_PWR_ON
5426+#define GPIO_EARPHONE_PWR_ON 0*16+GPIOA_EARPHONE_PWR_ON
5427+
5428+#define GPIO_UNKNOWNA4 0*16+GPIOA_UNKNOWN4
5429+#define GPIO_BUTTON_BACKLIGHT_N 0*16+GPIOA_BUTTON_BACKLIGHT_N
5430+#define GPIO_SPK_PWR2_ON 0*16+GPIOA_SPK_PWR2_ON
5431+#define GPIO_BUTTON_RECORD_N 0*16+GPIOA_BUTTON_RECORD_N
5432+
5433+#define GPIO_BUTTON_CAMERA_N 0*16+GPIOA_BUTTON_CAMERA_N
5434+#define GPIO_UNKNOWNA9 0*16+GPIOA_UNKNOWN9
5435+#define GPIO_FLASHLIGHT 0*16+GPIOA_FLASHLIGHT
5436+#define GPIO_COVER_ROTATE_N 0*16+GPIOA_COVER_ROTATE_N
5437+
5438+#define GPIO_TOUCHSCREEN_N 0*16+GPIOA_TOUCHSCREEN_N
5439+#define GPIO_VOL_UP_N 0*16+GPIOA_VOL_UP_N
5440+#define GPIO_VOL_DOWN_N 0*16+GPIOA_VOL_DOWN_N
5441+#define GPIO_LCD_PWR5_ON 0*16+GPIOA_LCD_PWR5_ON
5442+
5443+/* ASIC3 GPIO B bank */
5444+
5445+#define GPIO_BB_READY 1*16+GPIOB_BB_READY
5446+#define GPIO_CODEC_PDN 1*16+GPIOB_CODEC_PDN
5447+#define GPIO_UNKNOWNB2 1*16+GPIOB_UNKNOWN2
5448+#define GPIO_BB_UNKNOWN3 1*16+GPIOB_BB_UNKNOWN3
5449+
5450+#define GPIO_BT_IRQ 1*16+GPIOB_BT_IRQ
5451+#define GPIO_CLAMSHELL_N 1*16+GPIOB_CLAMSHELL_N
5452+#define GPIO_LCD_PWR3_ON 1*16+GPIOB_LCD_PWR3_ON
5453+#define GPIO_BB_ALERT 1*16+GPIOB_BB_ALERT
5454+
5455+#define GPIO_BB_RESET2 1*16+GPIOB_BB_RESET2
5456+#define GPIO_EARPHONE_N 1*16+GPIOB_EARPHONE_N
5457+#define GPIO_MICRECORD_N 1*16+GPIOB_MICRECORD_N
5458+#define GPIO_NIGHT_SENSOR 1*16+GPIOB_NIGHT_SENSOR
5459+
5460+#define GPIO_UMTS_DCD 1*16+GPIOB_UMTS_DCD
5461+#define GPIO_UNKNOWNB13 1*16+GPIOB_UNKNOWN13
5462+#define GPIO_CHARGE_EN 1*16+GPIOB_CHARGE_EN
5463+#define GPIO_USB_PUEN 1*16+GPIOB_USB_PUEN
5464+
5465+/* ASIC3 GPIO C bank */
5466+
5467+#define GPIO_LED_BTWIFI 2*16+GPIOC_LED_BTWIFI
5468+#define GPIO_LED_RED 2*16+GPIOC_LED_RED
5469+#define GPIO_LED_GREEN 2*16+GPIOC_LED_GREEN
5470+#define GPIO_BOARDID3 2*16+GPIOC_BOARDID3
5471+
5472+#define GPIO_WIFI_IRQ_N 2*16+GPIOC_WIFI_IRQ_N
5473+#define GPIO_WIFI_RESET 2*16+GPIOC_WIFI_RESET
5474+#define GPIO_WIFI_PWR1_ON 2*16+GPIOC_WIFI_PWR1_ON
5475+#define GPIO_BT_RESET 2*16+GPIOC_BT_RESET
5476+
5477+#define GPIO_UNKNOWNC8 2*16+GPIOC_UNKNOWN8
5478+#define GPIO_LCD_PWR1_ON 2*16+GPIOC_LCD_PWR1_ON
5479+#define GPIO_LCD_PWR2_ON 2*16+GPIOC_LCD_PWR2_ON
5480+#define GPIO_BOARDID2 2*16+GPIOC_BOARDID2
5481+
5482+#define GPIO_BOARDID1 2*16+GPIOC_BOARDID1
5483+#define GPIO_BOARDID0 2*16+GPIOC_BOARDID0
5484+#define GPIO_BT_PWR_ON 2*16+GPIOC_BT_PWR_ON
5485+#define GPIO_CHARGE_ON 2*16+GPIOC_CHARGE_ON
5486+
5487+/* ASIC3 GPIO D bank */
5488+
5489+#define GPIO_KEY_OK_N 3*16+GPIOD_KEY_OK_N
5490+#define GPIO_KEY_RIGHT_N 3*16+GPIOD_KEY_RIGHT_N
5491+#define GPIO_KEY_LEFT_N 3*16+GPIOD_KEY_LEFT_N
5492+#define GPIO_KEY_DOWN_N 3*16+GPIOD_KEY_DOWN_N
5493+
5494+#define GPIO_KEY_UP_N 3*16+GPIOD_KEY_UP_N
5495+#define GPIO_SDIO_DET 3*16+GPIOD_SDIO_DET
5496+#define GPIO_WIFI_PWR2_ON 3*16+GPIOD_WIFI_PWR2_ON
5497+#define GPIO_HW_REBOOT 3*16+GPIOD_HW_REBOOT
5498+
5499+#define GPIO_BB_RESET1 3*16+GPIOD_BB_RESET1
5500+#define GPIO_UNKNOWND9 3*16+GPIOD_UNKNOWN9
5501+#define GPIO_VIBRA_PWR_ON 3*16+GPIOD_VIBRA_PWR_ON
5502+#define GPIO_WIFI_PWR3_ON 3*16+GPIOD_WIFI_PWR3_ON
5503+
5504+#define GPIO_FL_PWR_ON 3*16+GPIOD_FL_PWR_ON
5505+#define GPIO_LCD_PWR4_ON 3*16+GPIOD_LCD_PWR4_ON
5506+#define GPIO_BL_KEYP_PWR_ON 3*16+GPIOD_BL_KEYP_PWR_ON
5507+#define GPIO_BL_KEYB_PWR_ON 3*16+GPIOD_BL_KEYB_PWR_ON
5508+
5509+#define HTCUNIVERSAL_EGPIO_BASE PXA_CS2_PHYS+0x02000000
5510+
5511+#define EGPIO4_ON 4 /* something */
5512+#define EGPIO5_BT_3V3_ON 5 /* Bluetooth related */
5513+#define EGPIO6_WIFI_ON 6 /* WLAN related*/
5514+
5515+extern void htcuniversal_egpio_enable( u_int16_t bits );
5516+extern void htcuniversal_egpio_disable( u_int16_t bits );
5517+
5518+#endif /* _HTCUNIVERSAL_ASIC_H_ */
5519+
5520Index: linux-2.6.22/include/asm-arm/arch-pxa/htcuniversal-gpio.h
5521===================================================================
5522--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5523+++ linux-2.6.22/include/asm-arm/arch-pxa/htcuniversal-gpio.h 2007-07-19 11:41:55.000000000 +0100
5524@@ -0,0 +1,220 @@
5525+/*
5526+ * include/asm-arm/arch-pxa/htcuniversal-gpio.h
5527+ * History:
5528+ *
5529+ * 2004-12-10 Michael Opdenacker. Wrote down GPIO settings as identified by Jamey Hicks.
5530+ * Reused the h2200-gpio.h file as a template.
5531+ */
5532+
5533+#ifndef _HTCUNIVERSAL_GPIO_H_
5534+#define _HTCUNIVERSAL_GPIO_H_
5535+
5536+#include <asm/arch/pxa-regs.h>
5537+
5538+#define GET_HTCUNIVERSAL_GPIO(gpio) \
5539+ (GPLR(GPIO_NR_HTCUNIVERSAL_ ## gpio) & GPIO_bit(GPIO_NR_HTCUNIVERSAL_ ## gpio))
5540+
5541+#define SET_HTCUNIVERSAL_GPIO(gpio, setp) \
5542+do { \
5543+if (setp) \
5544+ GPSR(GPIO_NR_HTCUNIVERSAL_ ## gpio) = GPIO_bit(GPIO_NR_HTCUNIVERSAL_ ## gpio); \
5545+else \
5546+ GPCR(GPIO_NR_HTCUNIVERSAL_ ## gpio) = GPIO_bit(GPIO_NR_HTCUNIVERSAL_ ## gpio); \
5547+} while (0)
5548+
5549+#define SET_HTCUNIVERSAL_GPIO_N(gpio, setp) \
5550+do { \
5551+if (setp) \
5552+ GPCR(GPIO_NR_HTCUNIVERSAL_ ## gpio ## _N) = GPIO_bit(GPIO_NR_HTCUNIVERSAL_ ## gpio ## _N); \
5553+else \
5554+ GPSR(GPIO_NR_HTCUNIVERSAL_ ## gpio ## _N) = GPIO_bit(GPIO_NR_HTCUNIVERSAL_ ## gpio ## _N); \
5555+} while (0)
5556+
5557+#define HTCUNIVERSAL_IRQ(gpio) \
5558+ IRQ_GPIO(GPIO_NR_HTCUNIVERSAL_ ## gpio)
5559+
5560+#define GPIO_NR_HTCUNIVERSAL_KEY_ON_N 0
5561+#define GPIO_NR_HTCUNIVERSAL_GP_RST_N 1
5562+
5563+#define GPIO_NR_HTCUNIVERSAL_USB_DET 9
5564+#define GPIO_NR_HTCUNIVERSAL_POWER_DET 10
5565+
5566+#define GPIO_NR_HTCUNIVERSAL_CIF_DD7 12
5567+#define GPIO_NR_HTCUNIVERSAL_ASIC3_SDIO_INT_N 13
5568+#define GPIO_NR_HTCUNIVERSAL_ASIC3_EXT_INT 14
5569+#define GPIO_NR_HTCUNIVERSAL_CS1_N 15
5570+
5571+#define GPIO_NR_HTCUNIVERSAL_CIF_DD6 17
5572+#define GPIO_NR_HTCUNIVERSAL_RDY 18
5573+
5574+#define GPIO_NR_HTCUNIVERSAL_PHONE_START 19
5575+
5576+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT7 22
5577+#define GPIO_NR_HTCUNIVERSAL_SPI_CLK 23
5578+#define GPIO_NR_HTCUNIVERSAL_SPI_FRM 24
5579+#define GPIO_NR_HTCUNIVERSAL_SPI_DO 25
5580+#define GPIO_NR_HTCUNIVERSAL_SPI_DI 26
5581+
5582+#define GPIO_NR_HTCUNIVERSAL_CODEC_ON 27
5583+#define GPIO_NR_HTCUNIVERSAL_I2S_BCK 28
5584+#define GPIO_NR_HTCUNIVERSAL_I2S_DIN 29
5585+#define GPIO_NR_HTCUNIVERSAL_I2S_DOUT 30
5586+#define GPIO_NR_HTCUNIVERSAL_I2S_SYNC 31
5587+
5588+#define GPIO_NR_HTCUNIVERSAL_RS232_ON 32
5589+#define GPIO_NR_HTCUNIVERSAL_CS5_N 33
5590+
5591+#define GPIO_NR_HTCUNIVERSAL_PHONE_RXD 34
5592+#define GPIO_NR_HTCUNIVERSAL_PHONE_UART_CTS 35
5593+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN7 36
5594+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN3 37
5595+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN4 38
5596+#define GPIO_NR_HTCUNIVERSAL_PHONE_TXD 39
5597+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT6 40
5598+#define GPIO_NR_HTCUNIVERSAL_PHONE_UART_RTS 41
5599+#define GPIO_NR_HTCUNIVERSAL_BT_RXD 42
5600+#define GPIO_NR_HTCUNIVERSAL_BT_TXD 43
5601+#define GPIO_NR_HTCUNIVERSAL_BT_UART_CTS 44
5602+#define GPIO_NR_HTCUNIVERSAL_BT_UART_RTS 45
5603+
5604+#define GPIO_NR_HTCUNIVERSAL_SIR_RXD 42
5605+#define GPIO_NR_HTCUNIVERSAL_SIR_TXD 43
5606+
5607+#define GPIO_NR_HTCUNIVERSAL_POE_N 48
5608+#define GPIO_NR_HTCUNIVERSAL_PWE_N 49
5609+#define GPIO_NR_HTCUNIVERSAL_CIF_DD3 50
5610+#define GPIO_NR_HTCUNIVERSAL_CIF_DD2 51
5611+#define GPIO_NR_HTCUNIVERSAL_CIF_DD4 52
5612+
5613+#define GPIO_NR_HTCUNIVERSAL_CIF_MCLK 53
5614+#define GPIO_NR_HTCUNIVERSAL_CIF_PCLK 54
5615+#define GPIO_NR_HTCUNIVERSAL_CIF_DD1 55
5616+
5617+#define GPIO_NR_HTCUNIVERSAL_LDD0 58
5618+#define GPIO_NR_HTCUNIVERSAL_LDD1 59
5619+#define GPIO_NR_HTCUNIVERSAL_LDD2 60
5620+#define GPIO_NR_HTCUNIVERSAL_LDD3 61
5621+#define GPIO_NR_HTCUNIVERSAL_LDD4 62
5622+#define GPIO_NR_HTCUNIVERSAL_LDD5 63
5623+#define GPIO_NR_HTCUNIVERSAL_LDD6 64
5624+#define GPIO_NR_HTCUNIVERSAL_LDD7 65
5625+#define GPIO_NR_HTCUNIVERSAL_LDD8 66
5626+#define GPIO_NR_HTCUNIVERSAL_LDD9 67
5627+#define GPIO_NR_HTCUNIVERSAL_LDD10 68
5628+#define GPIO_NR_HTCUNIVERSAL_LDD11 69
5629+#define GPIO_NR_HTCUNIVERSAL_LDD12 70
5630+#define GPIO_NR_HTCUNIVERSAL_LDD13 71
5631+#define GPIO_NR_HTCUNIVERSAL_LDD14 72
5632+#define GPIO_NR_HTCUNIVERSAL_LDD15 73
5633+
5634+#define GPIO_NR_HTCUNIVERSAL_LFCLK_RD 74
5635+#define GPIO_NR_HTCUNIVERSAL_LFCLK_A0 75
5636+#define GPIO_NR_HTCUNIVERSAL_LFCLK_WR 76
5637+#define GPIO_NR_HTCUNIVERSAL_LBIAS 77
5638+
5639+#define GPIO_NR_HTCUNIVERSAL_CS2_N 78
5640+#define GPIO_NR_HTCUNIVERSAL_CS3_N 79
5641+#define GPIO_NR_HTCUNIVERSAL_CS4_N 80
5642+#define GPIO_NR_HTCUNIVERSAL_CIF_DD0 81
5643+#define GPIO_NR_HTCUNIVERSAL_CIF_DD5 82
5644+
5645+#define GPIO_NR_HTCUNIVERSAL_CIF_LV 84
5646+#define GPIO_NR_HTCUNIVERSAL_CIF_FV 85
5647+
5648+#define GPIO_NR_HTCUNIVERSAL_LCD1 86
5649+#define GPIO_NR_HTCUNIVERSAL_LCD2 87
5650+
5651+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN5 90
5652+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN6 91
5653+
5654+#define GPIO_NR_HTCUNIVERSAL_DREQ1 97
5655+
5656+#define GPIO_NR_HTCUNIVERSAL_PHONE_RESET 98
5657+
5658+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN0 100
5659+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN1 101
5660+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN2 102
5661+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT0 103
5662+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT1 104
5663+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT2 105
5664+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT3 106
5665+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT4 107
5666+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT5 108
5667+
5668+#define GPIO_NR_HTCUNIVERSAL_PHONE_UNKNOWN 109
5669+#define GPIO_NR_HTCUNIVERSAL_PHONE_OFF 110
5670+
5671+#define GPIO_NR_HTCUNIVERSAL_USB_PUEN 112
5672+#define GPIO_NR_HTCUNIVERSAL_I2S_SYSCLK 113
5673+
5674+#define GPIO_NR_HTCUNIVERSAL_PWM_OUT1 115
5675+
5676+#define GPIO_NR_HTCUNIVERSAL_I2C_SCL 117
5677+#define GPIO_NR_HTCUNIVERSAL_I2C_SDA 118
5678+
5679+#if 0
5680+#define GPIO_NR_HTCUNIVERSAL_CPU_BATT_FAULT_N
5681+#define GPIO_NR_HTCUNIVERSAL_ASIC3_RESET_N
5682+#define GPIO_NR_HTCUNIVERSAL_CHARGE_EN_N
5683+#define GPIO_NR_HTCUNIVERSAL_FLASH_VPEN
5684+#define GPIO_NR_HTCUNIVERSAL_BATT_OFF
5685+#define GPIO_NR_HTCUNIVERSAL_USB_CHARGE_RATE
5686+#define GPIO_NR_HTCUNIVERSAL_BL_DETECT_N
5687+#define GPIO_NR_HTCUNIVERSAL_CPU_HW_RESET_N
5688+#endif
5689+
5690+
5691+#define GPIO_NR_HTCUNIVERSAL_TOUCHSCREEN_SPI_CLK_MD (23 | GPIO_ALT_FN_2_OUT)
5692+#define GPIO_NR_HTCUNIVERSAL_TOUCHSCREEN_SPI_FRM_MD (24 | GPIO_ALT_FN_2_OUT)
5693+#define GPIO_NR_HTCUNIVERSAL_TOUCHSCREEN_SPI_DO_MD (25 | GPIO_ALT_FN_2_OUT)
5694+#define GPIO_NR_HTCUNIVERSAL_TOUCHSCREEN_SPI_DI_MD (26 | GPIO_ALT_FN_1_IN)
5695+
5696+#define GPIO_NR_HTCUNIVERSAL_I2S_BCK_MD (28 | GPIO_ALT_FN_1_OUT)
5697+#define GPIO_NR_HTCUNIVERSAL_I2S_DIN_MD (29 | GPIO_ALT_FN_2_IN)
5698+#define GPIO_NR_HTCUNIVERSAL_I2S_DOUT_MD (30 | GPIO_ALT_FN_1_OUT)
5699+#define GPIO_NR_HTCUNIVERSAL_I2S_SYNC_MD (31 | GPIO_ALT_FN_1_OUT)
5700+
5701+#define GPIO_NR_HTCUNIVERSAL_PHONE_RXD_MD (34 | GPIO_ALT_FN_1_IN)
5702+#define GPIO_NR_HTCUNIVERSAL_PHONE_UART_CTS_MD (35 | GPIO_ALT_FN_1_IN)
5703+
5704+#define GPIO_NR_HTCUNIVERSAL_PHONE_TXD_MD (39 | GPIO_ALT_FN_2_OUT)
5705+#define GPIO_NR_HTCUNIVERSAL_PHONE_UART_RTS_MD (41 | GPIO_ALT_FN_2_OUT)
5706+
5707+#define GPIO_NR_HTCUNIVERSAL_BT_RXD_MD (42 | GPIO_ALT_FN_1_IN)
5708+#define GPIO_NR_HTCUNIVERSAL_BT_TXD_MD (43 | GPIO_ALT_FN_2_OUT)
5709+#define GPIO_NR_HTCUNIVERSAL_BT_UART_CTS_MD (44 | GPIO_ALT_FN_1_IN)
5710+#define GPIO_NR_HTCUNIVERSAL_BT_UART_RTS_MD (45 | GPIO_ALT_FN_2_OUT)
5711+
5712+#define GPIO_NR_HTCUNIVERSAL_SIR_RXD_MD (46 | GPIO_ALT_FN_2_IN)
5713+#define GPIO_NR_HTCUNIVERSAL_SIR_TXD_MD (47 | GPIO_ALT_FN_1_OUT)
5714+
5715+#define GPIO_NR_HTCUNIVERSAL_POE_N_MD (48 | GPIO_ALT_FN_2_OUT | GPIO_DFLT_HIGH)
5716+#define GPIO_NR_HTCUNIVERSAL_PWE_N_MD (49 | GPIO_ALT_FN_2_OUT | GPIO_DFLT_HIGH)
5717+
5718+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN0_MD (GPIO_NR_HTCUNIVERSAL_KP_MKIN0 | GPIO_ALT_FN_1_IN)
5719+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN1_MD (GPIO_NR_HTCUNIVERSAL_KP_MKIN1 | GPIO_ALT_FN_1_IN)
5720+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN2_MD (GPIO_NR_HTCUNIVERSAL_KP_MKIN2 | GPIO_ALT_FN_1_IN)
5721+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN3_MD (GPIO_NR_HTCUNIVERSAL_KP_MKIN3 | GPIO_ALT_FN_3_IN)
5722+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN4_MD (GPIO_NR_HTCUNIVERSAL_KP_MKIN4 | GPIO_ALT_FN_2_IN)
5723+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN5_MD (GPIO_NR_HTCUNIVERSAL_KP_MKIN5 | GPIO_ALT_FN_1_IN)
5724+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN6_MD (GPIO_NR_HTCUNIVERSAL_KP_MKIN6 | GPIO_ALT_FN_1_IN)
5725+#define GPIO_NR_HTCUNIVERSAL_KP_MKIN7_MD (GPIO_NR_HTCUNIVERSAL_KP_MKIN7 | GPIO_ALT_FN_3_IN)
5726+
5727+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT0_MD (GPIO_NR_HTCUNIVERSAL_KP_MKOUT0 | GPIO_ALT_FN_2_OUT)
5728+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT1_MD (GPIO_NR_HTCUNIVERSAL_KP_MKOUT1 | GPIO_ALT_FN_2_OUT)
5729+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT2_MD (GPIO_NR_HTCUNIVERSAL_KP_MKOUT2 | GPIO_ALT_FN_2_OUT)
5730+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT3_MD (GPIO_NR_HTCUNIVERSAL_KP_MKOUT3 | GPIO_ALT_FN_2_OUT)
5731+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT4_MD (GPIO_NR_HTCUNIVERSAL_KP_MKOUT4 | GPIO_ALT_FN_2_OUT)
5732+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT5_MD (GPIO_NR_HTCUNIVERSAL_KP_MKOUT5 | GPIO_ALT_FN_2_OUT)
5733+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT6_MD (GPIO_NR_HTCUNIVERSAL_KP_MKOUT6 | GPIO_ALT_FN_1_OUT)
5734+#define GPIO_NR_HTCUNIVERSAL_KP_MKOUT7_MD (GPIO_NR_HTCUNIVERSAL_KP_MKOUT7 | GPIO_ALT_FN_1_OUT)
5735+
5736+
5737+#define GPIO_NR_HTCUNIVERSAL_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT)
5738+
5739+#define GPIO_NR_HTCUNIVERSAL_PWM1OUT_MD (115 | GPIO_ALT_FN_3_OUT)
5740+
5741+#define GPIO_NR_HTCUNIVERSAL_I2C_SCL_MD (117 | GPIO_ALT_FN_1_OUT)
5742+#define GPIO_NR_HTCUNIVERSAL_I2C_SDA_MD (118 | GPIO_ALT_FN_1_OUT)
5743+
5744+#endif /* _HTCUNIVERSAL_GPIO_H */
5745Index: linux-2.6.22/include/asm-arm/arch-pxa/htcuniversal-init.h
5746===================================================================
5747--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5748+++ linux-2.6.22/include/asm-arm/arch-pxa/htcuniversal-init.h 2007-07-19 11:41:55.000000000 +0100
5749@@ -0,0 +1,14 @@
5750+/*
5751+ * include/asm/arm/arch-pxa/htcuniversal-init.h
5752+ * Copyright (c) 2004 SDG Systems, LLC
5753+ */
5754+
5755+#ifndef _HTCUNIVERSAL_INIT_H_
5756+#define _HTCUNIVERSAL_INIT_H_
5757+
5758+/* htcuniversal initialization data should be found here
5759+ * See -init.h files from other devices for details
5760+ */
5761+
5762+#endif /* _HTCUNIVERSAL_INIT_H_ */
5763+
5764Index: linux-2.6.22/include/asm-arm/arch-pxa/htcuniversal.h
5765===================================================================
5766--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5767+++ linux-2.6.22/include/asm-arm/arch-pxa/htcuniversal.h 2007-07-19 11:41:55.000000000 +0100
5768@@ -0,0 +1,3 @@
5769+#include <asm/arch/irqs.h>
5770+
5771+#define HTCUNIVERSAL_ASIC3_IRQ_BASE IRQ_BOARD_START
5772Index: linux-2.6.22/include/asm-arm/arch-pxa/pxa-pm_ll.h
5773===================================================================
5774--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5775+++ linux-2.6.22/include/asm-arm/arch-pxa/pxa-pm_ll.h 2007-07-19 11:41:55.000000000 +0100
5776@@ -0,0 +1,6 @@
5777+struct pxa_ll_pm_ops {
5778+ void (*suspend)(unsigned long);
5779+ void (*resume)(void);
5780+};
5781+
5782+extern struct pxa_ll_pm_ops *pxa_pm_set_ll_ops(struct pxa_ll_pm_ops *new_ops);
5783Index: linux-2.6.22/include/asm-arm/arch-pxa/sharpsl.h
5784===================================================================
5785--- linux-2.6.22.orig/include/asm-arm/arch-pxa/sharpsl.h 2007-07-19 11:41:50.000000000 +0100
5786+++ linux-2.6.22/include/asm-arm/arch-pxa/sharpsl.h 2007-07-19 11:41:55.000000000 +0100
5787@@ -25,12 +25,6 @@ struct corgits_machinfo {
5788 /*
5789 * SharpSL Backlight
5790 */
5791-struct corgibl_machinfo {
5792- int max_intensity;
5793- int default_intensity;
5794- int limit_mask;
5795- void (*set_bl_intensity)(int intensity);
5796-};
5797 extern void corgibl_limit_intensity(int limit);
5798
5799
5800Index: linux-2.6.22/include/asm-arm/hardware/asic3_keys.h
5801===================================================================
5802--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5803+++ linux-2.6.22/include/asm-arm/hardware/asic3_keys.h 2007-07-19 11:41:55.000000000 +0100
5804@@ -0,0 +1,18 @@
5805+#include <linux/input.h>
5806+
5807+struct asic3_keys_button {
5808+ /* Configuration parameters */
5809+ int keycode;
5810+ int gpio;
5811+ int active_low;
5812+ char *desc;
5813+ int type;
5814+ /* Internal state vars - add below */
5815+};
5816+
5817+struct asic3_keys_platform_data {
5818+ struct asic3_keys_button *buttons;
5819+ int nbuttons;
5820+ struct input_dev *input;
5821+ struct device *asic3_dev;
5822+};
5823Index: linux-2.6.22/include/asm-arm/hardware/asic3_leds.h
5824===================================================================
5825--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5826+++ linux-2.6.22/include/asm-arm/hardware/asic3_leds.h 2007-07-19 11:41:55.000000000 +0100
5827@@ -0,0 +1,34 @@
5828+/*
5829+ * LEDs support for HTC ASIC3 devices.
5830+ *
5831+ * Copyright (c) 2006 Anton Vorontsov <cbou@mail.ru>
5832+ *
5833+ * This file is subject to the terms and conditions of the GNU General Public
5834+ * License. See the file COPYING in the main directory of this archive for
5835+ * more details.
5836+ *
5837+ */
5838+
5839+#include <linux/kernel.h>
5840+#include <linux/init.h>
5841+#include <linux/platform_device.h>
5842+#include <linux/leds.h>
5843+
5844+struct asic3_leds_machinfo;
5845+
5846+struct asic3_led {
5847+ struct led_classdev led_cdev;
5848+ int hw_num; /* Number of "hardware-accelerated" led */
5849+ int gpio_num; /* Number of GPIO if hw_num == -1 */
5850+ struct asic3_leds_machinfo *machinfo;
5851+};
5852+
5853+struct asic3_leds_machinfo {
5854+ int num_leds;
5855+ struct asic3_led *leds;
5856+ struct platform_device *asic3_pdev;
5857+};
5858+
5859+extern int asic3_leds_register(void);
5860+extern void asic3_leds_unregister(void);
5861+
5862Index: linux-2.6.22/include/asm-arm/hardware/ipaq-asic3.h
5863===================================================================
5864--- /dev/null 1970-01-01 00:00:00.000000000 +0000
5865+++ linux-2.6.22/include/asm-arm/hardware/ipaq-asic3.h 2007-07-19 11:41:55.000000000 +0100
5866@@ -0,0 +1,602 @@
5867+/*
5868+ *
5869+ * Definitions for the HTC ASIC3 chip found in several handheld devices
5870+ *
5871+ * Copyright 2001 Compaq Computer Corporation.
5872+ *
5873+ * This program is free software; you can redistribute it and/or modify
5874+ * it under the terms of the GNU General Public License as published by
5875+ * the Free Software Foundation; either version 2 of the License, or
5876+ * (at your option) any later version.
5877+ *
5878+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
5879+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
5880+ * FITNESS FOR ANY PARTICULAR PURPOSE.
5881+ *
5882+ * Author: Andrew Christian
5883+ *
5884+ */
5885+
5886+#ifndef IPAQ_ASIC3_H
5887+#define IPAQ_ASIC3_H
5888+
5889+/****************************************************/
5890+/* IPAQ, ASIC #3, replaces ASIC #1 */
5891+
5892+#define IPAQ_ASIC3_OFFSET(x,y) (_IPAQ_ASIC3_ ## x ## _Base + _IPAQ_ASIC3_ ## x ## _ ## y)
5893+#define IPAQ_ASIC3_GPIO_OFFSET(x,y) (_IPAQ_ASIC3_GPIO_ ## x ## _Base + _IPAQ_ASIC3_GPIO_ ## y)
5894+
5895+
5896+/* All offsets below are specified with the following address bus shift */
5897+#define ASIC3_DEFAULT_ADDR_SHIFT 2
5898+
5899+#define _IPAQ_ASIC3_GPIO_A_Base 0x0000
5900+#define _IPAQ_ASIC3_GPIO_B_Base 0x0100
5901+#define _IPAQ_ASIC3_GPIO_C_Base 0x0200
5902+#define _IPAQ_ASIC3_GPIO_D_Base 0x0300
5903+
5904+#define _IPAQ_ASIC3_GPIO_Mask 0x00 /* R/W 0:don't mask, 1:mask interrupt */
5905+#define _IPAQ_ASIC3_GPIO_Direction 0x04 /* R/W 0:input, 1:output */
5906+#define _IPAQ_ASIC3_GPIO_Out 0x08 /* R/W 0:output low, 1:output high */
5907+#define _IPAQ_ASIC3_GPIO_TriggerType 0x0c /* R/W 0:level, 1:edge */
5908+#define _IPAQ_ASIC3_GPIO_EdgeTrigger 0x10 /* R/W 0:falling, 1:rising */
5909+#define _IPAQ_ASIC3_GPIO_LevelTrigger 0x14 /* R/W 0:low, 1:high level detect */
5910+#define _IPAQ_ASIC3_GPIO_SleepMask 0x18 /* R/W 0:don't mask, 1:mask trigger in sleep mode */
5911+#define _IPAQ_ASIC3_GPIO_SleepOut 0x1c /* R/W level 0:low, 1:high in sleep mode */
5912+#define _IPAQ_ASIC3_GPIO_BattFaultOut 0x20 /* R/W level 0:low, 1:high in batt_fault */
5913+#define _IPAQ_ASIC3_GPIO_IntStatus 0x24 /* R/W 0:none, 1:detect */
5914+#define _IPAQ_ASIC3_GPIO_AltFunction 0x28 /* R/W 0:normal control 1:LED register control */
5915+#define _IPAQ_ASIC3_GPIO_SleepConf 0x2c /* R/W bit 1: autosleep 0: disable gposlpout in normal mode, enable gposlpout in sleep mode */
5916+#define _IPAQ_ASIC3_GPIO_Status 0x30 /* R Pin status */
5917+
5918+#define IPAQ_ASIC3_GPIO_A_MASK(_b) IPAQ_ASIC3_GPIO( _b, u16, A, Mask )
5919+#define IPAQ_ASIC3_GPIO_A_DIR(_b) IPAQ_ASIC3_GPIO( _b, u16, A, Direction )
5920+#define IPAQ_ASIC3_GPIO_A_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, A, Out )
5921+#define IPAQ_ASIC3_GPIO_A_LEVELTRI(_b) IPAQ_ASIC3_GPIO( _b, u16, A, TriggerType )
5922+#define IPAQ_ASIC3_GPIO_A_RISING(_b) IPAQ_ASIC3_GPIO( _b, u16, A, EdgeTrigger )
5923+#define IPAQ_ASIC3_GPIO_A_LEVEL(_b) IPAQ_ASIC3_GPIO( _b, u16, A, LevelTrigger )
5924+#define IPAQ_ASIC3_GPIO_A_SLEEP_MASK(_b) IPAQ_ASIC3_GPIO( _b, u16, A, SleepMask )
5925+#define IPAQ_ASIC3_GPIO_A_SLEEP_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, A, SleepOut )
5926+#define IPAQ_ASIC3_GPIO_A_BATT_FAULT_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, A, BattFaultOut )
5927+#define IPAQ_ASIC3_GPIO_A_INT_STATUS(_b) IPAQ_ASIC3_GPIO( _b, u16, A, IntStatus )
5928+#define IPAQ_ASIC3_GPIO_A_ALT_FUNCTION(_b) IPAQ_ASIC3_GPIO( _b, u16, A, AltFunction )
5929+#define IPAQ_ASIC3_GPIO_A_SLEEP_CONF(_b) IPAQ_ASIC3_GPIO( _b, u16, A, SleepConf )
5930+#define IPAQ_ASIC3_GPIO_A_STATUS(_b) IPAQ_ASIC3_GPIO( _b, u16, A, Status )
5931+
5932+#define IPAQ_ASIC3_GPIO_B_MASK(_b) IPAQ_ASIC3_GPIO( _b, u16, B, Mask )
5933+#define IPAQ_ASIC3_GPIO_B_DIR(_b) IPAQ_ASIC3_GPIO( _b, u16, B, Direction )
5934+#define IPAQ_ASIC3_GPIO_B_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, B, Out )
5935+#define IPAQ_ASIC3_GPIO_B_LEVELTRI(_b) IPAQ_ASIC3_GPIO( _b, u16, B, TriggerType )
5936+#define IPAQ_ASIC3_GPIO_B_RISING(_b) IPAQ_ASIC3_GPIO( _b, u16, B, EdgeTrigger )
5937+#define IPAQ_ASIC3_GPIO_B_LEVEL(_b) IPAQ_ASIC3_GPIO( _b, u16, B, LevelTrigger )
5938+#define IPAQ_ASIC3_GPIO_B_SLEEP_MASK(_b) IPAQ_ASIC3_GPIO( _b, u16, B, SleepMask )
5939+#define IPAQ_ASIC3_GPIO_B_SLEEP_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, B, SleepOut )
5940+#define IPAQ_ASIC3_GPIO_B_BATT_FAULT_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, B, BattFaultOut )
5941+#define IPAQ_ASIC3_GPIO_B_INT_STATUS(_b) IPAQ_ASIC3_GPIO( _b, u16, B, IntStatus )
5942+#define IPAQ_ASIC3_GPIO_B_ALT_FUNCTION(_b) IPAQ_ASIC3_GPIO( _b, u16, B, AltFunction )
5943+#define IPAQ_ASIC3_GPIO_B_SLEEP_CONF(_b) IPAQ_ASIC3_GPIO( _b, u16, B, SleepConf )
5944+#define IPAQ_ASIC3_GPIO_B_STATUS(_b) IPAQ_ASIC3_GPIO( _b, u16, B, Status )
5945+
5946+#define IPAQ_ASIC3_GPIO_C_MASK(_b) IPAQ_ASIC3_GPIO( _b, u16, C, Mask )
5947+#define IPAQ_ASIC3_GPIO_C_DIR(_b) IPAQ_ASIC3_GPIO( _b, u16, C, Direction )
5948+#define IPAQ_ASIC3_GPIO_C_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, C, Out )
5949+#define IPAQ_ASIC3_GPIO_C_LEVELTRI(_b) IPAQ_ASIC3_GPIO( _b, u16, C, TriggerType )
5950+#define IPAQ_ASIC3_GPIO_C_RISING(_b) IPAQ_ASIC3_GPIO( _b, u16, C, EdgeTrigger )
5951+#define IPAQ_ASIC3_GPIO_C_LEVEL(_b) IPAQ_ASIC3_GPIO( _b, u16, C, LevelTrigger )
5952+#define IPAQ_ASIC3_GPIO_C_SLEEP_MASK(_b) IPAQ_ASIC3_GPIO( _b, u16, C, SleepMask )
5953+#define IPAQ_ASIC3_GPIO_C_SLEEP_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, C, SleepOut )
5954+#define IPAQ_ASIC3_GPIO_C_BATT_FAULT_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, C, BattFaultOut )
5955+#define IPAQ_ASIC3_GPIO_C_INT_STATUS(_b) IPAQ_ASIC3_GPIO( _b, u16, C, IntStatus )
5956+#define IPAQ_ASIC3_GPIO_C_ALT_FUNCTION(_b) IPAQ_ASIC3_GPIO( _b, u16, C, AltFunction )
5957+#define IPAQ_ASIC3_GPIO_C_SLEEP_CONF(_b) IPAQ_ASIC3_GPIO( _b, u16, C, SleepConf )
5958+#define IPAQ_ASIC3_GPIO_C_STATUS(_b) IPAQ_ASIC3_GPIO( _b, u16, C, Status )
5959+
5960+#define IPAQ_ASIC3_GPIO_D_MASK(_b) IPAQ_ASIC3_GPIO( _b, u16, D, Mask )
5961+#define IPAQ_ASIC3_GPIO_D_DIR(_b) IPAQ_ASIC3_GPIO( _b, u16, D, Direction )
5962+#define IPAQ_ASIC3_GPIO_D_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, D, Out )
5963+#define IPAQ_ASIC3_GPIO_D_LEVELTRI(_b) IPAQ_ASIC3_GPIO( _b, u16, D, TriggerType )
5964+#define IPAQ_ASIC3_GPIO_D_RISING(_b) IPAQ_ASIC3_GPIO( _b, u16, D, EdgeTrigger )
5965+#define IPAQ_ASIC3_GPIO_D_LEVEL(_b) IPAQ_ASIC3_GPIO( _b, u16, D, LevelTrigger )
5966+#define IPAQ_ASIC3_GPIO_D_SLEEP_MASK(_b) IPAQ_ASIC3_GPIO( _b, u16, D, SleepMask )
5967+#define IPAQ_ASIC3_GPIO_D_SLEEP_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, D, SleepOut )
5968+#define IPAQ_ASIC3_GPIO_D_BATT_FAULT_OUT(_b) IPAQ_ASIC3_GPIO( _b, u16, D, BattFaultOut )
5969+#define IPAQ_ASIC3_GPIO_D_INT_STATUS(_b) IPAQ_ASIC3_GPIO( _b, u16, D, IntStatus )
5970+#define IPAQ_ASIC3_GPIO_D_ALT_FUNCTION(_b) IPAQ_ASIC3_GPIO( _b, u16, D, AltFunction )
5971+#define IPAQ_ASIC3_GPIO_D_SLEEP_CONF(_b) IPAQ_ASIC3_GPIO( _b, u16, D, SleepConf )
5972+#define IPAQ_ASIC3_GPIO_D_STATUS(_b) IPAQ_ASIC3_GPIO( _b, u16, D, Status )
5973+
5974+#define _IPAQ_ASIC3_SPI_Base 0x0400
5975+#define _IPAQ_ASIC3_SPI_Control 0x0000
5976+#define _IPAQ_ASIC3_SPI_TxData 0x0004
5977+#define _IPAQ_ASIC3_SPI_RxData 0x0008
5978+#define _IPAQ_ASIC3_SPI_Int 0x000c
5979+#define _IPAQ_ASIC3_SPI_Status 0x0010
5980+
5981+#define IPAQ_ASIC3_SPI_Control(_b) IPAQ_ASIC3( _b, u16, SPI, Control )
5982+#define IPAQ_ASIC3_SPI_TxData(_b) IPAQ_ASIC3( _b, u16, SPI, TxData )
5983+#define IPAQ_ASIC3_SPI_RxData(_b) IPAQ_ASIC3( _b, u16, SPI, RxData )
5984+#define IPAQ_ASIC3_SPI_Int(_b) IPAQ_ASIC3( _b, u16, SPI, Int )
5985+#define IPAQ_ASIC3_SPI_Status(_b) IPAQ_ASIC3( _b, u16, SPI, Status )
5986+
5987+#define SPI_CONTROL_SPR(clk) ((clk) & 0x0f) /* Clock rate */
5988+
5989+#define _IPAQ_ASIC3_PWM_0_Base 0x0500
5990+#define _IPAQ_ASIC3_PWM_1_Base 0x0600
5991+#define _IPAQ_ASIC3_PWM_TimeBase 0x0000
5992+#define _IPAQ_ASIC3_PWM_PeriodTime 0x0004
5993+#define _IPAQ_ASIC3_PWM_DutyTime 0x0008
5994+
5995+#define IPAQ_ASIC3_PWM_TimeBase(_b, x) IPAQ_ASIC3_N( _b, u16, PWM, x, TimeBase )
5996+#define IPAQ_ASIC3_PWM_PeriodTime(_b, x) IPAQ_ASIC3_N( _b, u16, PWM, x, PeriodTime )
5997+#define IPAQ_ASIC3_PWM_DutyTime(_b, x) IPAQ_ASIC3_N( _b, u16, PWM, x, DutyTime )
5998+
5999+#define PWM_TIMEBASE_VALUE(x) ((x)&0xf) /* Low 4 bits sets time base */
6000+#define PWM_TIMEBASE_ENABLE (1 << 4) /* Enable clock */
6001+
6002+#define _IPAQ_ASIC3_LED_0_Base 0x0700
6003+#define _IPAQ_ASIC3_LED_1_Base 0x0800
6004+#define _IPAQ_ASIC3_LED_2_Base 0x0900
6005+#define _IPAQ_ASIC3_LED_TimeBase 0x0000 /* R/W 7 bits */
6006+#define _IPAQ_ASIC3_LED_PeriodTime 0x0004 /* R/W 12 bits */
6007+#define _IPAQ_ASIC3_LED_DutyTime 0x0008 /* R/W 12 bits */
6008+#define _IPAQ_ASIC3_LED_AutoStopCount 0x000c /* R/W 16 bits */
6009+
6010+#define IPAQ_ASIC3_LED_TimeBase(_b, x) IPAQ_ASIC3_N( _b, u8, LED, x, TimeBase )
6011+#define IPAQ_ASIC3_LED_PeriodTime(_b, x) IPAQ_ASIC3_N( _b, u16, LED, x, PeriodTime )
6012+#define IPAQ_ASIC3_LED_DutyTime(_b, x) IPAQ_ASIC3_N( _b, u16, LED, x, DutyTime )
6013+#define IPAQ_ASIC3_LED_AutoStopCount(_b, x) IPAQ_ASIC3_N( _b, u16, LED, x, AutoStopCount )
6014+
6015+/* LED TimeBase bits - match ASIC2 */
6016+#define LED_TBS 0x0f /* Low 4 bits sets time base, max = 13 */
6017+ /* Note: max = 5 on hx4700 */
6018+ /* 0: maximum time base */
6019+ /* 1: maximum time base / 2 */
6020+ /* n: maximum time base / 2^n */
6021+
6022+#define LED_EN (1 << 4) /* LED ON/OFF 0:off, 1:on */
6023+#define LED_AUTOSTOP (1 << 5) /* LED ON/OFF auto stop set 0:disable, 1:enable */
6024+#define LED_ALWAYS (1 << 6) /* LED Interrupt Mask 0:No mask, 1:mask */
6025+
6026+#define _IPAQ_ASIC3_CLOCK_Base 0x0A00
6027+#define _IPAQ_ASIC3_CLOCK_CDEX 0x00
6028+#define _IPAQ_ASIC3_CLOCK_SEL 0x04
6029+
6030+#define IPAQ_ASIC3_CLOCK_CDEX(_b) IPAQ_ASIC3( _b, u16, CLOCK, CDEX )
6031+#define IPAQ_ASIC3_CLOCK_SEL(_b) IPAQ_ASIC3( _b, u16, CLOCK, SEL )
6032+
6033+#define CLOCK_CDEX_SOURCE (1 << 0) /* 2 bits */
6034+#define CLOCK_CDEX_SOURCE0 (1 << 0)
6035+#define CLOCK_CDEX_SOURCE1 (1 << 1)
6036+#define CLOCK_CDEX_SPI (1 << 2)
6037+#define CLOCK_CDEX_OWM (1 << 3)
6038+#define CLOCK_CDEX_PWM0 (1 << 4)
6039+#define CLOCK_CDEX_PWM1 (1 << 5)
6040+#define CLOCK_CDEX_LED0 (1 << 6)
6041+#define CLOCK_CDEX_LED1 (1 << 7)
6042+#define CLOCK_CDEX_LED2 (1 << 8)
6043+
6044+#define CLOCK_CDEX_SD_HOST (1 << 9) /* R/W: SD host clock source 24.576M/12.288M */
6045+#define CLOCK_CDEX_SD_BUS (1 << 10) /* R/W: SD bus clock source control 24.576M/12.288M */
6046+#define CLOCK_CDEX_SMBUS (1 << 11)
6047+#define CLOCK_CDEX_CONTROL_CX (1 << 12)
6048+
6049+#define CLOCK_CDEX_EX0 (1 << 13) /* R/W: 32.768 kHz crystal */
6050+#define CLOCK_CDEX_EX1 (1 << 14) /* R/W: 24.576 MHz crystal */
6051+
6052+#define CLOCK_SEL_SD_HCLK_SEL (1 << 0) /* R/W: SDIO host clock select - 1: 24.576 Mhz, 0: 12.288 MHz */
6053+#define CLOCK_SEL_SD_BCLK_SEL (1 << 1) /* R/W: SDIO bus clock select - 1: 24.576 MHz, 0: 12.288 MHz */
6054+#define CLOCK_SEL_CX (1 << 2) /* R/W: INT clock source control (32.768 kHz) */
6055+
6056+
6057+#define _IPAQ_ASIC3_INTR_Base 0x0B00
6058+
6059+#define _IPAQ_ASIC3_INTR_IntMask 0x00 /* Interrupt mask control */
6060+#define _IPAQ_ASIC3_INTR_PIntStat 0x04 /* Peripheral interrupt status */
6061+#define _IPAQ_ASIC3_INTR_IntCPS 0x08 /* Interrupt timer clock pre-scale */
6062+#define _IPAQ_ASIC3_INTR_IntTBS 0x0c /* Interrupt timer set */
6063+
6064+#define IPAQ_ASIC3_INTR_IntMask(_b) IPAQ_ASIC3( _b, u8, INTR, IntMask )
6065+#define IPAQ_ASIC3_INTR_PIntStat(_b) IPAQ_ASIC3( _b, u8, INTR, PIntStat )
6066+#define IPAQ_ASIC3_INTR_IntCPS(_b) IPAQ_ASIC3( _b, u8, INTR, IntCPS )
6067+#define IPAQ_ASIC3_INTR_IntTBS(_b) IPAQ_ASIC3( _b, u16, INTR, IntTBS )
6068+
6069+#define ASIC3_INTMASK_GINTMASK (1 << 0) /* Global interrupt mask 1:enable */
6070+#define ASIC3_INTMASK_GINTEL (1 << 1) /* 1: rising edge, 0: hi level */
6071+#define ASIC3_INTMASK_MASK0 (1 << 2)
6072+#define ASIC3_INTMASK_MASK1 (1 << 3)
6073+#define ASIC3_INTMASK_MASK2 (1 << 4)
6074+#define ASIC3_INTMASK_MASK3 (1 << 5)
6075+#define ASIC3_INTMASK_MASK4 (1 << 6)
6076+#define ASIC3_INTMASK_MASK5 (1 << 7)
6077+
6078+#define ASIC3_INTR_PERIPHERAL_A (1 << 0)
6079+#define ASIC3_INTR_PERIPHERAL_B (1 << 1)
6080+#define ASIC3_INTR_PERIPHERAL_C (1 << 2)
6081+#define ASIC3_INTR_PERIPHERAL_D (1 << 3)
6082+#define ASIC3_INTR_LED0 (1 << 4)
6083+#define ASIC3_INTR_LED1 (1 << 5)
6084+#define ASIC3_INTR_LED2 (1 << 6)
6085+#define ASIC3_INTR_SPI (1 << 7)
6086+#define ASIC3_INTR_SMBUS (1 << 8)
6087+#define ASIC3_INTR_OWM (1 << 9)
6088+
6089+#define ASIC3_INTR_CPS(x) ((x)&0x0f) /* 4 bits, max 14 */
6090+#define ASIC3_INTR_CPS_SET ( 1 << 4 ) /* Time base enable */
6091+
6092+
6093+/* Basic control of the SD ASIC */
6094+#define _IPAQ_ASIC3_SDHWCTRL_Base 0x0E00
6095+
6096+#define _IPAQ_ASIC3_SDHWCTRL_SDConf 0x00
6097+#define IPAQ_ASIC3_SDHWCTRL_SDConf(_b) IPAQ_ASIC3( _b, u8, SDHWCTRL, SDConf )
6098+
6099+#define ASIC3_SDHWCTRL_SUSPEND (1 << 0) /* 1=suspend all SD operations */
6100+#define ASIC3_SDHWCTRL_CLKSEL (1 << 1) /* 1=SDICK, 0=HCLK */
6101+#define ASIC3_SDHWCTRL_PCLR (1 << 2) /* All registers of SDIO cleared */
6102+#define ASIC3_SDHWCTRL_LEVCD (1 << 3) /* Level of SD card detection: 1:high, 0:low */
6103+#define ASIC3_SDHWCTRL_LEVWP (1 << 4) /* Level of SD card write protection: 1=low, 0=high */
6104+#define ASIC3_SDHWCTRL_SDLED (1 << 5) /* SD card LED signal 1=enable, 0=disable */
6105+#define ASIC3_SDHWCTRL_SDPWR (1 << 6) /* SD card power supply control 1=enable */
6106+
6107+
6108+/* This is a pointer to an array of 12 u32 values - but only the lower 2 bytes matter */
6109+/* Use it as "IPAQ_ASIC3_HWPROTECT_ARRAY[x]" */
6110+
6111+#define _IPAQ_ASIC3_HWPROTECT_Base 0x1000
6112+#define IPAQ_ASIC3_HWPROTECT_ARRAY ((volatile u32*)(_IPAQ_ASIC3_Base + _IPAQ_ASIC3_HWPROTECT_Base))
6113+#define HWPROTECT_ARRAY_LEN 12
6114+#define HWPROTECT_ARRAY_VALUES {0x4854,0x432d,0x5344,0x494f,0x2050,0x2f4e,0x3a33,0x3048,0x3830,0x3032,0x382d,0x3030}
6115+
6116+
6117+#define _IPAQ_ASIC3_EXTCF_Base 0x1100
6118+
6119+#define _IPAQ_ASIC3_EXTCF_Select 0x00
6120+#define _IPAQ_ASIC3_EXTCF_Reset 0x04
6121+
6122+#define IPAQ_ASIC3_EXTCF_Select(_b) IPAQ_ASIC3( _b, u16, EXTCF, Select )
6123+#define IPAQ_ASIC3_EXTCF_Reset(_b) IPAQ_ASIC3( _b, u16, EXTCF, Reset )
6124+
6125+#define ASIC3_EXTCF_SMOD0 (1 << 0) /* slot number of mode 0 */
6126+#define ASIC3_EXTCF_SMOD1 (1 << 1) /* slot number of mode 1 */
6127+#define ASIC3_EXTCF_SMOD2 (1 << 2) /* slot number of mode 2 */
6128+#define ASIC3_EXTCF_OWM_EN (1 << 4) /* enable onewire module */
6129+#define ASIC3_EXTCF_OWM_SMB (1 << 5) /* OWM bus selection */
6130+#define ASIC3_EXTCF_OWM_RESET (1 << 6) /* undocumented, used by OWM and CF */
6131+#define ASIC3_EXTCF_CF0_SLEEP_MODE (1 << 7) /* CF0 sleep state control */
6132+#define ASIC3_EXTCF_CF1_SLEEP_MODE (1 << 8) /* CF1 sleep state control */
6133+#define ASIC3_EXTCF_CF0_PWAIT_EN (1 << 10) /* CF0 PWAIT_n control */
6134+#define ASIC3_EXTCF_CF1_PWAIT_EN (1 << 11) /* CF1 PWAIT_n control */
6135+#define ASIC3_EXTCF_CF0_BUF_EN (1 << 12) /* CF0 buffer control */
6136+#define ASIC3_EXTCF_CF1_BUF_EN (1 << 13) /* CF1 buffer control */
6137+#define ASIC3_EXTCF_SD_MEM_ENABLE (1 << 14)
6138+#define ASIC3_EXTCF_CF_SLEEP (1 << 15) /* CF sleep mode control */
6139+
6140+/*****************************************************************************
6141+ * The Onewire interface registers
6142+ *
6143+ * OWM_CMD
6144+ * OWM_DAT
6145+ * OWM_INTR
6146+ * OWM_INTEN
6147+ * OWM_CLKDIV
6148+ *
6149+ *****************************************************************************/
6150+
6151+#define _IPAQ_ASIC3_OWM_Base 0xC00
6152+
6153+#define _IPAQ_ASIC3_OWM_CMD 0x00
6154+#define _IPAQ_ASIC3_OWM_DAT 0x04
6155+#define _IPAQ_ASIC3_OWM_INTR 0x08
6156+#define _IPAQ_ASIC3_OWM_INTEN 0x0C
6157+#define _IPAQ_ASIC3_OWM_CLKDIV 0x10
6158+
6159+#define ASIC3_OWM_CMD_ONEWR (1 << 0)
6160+#define ASIC3_OWM_CMD_SRA (1 << 1)
6161+#define ASIC3_OWM_CMD_DQO (1 << 2)
6162+#define ASIC3_OWM_CMD_DQI (1 << 3)
6163+
6164+#define ASIC3_OWM_INTR_PD (1 << 0)
6165+#define ASIC3_OWM_INTR_PDR (1 << 1)
6166+#define ASIC3_OWM_INTR_TBE (1 << 2)
6167+#define ASIC3_OWM_INTR_TEMP (1 << 3)
6168+#define ASIC3_OWM_INTR_RBF (1 << 4)
6169+
6170+#define ASIC3_OWM_INTEN_EPD (1 << 0)
6171+#define ASIC3_OWM_INTEN_IAS (1 << 1)
6172+#define ASIC3_OWM_INTEN_ETBE (1 << 2)
6173+#define ASIC3_OWM_INTEN_ETMT (1 << 3)
6174+#define ASIC3_OWM_INTEN_ERBF (1 << 4)
6175+
6176+#define ASIC3_OWM_CLKDIV_PRE (3 << 0) /* two bits wide at bit position 0 */
6177+#define ASIC3_OWM_CLKDIV_DIV (7 << 2) /* 3 bits wide at bit position 2 */
6178+
6179+
6180+/*****************************************************************************
6181+ * The SD configuration registers are at a completely different location
6182+ * in memory. They are divided into three sets of registers:
6183+ *
6184+ * SD_CONFIG Core configuration register
6185+ * SD_CTRL Control registers for SD operations
6186+ * SDIO_CTRL Control registers for SDIO operations
6187+ *
6188+ *****************************************************************************/
6189+
6190+#define IPAQ_ASIC3_SD_CONFIG(_b, s,x) \
6191+ (*((volatile s *) ((_b) + _IPAQ_ASIC3_SD_CONFIG_Base + (_IPAQ_ASIC3_SD_CONFIG_ ## x))))
6192+
6193+#define _IPAQ_ASIC3_SD_CONFIG_Base 0x0400 // Assumes 32 bit addressing
6194+
6195+#define _IPAQ_ASIC3_SD_CONFIG_Command 0x08 /* R/W: Command */
6196+#define _IPAQ_ASIC3_SD_CONFIG_Addr0 0x20 /* [9:31] SD Control Register Base Address */
6197+#define _IPAQ_ASIC3_SD_CONFIG_Addr1 0x24 /* [9:31] SD Control Register Base Address */
6198+#define _IPAQ_ASIC3_SD_CONFIG_IntPin 0x78 /* R/O: interrupt assigned to pin */
6199+#define _IPAQ_ASIC3_SD_CONFIG_ClkStop 0x80 /* Set to 0x1f to clock SD controller, 0 otherwise. */
6200+ /* at 0x82 - Gated Clock Control */
6201+#define _IPAQ_ASIC3_SD_CONFIG_ClockMode 0x84 /* Control clock of SD controller */
6202+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_PinStatus 0x88 /* R/0: read status of SD pins */
6203+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_Power1 0x90 /* Power1 - manual power control */
6204+ /* Power2 is at 0x92 - auto power up after card inserted */
6205+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_Power3 0x94 /* auto power down when card removed */
6206+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_CardDetect 0x98 /* */
6207+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_Slot 0xA0 /* R/O: define support slot number */
6208+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_ExtGateClk1 0x1E0 /* Could be used for gated clock (don't use) */
6209+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_ExtGateClk2 0x1E2 /* Could be used for gated clock (don't use) */
6210+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_GPIO_OutAndEnable 0x1E8 /* GPIO Output Reg. , at 0x1EA - GPIO Output Enable Reg. */
6211+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_GPIO_Status 0x1EC /* GPIO Status Reg. */
6212+#define _IPAQ_ASIC3_SD_CONFIG_SDHC_ExtGateClk3 0x1F0 /* Bit 1: double buffer/single buffer */
6213+
6214+#define IPAQ_ASIC3_SD_CONFIG_Command(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, Command )
6215+#define IPAQ_ASIC3_SD_CONFIG_Addr0(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, Addr0 )
6216+#define IPAQ_ASIC3_SD_CONFIG_Addr1(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, Addr1 )
6217+#define IPAQ_ASIC3_SD_CONFIG_IntPin(_b) IPAQ_ASIC3_SD_CONFIG(_b, u8, IntPin )
6218+#define IPAQ_ASIC3_SD_CONFIG_ClkStop(_b) IPAQ_ASIC3_SD_CONFIG(_b, u8, ClkStop )
6219+#define IPAQ_ASIC3_SD_CONFIG_ClockMode(_b) IPAQ_ASIC3_SD_CONFIG(_b, u8, ClockMode )
6220+#define IPAQ_ASIC3_SD_CONFIG_SDHC_PinStatus(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, SDHC_PinStatus )
6221+#define IPAQ_ASIC3_SD_CONFIG_SDHC_Power1(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, SDHC_Power1 )
6222+#define IPAQ_ASIC3_SD_CONFIG_SDHC_Power3(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, SDHC_Power3 )
6223+#define IPAQ_ASIC3_SD_CONFIG_SDHC_CardDetect(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, SDHC_CardDetect )
6224+#define IPAQ_ASIC3_SD_CONFIG_SDHC_Slot(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, SDHC_Slot )
6225+#define IPAQ_ASIC3_SD_CONFIG_SDHC_ExtGateClk1(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, SDHC_ExtGateClk1 )
6226+#define IPAQ_ASIC3_SD_CONFIG_SDHC_ExtGateClk3(_b) IPAQ_ASIC3_SD_CONFIG(_b, u16, SDHC_ExtGateClk3 )
6227+
6228+#define SD_CONFIG_
6229+
6230+#define SD_CONFIG_COMMAND_MAE (1<<1) /* Memory access enable (set to 1 to access SD Controller) */
6231+
6232+#define SD_CONFIG_CLK_ENABLE_ALL 0x1f
6233+
6234+#define SD_CONFIG_POWER1_PC_33V 0x0200 /* Set for 3.3 volts */
6235+#define SD_CONFIG_POWER1_PC_OFF 0x0000 /* Turn off power */
6236+
6237+#define SD_CONFIG_CARDDETECTMODE_CLK ((x)&0x3) /* two bits - number of cycles for card detection */
6238+
6239+
6240+#define _IPAQ_ASIC3_SD_CTRL_Base 0x1000
6241+
6242+#define IPAQ_ASIC3_SD(_b, s,x) \
6243+ (*((volatile s *) ((_b) + _IPAQ_ASIC3_SD_CTRL_Base + (_IPAQ_ASIC3_SD_CTRL_ ## x))))
6244+
6245+#define _IPAQ_ASIC3_SD_CTRL_Cmd 0x00
6246+#define _IPAQ_ASIC3_SD_CTRL_Arg0 0x08
6247+#define _IPAQ_ASIC3_SD_CTRL_Arg1 0x0C
6248+#define _IPAQ_ASIC3_SD_CTRL_StopInternal 0x10
6249+#define _IPAQ_ASIC3_SD_CTRL_TransferSectorCount 0x14
6250+#define _IPAQ_ASIC3_SD_CTRL_Response0 0x18
6251+#define _IPAQ_ASIC3_SD_CTRL_Response1 0x1C
6252+#define _IPAQ_ASIC3_SD_CTRL_Response2 0x20
6253+#define _IPAQ_ASIC3_SD_CTRL_Response3 0x24
6254+#define _IPAQ_ASIC3_SD_CTRL_Response4 0x28
6255+#define _IPAQ_ASIC3_SD_CTRL_Response5 0x2C
6256+#define _IPAQ_ASIC3_SD_CTRL_Response6 0x30
6257+#define _IPAQ_ASIC3_SD_CTRL_Response7 0x34
6258+#define _IPAQ_ASIC3_SD_CTRL_CardStatus 0x38
6259+#define _IPAQ_ASIC3_SD_CTRL_BufferCtrl 0x3C
6260+#define _IPAQ_ASIC3_SD_CTRL_IntMaskCard 0x40
6261+#define _IPAQ_ASIC3_SD_CTRL_IntMaskBuffer 0x44
6262+#define _IPAQ_ASIC3_SD_CTRL_CardClockCtrl 0x48
6263+#define _IPAQ_ASIC3_SD_CTRL_MemCardXferDataLen 0x4C
6264+#define _IPAQ_ASIC3_SD_CTRL_MemCardOptionSetup 0x50
6265+#define _IPAQ_ASIC3_SD_CTRL_ErrorStatus0 0x58
6266+#define _IPAQ_ASIC3_SD_CTRL_ErrorStatus1 0x5C
6267+#define _IPAQ_ASIC3_SD_CTRL_DataPort 0x60
6268+#define _IPAQ_ASIC3_SD_CTRL_TransactionCtrl 0x68
6269+#define _IPAQ_ASIC3_SD_CTRL_SoftwareReset 0x1C0
6270+
6271+#define IPAQ_ASIC3_SD_CTRL_Cmd(_b) IPAQ_ASIC3_SD( _b, u16, Cmd ) /* */
6272+#define IPAQ_ASIC3_SD_CTRL_Arg0(_b) IPAQ_ASIC3_SD( _b, u16, Arg0 ) /* */
6273+#define IPAQ_ASIC3_SD_CTRL_Arg1(_b) IPAQ_ASIC3_SD( _b, u16, Arg1 ) /* */
6274+#define IPAQ_ASIC3_SD_CTRL_StopInternal(_b) IPAQ_ASIC3_SD( _b, u16, StopInternal ) /* */
6275+#define IPAQ_ASIC3_SD_CTRL_TransferSectorCount(_b) IPAQ_ASIC3_SD( _b, u16, TransferSectorCount ) /* */
6276+#define IPAQ_ASIC3_SD_CTRL_Response0(_b) IPAQ_ASIC3_SD( _b, u16, Response0 ) /* */
6277+#define IPAQ_ASIC3_SD_CTRL_Response1(_b) IPAQ_ASIC3_SD( _b, u16, Response1 ) /* */
6278+#define IPAQ_ASIC3_SD_CTRL_Response2(_b) IPAQ_ASIC3_SD( _b, u16, Response2 ) /* */
6279+#define IPAQ_ASIC3_SD_CTRL_Response3(_b) IPAQ_ASIC3_SD( _b, u16, Response3 ) /* */
6280+#define IPAQ_ASIC3_SD_CTRL_Response4(_b) IPAQ_ASIC3_SD( _b, u16, Response4 ) /* */
6281+#define IPAQ_ASIC3_SD_CTRL_Response5(_b) IPAQ_ASIC3_SD( _b, u16, Response5 ) /* */
6282+#define IPAQ_ASIC3_SD_CTRL_Response6(_b) IPAQ_ASIC3_SD( _b, u16, Response6 ) /* */
6283+#define IPAQ_ASIC3_SD_CTRL_Response7(_b) IPAQ_ASIC3_SD( _b, u16, Response7 ) /* */
6284+#define IPAQ_ASIC3_SD_CTRL_CardStatus(_b) IPAQ_ASIC3_SD( _b, u16, CardStatus ) /* */
6285+#define IPAQ_ASIC3_SD_CTRL_BufferCtrl(_b) IPAQ_ASIC3_SD( _b, u16, BufferCtrl ) /* and error status*/
6286+#define IPAQ_ASIC3_SD_CTRL_IntMaskCard(_b) IPAQ_ASIC3_SD( _b, u16, IntMaskCard ) /* */
6287+#define IPAQ_ASIC3_SD_CTRL_IntMaskBuffer(_b) IPAQ_ASIC3_SD( _b, u16, IntMaskBuffer ) /* */
6288+#define IPAQ_ASIC3_SD_CTRL_CardClockCtrl(_b) IPAQ_ASIC3_SD( _b, u16, CardClockCtrl ) /* */
6289+#define IPAQ_ASIC3_SD_CTRL_MemCardXferDataLen(_b) IPAQ_ASIC3_SD( _b, u16, MemCardXferDataLen ) /* */
6290+#define IPAQ_ASIC3_SD_CTRL_MemCardOptionSetup(_b) IPAQ_ASIC3_SD( _b, u16, MemCardOptionSetup ) /* */
6291+#define IPAQ_ASIC3_SD_CTRL_ErrorStatus0(_b) IPAQ_ASIC3_SD( _b, u16, ErrorStatus0 ) /* */
6292+#define IPAQ_ASIC3_SD_CTRL_ErrorStatus1(_b) IPAQ_ASIC3_SD( _b, u16, ErrorStatus1 ) /* */
6293+#define IPAQ_ASIC3_SD_CTRL_DataPort(_b) IPAQ_ASIC3_SD( _b, u16, DataPort ) /* */
6294+#define IPAQ_ASIC3_SD_CTRL_TransactionCtrl(_b) IPAQ_ASIC3_SD( _b, u16, TransactionCtrl ) /* */
6295+#define IPAQ_ASIC3_SD_CTRL_SoftwareReset(_b) IPAQ_ASIC3_SD( _b, u16, SoftwareReset ) /* */
6296+
6297+#define SD_CTRL_SOFTWARE_RESET_CLEAR (1<<0)
6298+
6299+#define SD_CTRL_TRANSACTIONCONTROL_SET (1<<8) // 0x0100
6300+
6301+#define SD_CTRL_CARDCLOCKCONTROL_FOR_SD_CARD (1<<15)// 0x8000
6302+#define SD_CTRL_CARDCLOCKCONTROL_ENABLE_CLOCK (1<<8) // 0x0100
6303+#define SD_CTRL_CARDCLOCKCONTROL_CLK_DIV_512 (1<<7) // 0x0080
6304+#define SD_CTRL_CARDCLOCKCONTROL_CLK_DIV_256 (1<<6) // 0x0040
6305+#define SD_CTRL_CARDCLOCKCONTROL_CLK_DIV_128 (1<<5) // 0x0020
6306+#define SD_CTRL_CARDCLOCKCONTROL_CLK_DIV_64 (1<<4) // 0x0010
6307+#define SD_CTRL_CARDCLOCKCONTROL_CLK_DIV_32 (1<<3) // 0x0008
6308+#define SD_CTRL_CARDCLOCKCONTROL_CLK_DIV_16 (1<<2) // 0x0004
6309+#define SD_CTRL_CARDCLOCKCONTROL_CLK_DIV_8 (1<<1) // 0x0002
6310+#define SD_CTRL_CARDCLOCKCONTROL_CLK_DIV_4 (1<<0) // 0x0001
6311+#define SD_CTRL_CARDCLOCKCONTROL_CLK_DIV_2 (0<<0) // 0x0000
6312+
6313+#define MEM_CARD_OPTION_REQUIRED 0x000e
6314+#define MEM_CARD_OPTION_DATA_RESPONSE_TIMEOUT(x) (((x)&0x0f)<<4) /* Four bits */
6315+#define MEM_CARD_OPTION_C2_MODULE_NOT_PRESENT (1<<14) // 0x4000
6316+#define MEM_CARD_OPTION_DATA_XFR_WIDTH_1 (1<<15) // 0x8000
6317+#define MEM_CARD_OPTION_DATA_XFR_WIDTH_4 (0<<15) //~0x8000
6318+
6319+#define SD_CTRL_COMMAND_INDEX(x) ((x)&0x3f) /* 0=CMD0, 1=CMD1, ..., 63=CMD63 */
6320+#define SD_CTRL_COMMAND_TYPE_CMD (0 << 6)
6321+#define SD_CTRL_COMMAND_TYPE_ACMD (1 << 6)
6322+#define SD_CTRL_COMMAND_TYPE_AUTHENTICATION (2 << 6)
6323+#define SD_CTRL_COMMAND_RESPONSE_TYPE_NORMAL (0 << 8)
6324+#define SD_CTRL_COMMAND_RESPONSE_TYPE_EXT_R1 (4 << 8)
6325+#define SD_CTRL_COMMAND_RESPONSE_TYPE_EXT_R1B (5 << 8)
6326+#define SD_CTRL_COMMAND_RESPONSE_TYPE_EXT_R2 (6 << 8)
6327+#define SD_CTRL_COMMAND_RESPONSE_TYPE_EXT_R3 (7 << 8)
6328+#define SD_CTRL_COMMAND_DATA_PRESENT (1 << 11)
6329+#define SD_CTRL_COMMAND_TRANSFER_READ (1 << 12)
6330+#define SD_CTRL_COMMAND_TRANSFER_WRITE (0 << 12)
6331+#define SD_CTRL_COMMAND_MULTI_BLOCK (1 << 13)
6332+#define SD_CTRL_COMMAND_SECURITY_CMD (1 << 14)
6333+
6334+#define SD_CTRL_STOP_INTERNAL_ISSSUE_CMD12 (1 << 0)
6335+#define SD_CTRL_STOP_INTERNAL_AUTO_ISSUE_CMD12 (1 << 8)
6336+
6337+#define SD_CTRL_CARDSTATUS_RESPONSE_END (1 << 0)
6338+#define SD_CTRL_CARDSTATUS_RW_END (1 << 2)
6339+#define SD_CTRL_CARDSTATUS_CARD_REMOVED_0 (1 << 3)
6340+#define SD_CTRL_CARDSTATUS_CARD_INSERTED_0 (1 << 4)
6341+#define SD_CTRL_CARDSTATUS_SIGNAL_STATE_PRESENT_0 (1 << 5)
6342+#define SD_CTRL_CARDSTATUS_WRITE_PROTECT (1 << 7)
6343+#define SD_CTRL_CARDSTATUS_CARD_REMOVED_3 (1 << 8)
6344+#define SD_CTRL_CARDSTATUS_CARD_INSERTED_3 (1 << 9)
6345+#define SD_CTRL_CARDSTATUS_SIGNAL_STATE_PRESENT_3 (1 << 10)
6346+
6347+#define SD_CTRL_BUFFERSTATUS_CMD_INDEX_ERROR (1 << 0) // 0x0001
6348+#define SD_CTRL_BUFFERSTATUS_CRC_ERROR (1 << 1) // 0x0002
6349+#define SD_CTRL_BUFFERSTATUS_STOP_BIT_END_ERROR (1 << 2) // 0x0004
6350+#define SD_CTRL_BUFFERSTATUS_DATA_TIMEOUT (1 << 3) // 0x0008
6351+#define SD_CTRL_BUFFERSTATUS_BUFFER_OVERFLOW (1 << 4) // 0x0010
6352+#define SD_CTRL_BUFFERSTATUS_BUFFER_UNDERFLOW (1 << 5) // 0x0020
6353+#define SD_CTRL_BUFFERSTATUS_CMD_TIMEOUT (1 << 6) // 0x0040
6354+#define SD_CTRL_BUFFERSTATUS_UNK7 (1 << 7) // 0x0080
6355+#define SD_CTRL_BUFFERSTATUS_BUFFER_READ_ENABLE (1 << 8) // 0x0100
6356+#define SD_CTRL_BUFFERSTATUS_BUFFER_WRITE_ENABLE (1 << 9) // 0x0200
6357+#define SD_CTRL_BUFFERSTATUS_ILLEGAL_FUNCTION (1 << 13)// 0x2000
6358+#define SD_CTRL_BUFFERSTATUS_CMD_BUSY (1 << 14)// 0x4000
6359+#define SD_CTRL_BUFFERSTATUS_ILLEGAL_ACCESS (1 << 15)// 0x8000
6360+
6361+#define SD_CTRL_INTMASKCARD_RESPONSE_END (1 << 0) // 0x0001
6362+#define SD_CTRL_INTMASKCARD_RW_END (1 << 2) // 0x0004
6363+#define SD_CTRL_INTMASKCARD_CARD_REMOVED_0 (1 << 3) // 0x0008
6364+#define SD_CTRL_INTMASKCARD_CARD_INSERTED_0 (1 << 4) // 0x0010
6365+#define SD_CTRL_INTMASKCARD_SIGNAL_STATE_PRESENT_0 (1 << 5) // 0x0020
6366+#define SD_CTRL_INTMASKCARD_UNK6 (1 << 6) // 0x0040
6367+#define SD_CTRL_INTMASKCARD_WRITE_PROTECT (1 << 7) // 0x0080
6368+#define SD_CTRL_INTMASKCARD_CARD_REMOVED_3 (1 << 8) // 0x0100
6369+#define SD_CTRL_INTMASKCARD_CARD_INSERTED_3 (1 << 9) // 0x0200
6370+#define SD_CTRL_INTMASKCARD_SIGNAL_STATE_PRESENT_3 (1 << 10)// 0x0400
6371+
6372+#define SD_CTRL_INTMASKBUFFER_CMD_INDEX_ERROR (1 << 0) // 0x0001
6373+#define SD_CTRL_INTMASKBUFFER_CRC_ERROR (1 << 1) // 0x0002
6374+#define SD_CTRL_INTMASKBUFFER_STOP_BIT_END_ERROR (1 << 2) // 0x0004
6375+#define SD_CTRL_INTMASKBUFFER_DATA_TIMEOUT (1 << 3) // 0x0008
6376+#define SD_CTRL_INTMASKBUFFER_BUFFER_OVERFLOW (1 << 4) // 0x0010
6377+#define SD_CTRL_INTMASKBUFFER_BUFFER_UNDERFLOW (1 << 5) // 0x0020
6378+#define SD_CTRL_INTMASKBUFFER_CMD_TIMEOUT (1 << 6) // 0x0040
6379+#define SD_CTRL_INTMASKBUFFER_UNK7 (1 << 7) // 0x0080
6380+#define SD_CTRL_INTMASKBUFFER_BUFFER_READ_ENABLE (1 << 8) // 0x0100
6381+#define SD_CTRL_INTMASKBUFFER_BUFFER_WRITE_ENABLE (1 << 9) // 0x0200
6382+#define SD_CTRL_INTMASKBUFFER_ILLEGAL_FUNCTION (1 << 13)// 0x2000
6383+#define SD_CTRL_INTMASKBUFFER_CMD_BUSY (1 << 14)// 0x4000
6384+#define SD_CTRL_INTMASKBUFFER_ILLEGAL_ACCESS (1 << 15)// 0x8000
6385+
6386+#define SD_CTRL_DETAIL0_RESPONSE_CMD_ERROR (1 << 0) // 0x0001
6387+#define SD_CTRL_DETAIL0_END_BIT_ERROR_FOR_RESPONSE_NON_CMD12 (1 << 2) // 0x0004
6388+#define SD_CTRL_DETAIL0_END_BIT_ERROR_FOR_RESPONSE_CMD12 (1 << 3) // 0x0008
6389+#define SD_CTRL_DETAIL0_END_BIT_ERROR_FOR_READ_DATA (1 << 4) // 0x0010
6390+#define SD_CTRL_DETAIL0_END_BIT_ERROR_FOR_WRITE_CRC_STATUS (1 << 5) // 0x0020
6391+#define SD_CTRL_DETAIL0_CRC_ERROR_FOR_RESPONSE_NON_CMD12 (1 << 8) // 0x0100
6392+#define SD_CTRL_DETAIL0_CRC_ERROR_FOR_RESPONSE_CMD12 (1 << 9) // 0x0200
6393+#define SD_CTRL_DETAIL0_CRC_ERROR_FOR_READ_DATA (1 << 10)// 0x0400
6394+#define SD_CTRL_DETAIL0_CRC_ERROR_FOR_WRITE_CMD (1 << 11)// 0x0800
6395+
6396+#define SD_CTRL_DETAIL1_NO_CMD_RESPONSE (1 << 0) // 0x0001
6397+#define SD_CTRL_DETAIL1_TIMEOUT_READ_DATA (1 << 4) // 0x0010
6398+#define SD_CTRL_DETAIL1_TIMEOUT_CRS_STATUS (1 << 5) // 0x0020
6399+#define SD_CTRL_DETAIL1_TIMEOUT_CRC_BUSY (1 << 6) // 0x0040
6400+
6401+#define _IPAQ_ASIC3_SDIO_CTRL_Base 0x1200
6402+
6403+#define IPAQ_ASIC3_SDIO(_b, s,x) \
6404+ (*((volatile s *) ((_b) + _IPAQ_ASIC3_SDIO_CTRL_Base + (_IPAQ_ASIC3_SDIO_CTRL_ ## x))))
6405+
6406+#define _IPAQ_ASIC3_SDIO_CTRL_Cmd 0x00
6407+#define _IPAQ_ASIC3_SDIO_CTRL_CardPortSel 0x04
6408+#define _IPAQ_ASIC3_SDIO_CTRL_Arg0 0x08
6409+#define _IPAQ_ASIC3_SDIO_CTRL_Arg1 0x0C
6410+#define _IPAQ_ASIC3_SDIO_CTRL_TransferBlockCount 0x14
6411+#define _IPAQ_ASIC3_SDIO_CTRL_Response0 0x18
6412+#define _IPAQ_ASIC3_SDIO_CTRL_Response1 0x1C
6413+#define _IPAQ_ASIC3_SDIO_CTRL_Response2 0x20
6414+#define _IPAQ_ASIC3_SDIO_CTRL_Response3 0x24
6415+#define _IPAQ_ASIC3_SDIO_CTRL_Response4 0x28
6416+#define _IPAQ_ASIC3_SDIO_CTRL_Response5 0x2C
6417+#define _IPAQ_ASIC3_SDIO_CTRL_Response6 0x30
6418+#define _IPAQ_ASIC3_SDIO_CTRL_Response7 0x34
6419+#define _IPAQ_ASIC3_SDIO_CTRL_CardStatus 0x38
6420+#define _IPAQ_ASIC3_SDIO_CTRL_BufferCtrl 0x3C
6421+#define _IPAQ_ASIC3_SDIO_CTRL_IntMaskCard 0x40
6422+#define _IPAQ_ASIC3_SDIO_CTRL_IntMaskBuffer 0x44
6423+#define _IPAQ_ASIC3_SDIO_CTRL_CardXferDataLen 0x4C
6424+#define _IPAQ_ASIC3_SDIO_CTRL_CardOptionSetup 0x50
6425+#define _IPAQ_ASIC3_SDIO_CTRL_ErrorStatus0 0x54
6426+#define _IPAQ_ASIC3_SDIO_CTRL_ErrorStatus1 0x58
6427+#define _IPAQ_ASIC3_SDIO_CTRL_DataPort 0x60
6428+#define _IPAQ_ASIC3_SDIO_CTRL_TransactionCtrl 0x68
6429+#define _IPAQ_ASIC3_SDIO_CTRL_CardIntCtrl 0x6C
6430+#define _IPAQ_ASIC3_SDIO_CTRL_ClocknWaitCtrl 0x70
6431+#define _IPAQ_ASIC3_SDIO_CTRL_HostInformation 0x74
6432+#define _IPAQ_ASIC3_SDIO_CTRL_ErrorCtrl 0x78
6433+#define _IPAQ_ASIC3_SDIO_CTRL_LEDCtrl 0x7C
6434+#define _IPAQ_ASIC3_SDIO_CTRL_SoftwareReset 0x1C0
6435+
6436+#define IPAQ_ASIC3_SDIO_CTRL_Cmd(_b) IPAQ_ASIC3_SDIO( _b, u16, Cmd ) /* */
6437+#define IPAQ_ASIC3_SDIO_CTRL_CardPortSel(_b) IPAQ_ASIC3_SDIO( _b, u16, CardPortSel ) /* */
6438+#define IPAQ_ASIC3_SDIO_CTRL_Arg0(_b) IPAQ_ASIC3_SDIO( _b, u16, Arg0 ) /* */
6439+#define IPAQ_ASIC3_SDIO_CTRL_Arg1(_b) IPAQ_ASIC3_SDIO( _b, u16, Arg1 ) /* */
6440+#define IPAQ_ASIC3_SDIO_CTRL_TransferBlockCount(_b) IPAQ_ASIC3_SDIO( _b, u16, TransferBlockCount ) /* */
6441+#define IPAQ_ASIC3_SDIO_CTRL_Response0(_b) IPAQ_ASIC3_SDIO( _b, u16, Response0 ) /* */
6442+#define IPAQ_ASIC3_SDIO_CTRL_Response1(_b) IPAQ_ASIC3_SDIO( _b, u16, Response1 ) /* */
6443+#define IPAQ_ASIC3_SDIO_CTRL_Response2(_b) IPAQ_ASIC3_SDIO( _b, u16, Response2 ) /* */
6444+#define IPAQ_ASIC3_SDIO_CTRL_Response3(_b) IPAQ_ASIC3_SDIO( _b, u16, Response3 ) /* */
6445+#define IPAQ_ASIC3_SDIO_CTRL_Response4(_b) IPAQ_ASIC3_SDIO( _b, u16, Response4 ) /* */
6446+#define IPAQ_ASIC3_SDIO_CTRL_Response5(_b) IPAQ_ASIC3_SDIO( _b, u16, Response5 ) /* */
6447+#define IPAQ_ASIC3_SDIO_CTRL_Response6(_b) IPAQ_ASIC3_SDIO( _b, u16, Response6 ) /* */
6448+#define IPAQ_ASIC3_SDIO_CTRL_Response7(_b) IPAQ_ASIC3_SDIO( _b, u16, Response7 ) /* */
6449+#define IPAQ_ASIC3_SDIO_CTRL_CardStatus(_b) IPAQ_ASIC3_SDIO( _b, u16, CardStatus ) /* */
6450+#define IPAQ_ASIC3_SDIO_CTRL_BufferCtrl(_b) IPAQ_ASIC3_SDIO( _b, u16, BufferCtrl ) /* and error status*/
6451+#define IPAQ_ASIC3_SDIO_CTRL_IntMaskCard(_b) IPAQ_ASIC3_SDIO( _b, u16, IntMaskCard ) /* */
6452+#define IPAQ_ASIC3_SDIO_CTRL_IntMaskBuffer(_b) IPAQ_ASIC3_SDIO( _b, u16, IntMaskBuffer ) /* */
6453+#define IPAQ_ASIC3_SDIO_CTRL_CardXferDataLen(_b) IPAQ_ASIC3_SDIO( _b, u16, CardXferDataLen ) /* */
6454+#define IPAQ_ASIC3_SDIO_CTRL_CardOptionSetup(_b) IPAQ_ASIC3_SDIO( _b, u16, CardOptionSetup ) /* */
6455+#define IPAQ_ASIC3_SDIO_CTRL_ErrorStatus0(_b) IPAQ_ASIC3_SDIO( _b, u16, ErrorStatus0 ) /* */
6456+#define IPAQ_ASIC3_SDIO_CTRL_ErrorStatus1(_b) IPAQ_ASIC3_SDIO( _b, u16, ErrorStatus1 ) /* */
6457+#define IPAQ_ASIC3_SDIO_CTRL_DataPort(_b) IPAQ_ASIC3_SDIO( _b, u16, DataPort ) /* */
6458+#define IPAQ_ASIC3_SDIO_CTRL_TransactionCtrl(_b) IPAQ_ASIC3_SDIO( _b, u16, TransactionCtrl ) /* */
6459+#define IPAQ_ASIC3_SDIO_CTRL_CardIntCtrl(_b) IPAQ_ASIC3_SDIO( _b, u16, CardIntCtrl ) /* */
6460+#define IPAQ_ASIC3_SDIO_CTRL_ClocknWaitCtrl(_b) IPAQ_ASIC3_SDIO( _b, u16, ClocknWaitCtrl ) /* */
6461+#define IPAQ_ASIC3_SDIO_CTRL_HostInformation(_b) IPAQ_ASIC3_SDIO( _b, u16, HostInformation ) /* */
6462+#define IPAQ_ASIC3_SDIO_CTRL_ErrorCtrl(_b) IPAQ_ASIC3_SDIO( _b, u16, ErrorCtrl ) /* */
6463+#define IPAQ_ASIC3_SDIO_CTRL_LEDCtrl(_b) IPAQ_ASIC3_SDIO( _b, u16, LEDCtrl ) /* */
6464+#define IPAQ_ASIC3_SDIO_CTRL_SoftwareReset(_b) IPAQ_ASIC3_SDIO( _b, u16, SoftwareReset ) /* */
6465+
6466+#define IPAQ_ASIC3_MAP_SIZE 0x2000
6467+
6468+#endif
6469Index: linux-2.6.22/include/linux/backlight.h
6470===================================================================
6471--- linux-2.6.22.orig/include/linux/backlight.h 2007-07-19 11:41:50.000000000 +0100
6472+++ linux-2.6.22/include/linux/backlight.h 2007-07-19 11:41:55.000000000 +0100
6473@@ -87,4 +87,11 @@ extern void backlight_device_unregister(
6474
6475 #define to_backlight_device(obj) container_of(obj, struct backlight_device, class_dev)
6476
6477+struct generic_bl_info {
6478+ int max_intensity;
6479+ int default_intensity;
6480+ int limit_mask;
6481+ void (*set_bl_intensity)(int intensity);
6482+};
6483+
6484 #endif
6485Index: linux-2.6.22/include/linux/gpiodev.h
6486===================================================================
6487--- /dev/null 1970-01-01 00:00:00.000000000 +0000
6488+++ linux-2.6.22/include/linux/gpiodev.h 2007-07-19 11:41:55.000000000 +0100
6489@@ -0,0 +1,44 @@
6490+#ifndef __GPIODEV_H
6491+#define __GPIODEV_H
6492+
6493+#include <linux/device.h>
6494+#include <linux/platform_device.h>
6495+#include <asm/gpio.h>
6496+
6497+/* Interface */
6498+
6499+/* This structure must be first member of device platform_data structure
6500+ of a device which provides gpiodev interface. All method pointers
6501+ must be non-NULL, so stubs must be used for non-implemented ones. */
6502+struct gpiodev_ops {
6503+ int (*get)(struct device *this, unsigned gpio_no);
6504+ void (*set)(struct device *this, unsigned gpio_no, int val);
6505+ int (*to_irq)(struct device *this, unsigned gpio_no);
6506+};
6507+
6508+/* Generalized GPIO structure */
6509+
6510+struct gpio {
6511+ struct device *gpio_dev;
6512+ unsigned gpio_no;
6513+};
6514+
6515+/* API functions */
6516+
6517+static inline int gpiodev_get_value(struct gpio *gpio)
6518+{
6519+ struct gpiodev_ops *ops = gpio->gpio_dev->platform_data;
6520+ return ops->get(gpio->gpio_dev, gpio->gpio_no);
6521+}
6522+static inline void gpiodev_set_value(struct gpio *gpio, int val)
6523+{
6524+ struct gpiodev_ops *ops = gpio->gpio_dev->platform_data;
6525+ ops->set(gpio->gpio_dev, gpio->gpio_no, val);
6526+}
6527+static inline int gpiodev_to_irq(struct gpio *gpio)
6528+{
6529+ struct gpiodev_ops *ops = gpio->gpio_dev->platform_data;
6530+ return ops->to_irq(gpio->gpio_dev, gpio->gpio_no);
6531+}
6532+
6533+#endif /* __GPIODEV_H */
6534Index: linux-2.6.22/include/linux/input_pda.h
6535===================================================================
6536--- /dev/null 1970-01-01 00:00:00.000000000 +0000
6537+++ linux-2.6.22/include/linux/input_pda.h 2007-07-19 11:41:55.000000000 +0100
6538@@ -0,0 +1,47 @@
6539+#ifndef _INPUT_PDA_H
6540+#define _INPUT_PDA_H
6541+
6542+/*
6543+ * This is temporary virtual button key codes map
6544+ * for keyboardless handheld computers.
6545+ * Its purpose is to provide map common to all devices
6546+ * and known to work with current software and its bugs
6547+ * and misfeatures. Once issues with the software are
6548+ * solved, codes from input.h will be used directly
6549+ * (missing key definitions will be added).
6550+ */
6551+
6552+/* Some directly usable keycodes:
6553+KEY_POWER - Power/suspend button
6554+KEY_ENTER - Enter/Action/Central button on joypad
6555+KEY_UP
6556+KEY_DOWN
6557+KEY_LEFT
6558+KEY_RIGHT
6559+*/
6560+
6561+/* XXX Instead of using any values in include/linux/input.h, we have to use
6562+ use values < 128 due to some munging that kdrive does to get keystrokes.
6563+ When kdrive gets its key events from evdev instead of the console,
6564+ we should be able to switch to using input.h values and get rid of
6565+ xmodmap. */
6566+
6567+#define _KEY_APP1 KEY_F9 // xmodmap sees 67 + 8 = 75
6568+#define _KEY_APP2 KEY_F10 // xmodmap 76
6569+#define _KEY_APP3 KEY_F11 // xmodmap 95
6570+#define _KEY_APP4 KEY_F12 // xmodmap 96
6571+
6572+#define _KEY_RECORD KEY_RO
6573+
6574+/* It is highly recommended to use exactly 4 codes above for
6575+ 4 buttons the device has. This will ensure that console and
6576+ framebuffer applications (e.g. games) will work ok on all
6577+ devices. If you'd like more distinguishable names, following
6578+ convenience defines are provided, suiting many devices. */
6579+
6580+#define _KEY_CALENDAR _KEY_APP1
6581+#define _KEY_CONTACTS _KEY_APP2
6582+#define _KEY_MAIL _KEY_APP3
6583+#define _KEY_HOMEPAGE _KEY_APP4
6584+
6585+#endif
6586Index: linux-2.6.22/include/linux/pda_power.h
6587===================================================================
6588--- /dev/null 1970-01-01 00:00:00.000000000 +0000
6589+++ linux-2.6.22/include/linux/pda_power.h 2007-07-19 11:41:55.000000000 +0100
6590@@ -0,0 +1,31 @@
6591+/*
6592+ * Common power driver for PDAs and phones with one or two external
6593+ * power supplies (AC/USB) connected to main and backup batteries,
6594+ * and optional builtin charger.
6595+ *
6596+ * Copyright 2007 Anton Vorontsov <cbou@mail.ru>
6597+ *
6598+ * This program is free software; you can redistribute it and/or modify
6599+ * it under the terms of the GNU General Public License version 2 as
6600+ * published by the Free Software Foundation.
6601+ */
6602+
6603+#ifndef __PDA_POWER_H__
6604+#define __PDA_POWER_H__
6605+
6606+#define PDA_POWER_CHARGE_AC (1 << 0)
6607+#define PDA_POWER_CHARGE_USB (1 << 1)
6608+
6609+struct pda_power_pdata {
6610+ int (*is_ac_online)(void);
6611+ int (*is_usb_online)(void);
6612+ void (*set_charge)(int flags);
6613+
6614+ char **supplied_to;
6615+ size_t num_supplicants;
6616+
6617+ unsigned int wait_for_status; /* msecs, default is 500 */
6618+ unsigned int wait_for_charger; /* msecs, default is 500 */
6619+};
6620+
6621+#endif /* __PDA_POWER_H__ */
6622Index: linux-2.6.22/include/linux/soc/asic3_base.h
6623===================================================================
6624--- /dev/null 1970-01-01 00:00:00.000000000 +0000
6625+++ linux-2.6.22/include/linux/soc/asic3_base.h 2007-07-19 11:41:55.000000000 +0100
6626@@ -0,0 +1,104 @@
6627+#include <asm/types.h>
6628+#include <linux/gpiodev.h>
6629+
6630+/* Private API - for ASIC3 devices internal use only */
6631+#define HDR_IPAQ_ASIC3_ACTION(ACTION,action,fn,FN) \
6632+u32 asic3_get_gpio_ ## action ## _ ## fn (struct device *dev); \
6633+void asic3_set_gpio_ ## action ## _ ## fn (struct device *dev, u32 bits, u32 val);
6634+
6635+#define HDR_IPAQ_ASIC3_FN(fn,FN) \
6636+ HDR_IPAQ_ASIC3_ACTION ( MASK,mask,fn,FN) \
6637+ HDR_IPAQ_ASIC3_ACTION ( DIR, dir, fn, FN) \
6638+ HDR_IPAQ_ASIC3_ACTION ( OUT, out, fn, FN) \
6639+ HDR_IPAQ_ASIC3_ACTION ( LEVELTRI, trigtype, fn, FN) \
6640+ HDR_IPAQ_ASIC3_ACTION ( RISING, rising, fn, FN) \
6641+ HDR_IPAQ_ASIC3_ACTION ( LEVEL, triglevel, fn, FN) \
6642+ HDR_IPAQ_ASIC3_ACTION ( SLEEP_MASK, sleepmask, fn, FN) \
6643+ HDR_IPAQ_ASIC3_ACTION ( SLEEP_OUT, sleepout, fn, FN) \
6644+ HDR_IPAQ_ASIC3_ACTION ( BATT_FAULT_OUT, battfaultout, fn, FN) \
6645+ HDR_IPAQ_ASIC3_ACTION ( INT_STATUS, intstatus, fn, FN) \
6646+ HDR_IPAQ_ASIC3_ACTION ( ALT_FUNCTION, alt_fn, fn, FN) \
6647+ HDR_IPAQ_ASIC3_ACTION ( SLEEP_CONF, sleepconf, fn, FN) \
6648+ HDR_IPAQ_ASIC3_ACTION ( STATUS, status, fn, FN)
6649+
6650+/* Public API */
6651+
6652+#define ASIC3_GPIOA_IRQ_BASE 0
6653+#define ASIC3_GPIOB_IRQ_BASE 16
6654+#define ASIC3_GPIOC_IRQ_BASE 32
6655+#define ASIC3_GPIOD_IRQ_BASE 48
6656+#define ASIC3_LED0_IRQ 64
6657+#define ASIC3_LED1_IRQ 65
6658+#define ASIC3_LED2_IRQ 66
6659+#define ASIC3_SPI_IRQ 67
6660+#define ASIC3_SMBUS_IRQ 68
6661+#define ASIC3_OWM_IRQ 69
6662+
6663+#define ASIC3_NR_GPIO_IRQS 64 /* 16 bits each GPIO A...D banks */
6664+#define ASIC3_NR_IRQS (ASIC3_OWM_IRQ + 1)
6665+
6666+extern int asic3_irq_base(struct device *dev);
6667+
6668+extern void asic3_write_register(struct device *dev, unsigned int reg,
6669+ u32 value);
6670+extern u32 asic3_read_register(struct device *dev, unsigned int reg);
6671+
6672+/* old clock api */
6673+extern void asic3_set_clock_sel(struct device *dev, u32 bits, u32 val);
6674+extern u32 asic3_get_clock_cdex(struct device *dev);
6675+extern void asic3_set_clock_cdex(struct device *dev, u32 bits, u32 val);
6676+
6677+extern void asic3_set_extcf_select(struct device *dev, u32 bits, u32 val);
6678+extern void asic3_set_extcf_reset(struct device *dev, u32 bits, u32 val);
6679+extern void asic3_set_sdhwctrl(struct device *dev, u32 bits, u32 val);
6680+
6681+extern void asic3_set_led(struct device *dev, int led_num, int duty_time,
6682+ int cycle_time, int timebase);
6683+
6684+extern int asic3_register_mmc(struct device *dev);
6685+extern int asic3_unregister_mmc(struct device *dev);
6686+
6687+/* Accessors for GPIO banks */
6688+HDR_IPAQ_ASIC3_FN(a, A)
6689+HDR_IPAQ_ASIC3_FN(b, B)
6690+HDR_IPAQ_ASIC3_FN(c, C)
6691+HDR_IPAQ_ASIC3_FN(d, D)
6692+
6693+#define _IPAQ_ASIC3_GPIO_BANK_A 0
6694+#define _IPAQ_ASIC3_GPIO_BANK_B 1
6695+#define _IPAQ_ASIC3_GPIO_BANK_C 2
6696+#define _IPAQ_ASIC3_GPIO_BANK_D 3
6697+
6698+#define ASIC3_GPIO_bit(gpio) (1 << (gpio & 0xf))
6699+
6700+extern int asic3_get_gpio_bit(struct device *dev, int gpio);
6701+extern void asic3_set_gpio_bit(struct device *dev, int gpio, int val);
6702+extern int asic3_gpio_get_value(struct device *dev, unsigned gpio);
6703+extern void asic3_gpio_set_value(struct device *dev, unsigned gpio, int val);
6704+
6705+
6706+struct tmio_mmc_hwconfig;
6707+
6708+struct asic3_platform_data
6709+{
6710+ // Must be first member
6711+ struct gpiodev_ops gpiodev_ops;
6712+
6713+ struct {
6714+ u32 dir;
6715+ u32 init;
6716+ u32 sleep_mask;
6717+ u32 sleep_out;
6718+ u32 batt_fault_out;
6719+ u32 sleep_conf;
6720+ u32 alt_function;
6721+ } gpio_a, gpio_b, gpio_c, gpio_d;
6722+
6723+ int irq_base;
6724+ unsigned int bus_shift;
6725+
6726+ struct platform_device **child_platform_devs;
6727+ int num_child_platform_devs;
6728+
6729+ struct tmio_mmc_hwconfig *tmio_mmc_hwconfig;
6730+};
6731Index: linux-2.6.22/include/linux/soc/tmio_mmc.h
6732===================================================================
6733--- /dev/null 1970-01-01 00:00:00.000000000 +0000
6734+++ linux-2.6.22/include/linux/soc/tmio_mmc.h 2007-07-19 11:41:55.000000000 +0100
6735@@ -0,0 +1,17 @@
6736+#include <linux/platform_device.h>
6737+
6738+#define MMC_CLOCK_DISABLED 0
6739+#define MMC_CLOCK_ENABLED 1
6740+
6741+#define TMIO_WP_ALWAYS_RW ((void*)-1)
6742+
6743+struct tmio_mmc_hwconfig {
6744+ void (*hwinit)(struct platform_device *sdev);
6745+ void (*set_mmc_clock)(struct platform_device *sdev, int state);
6746+
6747+ /* NULL - use ASIC3 signal,
6748+ TMIO_WP_ALWAYS_RW - assume always R/W (e.g. miniSD)
6749+ otherwise - machine-specific handler */
6750+ int (*mmc_get_ro)(struct platform_device *pdev);
6751+ short address_shift;
6752+};
6753Index: linux-2.6.22/include/asm-arm/arch-pxa/pxa-regs.h
6754===================================================================
6755--- linux-2.6.22.orig/include/asm-arm/arch-pxa/pxa-regs.h 2007-07-19 11:41:52.000000000 +0100
6756+++ linux-2.6.22/include/asm-arm/arch-pxa/pxa-regs.h 2007-07-19 11:41:55.000000000 +0100
6757@@ -2063,6 +2063,8 @@
6758 #define LDCMD_SOFINT (1 << 22)
6759 #define LDCMD_EOFINT (1 << 21)
6760
6761+#define LCCR4_13M_PCD_EN (1<<25) /* 13M PCD enable */
6762+#define LCCR4_PCDDIV (1<<31) /* PCD selection */
6763
6764 #define LCCR5_SOFM1 (1<<0) /* Start Of Frame Mask for Overlay 1 (channel 1) */
6765 #define LCCR5_SOFM2 (1<<1) /* Start Of Frame Mask for Overlay 2 (channel 2) */
6766Index: linux-2.6.22/drivers/mmc/host/Kconfig
6767===================================================================
6768--- linux-2.6.22.orig/drivers/mmc/host/Kconfig 2007-07-19 11:41:50.000000000 +0100
6769+++ linux-2.6.22/drivers/mmc/host/Kconfig 2007-07-19 11:43:21.000000000 +0100
6770@@ -99,4 +99,10 @@ config MMC_TIFM_SD
6771
6772 To compile this driver as a module, choose M here: the
6773 module will be called tifm_sd.
6774-
6775+
6776+config MMC_ASIC3
6777+ tristate "HTC ASIC3 SD/MMC support"
6778+ depends on MMC && HTC_ASIC3
6779+ help
6780+ This provides support for the ASIC3 SD/MMC controller, used
6781+ in the iPAQ hx4700 and others.
6782Index: linux-2.6.22/drivers/mmc/host/Makefile
6783===================================================================
6784--- linux-2.6.22.orig/drivers/mmc/host/Makefile 2007-07-19 11:41:50.000000000 +0100
6785+++ linux-2.6.22/drivers/mmc/host/Makefile 2007-07-19 11:41:55.000000000 +0100
6786@@ -15,4 +15,4 @@ obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
6787 obj-$(CONFIG_MMC_OMAP) += omap.o
6788 obj-$(CONFIG_MMC_AT91) += at91_mci.o
6789 obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
6790-
6791+obj-$(CONFIG_MMC_ASIC3) += asic3_mmc.o
6792Index: linux-2.6.22/drivers/mmc/host/asic3_mmc.c
6793===================================================================
6794--- /dev/null 1970-01-01 00:00:00.000000000 +0000
6795+++ linux-2.6.22/drivers/mmc/host/asic3_mmc.c 2007-07-19 11:41:55.000000000 +0100
6796@@ -0,0 +1,900 @@
6797+/* Note that this driver can likely be merged into the tmio driver, so
6798+ * consider this code temporary. It works, though.
6799+ */
6800+/*
6801+ * linux/drivers/mmc/asic3_mmc.c
6802+ *
6803+ * Copyright (c) 2005 SDG Systems, LLC
6804+ *
6805+ * based on tmio_mmc.c
6806+ * Copyright (C) 2004 Ian Molton
6807+ *
6808+ * Refactored to support all ASIC3 devices, 2006 Paul Sokolovsky
6809+ *
6810+ * This program is free software; you can redistribute it and/or modify
6811+ * it under the terms of the GNU General Public License version 2 as
6812+ * published by the Free Software Foundation.
6813+ *
6814+ * Driver for the SD / SDIO cell found in:
6815+ *
6816+ * TC6393XB
6817+ *
6818+ * This driver draws mainly on scattered spec sheets, Reverse engineering
6819+ * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
6820+ * support).
6821+ *
6822+ * Supports MMC 1 bit transfers and SD 1 and 4 bit modes.
6823+ *
6824+ * TODO:
6825+ * Eliminate FIXMEs
6826+ * SDIO support
6827+ * Power management
6828+ * Handle MMC errors (at all)
6829+ *
6830+ */
6831+#include <linux/module.h>
6832+#include <linux/moduleparam.h>
6833+#include <linux/init.h>
6834+#include <linux/ioport.h>
6835+#include <linux/platform_device.h>
6836+#include <linux/interrupt.h>
6837+#include <linux/blkdev.h>
6838+#include <linux/delay.h>
6839+#include <linux/err.h>
6840+#include <linux/mmc/mmc.h>
6841+#include <linux/mmc/host.h>
6842+#include <linux/mmc/card.h>
6843+//#include <linux/mmc/protocol.h>
6844+#include <linux/mmc/sd.h>
6845+#include <linux/scatterlist.h>
6846+//#include <linux/soc-old.h>
6847+#include <linux/soc/asic3_base.h>
6848+#include <linux/soc/tmio_mmc.h>
6849+
6850+#include <asm/io.h>
6851+#include <asm/irq.h>
6852+#include <asm/mach/irq.h>
6853+#include <linux/clk.h>
6854+#include <asm/mach-types.h>
6855+
6856+#include <asm/hardware/ipaq-asic3.h>
6857+#include "asic3_mmc.h"
6858+
6859+struct asic3_mmc_host {
6860+ void *ctl_base;
6861+ struct device *asic3_dev; /* asic3 device */
6862+ struct tmio_mmc_hwconfig *hwconfig; /* HW config data/handlers, guaranteed != NULL */
6863+ unsigned long bus_shift;
6864+ struct mmc_command *cmd;
6865+ struct mmc_request *mrq;
6866+ struct mmc_data *data;
6867+ struct mmc_host *mmc;
6868+ int irq;
6869+ unsigned short clock_for_sd;
6870+
6871+ /* I/O related stuff */
6872+ struct scatterlist *sg_ptr;
6873+ unsigned int sg_len;
6874+ unsigned int sg_off;
6875+};
6876+
6877+static void
6878+mmc_finish_request(struct asic3_mmc_host *host)
6879+{
6880+ struct mmc_request *mrq = host->mrq;
6881+
6882+ /* Write something to end the command */
6883+ host->mrq = NULL;
6884+ host->cmd = NULL;
6885+ host->data = NULL;
6886+
6887+ mmc_request_done(host->mmc, mrq);
6888+}
6889+
6890+
6891+#define ASIC3_MMC_REG(host, block, reg) (*((volatile u16 *) ((host->ctl_base) + ((_IPAQ_ASIC3_## block ## _Base + _IPAQ_ASIC3_ ## block ## _ ## reg) >> (2 - host->bus_shift))) ))
6892+
6893+static void
6894+mmc_start_command(struct asic3_mmc_host *host, struct mmc_command *cmd)
6895+{
6896+ struct mmc_data *data = host->data;
6897+ int c = cmd->opcode;
6898+
6899+ DBG("Opcode: %d, base: %p\n", cmd->opcode, host->ctl_base);
6900+
6901+ if(cmd->opcode == MMC_STOP_TRANSMISSION) {
6902+ ASIC3_MMC_REG(host, SD_CTRL, StopInternal) = SD_CTRL_STOP_INTERNAL_ISSSUE_CMD12;
6903+ cmd->resp[0] = cmd->opcode;
6904+ cmd->resp[1] = 0;
6905+ cmd->resp[2] = 0;
6906+ cmd->resp[3] = 0;
6907+ cmd->resp[4] = 0;
6908+ return;
6909+ }
6910+
6911+ switch(cmd->flags & 0x1f) {
6912+ case MMC_RSP_NONE: c |= SD_CTRL_COMMAND_RESPONSE_TYPE_NORMAL; break;
6913+ case MMC_RSP_R1: c |= SD_CTRL_COMMAND_RESPONSE_TYPE_EXT_R1; break;
6914+ case MMC_RSP_R1B: c |= SD_CTRL_COMMAND_RESPONSE_TYPE_EXT_R1B; break;
6915+ case MMC_RSP_R2: c |= SD_CTRL_COMMAND_RESPONSE_TYPE_EXT_R2; break;
6916+ case MMC_RSP_R3: c |= SD_CTRL_COMMAND_RESPONSE_TYPE_EXT_R3; break;
6917+ default:
6918+ DBG("Unknown response type %d\n", cmd->flags & 0x1f);
6919+ break;
6920+ }
6921+
6922+ host->cmd = cmd;
6923+
6924+ if(cmd->opcode == MMC_APP_CMD) {
6925+ c |= APP_CMD;
6926+ }
6927+ if (cmd->opcode == MMC_GO_IDLE_STATE) {
6928+ c |= (3 << 8); /* This was removed from ipaq-asic3.h for some reason */
6929+ }
6930+ if(data) {
6931+ c |= SD_CTRL_COMMAND_DATA_PRESENT;
6932+ if(data->blocks > 1) {
6933+ ASIC3_MMC_REG(host, SD_CTRL, StopInternal) = SD_CTRL_STOP_INTERNAL_AUTO_ISSUE_CMD12;
6934+ c |= SD_CTRL_COMMAND_MULTI_BLOCK;
6935+ }
6936+ if(data->flags & MMC_DATA_READ) {
6937+ c |= SD_CTRL_COMMAND_TRANSFER_READ;
6938+ }
6939+ /* MMC_DATA_WRITE does not require a bit to be set */
6940+ }
6941+
6942+ /* Enable the command and data interrupts */
6943+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskCard) = ~(
6944+ SD_CTRL_INTMASKCARD_RESPONSE_END
6945+ | SD_CTRL_INTMASKCARD_RW_END
6946+ | SD_CTRL_INTMASKCARD_CARD_REMOVED_0
6947+ | SD_CTRL_INTMASKCARD_CARD_INSERTED_0
6948+#if 0
6949+ | SD_CTRL_INTMASKCARD_CARD_REMOVED_3
6950+ | SD_CTRL_INTMASKCARD_CARD_INSERTED_3
6951+#endif
6952+ );
6953+
6954+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskBuffer) = ~(
6955+ SD_CTRL_INTMASKBUFFER_UNK7
6956+ | SD_CTRL_INTMASKBUFFER_CMD_BUSY
6957+#if 0
6958+ | SD_CTRL_INTMASKBUFFER_CMD_INDEX_ERROR
6959+ | SD_CTRL_INTMASKBUFFER_CRC_ERROR
6960+ | SD_CTRL_INTMASKBUFFER_STOP_BIT_END_ERROR
6961+ | SD_CTRL_INTMASKBUFFER_DATA_TIMEOUT
6962+ | SD_CTRL_INTMASKBUFFER_BUFFER_OVERFLOW
6963+ | SD_CTRL_INTMASKBUFFER_BUFFER_UNDERFLOW
6964+ | SD_CTRL_INTMASKBUFFER_CMD_TIMEOUT
6965+ | SD_CTRL_INTMASKBUFFER_BUFFER_READ_ENABLE
6966+ | SD_CTRL_INTMASKBUFFER_BUFFER_WRITE_ENABLE
6967+ | SD_CTRL_INTMASKBUFFER_ILLEGAL_ACCESS
6968+#endif
6969+ );
6970+
6971+ /* Send the command */
6972+ ASIC3_MMC_REG(host, SD_CTRL, Arg1) = cmd->arg >> 16;
6973+ ASIC3_MMC_REG(host, SD_CTRL, Arg0) = cmd->arg & 0xffff;
6974+ ASIC3_MMC_REG(host, SD_CTRL, Cmd) = c;
6975+}
6976+
6977+/* This chip always returns (at least?) as much data as you ask for. I'm
6978+ * unsure what happens if you ask for less than a block. This should be looked
6979+ * into to ensure that a funny length read doesnt mess up the controller data
6980+ * state machine.
6981+ *
6982+ * Aric: Statement above may not apply to ASIC3.
6983+ *
6984+ * FIXME - this chip cannot do 1 and 2 byte data requests in 4 bit mode
6985+ *
6986+ * Aric: Statement above may not apply to ASIC3.
6987+ */
6988+
6989+static struct tasklet_struct mmc_data_read_tasklet;
6990+
6991+static void
6992+mmc_data_transfer(unsigned long h)
6993+{
6994+ struct asic3_mmc_host *host = (struct asic3_mmc_host *)h;
6995+ struct mmc_data *data = host->data;
6996+ unsigned short *buf;
6997+ int count;
6998+ /* unsigned long flags; */
6999+
7000+ if(!data){
7001+ printk(KERN_WARNING DRIVER_NAME ": Spurious Data IRQ\n");
7002+ return;
7003+ }
7004+
7005+ /* local_irq_save(flags); */
7006+ /* buf = kmap_atomic(host->sg_ptr->page, KM_BIO_SRC_IRQ); */
7007+ buf = kmap(host->sg_ptr->page);
7008+ buf += host->sg_ptr->offset/2 + host->sg_off/2;
7009+
7010+ /*
7011+ * Ensure we dont read more than one block. The chip will interrupt us
7012+ * When the next block is available.
7013+ */
7014+ count = host->sg_ptr->length - host->sg_off;
7015+ if(count > data->blksz) {
7016+ count = data->blksz;
7017+ }
7018+
7019+ DBG("count: %08x, page: %p, offset: %08x flags %08x\n",
7020+ count, host->sg_ptr->page, host->sg_off, data->flags);
7021+
7022+ host->sg_off += count;
7023+
7024+ /* Transfer the data */
7025+ if(data->flags & MMC_DATA_READ) {
7026+ while(count > 0) {
7027+ /* Read two bytes from SD/MMC controller. */
7028+ *buf = ASIC3_MMC_REG(host, SD_CTRL, DataPort);
7029+ buf++;
7030+ count -= 2;
7031+ }
7032+ flush_dcache_page(host->sg_ptr->page);
7033+ } else {
7034+ while(count > 0) {
7035+ /* Write two bytes to SD/MMC controller. */
7036+ ASIC3_MMC_REG(host, SD_CTRL, DataPort) = *buf;
7037+ buf++;
7038+ count -= 2;
7039+ }
7040+ }
7041+
7042+ /* kunmap_atomic(host->sg_ptr->page, KM_BIO_SRC_IRQ); */
7043+ kunmap(host->sg_ptr->page);
7044+ /* local_irq_restore(flags); */
7045+ if(host->sg_off == host->sg_ptr->length) {
7046+ host->sg_ptr++;
7047+ host->sg_off = 0;
7048+ --host->sg_len;
7049+ }
7050+
7051+ return;
7052+}
7053+
7054+static void
7055+mmc_data_end_irq(struct asic3_mmc_host *host)
7056+{
7057+ struct mmc_data *data = host->data;
7058+
7059+ host->data = NULL;
7060+
7061+ if(!data){
7062+ printk(KERN_WARNING DRIVER_NAME ": Spurious data end IRQ\n");
7063+ return;
7064+ }
7065+
7066+ if (data->error == MMC_ERR_NONE) {
7067+ data->bytes_xfered = data->blocks * data->blksz;
7068+ } else {
7069+ data->bytes_xfered = 0;
7070+ }
7071+
7072+ DBG("Completed data request\n");
7073+
7074+ ASIC3_MMC_REG(host, SD_CTRL, StopInternal) = 0;
7075+
7076+ /* Make sure read enable interrupt and write enable interrupt are disabled */
7077+ if(data->flags & MMC_DATA_READ) {
7078+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskBuffer) |= SD_CTRL_INTMASKBUFFER_BUFFER_READ_ENABLE;
7079+ } else {
7080+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskBuffer) |= SD_CTRL_INTMASKBUFFER_BUFFER_WRITE_ENABLE;
7081+ }
7082+
7083+ mmc_finish_request(host);
7084+}
7085+
7086+static void
7087+mmc_cmd_irq(struct asic3_mmc_host *host, unsigned int buffer_stat)
7088+{
7089+ struct mmc_command *cmd = host->cmd;
7090+ u8 *buf = (u8 *)cmd->resp;
7091+ u16 data;
7092+
7093+ if(!host->cmd) {
7094+ printk(KERN_WARNING DRIVER_NAME ": Spurious CMD irq\n");
7095+ return;
7096+ }
7097+
7098+ host->cmd = NULL;
7099+ if(cmd->flags & MMC_RSP_PRESENT && cmd->flags & MMC_RSP_136) {
7100+ /* R2 */
7101+ buf[12] = 0xff;
7102+ data = ASIC3_MMC_REG(host, SD_CTRL, Response0);
7103+ buf[13] = data & 0xff;
7104+ buf[14] = data >> 8;
7105+ data = ASIC3_MMC_REG(host, SD_CTRL, Response1);
7106+ buf[15] = data & 0xff;
7107+ buf[8] = data >> 8;
7108+ data = ASIC3_MMC_REG(host, SD_CTRL, Response2);
7109+ buf[9] = data & 0xff;
7110+ buf[10] = data >> 8;
7111+ data = ASIC3_MMC_REG(host, SD_CTRL, Response3);
7112+ buf[11] = data & 0xff;
7113+ buf[4] = data >> 8;
7114+ data = ASIC3_MMC_REG(host, SD_CTRL, Response4);
7115+ buf[5] = data & 0xff;
7116+ buf[6] = data >> 8;
7117+ data = ASIC3_MMC_REG(host, SD_CTRL, Response5);
7118+ buf[7] = data & 0xff;
7119+ buf[0] = data >> 8;
7120+ data = ASIC3_MMC_REG(host, SD_CTRL, Response6);
7121+ buf[1] = data & 0xff;
7122+ buf[2] = data >> 8;
7123+ data = ASIC3_MMC_REG(host, SD_CTRL, Response7);
7124+ buf[3] = data & 0xff;
7125+ } else if(cmd->flags & MMC_RSP_PRESENT) {
7126+ /* R1, R1B, R3 */
7127+ data = ASIC3_MMC_REG(host, SD_CTRL, Response0);
7128+ buf[0] = data & 0xff;
7129+ buf[1] = data >> 8;
7130+ data = ASIC3_MMC_REG(host, SD_CTRL, Response1);
7131+ buf[2] = data & 0xff;
7132+ buf[3] = data >> 8;
7133+ }
7134+ DBG("Response: %08x %08x %08x %08x\n", cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
7135+
7136+ if(buffer_stat & SD_CTRL_BUFFERSTATUS_CMD_TIMEOUT) {
7137+ cmd->error = MMC_ERR_TIMEOUT;
7138+ } else if((buffer_stat & SD_CTRL_BUFFERSTATUS_CRC_ERROR) && (cmd->flags & MMC_RSP_CRC)) {
7139+ cmd->error = MMC_ERR_BADCRC;
7140+ } else if(buffer_stat &
7141+ (
7142+ SD_CTRL_BUFFERSTATUS_ILLEGAL_ACCESS
7143+ | SD_CTRL_BUFFERSTATUS_CMD_INDEX_ERROR
7144+ | SD_CTRL_BUFFERSTATUS_STOP_BIT_END_ERROR
7145+ | SD_CTRL_BUFFERSTATUS_BUFFER_OVERFLOW
7146+ | SD_CTRL_BUFFERSTATUS_BUFFER_UNDERFLOW
7147+ | SD_CTRL_BUFFERSTATUS_DATA_TIMEOUT
7148+ )
7149+ ) {
7150+ DBG("Buffer status ERROR 0x%04x - inside check buffer\n", buffer_stat);
7151+ DBG("detail0 error status 0x%04x\n", ASIC3_MMC_REG(host, SD_CTRL, ErrorStatus0));
7152+ DBG("detail1 error status 0x%04x\n", ASIC3_MMC_REG(host, SD_CTRL, ErrorStatus1));
7153+ cmd->error = MMC_ERR_FAILED;
7154+ }
7155+
7156+ if(cmd->error == MMC_ERR_NONE) {
7157+ switch (cmd->opcode) {
7158+ case SD_APP_SET_BUS_WIDTH:
7159+ if(cmd->arg == SD_BUS_WIDTH_4) {
7160+ host->clock_for_sd = SD_CTRL_CARDCLOCKCONTROL_FOR_SD_CARD;
7161+ ASIC3_MMC_REG(host, SD_CTRL, MemCardOptionSetup) =
7162+ MEM_CARD_OPTION_REQUIRED
7163+ | MEM_CARD_OPTION_DATA_RESPONSE_TIMEOUT(14)
7164+ | MEM_CARD_OPTION_C2_MODULE_NOT_PRESENT
7165+ | MEM_CARD_OPTION_DATA_XFR_WIDTH_4;
7166+ } else {
7167+ host->clock_for_sd = 0;
7168+ ASIC3_MMC_REG(host, SD_CTRL, MemCardOptionSetup) =
7169+ MEM_CARD_OPTION_REQUIRED
7170+ | MEM_CARD_OPTION_DATA_RESPONSE_TIMEOUT(14)
7171+ | MEM_CARD_OPTION_C2_MODULE_NOT_PRESENT
7172+ | MEM_CARD_OPTION_DATA_XFR_WIDTH_1;
7173+ }
7174+ break;
7175+ case MMC_SELECT_CARD:
7176+ if((cmd->arg >> 16) == 0) {
7177+ /* We have been deselected. */
7178+ ASIC3_MMC_REG(host, SD_CTRL, MemCardOptionSetup) =
7179+ MEM_CARD_OPTION_REQUIRED
7180+ | MEM_CARD_OPTION_DATA_RESPONSE_TIMEOUT(14)
7181+ | MEM_CARD_OPTION_C2_MODULE_NOT_PRESENT
7182+ | MEM_CARD_OPTION_DATA_XFR_WIDTH_1;
7183+ }
7184+ }
7185+ }
7186+
7187+ /*
7188+ * If there is data to handle we enable data IRQs here, and we will
7189+ * ultimatley finish the request in the mmc_data_end_irq handler.
7190+ */
7191+ if(host->data && (cmd->error == MMC_ERR_NONE)){
7192+ if(host->data->flags & MMC_DATA_READ) {
7193+ /* Enable the read enable interrupt */
7194+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskBuffer) &=
7195+ ~SD_CTRL_INTMASKBUFFER_BUFFER_READ_ENABLE;
7196+ } else {
7197+ /* Enable the write enable interrupt */
7198+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskBuffer) &=
7199+ ~SD_CTRL_INTMASKBUFFER_BUFFER_WRITE_ENABLE;
7200+ }
7201+ } else {
7202+ /* There's no data, or we encountered an error, so finish now. */
7203+ mmc_finish_request(host);
7204+ }
7205+
7206+ return;
7207+}
7208+
7209+static void hwinit2_irqsafe(struct asic3_mmc_host *host);
7210+
7211+static irqreturn_t
7212+mmc_irq(int irq, void *irq_desc)
7213+{
7214+ struct asic3_mmc_host *host;
7215+ unsigned int breg, bmask, bstatus, creg, cmask, cstatus;
7216+
7217+ host = irq_desc;
7218+
7219+ /* asic3 bstatus has errors */
7220+ bstatus = ASIC3_MMC_REG(host, SD_CTRL, BufferCtrl);
7221+ bmask = ASIC3_MMC_REG(host, SD_CTRL, IntMaskBuffer);
7222+ cstatus = ASIC3_MMC_REG(host, SD_CTRL, CardStatus);
7223+ cmask = ASIC3_MMC_REG(host, SD_CTRL, IntMaskCard);
7224+ breg = bstatus & ~bmask & ~DONT_CARE_BUFFER_BITS;
7225+ creg = cstatus & ~cmask & ~DONT_CARE_CARD_BITS;
7226+
7227+ if (!breg && !creg) {
7228+ /* This occurs sometimes for no known reason. It doesn't hurt
7229+ * anything, so I don't print it. */
7230+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskBuffer) &= ~breg;
7231+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskCard) &= ~creg;
7232+ goto out;
7233+ }
7234+
7235+ while (breg || creg) {
7236+
7237+ /* XXX TODO: Need to handle errors in breg here. */
7238+
7239+ /*
7240+ * Card insert/remove. The mmc controlling code is stateless. That
7241+ * is, it doesn't care if it was an insert or a remove. It treats
7242+ * both the same.
7243+ */
7244+ /* XXX Asic3 has _3 versions of these status bits, too, for a second slot, perhaps? */
7245+ if (creg & (SD_CTRL_CARDSTATUS_CARD_INSERTED_0 | SD_CTRL_CARDSTATUS_CARD_REMOVED_0)) {
7246+ ASIC3_MMC_REG(host, SD_CTRL, CardStatus) &=
7247+ ~(SD_CTRL_CARDSTATUS_CARD_REMOVED_0 | SD_CTRL_CARDSTATUS_CARD_INSERTED_0);
7248+ if(creg & SD_CTRL_CARDSTATUS_CARD_INSERTED_0) {
7249+ hwinit2_irqsafe(host);
7250+ }
7251+ mmc_detect_change(host->mmc,1);
7252+ }
7253+
7254+ /* Command completion */
7255+ if (creg & SD_CTRL_CARDSTATUS_RESPONSE_END) {
7256+ ASIC3_MMC_REG(host, SD_CTRL, CardStatus) &=
7257+ ~(SD_CTRL_CARDSTATUS_RESPONSE_END);
7258+ mmc_cmd_irq(host, bstatus);
7259+ }
7260+
7261+ /* Data transfer */
7262+ if (breg & (SD_CTRL_BUFFERSTATUS_BUFFER_READ_ENABLE | SD_CTRL_BUFFERSTATUS_BUFFER_WRITE_ENABLE)) {
7263+ ASIC3_MMC_REG(host, SD_CTRL, BufferCtrl) &=
7264+ ~(SD_CTRL_BUFFERSTATUS_BUFFER_WRITE_ENABLE | SD_CTRL_BUFFERSTATUS_BUFFER_READ_ENABLE);
7265+ tasklet_schedule(&mmc_data_read_tasklet);
7266+ }
7267+
7268+ /* Data transfer completion */
7269+ if (creg & SD_CTRL_CARDSTATUS_RW_END) {
7270+ ASIC3_MMC_REG(host, SD_CTRL, CardStatus) &= ~(SD_CTRL_CARDSTATUS_RW_END);
7271+ mmc_data_end_irq(host);
7272+ }
7273+
7274+ /* Check status - keep going until we've handled it all */
7275+ bstatus = ASIC3_MMC_REG(host, SD_CTRL, BufferCtrl);
7276+ bmask = ASIC3_MMC_REG(host, SD_CTRL, IntMaskBuffer);
7277+ cstatus = ASIC3_MMC_REG(host, SD_CTRL, CardStatus);
7278+ cmask = ASIC3_MMC_REG(host, SD_CTRL, IntMaskCard);
7279+ breg = bstatus & ~bmask & ~DONT_CARE_BUFFER_BITS;
7280+ creg = cstatus & ~cmask & ~DONT_CARE_CARD_BITS;
7281+ }
7282+
7283+out:
7284+ /* Ensure all interrupt sources are cleared */
7285+ ASIC3_MMC_REG(host, SD_CTRL, BufferCtrl) = 0;
7286+ ASIC3_MMC_REG(host, SD_CTRL, CardStatus) = 0;
7287+ return IRQ_HANDLED;
7288+}
7289+
7290+static void
7291+mmc_start_data(struct asic3_mmc_host *host, struct mmc_data *data)
7292+{
7293+ DBG("setup data transfer: blocksize %08x nr_blocks %d, page: %08x, offset: %08x\n", data->blksz,
7294+ data->blocks, (int)data->sg->page, data->sg->offset);
7295+
7296+ host->sg_len = data->sg_len;
7297+ host->sg_ptr = data->sg;
7298+ host->sg_off = 0;
7299+ host->data = data;
7300+
7301+ /* Set transfer length and blocksize */
7302+ ASIC3_MMC_REG(host, SD_CTRL, TransferSectorCount) = data->blocks;
7303+ ASIC3_MMC_REG(host, SD_CTRL, MemCardXferDataLen) = data->blksz;
7304+}
7305+
7306+/* Process requests from the MMC layer */
7307+static void
7308+mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
7309+{
7310+ struct asic3_mmc_host *host = mmc_priv(mmc);
7311+
7312+ WARN_ON(host->mrq != NULL);
7313+
7314+ host->mrq = mrq;
7315+
7316+ /* If we're performing a data request we need to setup some
7317+ extra information */
7318+ if(mrq->data) {
7319+ mmc_start_data(host, mrq->data);
7320+ }
7321+
7322+ mmc_start_command(host, mrq->cmd);
7323+}
7324+
7325+/* Set MMC clock / power.
7326+ * Note: This controller uses a simple divider scheme therefore it cannot run
7327+ * a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as MMC
7328+ * wont run that fast, it has to be clocked at 12MHz which is the next slowest
7329+ * setting. This is likely not an issue because we are doing single 16-bit
7330+ * writes for data I/O.
7331+ */
7332+static void
7333+mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
7334+{
7335+ struct asic3_mmc_host *host = mmc_priv(mmc);
7336+ u32 clk = 0;
7337+
7338+ DBG("clock %uHz busmode %u powermode %u Vdd %u\n",
7339+ ios->clock, ios->bus_mode, ios->power_mode, ios->vdd);
7340+
7341+ if (ios->clock) {
7342+ clk = 0x80; /* slowest by default */
7343+ if(ios->clock >= 24000000 / 256) clk >>= 1;
7344+ if(ios->clock >= 24000000 / 128) clk >>= 1;
7345+ if(ios->clock >= 24000000 / 64) clk >>= 1;
7346+ if(ios->clock >= 24000000 / 32) clk >>= 1;
7347+ if(ios->clock >= 24000000 / 16) clk >>= 1;
7348+ if(ios->clock >= 24000000 / 8) clk >>= 1;
7349+ if(ios->clock >= 24000000 / 4) clk >>= 1;
7350+ if(ios->clock >= 24000000 / 2) clk >>= 1;
7351+ if(ios->clock >= 24000000 / 1) clk >>= 1;
7352+ if(clk == 0) { /* For fastest speed we disable the divider. */
7353+ ASIC3_MMC_REG(host, SD_CONFIG, ClockMode) = 0;
7354+ } else {
7355+ ASIC3_MMC_REG(host, SD_CONFIG, ClockMode) = 1;
7356+ }
7357+ ASIC3_MMC_REG(host, SD_CTRL, CardClockCtrl) = 0;
7358+ ASIC3_MMC_REG(host, SD_CTRL, CardClockCtrl) =
7359+ host->clock_for_sd
7360+ | SD_CTRL_CARDCLOCKCONTROL_ENABLE_CLOCK
7361+ | clk;
7362+ msleep(10);
7363+ } else {
7364+ ASIC3_MMC_REG(host, SD_CTRL, CardClockCtrl) = 0;
7365+ }
7366+
7367+ switch (ios->power_mode) {
7368+ case MMC_POWER_OFF:
7369+ ASIC3_MMC_REG(host, SD_CONFIG, SDHC_Power1) = 0;
7370+ msleep(1);
7371+ break;
7372+ case MMC_POWER_UP:
7373+ break;
7374+ case MMC_POWER_ON:
7375+ ASIC3_MMC_REG(host, SD_CONFIG, SDHC_Power1) = SD_CONFIG_POWER1_PC_33V;
7376+ msleep(20);
7377+ break;
7378+ }
7379+}
7380+
7381+static int
7382+mmc_get_ro(struct mmc_host *mmc)
7383+{
7384+ struct asic3_mmc_host *host = mmc_priv(mmc);
7385+
7386+ /* Call custom handler for RO status */
7387+ if(host->hwconfig->mmc_get_ro) {
7388+ /* Special case for cards w/o WP lock (like miniSD) */
7389+ if (host->hwconfig->mmc_get_ro == (void*)-1) {
7390+ return 0;
7391+ } else {
7392+ struct platform_device *pdev = to_platform_device(mmc_dev(mmc));
7393+ return host->hwconfig->mmc_get_ro(pdev);
7394+ }
7395+ }
7396+
7397+ /* WRITE_PROTECT is active low */
7398+ return (ASIC3_MMC_REG(host, SD_CTRL, CardStatus) & SD_CTRL_CARDSTATUS_WRITE_PROTECT)?0:1;
7399+}
7400+
7401+static struct mmc_host_ops mmc_ops = {
7402+ .request = mmc_request,
7403+ .set_ios = mmc_set_ios,
7404+ .get_ro = mmc_get_ro,
7405+};
7406+
7407+static void
7408+hwinit2_irqsafe(struct asic3_mmc_host *host)
7409+{
7410+ ASIC3_MMC_REG(host, SD_CONFIG, Addr1) = 0x0000;
7411+ ASIC3_MMC_REG(host, SD_CONFIG, Addr0) = 0x0800;
7412+
7413+ ASIC3_MMC_REG(host, SD_CONFIG, ClkStop) = SD_CONFIG_CLKSTOP_ENABLE_ALL;
7414+ ASIC3_MMC_REG(host, SD_CONFIG, SDHC_CardDetect) = 2;
7415+ ASIC3_MMC_REG(host, SD_CONFIG, Command) = SD_CONFIG_COMMAND_MAE;
7416+
7417+ ASIC3_MMC_REG(host, SD_CTRL, SoftwareReset) = 0; /* reset on */
7418+ mdelay(2);
7419+
7420+ ASIC3_MMC_REG(host, SD_CTRL, SoftwareReset) = 1; /* reset off */
7421+ mdelay(2);
7422+
7423+ ASIC3_MMC_REG(host, SD_CTRL, MemCardOptionSetup) =
7424+ MEM_CARD_OPTION_REQUIRED
7425+ | MEM_CARD_OPTION_DATA_RESPONSE_TIMEOUT(14)
7426+ | MEM_CARD_OPTION_C2_MODULE_NOT_PRESENT
7427+ | MEM_CARD_OPTION_DATA_XFR_WIDTH_1
7428+ ;
7429+ host->clock_for_sd = 0;
7430+
7431+ ASIC3_MMC_REG(host, SD_CTRL, CardClockCtrl) = 0;
7432+ ASIC3_MMC_REG(host, SD_CTRL, CardStatus) = 0;
7433+ ASIC3_MMC_REG(host, SD_CTRL, BufferCtrl) = 0;
7434+ ASIC3_MMC_REG(host, SD_CTRL, ErrorStatus0) = 0;
7435+ ASIC3_MMC_REG(host, SD_CTRL, ErrorStatus1) = 0;
7436+ ASIC3_MMC_REG(host, SD_CTRL, StopInternal) = 0;
7437+
7438+ ASIC3_MMC_REG(host, SDIO_CTRL, ClocknWaitCtrl) = 0x100;
7439+ /* *((unsigned short *)(((char *)host->ctl_base) + 0x938)) = 0x100; */
7440+
7441+ ASIC3_MMC_REG(host, SD_CONFIG, ClockMode) = 0;
7442+ ASIC3_MMC_REG(host, SD_CTRL, CardClockCtrl) = 0;
7443+
7444+ mdelay(1);
7445+
7446+
7447+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskCard) = ~(
7448+ SD_CTRL_INTMASKCARD_RESPONSE_END
7449+ | SD_CTRL_INTMASKCARD_RW_END
7450+ | SD_CTRL_INTMASKCARD_CARD_REMOVED_0
7451+ | SD_CTRL_INTMASKCARD_CARD_INSERTED_0
7452+#if 0
7453+ | SD_CTRL_INTMASKCARD_CARD_REMOVED_3
7454+ | SD_CTRL_INTMASKCARD_CARD_INSERTED_3
7455+#endif
7456+ )
7457+ ; /* check */
7458+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskBuffer) = 0xffff; /* IRQs off */
7459+
7460+ /*
7461+ * ASIC3_MMC_REG(host, SD_CTRL, TransactionCtrl) = SD_CTRL_TRANSACTIONCONTROL_SET;
7462+ * Wince has 0x1000
7463+ */
7464+ /* ASIC3_MMC_REG(host, SD_CTRL, TransactionCtrl) = 0x1000; */
7465+
7466+
7467+ asic3_set_sdhwctrl(host->asic3_dev, ASIC3_SDHWCTRL_SDPWR, ASIC3_SDHWCTRL_SDPWR); /* turn on power at controller(?) */
7468+
7469+}
7470+
7471+static void
7472+hwinit(struct asic3_mmc_host *host, struct platform_device *pdev)
7473+{
7474+ /* Call custom handler for enabling clock (if needed) */
7475+ if(host->hwconfig->set_mmc_clock)
7476+ host->hwconfig->set_mmc_clock(pdev, MMC_CLOCK_ENABLED);
7477+
7478+ /* Not sure if it must be done bit by bit, but leaving as-is */
7479+ asic3_set_sdhwctrl(host->asic3_dev, ASIC3_SDHWCTRL_LEVCD, ASIC3_SDHWCTRL_LEVCD);
7480+ asic3_set_sdhwctrl(host->asic3_dev, ASIC3_SDHWCTRL_LEVWP, ASIC3_SDHWCTRL_LEVWP);
7481+ asic3_set_sdhwctrl(host->asic3_dev, ASIC3_SDHWCTRL_SUSPEND, 0);
7482+ asic3_set_sdhwctrl(host->asic3_dev, ASIC3_SDHWCTRL_PCLR, 0);
7483+
7484+ asic3_set_clock_cdex (host->asic3_dev,
7485+ CLOCK_CDEX_EX1 | CLOCK_CDEX_EX0, CLOCK_CDEX_EX1 | CLOCK_CDEX_EX0);
7486+ msleep(1);
7487+
7488+ asic3_set_clock_sel (host->asic3_dev,
7489+ CLOCK_SEL_SD_HCLK_SEL | CLOCK_SEL_SD_BCLK_SEL,
7490+ CLOCK_SEL_SD_HCLK_SEL | 0); /* ? */
7491+
7492+ asic3_set_clock_cdex (host->asic3_dev,
7493+ CLOCK_CDEX_SD_HOST | CLOCK_CDEX_SD_BUS,
7494+ CLOCK_CDEX_SD_HOST | CLOCK_CDEX_SD_BUS);
7495+ msleep(1);
7496+
7497+ asic3_set_extcf_select(host->asic3_dev, ASIC3_EXTCF_SD_MEM_ENABLE, ASIC3_EXTCF_SD_MEM_ENABLE);
7498+
7499+ /* Long Delay */
7500+ if( !machine_is_h4700())
7501+ msleep(500);
7502+
7503+ hwinit2_irqsafe(host);
7504+}
7505+
7506+#ifdef CONFIG_PM
7507+static int
7508+mmc_suspend(struct platform_device *pdev, pm_message_t state)
7509+{
7510+ struct mmc_host *mmc = platform_get_drvdata(pdev);
7511+ struct asic3_mmc_host *host = mmc_priv(mmc);
7512+ int ret;
7513+
7514+ ret = mmc_suspend_host(mmc, state);
7515+
7516+ if (ret) {
7517+ printk(KERN_ERR DRIVER_NAME ": Could not suspend MMC host, hardware not suspended");
7518+ return ret;
7519+ }
7520+
7521+ /* disable the card insert / remove interrupt while sleeping */
7522+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskCard) = ~(
7523+ SD_CTRL_INTMASKCARD_RESPONSE_END
7524+ | SD_CTRL_INTMASKCARD_RW_END);
7525+
7526+ /* disable clock */
7527+ ASIC3_MMC_REG(host, SD_CTRL, CardClockCtrl) = 0;
7528+ ASIC3_MMC_REG(host, SD_CONFIG, ClkStop) = 0;
7529+
7530+ /* power down */
7531+ ASIC3_MMC_REG(host, SD_CONFIG, SDHC_Power1) = 0;
7532+
7533+ asic3_set_clock_cdex (host->asic3_dev,
7534+ CLOCK_CDEX_SD_HOST | CLOCK_CDEX_SD_BUS, 0);
7535+
7536+ /* disable core clock */
7537+ if(host->hwconfig->set_mmc_clock)
7538+ host->hwconfig->set_mmc_clock(pdev, MMC_CLOCK_DISABLED);
7539+
7540+ /* Put in suspend mode */
7541+ asic3_set_sdhwctrl(host->asic3_dev, ASIC3_SDHWCTRL_SUSPEND, ASIC3_SDHWCTRL_SUSPEND);
7542+ return 0;
7543+}
7544+
7545+static int
7546+mmc_resume(struct platform_device *pdev)
7547+{
7548+ struct mmc_host *mmc = platform_get_drvdata(pdev);
7549+ struct asic3_mmc_host *host = mmc_priv(mmc);
7550+
7551+ printk(KERN_INFO "%s: starting resume\n", DRIVER_NAME);
7552+
7553+ asic3_set_sdhwctrl(host->asic3_dev, ASIC3_SDHWCTRL_SUSPEND, 0);
7554+ hwinit(host, pdev);
7555+
7556+ /* re-enable card remove / insert interrupt */
7557+ ASIC3_MMC_REG(host, SD_CTRL, IntMaskCard) = ~(
7558+ SD_CTRL_INTMASKCARD_RESPONSE_END
7559+ | SD_CTRL_INTMASKCARD_RW_END
7560+ | SD_CTRL_INTMASKCARD_CARD_REMOVED_0
7561+ | SD_CTRL_INTMASKCARD_CARD_INSERTED_0 );
7562+
7563+ mmc_resume_host(mmc);
7564+
7565+ printk(KERN_INFO "%s: finished resume\n", DRIVER_NAME);
7566+ return 0;
7567+}
7568+#endif
7569+
7570+static int
7571+mmc_probe(struct platform_device *pdev)
7572+{
7573+ struct mmc_host *mmc;
7574+ struct asic3_mmc_host *host = NULL;
7575+ int retval = 0;
7576+ struct tmio_mmc_hwconfig *mmc_config = (struct tmio_mmc_hwconfig *)pdev->dev.platform_data;
7577+
7578+ /* bus_shift is mandatory */
7579+ if (!mmc_config) {
7580+ printk(KERN_ERR DRIVER_NAME ": Invalid configuration\n");
7581+ return -EINVAL;
7582+ }
7583+
7584+ mmc = mmc_alloc_host(sizeof(struct asic3_mmc_host) + 128, &pdev->dev);
7585+ if (!mmc) {
7586+ retval = -ENOMEM;
7587+ goto exceptional_return;
7588+ }
7589+
7590+ host = mmc_priv(mmc);
7591+ host->mmc = mmc;
7592+ platform_set_drvdata(pdev, mmc);
7593+
7594+ host->ctl_base = 0;
7595+ host->hwconfig = mmc_config;
7596+ host->bus_shift = mmc_config->address_shift;
7597+ host->asic3_dev = pdev->dev.parent;
7598+ host->clock_for_sd = 0;
7599+
7600+ tasklet_init(&mmc_data_read_tasklet, mmc_data_transfer, (unsigned long)host);
7601+
7602+ host->ctl_base = ioremap_nocache ((unsigned long)pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start);
7603+ if(!host->ctl_base){
7604+ printk(KERN_ERR DRIVER_NAME ": Could not map ASIC3 SD controller\n");
7605+ retval = -ENODEV;
7606+ goto exceptional_return;
7607+ }
7608+
7609+ printk(DRIVER_NAME ": ASIC3 MMC/SD Driver, controller at 0x%lx\n", (unsigned long)pdev->resource[0].start);
7610+
7611+ mmc->ops = &mmc_ops;
7612+ mmc->caps = MMC_CAP_4_BIT_DATA;
7613+ mmc->f_min = 46875; /* ARIC: not sure what these should be */
7614+ mmc->f_max = 24000000; /* ARIC: not sure what these should be */
7615+ mmc->ocr_avail = MMC_VDD_32_33;
7616+
7617+ hwinit(host, pdev);
7618+
7619+
7620+ host->irq = pdev->resource[1].start;
7621+
7622+ retval = request_irq(host->irq, mmc_irq, 0, DRIVER_NAME, host);
7623+ if(retval) {
7624+ printk(KERN_ERR DRIVER_NAME ": Unable to get interrupt\n");
7625+ retval = -ENODEV;
7626+ goto exceptional_return;
7627+ }
7628+ set_irq_type(host->irq, IRQT_FALLING);
7629+
7630+ mmc_add_host(mmc);
7631+
7632+#ifdef CONFIG_PM
7633+ // resume_timer.function = resume_timer_callback;
7634+ // resume_timer.data = 0;
7635+ // init_timer(&resume_timer);
7636+#endif
7637+
7638+ return 0;
7639+
7640+exceptional_return:
7641+ if (mmc) {
7642+ mmc_free_host(mmc);
7643+ }
7644+ if(host && host->ctl_base) iounmap(host->ctl_base);
7645+ return retval;
7646+}
7647+
7648+static int
7649+mmc_remove(struct platform_device *pdev)
7650+{
7651+ struct mmc_host *mmc = platform_get_drvdata(pdev);
7652+
7653+ platform_set_drvdata(pdev, NULL);
7654+
7655+ if (mmc) {
7656+ struct asic3_mmc_host *host = mmc_priv(mmc);
7657+ mmc_remove_host(mmc);
7658+ free_irq(host->irq, host);
7659+ /* FIXME - we might want to consider stopping the chip here... */
7660+ iounmap(host->ctl_base);
7661+ mmc_free_host(mmc); /* FIXME - why does this call hang? */
7662+ }
7663+ return 0;
7664+}
7665+
7666+/* ------------------- device registration ----------------------- */
7667+
7668+static struct platform_driver mmc_asic3_driver = {
7669+ .driver = {
7670+ .name = DRIVER_NAME,
7671+ },
7672+ .probe = mmc_probe,
7673+ .remove = mmc_remove,
7674+#ifdef CONFIG_PM
7675+ .suspend = mmc_suspend,
7676+ .resume = mmc_resume,
7677+#endif
7678+};
7679+
7680+static int __init mmc_init(void)
7681+{
7682+ return platform_driver_register(&mmc_asic3_driver);
7683+}
7684+
7685+static void __exit mmc_exit(void)
7686+{
7687+ platform_driver_unregister(&mmc_asic3_driver);
7688+}
7689+
7690+late_initcall(mmc_init);
7691+module_exit(mmc_exit);
7692+
7693+MODULE_DESCRIPTION("HTC ASIC3 SD/MMC driver");
7694+MODULE_AUTHOR("Aric Blumer, SDG Systems, LLC");
7695+MODULE_LICENSE("GPL");
7696+
7697Index: linux-2.6.22/drivers/mmc/host/asic3_mmc.h
7698===================================================================
7699--- /dev/null 1970-01-01 00:00:00.000000000 +0000
7700+++ linux-2.6.22/drivers/mmc/host/asic3_mmc.h 2007-07-19 11:41:55.000000000 +0100
7701@@ -0,0 +1,25 @@
7702+#ifndef __ASIC3_MMC_H
7703+#define __ASIC3_MMC_H
7704+
7705+#define DRIVER_NAME "asic3_mmc"
7706+
7707+#ifdef CONFIG_MMC_DEBUG
7708+#define DBG(x...) printk(DRIVER_NAME ": " x)
7709+#else
7710+#define DBG(x...) do { } while (0)
7711+#endif
7712+
7713+/* Response types */
7714+#define APP_CMD 0x0040
7715+
7716+#define SD_CONFIG_CLKSTOP_ENABLE_ALL 0x1f
7717+
7718+#define DONT_CARE_CARD_BITS ( \
7719+ SD_CTRL_INTMASKCARD_SIGNAL_STATE_PRESENT_3 \
7720+ | SD_CTRL_INTMASKCARD_WRITE_PROTECT \
7721+ | SD_CTRL_INTMASKCARD_UNK6 \
7722+ | SD_CTRL_INTMASKCARD_SIGNAL_STATE_PRESENT_0 \
7723+ )
7724+#define DONT_CARE_BUFFER_BITS ( SD_CTRL_INTMASKBUFFER_UNK7 | SD_CTRL_INTMASKBUFFER_CMD_BUSY )
7725+
7726+#endif // __ASIC3_MMC_H
7727Index: linux-2.6.22/drivers/input/keyboard/Makefile
7728===================================================================
7729--- linux-2.6.22.orig/drivers/input/keyboard/Makefile 2007-07-19 11:41:50.000000000 +0100
7730+++ linux-2.6.22/drivers/input/keyboard/Makefile 2007-07-19 11:41:55.000000000 +0100
7731@@ -21,4 +21,4 @@ obj-$(CONFIG_KEYBOARD_OMAP) += omap-key
7732 obj-$(CONFIG_KEYBOARD_PXA27x) += pxa27x_keyboard.o
7733 obj-$(CONFIG_KEYBOARD_AAED2000) += aaed2000_kbd.o
7734 obj-$(CONFIG_KEYBOARD_GPIO) += gpio_keys.o
7735-
7736+obj-$(CONFIG_KEYBOARD_ASIC3) += asic3_keys.o
7737Index: linux-2.6.22/drivers/input/keyboard/asic3_keys.c
7738===================================================================
7739--- /dev/null 1970-01-01 00:00:00.000000000 +0000
7740+++ linux-2.6.22/drivers/input/keyboard/asic3_keys.c 2007-07-19 11:41:55.000000000 +0100
7741@@ -0,0 +1,131 @@
7742+/*
7743+ * Generic buttons driver for ASIC3 SoC.
7744+ *
7745+ * This file is subject to the terms and conditions of the GNU General Public
7746+ * License. See the file COPYING in the main directory of this archive for
7747+ * more details.
7748+ *
7749+ * Copyright (C) 2003 Joshua Wise
7750+ * Copyright (C) 2005 Pawel Kolodziejski
7751+ * Copyright (C) 2006 Paul Sokolovsky
7752+ *
7753+ */
7754+
7755+#include <linux/input.h>
7756+#include <linux/module.h>
7757+#include <linux/init.h>
7758+#include <linux/interrupt.h>
7759+#include <linux/platform_device.h>
7760+#include <linux/irq.h>
7761+#include <linux/soc/asic3_base.h>
7762+#include <asm/mach/arch.h>
7763+#include <asm/mach/map.h>
7764+#include <asm/arch/irqs.h>
7765+#include <asm/hardware.h>
7766+#include <asm/hardware/ipaq-asic3.h>
7767+#include <asm/hardware/asic3_keys.h>
7768+
7769+static irqreturn_t asic3_keys_asic_handle(int irq, void *data)
7770+{
7771+ struct asic3_keys_platform_data *pdata = data;
7772+ int i, base_irq;
7773+
7774+ base_irq = asic3_irq_base(pdata->asic3_dev);
7775+ for (i = 0; i < pdata->nbuttons; i++) {
7776+ struct asic3_keys_button *b = &pdata->buttons[i];
7777+ if ((base_irq + b->gpio) == irq) {
7778+ int state = !!asic3_gpio_get_value(pdata->asic3_dev, b->gpio);
7779+
7780+ if (pdata->buttons[i].type == EV_SW)
7781+ input_report_switch(pdata->input, pdata->buttons[i].keycode, state ^ b->active_low);
7782+ else
7783+ input_report_key(pdata->input, b->keycode, state ^ b->active_low);
7784+ input_sync(pdata->input);
7785+ }
7786+ }
7787+
7788+ return IRQ_HANDLED;
7789+}
7790+
7791+static int __devinit asic3_keys_probe(struct platform_device *pdev)
7792+{
7793+ struct asic3_keys_platform_data *pdata = pdev->dev.platform_data;
7794+ int i, base_irq;
7795+ int j, ret;
7796+
7797+ pdata->input = input_allocate_device();
7798+
7799+ base_irq = asic3_irq_base(pdata->asic3_dev);
7800+
7801+ for (i = 0; i < pdata->nbuttons; i++) {
7802+ struct asic3_keys_button *b = &pdata->buttons[i];
7803+ set_bit(b->keycode, pdata->input->keybit);
7804+ ret=request_irq(base_irq + b->gpio, asic3_keys_asic_handle, SA_SAMPLE_RANDOM, b->desc, pdata);
7805+ if (ret)
7806+ {
7807+ printk(KERN_NOTICE "Failed to allocate asic3_keys irq=%d.\n",b->gpio);
7808+
7809+ for(j=0; j<i ; j++)
7810+ free_irq(base_irq + pdata->buttons[i].gpio, NULL);
7811+
7812+ input_unregister_device (pdata->input);
7813+
7814+ return -ENODEV;
7815+ }
7816+
7817+ set_irq_type(base_irq + b->gpio, IRQT_BOTHEDGE);
7818+ if (pdata->buttons[i].type == EV_SW) {
7819+ pdata->input->evbit[0] |= BIT(EV_SW);
7820+ set_bit(b->keycode, pdata->input->swbit);
7821+ } else {
7822+ pdata->input->evbit[0] |= BIT(EV_KEY);
7823+ set_bit(b->keycode, pdata->input->keybit);
7824+ }
7825+ }
7826+
7827+ pdata->input->name = pdev->name;
7828+ input_register_device(pdata->input);
7829+
7830+ return 0;
7831+}
7832+
7833+static int __devexit asic3_keys_remove(struct platform_device *pdev)
7834+{
7835+ struct asic3_keys_platform_data *pdata = pdev->dev.platform_data;
7836+ int i, base_irq;
7837+
7838+ base_irq = asic3_irq_base(pdata->asic3_dev);
7839+ for (i = 0; i < pdata->nbuttons; i++) {
7840+ free_irq(base_irq + pdata->buttons[i].gpio, NULL);
7841+ }
7842+
7843+ input_unregister_device(pdata->input);
7844+
7845+ return 0;
7846+}
7847+
7848+
7849+static struct platform_driver asic3_keys_driver = {
7850+ .probe = asic3_keys_probe,
7851+ .remove = __devexit_p(asic3_keys_remove),
7852+ .driver = {
7853+ .name = "asic3-keys",
7854+ },
7855+};
7856+
7857+static int __init asic3_keys_init(void)
7858+{
7859+ return platform_driver_register(&asic3_keys_driver);
7860+}
7861+
7862+static void __exit asic3_keys_exit(void)
7863+{
7864+ platform_driver_unregister(&asic3_keys_driver);
7865+}
7866+
7867+module_init(asic3_keys_init);
7868+module_exit(asic3_keys_exit);
7869+
7870+MODULE_AUTHOR("Joshua Wise, Pawel Kolodziejski, Paul Sokolovsky");
7871+MODULE_DESCRIPTION("Buttons driver for HTC ASIC3 SoC");
7872+MODULE_LICENSE("GPL");
7873Index: linux-2.6.22/include/asm-arm/arch-pxa/irqs.h
7874===================================================================
7875--- linux-2.6.22.orig/include/asm-arm/arch-pxa/irqs.h 2007-07-19 11:41:50.000000000 +0100
7876+++ linux-2.6.22/include/asm-arm/arch-pxa/irqs.h 2007-07-19 11:41:55.000000000 +0100
7877@@ -178,6 +178,8 @@
7878 defined(CONFIG_MACH_LOGICPD_PXA270) || \
7879 defined(CONFIG_MACH_MAINSTONE)
7880 #define NR_IRQS (IRQ_BOARD_END)
7881+#elif defined(CONFIG_MACH_HTCUNIVERSAL)
7882+#define NR_IRQS (IRQ_BOARD_START + 96)
7883 #else
7884 #define NR_IRQS (IRQ_BOARD_START)
7885 #endif
7886Index: linux-2.6.22/include/linux/ioport.h
7887===================================================================
7888--- linux-2.6.22.orig/include/linux/ioport.h 2007-07-19 11:41:50.000000000 +0100
7889+++ linux-2.6.22/include/linux/ioport.h 2007-07-19 11:41:55.000000000 +0100
7890@@ -56,6 +56,7 @@ struct resource_list {
7891 #define IORESOURCE_IRQ_HIGHLEVEL (1<<2)
7892 #define IORESOURCE_IRQ_LOWLEVEL (1<<3)
7893 #define IORESOURCE_IRQ_SHAREABLE (1<<4)
7894+#define IORESOURCE_IRQ_SOC_SUBDEVICE (1<<5)
7895
7896 /* ISA PnP DMA specific bits (IORESOURCE_BITS) */
7897 #define IORESOURCE_DMA_TYPE_MASK (3<<0)
7898Index: linux-2.6.22/drivers/video/backlight/Kconfig
7899===================================================================
7900--- linux-2.6.22.orig/drivers/video/backlight/Kconfig 2007-07-19 11:41:51.000000000 +0100
7901+++ linux-2.6.22/drivers/video/backlight/Kconfig 2007-07-19 11:41:55.000000000 +0100
7902@@ -34,7 +34,7 @@ config LCD_CLASS_DEVICE
7903
7904 config BACKLIGHT_CORGI
7905 tristate "Sharp Corgi Backlight Driver (SL Series)"
7906- depends on BACKLIGHT_CLASS_DEVICE && PXA_SHARPSL
7907+ depends on BACKLIGHT_CLASS_DEVICE
7908 default y
7909 help
7910 If you have a Sharp Zaurus SL-C7xx, SL-Cxx00 or SL-6000x say y to enable the
7911Index: linux-2.6.22/drivers/video/backlight/corgi_bl.c
7912===================================================================
7913--- linux-2.6.22.orig/drivers/video/backlight/corgi_bl.c 2007-07-19 11:41:50.000000000 +0100
7914+++ linux-2.6.22/drivers/video/backlight/corgi_bl.c 2007-07-19 11:41:55.000000000 +0100
7915@@ -24,7 +24,7 @@
7916 static int corgibl_intensity;
7917 static struct backlight_properties corgibl_data;
7918 static struct backlight_device *corgi_backlight_device;
7919-static struct corgibl_machinfo *bl_machinfo;
7920+static struct generic_bl_info *bl_machinfo;
7921
7922 static unsigned long corgibl_flags;
7923 #define CORGIBL_SUSPENDED 0x01
7924@@ -107,7 +107,7 @@ static struct backlight_ops corgibl_ops
7925
7926 static int corgibl_probe(struct platform_device *pdev)
7927 {
7928- struct corgibl_machinfo *machinfo = pdev->dev.platform_data;
7929+ struct generic_bl_info *machinfo = pdev->dev.platform_data;
7930
7931 bl_machinfo = machinfo;
7932 if (!machinfo->limit_mask)
diff --git a/meta/packages/linux/linux-rp.inc b/meta/packages/linux/linux-rp.inc
index 5d4e3b79e1..126bb9491d 100644
--- a/meta/packages/linux/linux-rp.inc
+++ b/meta/packages/linux/linux-rp.inc
@@ -21,7 +21,7 @@ ALLOW_EMPTY = "1"
21 21
22EXTRA_OEMAKE = "OPENZAURUS_RELEASE=-${DISTRO_VERSION}" 22EXTRA_OEMAKE = "OPENZAURUS_RELEASE=-${DISTRO_VERSION}"
23COMPATIBLE_HOST = "(arm|i.86).*-linux" 23COMPATIBLE_HOST = "(arm|i.86).*-linux"
24COMPATIBLE_MACHINE = '(collie|poodle|c7x0|akita|spitz|tosa|hx2000|qemuarm|qemux86|bootcdx86)' 24COMPATIBLE_MACHINE = '(collie|poodle|c7x0|akita|spitz|tosa|hx2000|qemuarm|qemux86|bootcdx86|htcuniversal)'
25 25
26KERNEL_IMAGETYPE_qemux86 = "bzImage" 26KERNEL_IMAGETYPE_qemux86 = "bzImage"
27KERNEL_IMAGETYPE_bootcdx86 = "bzImage" 27KERNEL_IMAGETYPE_bootcdx86 = "bzImage"
@@ -30,6 +30,7 @@ CMDLINE_CON = "console=ttyS0,115200n8 console=tty1 noinitrd"
30CMDLINE_CON_qemuarm = "console=ttyAMA0,115200n8 console=tty1 noinitrd" 30CMDLINE_CON_qemuarm = "console=ttyAMA0,115200n8 console=tty1 noinitrd"
31CMDLINE_ROOT = "root=/dev/mtdblock2 rootfstype=jffs2" 31CMDLINE_ROOT = "root=/dev/mtdblock2 rootfstype=jffs2"
32CMDLINE_ROOT_spitz = "root=/dev/hda1 rootfstype=ext3 rootdelay=1 rw" 32CMDLINE_ROOT_spitz = "root=/dev/hda1 rootfstype=ext3 rootdelay=1 rw"
33#CMDLINE_ROOT_spitz = "root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=3 rw"
33CMDLINE_OTHER = "dyntick=enable" 34CMDLINE_OTHER = "dyntick=enable"
34CMDLINE_DEBUG = '${@base_contains("IMAGE_FEATURES", "debug-tweaks", "debug", "quiet", d)}' 35CMDLINE_DEBUG = '${@base_contains("IMAGE_FEATURES", "debug-tweaks", "debug", "quiet", d)}'
35 36
diff --git a/meta/packages/linux/linux-rp_2.6.22.bb b/meta/packages/linux/linux-rp_2.6.22.bb
index 361fdd8e1f..bc245721d5 100644
--- a/meta/packages/linux/linux-rp_2.6.22.bb
+++ b/meta/packages/linux/linux-rp_2.6.22.bb
@@ -1,6 +1,6 @@
1require linux-rp.inc 1require linux-rp.inc
2 2
3PR = "r1" 3PR = "r4"
4 4
5DEFAULT_PREFERENCE = "-1" 5DEFAULT_PREFERENCE = "-1"
6 6
@@ -48,6 +48,7 @@ SRC_URI = "http://www.kernel.org/pub/linux/kernel/v2.6/linux-2.6.22.tar.bz2 \
48 ${RPSRC}/mmcsd_no_scr_check-r1.patch;patch=1;status=hack \ 48 ${RPSRC}/mmcsd_no_scr_check-r1.patch;patch=1;status=hack \
49 ${RPSRC}/integrator_rgb-r1.patch;patch=1;status=hack \ 49 ${RPSRC}/integrator_rgb-r1.patch;patch=1;status=hack \
50 ${RPSRC}/pxa_cf_initorder_hack-r1.patch;patch=1;status=hack \ 50 ${RPSRC}/pxa_cf_initorder_hack-r1.patch;patch=1;status=hack \
51 file://htcuni.patch;patch=1 \
51 file://pxa-serial-hack.patch;patch=1;status=hack \ 52 file://pxa-serial-hack.patch;patch=1;status=hack \
52 file://connectplus-remove-ide-HACK.patch;patch=1;status=hack \ 53 file://connectplus-remove-ide-HACK.patch;patch=1;status=hack \
53 file://squashfs3.0-2.6.15.patch;patch=1;status=external \ 54 file://squashfs3.0-2.6.15.patch;patch=1;status=external \
@@ -61,6 +62,7 @@ SRC_URI = "http://www.kernel.org/pub/linux/kernel/v2.6/linux-2.6.22.tar.bz2 \
61 file://defconfig-qemuarm \ 62 file://defconfig-qemuarm \
62 file://defconfig-qemux86 \ 63 file://defconfig-qemux86 \
63 file://defconfig-bootcdx86 \ 64 file://defconfig-bootcdx86 \
65 file://defconfig-htcuniversal \
64 file://defconfig-tosa " 66 file://defconfig-tosa "
65 67
66# Add this to enable pm debug code (useful with a serial lead) 68# Add this to enable pm debug code (useful with a serial lead)
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2026-02-26 01:26:53 +0000