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authorKhem Raj <raj.khem@gmail.com>2019-09-25 06:57:04 (GMT)
committerRichard Purdie <richard.purdie@linuxfoundation.org>2019-09-27 12:02:16 (GMT)
commit794aa251e2e35d33e5e987f69332db1d845eb803 (patch)
tree90d5ef06e95f3079bd82975020db46945667d99c /meta/recipes-core
parentc782ef5360c72414260eb64913668ffd05e0a2d4 (diff)
downloadpoky-794aa251e2e35d33e5e987f69332db1d845eb803.tar.gz
musl: Fix riscv64 CAS functions
(From OE-Core rev: 853c35003abe5a1430a432f32fa325d6021f2d2f) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-core')
-rw-r--r--meta/recipes-core/musl/musl/0001-correct-the-operand-specifiers-in-the-riscv64-CAS-ro.patch55
-rw-r--r--meta/recipes-core/musl/musl_git.bb1
2 files changed, 56 insertions, 0 deletions
diff --git a/meta/recipes-core/musl/musl/0001-correct-the-operand-specifiers-in-the-riscv64-CAS-ro.patch b/meta/recipes-core/musl/musl/0001-correct-the-operand-specifiers-in-the-riscv64-CAS-ro.patch
new file mode 100644
index 0000000..09b71cb
--- /dev/null
+++ b/meta/recipes-core/musl/musl/0001-correct-the-operand-specifiers-in-the-riscv64-CAS-ro.patch
@@ -0,0 +1,55 @@
1From 59f2954fcaacd9426827c69a729e2647cb9977e5 Mon Sep 17 00:00:00 2001
2From: Palmer Dabbelt <palmer@sifive.com>
3Date: Tue, 24 Sep 2019 20:30:15 -0700
4Subject: [PATCH] correct the operand specifiers in the riscv64 CAS routines
5
6The operand sepcifiers in a_cas and a_casp for riscv64 were incorrect:
7there's a backwards branch in the routine, so despite tmp being written
8at the end of the assembly fragment it cannot be allocated in one of the
9input registers because the input values may be needed for another trip
10around the loop.
11
12For code that follows the guarnteed forward progress requirements, he
13backwards branch is rarely taken: SiFive's hardware only fails a store
14conditional on execptional cases (ie, instruction cache misses inside
15the loop), and until recently a bug in QEMU allowed back-to-back
16store conditionals to succeed. The bug has been fixed in the latest
17QEMU release, but it turns out that the fix caused this latent bug in
18musl to manifest.
19
20Full disclosure: I haven't actually even compiled musl. I just guessed
21this would fix a bug introducted by the new QEMU behavior, Alistair
22(CC'd) actually checked it fixes the problem. The rest is just
23conjecture.
24
25Upstream-Status: Submitted
26Signed-off-by: Khem Raj <raj.khem@gmail.com>
27---
28 arch/riscv64/atomic_arch.h | 4 ++--
29 1 file changed, 2 insertions(+), 2 deletions(-)
30
31diff --git a/arch/riscv64/atomic_arch.h b/arch/riscv64/atomic_arch.h
32index c9765342..41ad4d04 100644
33--- a/arch/riscv64/atomic_arch.h
34+++ b/arch/riscv64/atomic_arch.h
35@@ -14,7 +14,7 @@ static inline int a_cas(volatile int *p, int t, int s)
36 " sc.w.aqrl %1, %4, (%2)\n"
37 " bnez %1, 1b\n"
38 "1:"
39- : "=&r"(old), "=r"(tmp)
40+ : "=&r"(old), "=&r"(tmp)
41 : "r"(p), "r"(t), "r"(s)
42 : "memory");
43 return old;
44@@ -31,7 +31,7 @@ static inline void *a_cas_p(volatile void *p, void *t, void *s)
45 " sc.d.aqrl %1, %4, (%2)\n"
46 " bnez %1, 1b\n"
47 "1:"
48- : "=&r"(old), "=r"(tmp)
49+ : "=&r"(old), "=&r"(tmp)
50 : "r"(p), "r"(t), "r"(s)
51 : "memory");
52 return old;
53--
542.23.0
55
diff --git a/meta/recipes-core/musl/musl_git.bb b/meta/recipes-core/musl/musl_git.bb
index 87453be..335d53d 100644
--- a/meta/recipes-core/musl/musl_git.bb
+++ b/meta/recipes-core/musl/musl_git.bb
@@ -15,6 +15,7 @@ PV = "${BASEVER}+git${SRCPV}"
15SRC_URI = "git://git.musl-libc.org/musl \ 15SRC_URI = "git://git.musl-libc.org/musl \
16 file://0001-Make-dynamic-linker-a-relative-symlink-to-libc.patch \ 16 file://0001-Make-dynamic-linker-a-relative-symlink-to-libc.patch \
17 file://0002-ldso-Use-syslibdir-and-libdir-as-default-pathes-to-l.patch \ 17 file://0002-ldso-Use-syslibdir-and-libdir-as-default-pathes-to-l.patch \
18 file://0001-correct-the-operand-specifiers-in-the-riscv64-CAS-ro.patch \
18 " 19 "
19 20
20S = "${WORKDIR}/git" 21S = "${WORKDIR}/git"