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authorQing He <qing.he@intel.com>2010-08-27 10:15:31 +0800
committerRichard Purdie <rpurdie@linux.intel.com>2010-09-02 09:50:49 +0100
commit118c36466cd786823d2b8e4968b79a6597b2649b (patch)
treefd61b2ffab1173cf6b48c8a9fb45dcdd5da7b818
parentdd5509458fa5f78a3d4358b8a22dfdee40cac660 (diff)
downloadpoky-118c36466cd786823d2b8e4968b79a6597b2649b.tar.gz
libaio: add new recipe
version 0.3.107 from open embedded changes: - use $(AR) and $(RANLIB) instead of ar and ranlib Signed-off-by: Qing He <qing.he@intel.com>
Diffstat
-rw-r--r--meta/recipes-extended/libaio/libaio/00_arches.patch772
-rw-r--r--meta/recipes-extended/libaio/libaio/destdir.patch15
-rw-r--r--meta/recipes-extended/libaio/libaio/toolchain.patch25
-rw-r--r--meta/recipes-extended/libaio/libaio_0.3.107.bb18
4 files changed, 830 insertions, 0 deletions
diff --git a/meta/recipes-extended/libaio/libaio/00_arches.patch b/meta/recipes-extended/libaio/libaio/00_arches.patch
new file mode 100644
index 0000000000..380dbac5d4
--- /dev/null
+++ b/meta/recipes-extended/libaio/libaio/00_arches.patch
@@ -0,0 +1,772 @@
1from openembedded, added by Qing He <qing.he@intel.com>
2
3--- libaio-0.3.106.orig/src/syscall-m68k.h
4+++ libaio-0.3.106/src/syscall-m68k.h
5@@ -0,0 +1,78 @@
6+#define __NR_io_setup 241
7+#define __NR_io_destroy 242
8+#define __NR_io_getevents 243
9+#define __NR_io_submit 244
10+#define __NR_io_cancel 245
11+
12+#define io_syscall1(type,fname,sname,atype,a) \
13+type fname(atype a) \
14+{ \
15+register long __res __asm__ ("%d0") = __NR_##sname; \
16+register long __a __asm__ ("%d1") = (long)(a); \
17+__asm__ __volatile__ ("trap #0" \
18+ : "+d" (__res) \
19+ : "d" (__a) ); \
20+return (type) __res; \
21+}
22+
23+#define io_syscall2(type,fname,sname,atype,a,btype,b) \
24+type fname(atype a,btype b) \
25+{ \
26+register long __res __asm__ ("%d0") = __NR_##sname; \
27+register long __a __asm__ ("%d1") = (long)(a); \
28+register long __b __asm__ ("%d2") = (long)(b); \
29+__asm__ __volatile__ ("trap #0" \
30+ : "+d" (__res) \
31+ : "d" (__a), "d" (__b) \
32+ ); \
33+return (type) __res; \
34+}
35+
36+#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
37+type fname(atype a,btype b,ctype c) \
38+{ \
39+register long __res __asm__ ("%d0") = __NR_##sname; \
40+register long __a __asm__ ("%d1") = (long)(a); \
41+register long __b __asm__ ("%d2") = (long)(b); \
42+register long __c __asm__ ("%d3") = (long)(c); \
43+__asm__ __volatile__ ("trap #0" \
44+ : "+d" (__res) \
45+ : "d" (__a), "d" (__b), \
46+ "d" (__c) \
47+ ); \
48+return (type) __res; \
49+}
50+
51+#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
52+type fname (atype a, btype b, ctype c, dtype d) \
53+{ \
54+register long __res __asm__ ("%d0") = __NR_##sname; \
55+register long __a __asm__ ("%d1") = (long)(a); \
56+register long __b __asm__ ("%d2") = (long)(b); \
57+register long __c __asm__ ("%d3") = (long)(c); \
58+register long __d __asm__ ("%d4") = (long)(d); \
59+__asm__ __volatile__ ("trap #0" \
60+ : "+d" (__res) \
61+ : "d" (__a), "d" (__b), \
62+ "d" (__c), "d" (__d) \
63+ ); \
64+return (type) __res; \
65+}
66+
67+#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
68+type fname (atype a,btype b,ctype c,dtype d,etype e) \
69+{ \
70+register long __res __asm__ ("%d0") = __NR_##sname; \
71+register long __a __asm__ ("%d1") = (long)(a); \
72+register long __b __asm__ ("%d2") = (long)(b); \
73+register long __c __asm__ ("%d3") = (long)(c); \
74+register long __d __asm__ ("%d4") = (long)(d); \
75+register long __e __asm__ ("%d5") = (long)(e); \
76+__asm__ __volatile__ ("trap #0" \
77+ : "+d" (__res) \
78+ : "d" (__a), "d" (__b), \
79+ "d" (__c), "d" (__d), "d" (__e) \
80+ ); \
81+return (type) __res; \
82+}
83+
84--- libaio-0.3.106.orig/src/syscall-sparc.h
85+++ libaio-0.3.106/src/syscall-sparc.h
86@@ -0,0 +1,130 @@
87+/* $Id: unistd.h,v 1.74 2002/02/08 03:57:18 davem Exp $ */
88+
89+/*
90+ * System calls under the Sparc.
91+ *
92+ * Don't be scared by the ugly clobbers, it is the only way I can
93+ * think of right now to force the arguments into fixed registers
94+ * before the trap into the system call with gcc 'asm' statements.
95+ *
96+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
97+ *
98+ * SunOS compatibility based upon preliminary work which is:
99+ *
100+ * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
101+ */
102+
103+
104+#define __NR_io_setup 268
105+#define __NR_io_destroy 269
106+#define __NR_io_submit 270
107+#define __NR_io_cancel 271
108+#define __NR_io_getevents 272
109+
110+
111+#define io_syscall1(type,fname,sname,type1,arg1) \
112+type fname(type1 arg1) \
113+{ \
114+long __res; \
115+register long __g1 __asm__ ("g1") = __NR_##sname; \
116+register long __o0 __asm__ ("o0") = (long)(arg1); \
117+__asm__ __volatile__ ("t 0x10\n\t" \
118+ "bcc 1f\n\t" \
119+ "mov %%o0, %0\n\t" \
120+ "sub %%g0, %%o0, %0\n\t" \
121+ "1:\n\t" \
122+ : "=r" (__res), "=&r" (__o0) \
123+ : "1" (__o0), "r" (__g1) \
124+ : "cc"); \
125+if (__res < -255 || __res >= 0) \
126+ return (type) __res; \
127+return -1; \
128+}
129+
130+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
131+type fname(type1 arg1,type2 arg2) \
132+{ \
133+long __res; \
134+register long __g1 __asm__ ("g1") = __NR_##sname; \
135+register long __o0 __asm__ ("o0") = (long)(arg1); \
136+register long __o1 __asm__ ("o1") = (long)(arg2); \
137+__asm__ __volatile__ ("t 0x10\n\t" \
138+ "bcc 1f\n\t" \
139+ "mov %%o0, %0\n\t" \
140+ "sub %%g0, %%o0, %0\n\t" \
141+ "1:\n\t" \
142+ : "=r" (__res), "=&r" (__o0) \
143+ : "1" (__o0), "r" (__o1), "r" (__g1) \
144+ : "cc"); \
145+if (__res < -255 || __res >= 0) \
146+ return (type) __res; \
147+return -1; \
148+}
149+
150+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
151+type fname(type1 arg1,type2 arg2,type3 arg3) \
152+{ \
153+long __res; \
154+register long __g1 __asm__ ("g1") = __NR_##sname; \
155+register long __o0 __asm__ ("o0") = (long)(arg1); \
156+register long __o1 __asm__ ("o1") = (long)(arg2); \
157+register long __o2 __asm__ ("o2") = (long)(arg3); \
158+__asm__ __volatile__ ("t 0x10\n\t" \
159+ "bcc 1f\n\t" \
160+ "mov %%o0, %0\n\t" \
161+ "sub %%g0, %%o0, %0\n\t" \
162+ "1:\n\t" \
163+ : "=r" (__res), "=&r" (__o0) \
164+ : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1) \
165+ : "cc"); \
166+if (__res < -255 || __res>=0) \
167+ return (type) __res; \
168+return -1; \
169+}
170+
171+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
172+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
173+{ \
174+long __res; \
175+register long __g1 __asm__ ("g1") = __NR_##sname; \
176+register long __o0 __asm__ ("o0") = (long)(arg1); \
177+register long __o1 __asm__ ("o1") = (long)(arg2); \
178+register long __o2 __asm__ ("o2") = (long)(arg3); \
179+register long __o3 __asm__ ("o3") = (long)(arg4); \
180+__asm__ __volatile__ ("t 0x10\n\t" \
181+ "bcc 1f\n\t" \
182+ "mov %%o0, %0\n\t" \
183+ "sub %%g0, %%o0, %0\n\t" \
184+ "1:\n\t" \
185+ : "=r" (__res), "=&r" (__o0) \
186+ : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__g1) \
187+ : "cc"); \
188+if (__res < -255 || __res>=0) \
189+ return (type) __res; \
190+return -1; \
191+}
192+
193+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
194+ type5,arg5) \
195+type fname(type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \
196+{ \
197+long __res; \
198+register long __g1 __asm__ ("g1") = __NR_##sname; \
199+register long __o0 __asm__ ("o0") = (long)(arg1); \
200+register long __o1 __asm__ ("o1") = (long)(arg2); \
201+register long __o2 __asm__ ("o2") = (long)(arg3); \
202+register long __o3 __asm__ ("o3") = (long)(arg4); \
203+register long __o4 __asm__ ("o4") = (long)(arg5); \
204+__asm__ __volatile__ ("t 0x10\n\t" \
205+ "bcc 1f\n\t" \
206+ "mov %%o0, %0\n\t" \
207+ "sub %%g0, %%o0, %0\n\t" \
208+ "1:\n\t" \
209+ : "=r" (__res), "=&r" (__o0) \
210+ : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__o4), "r" (__g1) \
211+ : "cc"); \
212+if (__res < -255 || __res>=0) \
213+ return (type) __res; \
214+return -1; \
215+}
216+
217--- libaio-0.3.106.orig/src/syscall.h
218+++ libaio-0.3.106/src/syscall.h
219@@ -22,6 +22,16 @@
220 #include "syscall-s390.h"
221 #elif defined(__alpha__)
222 #include "syscall-alpha.h"
223+#elif defined(__arm__)
224+#include "syscall-arm.h"
225+#elif defined(__m68k__)
226+#include "syscall-m68k.h"
227+#elif defined(__sparc__)
228+#include "syscall-sparc.h"
229+#elif defined(__hppa__)
230+#include "syscall-parisc.h"
231+#elif defined(__mips__)
232+#include "syscall-mips.h"
233 #else
234 #error "add syscall-arch.h"
235 #endif
236--- libaio-0.3.106.orig/src/syscall-mips.h
237+++ libaio-0.3.106/src/syscall-mips.h
238@@ -0,0 +1,223 @@
239+/*
240+ * This file is subject to the terms and conditions of the GNU General Public
241+ * License. See the file "COPYING" in the main directory of this archive
242+ * for more details.
243+ *
244+ * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
245+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
246+ *
247+ * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto
248+ * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A
249+ */
250+
251+#ifndef _MIPS_SIM_ABI32
252+#define _MIPS_SIM_ABI32 1
253+#define _MIPS_SIM_NABI32 2
254+#define _MIPS_SIM_ABI64 3
255+#endif
256+
257+#if _MIPS_SIM == _MIPS_SIM_ABI32
258+
259+/*
260+ * Linux o32 style syscalls are in the range from 4000 to 4999.
261+ */
262+#define __NR_Linux 4000
263+#define __NR_io_setup (__NR_Linux + 241)
264+#define __NR_io_destroy (__NR_Linux + 242)
265+#define __NR_io_getevents (__NR_Linux + 243)
266+#define __NR_io_submit (__NR_Linux + 244)
267+#define __NR_io_cancel (__NR_Linux + 245)
268+
269+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
270+
271+#if _MIPS_SIM == _MIPS_SIM_ABI64
272+
273+/*
274+ * Linux 64-bit syscalls are in the range from 5000 to 5999.
275+ */
276+#define __NR_Linux 5000
277+#define __NR_io_setup (__NR_Linux + 200)
278+#define __NR_io_destroy (__NR_Linux + 201)
279+#define __NR_io_getevents (__NR_Linux + 202)
280+#define __NR_io_submit (__NR_Linux + 203)
281+#define __NR_io_cancel (__NR_Linux + 204)
282+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
283+
284+#if _MIPS_SIM == _MIPS_SIM_NABI32
285+
286+/*
287+ * Linux N32 syscalls are in the range from 6000 to 6999.
288+ */
289+#define __NR_Linux 6000
290+#define __NR_io_setup (__NR_Linux + 200)
291+#define __NR_io_destroy (__NR_Linux + 201)
292+#define __NR_io_getevents (__NR_Linux + 202)
293+#define __NR_io_submit (__NR_Linux + 203)
294+#define __NR_io_cancel (__NR_Linux + 204)
295+#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
296+
297+#define io_syscall1(type,fname,sname,atype,a) \
298+type fname(atype a) \
299+{ \
300+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
301+ register unsigned long __a3 asm("$7"); \
302+ unsigned long __v0; \
303+ \
304+ __asm__ volatile ( \
305+ ".set\tnoreorder\n\t" \
306+ "li\t$2, %3\t\t\t# " #fname "\n\t" \
307+ "syscall\n\t" \
308+ "move\t%0, $2\n\t" \
309+ ".set\treorder" \
310+ : "=&r" (__v0), "=r" (__a3) \
311+ : "r" (__a0), "i" (__NR_##sname) \
312+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
313+ "memory"); \
314+ \
315+ if (__a3 == 0) \
316+ return (type) __v0; \
317+ return (type) -1; \
318+}
319+
320+#define io_syscall2(type,fname,sname,atype,a,btype,b) \
321+type fname(atype a, btype b) \
322+{ \
323+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
324+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
325+ register unsigned long __a3 asm("$7"); \
326+ unsigned long __v0; \
327+ \
328+ __asm__ volatile ( \
329+ ".set\tnoreorder\n\t" \
330+ "li\t$2, %4\t\t\t# " #fname "\n\t" \
331+ "syscall\n\t" \
332+ "move\t%0, $2\n\t" \
333+ ".set\treorder" \
334+ : "=&r" (__v0), "=r" (__a3) \
335+ : "r" (__a0), "r" (__a1), "i" (__NR_##sname) \
336+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
337+ "memory"); \
338+ \
339+ if (__a3 == 0) \
340+ return (type) __v0; \
341+ return (type) -1; \
342+}
343+
344+#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \
345+type fname(atype a, btype b, ctype c) \
346+{ \
347+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
348+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
349+ register unsigned long __a2 asm("$6") = (unsigned long) c; \
350+ register unsigned long __a3 asm("$7"); \
351+ unsigned long __v0; \
352+ \
353+ __asm__ volatile ( \
354+ ".set\tnoreorder\n\t" \
355+ "li\t$2, %5\t\t\t# " #fname "\n\t" \
356+ "syscall\n\t" \
357+ "move\t%0, $2\n\t" \
358+ ".set\treorder" \
359+ : "=&r" (__v0), "=r" (__a3) \
360+ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
361+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
362+ "memory"); \
363+ \
364+ if (__a3 == 0) \
365+ return (type) __v0; \
366+ return (type) -1; \
367+}
368+
369+#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \
370+type fname(atype a, btype b, ctype c, dtype d) \
371+{ \
372+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
373+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
374+ register unsigned long __a2 asm("$6") = (unsigned long) c; \
375+ register unsigned long __a3 asm("$7") = (unsigned long) d; \
376+ unsigned long __v0; \
377+ \
378+ __asm__ volatile ( \
379+ ".set\tnoreorder\n\t" \
380+ "li\t$2, %5\t\t\t# " #fname "\n\t" \
381+ "syscall\n\t" \
382+ "move\t%0, $2\n\t" \
383+ ".set\treorder" \
384+ : "=&r" (__v0), "+r" (__a3) \
385+ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \
386+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
387+ "memory"); \
388+ \
389+ if (__a3 == 0) \
390+ return (type) __v0; \
391+ return (type) -1; \
392+}
393+
394+#if (_MIPS_SIM == _MIPS_SIM_ABI32)
395+
396+/*
397+ * Using those means your brain needs more than an oil change ;-)
398+ */
399+
400+#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
401+type fname(atype a, btype b, ctype c, dtype d, etype e) \
402+{ \
403+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
404+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
405+ register unsigned long __a2 asm("$6") = (unsigned long) c; \
406+ register unsigned long __a3 asm("$7") = (unsigned long) d; \
407+ unsigned long __v0; \
408+ \
409+ __asm__ volatile ( \
410+ ".set\tnoreorder\n\t" \
411+ "lw\t$2, %6\n\t" \
412+ "subu\t$29, 32\n\t" \
413+ "sw\t$2, 16($29)\n\t" \
414+ "li\t$2, %5\t\t\t# " #fname "\n\t" \
415+ "syscall\n\t" \
416+ "move\t%0, $2\n\t" \
417+ "addiu\t$29, 32\n\t" \
418+ ".set\treorder" \
419+ : "=&r" (__v0), "+r" (__a3) \
420+ : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname), \
421+ "m" ((unsigned long)e) \
422+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
423+ "memory"); \
424+ \
425+ if (__a3 == 0) \
426+ return (type) __v0; \
427+ return (type) -1; \
428+}
429+
430+#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
431+
432+#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
433+
434+#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
435+type fname (atype a,btype b,ctype c,dtype d,etype e) \
436+{ \
437+ register unsigned long __a0 asm("$4") = (unsigned long) a; \
438+ register unsigned long __a1 asm("$5") = (unsigned long) b; \
439+ register unsigned long __a2 asm("$6") = (unsigned long) c; \
440+ register unsigned long __a3 asm("$7") = (unsigned long) d; \
441+ register unsigned long __a4 asm("$8") = (unsigned long) e; \
442+ unsigned long __v0; \
443+ \
444+ __asm__ volatile ( \
445+ ".set\tnoreorder\n\t" \
446+ "li\t$2, %6\t\t\t# " #fname "\n\t" \
447+ "syscall\n\t" \
448+ "move\t%0, $2\n\t" \
449+ ".set\treorder" \
450+ : "=&r" (__v0), "+r" (__a3) \
451+ : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##sname) \
452+ : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
453+ "memory"); \
454+ \
455+ if (__a3 == 0) \
456+ return (type) __v0; \
457+ return (type) -1; \
458+}
459+
460+#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
461+
462--- libaio-0.3.106.orig/src/libaio.h
463+++ libaio-0.3.106/src/libaio.h
464@@ -72,6 +72,40 @@
465 #define PADDED(x, y) unsigned y; x
466 #define PADDEDptr(x, y) unsigned y; x
467 #define PADDEDul(x, y) unsigned y; unsigned long x
468+#elif defined(__arm__)
469+# if defined (__ARMEB__) /* big endian, 32 bits */
470+#define PADDED(x, y) unsigned y; x
471+#define PADDEDptr(x, y) unsigned y; x
472+#define PADDEDul(x, y) unsigned y; unsigned long x
473+# else /* little endian, 32 bits */
474+#define PADDED(x, y) x; unsigned y
475+#define PADDEDptr(x, y) x; unsigned y
476+#define PADDEDul(x, y) unsigned long x; unsigned y
477+# endif
478+#elif defined(__m68k__) /* big endian, 32 bits */
479+#define PADDED(x, y) unsigned y; x
480+#define PADDEDptr(x, y) unsigned y; x
481+#define PADDEDul(x, y) unsigned y; unsigned long x
482+#elif defined(__sparc__) /* big endian, 32 bits */
483+#define PADDED(x, y) unsigned y; x
484+#define PADDEDptr(x, y) unsigned y; x
485+#define PADDEDul(x, y) unsigned y; unsigned long x
486+#elif defined(__hppa__) /* big endian, 32 bits */
487+#define PADDED(x, y) unsigned y; x
488+#define PADDEDptr(x, y) unsigned y; x
489+#define PADDEDul(x, y) unsigned y; unsigned long x
490+#elif defined(__mips__)
491+# if defined (__MIPSEB__) /* big endian, 32 bits */
492+#define PADDED(x, y) unsigned y; x
493+#define PADDEDptr(x, y) unsigned y; x
494+#define PADDEDul(x, y) unsigned y; unsigned long x
495+# elif defined(__MIPSEL__) /* little endian, 32 bits */
496+#define PADDED(x, y) x; unsigned y
497+#define PADDEDptr(x, y) x; unsigned y
498+#define PADDEDul(x, y) unsigned long x; unsigned y
499+# else
500+# error "neither mipseb nor mipsel?"
501+# endif
502 #else
503 #error endian?
504 #endif
505--- libaio-0.3.106.orig/src/syscall-parisc.h
506+++ libaio-0.3.106/src/syscall-parisc.h
507@@ -0,0 +1,146 @@
508+/*
509+ * Linux system call numbers.
510+ *
511+ * Cary Coutant says that we should just use another syscall gateway
512+ * page to avoid clashing with the HPUX space, and I think he's right:
513+ * it will would keep a branch out of our syscall entry path, at the
514+ * very least. If we decide to change it later, we can ``just'' tweak
515+ * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be
516+ * 1024 or something. Oh, and recompile libc. =)
517+ *
518+ * 64-bit HPUX binaries get the syscall gateway address passed in a register
519+ * from the kernel at startup, which seems a sane strategy.
520+ */
521+
522+#define __NR_Linux 0
523+#define __NR_io_setup (__NR_Linux + 215)
524+#define __NR_io_destroy (__NR_Linux + 216)
525+#define __NR_io_getevents (__NR_Linux + 217)
526+#define __NR_io_submit (__NR_Linux + 218)
527+#define __NR_io_cancel (__NR_Linux + 219)
528+
529+#define SYS_ify(syscall_name) __NR_##syscall_name
530+
531+/* Assume all syscalls are done from PIC code just to be
532+ * safe. The worst case scenario is that you lose a register
533+ * and save/restore r19 across the syscall. */
534+#define PIC
535+
536+/* Definition taken from glibc 2.3.3
537+ * sysdeps/unix/sysv/linux/hppa/sysdep.h
538+ */
539+
540+#ifdef PIC
541+/* WARNING: CANNOT BE USED IN A NOP! */
542+# define K_STW_ASM_PIC " copy %%r19, %%r4\n"
543+# define K_LDW_ASM_PIC " copy %%r4, %%r19\n"
544+# define K_USING_GR4 "%r4",
545+#else
546+# define K_STW_ASM_PIC " \n"
547+# define K_LDW_ASM_PIC " \n"
548+# define K_USING_GR4
549+#endif
550+
551+/* GCC has to be warned that a syscall may clobber all the ABI
552+ registers listed as "caller-saves", see page 8, Table 2
553+ in section 2.2.6 of the PA-RISC RUN-TIME architecture
554+ document. However! r28 is the result and will conflict with
555+ the clobber list so it is left out. Also the input arguments
556+ registers r20 -> r26 will conflict with the list so they
557+ are treated specially. Although r19 is clobbered by the syscall
558+ we cannot say this because it would violate ABI, thus we say
559+ r4 is clobbered and use that register to save/restore r19
560+ across the syscall. */
561+
562+#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \
563+ "%r20", "%r29", "%r31"
564+
565+#undef K_INLINE_SYSCALL
566+#define K_INLINE_SYSCALL(name, nr, args...) ({ \
567+ long __sys_res; \
568+ { \
569+ register unsigned long __res __asm__("r28"); \
570+ K_LOAD_ARGS_##nr(args) \
571+ /* FIXME: HACK stw/ldw r19 around syscall */ \
572+ __asm__ volatile( \
573+ K_STW_ASM_PIC \
574+ " ble 0x100(%%sr2, %%r0)\n" \
575+ " ldi %1, %%r20\n" \
576+ K_LDW_ASM_PIC \
577+ : "=r" (__res) \
578+ : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \
579+ : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \
580+ ); \
581+ __sys_res = (long)__res; \
582+ } \
583+ __sys_res; \
584+})
585+
586+#define K_LOAD_ARGS_0()
587+#define K_LOAD_ARGS_1(r26) \
588+ register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \
589+ K_LOAD_ARGS_0()
590+#define K_LOAD_ARGS_2(r26,r25) \
591+ register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
592+ K_LOAD_ARGS_1(r26)
593+#define K_LOAD_ARGS_3(r26,r25,r24) \
594+ register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
595+ K_LOAD_ARGS_2(r26,r25)
596+#define K_LOAD_ARGS_4(r26,r25,r24,r23) \
597+ register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \
598+ K_LOAD_ARGS_3(r26,r25,r24)
599+#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
600+ register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \
601+ K_LOAD_ARGS_4(r26,r25,r24,r23)
602+#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
603+ register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \
604+ K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
605+
606+/* Even with zero args we use r20 for the syscall number */
607+#define K_ASM_ARGS_0
608+#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26)
609+#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25)
610+#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24)
611+#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23)
612+#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22)
613+#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21)
614+
615+/* The registers not listed as inputs but clobbered */
616+#define K_CLOB_ARGS_6
617+#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
618+#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22"
619+#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23"
620+#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24"
621+#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
622+#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26"
623+
624+#define io_syscall1(type,fname,sname,type1,arg1) \
625+type fname(type1 arg1) \
626+{ \
627+ return K_INLINE_SYSCALL(sname, 1, arg1); \
628+}
629+
630+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
631+type fname(type1 arg1, type2 arg2) \
632+{ \
633+ return K_INLINE_SYSCALL(sname, 2, arg1, arg2); \
634+}
635+
636+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
637+type fname(type1 arg1, type2 arg2, type3 arg3) \
638+{ \
639+ return K_INLINE_SYSCALL(sname, 3, arg1, arg2, arg3); \
640+}
641+
642+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
643+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
644+{ \
645+ return K_INLINE_SYSCALL(sname, 4, arg1, arg2, arg3, arg4); \
646+}
647+
648+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
649+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
650+{ \
651+ return K_INLINE_SYSCALL(sname, 5, arg1, arg2, arg3, arg4, arg5); \
652+}
653+
654--- libaio-0.3.106.orig/src/syscall-arm.h
655+++ libaio-0.3.106/src/syscall-arm.h
656@@ -0,0 +1,116 @@
657+/*
658+ * linux/include/asm-arm/unistd.h
659+ *
660+ * Copyright (C) 2001-2005 Russell King
661+ *
662+ * This program is free software; you can redistribute it and/or modify
663+ * it under the terms of the GNU General Public License version 2 as
664+ * published by the Free Software Foundation.
665+ *
666+ * Please forward _all_ changes to this file to rmk@arm.linux.org.uk,
667+ * no matter what the change is. Thanks!
668+ */
669+
670+#define __NR_OABI_SYSCALL_BASE 0x900000
671+
672+#if defined(__thumb__) || defined(__ARM_EABI__)
673+#define __NR_SYSCALL_BASE 0
674+#else
675+#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE
676+#endif
677+
678+#define __NR_io_setup (__NR_SYSCALL_BASE+243)
679+#define __NR_io_destroy (__NR_SYSCALL_BASE+244)
680+#define __NR_io_getevents (__NR_SYSCALL_BASE+245)
681+#define __NR_io_submit (__NR_SYSCALL_BASE+246)
682+#define __NR_io_cancel (__NR_SYSCALL_BASE+247)
683+
684+#define __sys2(x) #x
685+#define __sys1(x) __sys2(x)
686+
687+#if defined(__thumb__) || defined(__ARM_EABI__)
688+#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name;
689+#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs
690+#define __syscall(name) "swi\t0"
691+#else
692+#define __SYS_REG(name)
693+#define __SYS_REG_LIST(regs...) regs
694+#define __syscall(name) "swi\t" __sys1(__NR_##name) ""
695+#endif
696+
697+#define io_syscall1(type,fname,sname,type1,arg1) \
698+type fname(type1 arg1) { \
699+ __SYS_REG(sname) \
700+ register long __r0 __asm__("r0") = (long)arg1; \
701+ register long __res_r0 __asm__("r0"); \
702+ __asm__ __volatile__ ( \
703+ __syscall(sname) \
704+ : "=r" (__res_r0) \
705+ : __SYS_REG_LIST( "0" (__r0) ) \
706+ : "memory" ); \
707+ return (type) __res_r0; \
708+}
709+
710+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
711+type fname(type1 arg1,type2 arg2) { \
712+ __SYS_REG(sname) \
713+ register long __r0 __asm__("r0") = (long)arg1; \
714+ register long __r1 __asm__("r1") = (long)arg2; \
715+ register long __res_r0 __asm__("r0"); \
716+ __asm__ __volatile__ ( \
717+ __syscall(sname) \
718+ : "=r" (__res_r0) \
719+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) \
720+ : "memory" ); \
721+ return (type) __res_r0; \
722+}
723+
724+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
725+type fname(type1 arg1,type2 arg2,type3 arg3) { \
726+ __SYS_REG(sname) \
727+ register long __r0 __asm__("r0") = (long)arg1; \
728+ register long __r1 __asm__("r1") = (long)arg2; \
729+ register long __r2 __asm__("r2") = (long)arg3; \
730+ register long __res_r0 __asm__("r0"); \
731+ __asm__ __volatile__ ( \
732+ __syscall(sname) \
733+ : "=r" (__res_r0) \
734+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) \
735+ : "memory" ); \
736+ return (type) __res_r0; \
737+}
738+
739+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\
740+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
741+ __SYS_REG(sname) \
742+ register long __r0 __asm__("r0") = (long)arg1; \
743+ register long __r1 __asm__("r1") = (long)arg2; \
744+ register long __r2 __asm__("r2") = (long)arg3; \
745+ register long __r3 __asm__("r3") = (long)arg4; \
746+ register long __res_r0 __asm__("r0"); \
747+ __asm__ __volatile__ ( \
748+ __syscall(sname) \
749+ : "=r" (__res_r0) \
750+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) \
751+ : "memory" ); \
752+ return (type) __res_r0; \
753+}
754+
755+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
756+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) {\
757+ __SYS_REG(sname) \
758+ register long __r0 __asm__("r0") = (long)arg1; \
759+ register long __r1 __asm__("r1") = (long)arg2; \
760+ register long __r2 __asm__("r2") = (long)arg3; \
761+ register long __r3 __asm__("r3") = (long)arg4; \
762+ register long __r4 __asm__("r4") = (long)arg5; \
763+ register long __res_r0 __asm__("r0"); \
764+ __asm__ __volatile__ ( \
765+ __syscall(sname) \
766+ : "=r" (__res_r0) \
767+ : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
768+ "r" (__r3), "r" (__r4) ) \
769+ : "memory" ); \
770+ return (type) __res_r0; \
771+}
772+
diff --git a/meta/recipes-extended/libaio/libaio/destdir.patch b/meta/recipes-extended/libaio/libaio/destdir.patch
new file mode 100644
index 0000000000..66c7a43180
--- /dev/null
+++ b/meta/recipes-extended/libaio/libaio/destdir.patch
@@ -0,0 +1,15 @@
1from openembedded, added by Qing He <qing.he@intel.com>
2
3Index: libaio-0.3.106/Makefile
4===================================================================
5--- libaio-0.3.106.orig/Makefile 2004-02-26 07:25:10.000000000 -0800
6+++ libaio-0.3.106/Makefile 2006-10-14 09:19:07.000000000 -0700
7@@ -15,7 +15,7 @@
8 @$(MAKE) -C src
9
10 install:
11- @$(MAKE) -C src install prefix=$(prefix) includedir=$(includedir) libdir=$(libdir)
12+ @$(MAKE) -C src install prefix=$(DESTDIR)$(prefix) includedir=$(DESTDIR)$(includedir) libdir=$(DESTDIR)$(libdir)
13
14
15 clean:
diff --git a/meta/recipes-extended/libaio/libaio/toolchain.patch b/meta/recipes-extended/libaio/libaio/toolchain.patch
new file mode 100644
index 0000000000..ae400cf857
--- /dev/null
+++ b/meta/recipes-extended/libaio/libaio/toolchain.patch
@@ -0,0 +1,25 @@
18/27/2010 - created by Qing He <qing.he@intel.com>
2
3diff --git a/src/Makefile b/src/Makefile
4index 8d134cc..df8e5b6 100644
5--- a/src/Makefile
6+++ b/src/Makefile
7@@ -2,7 +2,6 @@ prefix=/usr
8 includedir=$(prefix)/include
9 libdir=$(prefix)/lib
10
11-ARCH := $(shell uname -m | sed -e s/i.86/i386/)
12 CFLAGS := -nostdlib -nostartfiles -Wall -I. -g -fomit-frame-pointer -O2 -fPIC
13 SO_CFLAGS=-shared $(CFLAGS)
14 L_CFLAGS=$(CFLAGS)
15@@ -44,8 +43,8 @@ $(libaio_objs) $(libaio_sobjs): libaio.h vsys_def.h
16
17 libaio.a: $(libaio_objs)
18 rm -f libaio.a
19- ar r libaio.a $^
20- ranlib libaio.a
21+ $(AR) r libaio.a $^
22+ $(RANLIB) libaio.a
23
24 $(libname): $(libaio_sobjs) libaio.map
25 $(CC) $(SO_CFLAGS) -Wl,--version-script=libaio.map -Wl,-soname=$(soname) -o $@ $(libaio_sobjs) $(LINK_FLAGS)
diff --git a/meta/recipes-extended/libaio/libaio_0.3.107.bb b/meta/recipes-extended/libaio/libaio_0.3.107.bb
new file mode 100644
index 0000000000..32d52adcf1
--- /dev/null
+++ b/meta/recipes-extended/libaio/libaio_0.3.107.bb
@@ -0,0 +1,18 @@
1DESCRIPTION="Asynchronous input/output library that uses the kernels native interface"
2HOMEPAGE = "http://lse.sourceforge.net/io/aio.html"
3
4LICENSE = "LGPLv2.1+"
5LIC_FILES_CHKSUM = "file://COPYING;md5=d8045f3b8f929c1cb29a1e3fd737b499"
6
7PR = "r0"
8
9SRC_URI = "${DEBIAN_MIRROR}/main/liba/libaio/libaio_${PV}.orig.tar.gz \
10 file://00_arches.patch \
11 file://toolchain.patch \
12 file://destdir.patch"
13
14EXTRA_OEMAKE =+ "prefix=${prefix} includedir=${includedir} libdir=${libdir}"
15
16do_install () {
17 oe_runmake install DESTDIR=${D}
18}
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2026-02-05 00:50:13 +0000