<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/poky.git/meta/conf/machine/include, branch mickledore</title>
<subtitle>Mirror of git.yoctoproject.org/poky</subtitle>
<id>https://git.enea.com/cgit/linux/poky.git/atom?h=mickledore</id>
<link rel='self' href='https://git.enea.com/cgit/linux/poky.git/atom?h=mickledore'/>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/'/>
<updated>2023-07-26T15:12:21+00:00</updated>
<entry>
<title>machine/arch-arm64: add -mbranch-protection=standard</title>
<updated>2023-07-26T15:12:21+00:00</updated>
<author>
<name>Ross Burton</name>
<email>ross.burton@arm.com</email>
</author>
<published>2023-07-13T11:01:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=9d9f199ad841ac5825bd6ed970a238f2c921a7f5'/>
<id>urn:sha1:9d9f199ad841ac5825bd6ed970a238f2c921a7f5</id>
<content type='text'>
Enable branch protection (PAC/BTI) for all aarch64 builds.  This was
previously enabled at a global level in the GCC build, but that breaks
the gcc test suite.

(From OE-Core rev: 63ce207e15bdee7708754a178a19fca64c4c0ee9)

Signed-off-by: Ross Burton &lt;ross.burton@arm.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
(cherry picked from commit 8905639d1cdc5ce809cc5ecd9672f5e86bf8a579)
Signed-off-by: Steve Sakoman &lt;steve@sakoman.com&gt;
</content>
</entry>
<entry>
<title>qemuboot-x86.inc: allow overwrite of QB_CPU</title>
<updated>2023-03-06T09:52:16+00:00</updated>
<author>
<name>Thomas Roos</name>
<email>throos@amazon.de</email>
</author>
<published>2023-03-03T09:23:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=8cbc5846413e6591bbcfcca24e54afad1ca4a52e'/>
<id>urn:sha1:8cbc5846413e6591bbcfcca24e54afad1ca4a52e</id>
<content type='text'>
To test nested kvm with qemu QB_CPU* needs to be modified.
E.g. set to "-cpu Haswell-noTSX-IBRS,vmx=on"

This allows to overwrite this from local.conf etc.

(From OE-Core rev: aa9d145d90893b04cde197e9b5f4dc574e4738e1)

Signed-off-by: Thomas Roos &lt;throos@amazon.de&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tune-riscv.inc: Add riscv64nc to available tunes list</title>
<updated>2023-02-24T11:04:27+00:00</updated>
<author>
<name>Khem Raj</name>
<email>raj.khem@gmail.com</email>
</author>
<published>2023-02-23T19:26:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=0bcb886939a5bdb96a8223a96733061802a9b527'/>
<id>urn:sha1:0bcb886939a5bdb96a8223a96733061802a9b527</id>
<content type='text'>
This was missed when riscv64nc was added

(From OE-Core rev: 0c549ef5732afdcd96407ceb045983eed2ca75f4)

Signed-off-by: Khem Raj &lt;raj.khem@gmail.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>QB_SMP: allow user modification</title>
<updated>2023-02-23T12:11:29+00:00</updated>
<author>
<name>Trevor Woerner</name>
<email>twoerner@gmail.com</email>
</author>
<published>2023-02-21T20:44:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=9e0145df7a9d18b97edc617d1321dc361648bb04'/>
<id>urn:sha1:9e0145df7a9d18b97edc617d1321dc361648bb04</id>
<content type='text'>
Allow a user to override the QM_SMP value giving them the opportunity to
select for themselves the number of CPUs to use in qemu.

(From OE-Core rev: 70a91e6d0357149c00b97f7e66e16cbc52997a92)

Signed-off-by: Trevor Woerner &lt;twoerner@gmail.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>base: add support for loongarch64</title>
<updated>2023-02-04T17:02:10+00:00</updated>
<author>
<name>Xiaotian Wu</name>
<email>wuxiaotian@loongson.cn</email>
</author>
<published>2023-02-03T07:16:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=324b03e15fb8623690a5c5c64006602fdc7027a2'/>
<id>urn:sha1:324b03e15fb8623690a5c5c64006602fdc7027a2</id>
<content type='text'>
(From OE-Core rev: 759baaceb4dd623d5da12ba0d01540fa080154ba)

Signed-off-by: Xiaotian Wu &lt;wuxiaotian@loongson.cn&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>conf/qemu: bump preferred kernel version to 6.1</title>
<updated>2023-01-26T22:22:53+00:00</updated>
<author>
<name>Bruce Ashfield</name>
<email>bruce.ashfield@gmail.com</email>
</author>
<published>2023-01-24T21:59:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=24d0d206336147284c9334596f000cf84058838e'/>
<id>urn:sha1:24d0d206336147284c9334596f000cf84058838e</id>
<content type='text'>
6.1 has been soaking for a while now, so it is time to bump the
default qemu version to 6.1 and prepare to remove 5.19.

(From OE-Core rev: 91c1f7d4eb9ec5ad683c798812395df3a56747ba)

Signed-off-by: Bruce Ashfield &lt;bruce.ashfield@gmail.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tune-x86-64-v3.inc: set QEMU_EXTRAOPTIONS like other tune-* files</title>
<updated>2023-01-12T23:08:58+00:00</updated>
<author>
<name>Martin Jansa</name>
<email>Martin.Jansa@gmail.com</email>
</author>
<published>2023-01-07T14:41:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=dca9b920e08b102b377d74f870f73d5f3f377394'/>
<id>urn:sha1:dca9b920e08b102b377d74f870f73d5f3f377394</id>
<content type='text'>
* use Skylake-Client to match QB_CPU_KVM as changed in:
  https://git.openembedded.org/openembedded-core/commit/?id=6f2af1e5d1537b4d31e14946292bf58f0fd76fc9

* explicitly set -cpu instead of letting qemu to choose based
  on host cpu

* check=false is still useful as e.g. on on AMD Threadripper 3970X:
  orc/0.4.33-r0 $ PSEUDO_UNLOAD=1 qemu-x86_64 -r 3.2.0 -cpu Skylake-Client  -L recipe-sysroot -E LD_LIBRARY_PATH=recipe-sysroot//usr/lib:recipe-sysroot//lib
  orc/0.4.33-r0/build/meson-private/sanitycheckc_cross.exe
  qemu-x86_64: warning: TCG doesn't support requested feature: CPUID.01H:ECX.pcid [bit 17]
  qemu-x86_64: warning: TCG doesn't support requested feature: CPUID.01H:ECX.x2apic [bit 21]
  qemu-x86_64: warning: TCG doesn't support requested feature: CPUID.01H:ECX.tsc-deadline [bit 24]
  qemu-x86_64: warning: TCG doesn't support requested feature: CPUID.07H:EBX.hle [bit 4]
  qemu-x86_64: warning: TCG doesn't support requested feature: CPUID.07H:EBX.invpcid [bit 10]
  qemu-x86_64: warning: TCG doesn't support requested feature: CPUID.07H:EBX.rtm [bit 11]
  qemu-x86_64: warning: TCG doesn't support requested feature: CPUID.07H:EBX.rdseed [bit 18]
  qemu-x86_64: warning: TCG doesn't support requested feature: CPUID.80000001H:ECX.3dnowprefetch [bit 8]
  qemu-x86_64: warning: TCG doesn't support requested feature: CPUID.0DH:EAX.xsavec [bit 1]

* if this still doesn't work for you on your host, you might need to downgrade
  DEFAULTTUNE to e.g. corei7-64 (all all the way back to core2-64), for
  more details see:
  https://www.openembedded.org/pipermail/openembedded-core/2018-April/150178.html

* the leading space shouldn't be needed, I've kept it for consistency
  with other QEMU_EXTRAOPTIONS

(From OE-Core rev: d1a52559670921389a66a4c26d37481d6611042a)

Signed-off-by: Martin Jansa &lt;Martin.Jansa@gmail.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>qemux86-64: Reduce tuning to core2-64</title>
<updated>2023-01-11T11:03:34+00:00</updated>
<author>
<name>Richard Purdie</name>
<email>richard.purdie@linuxfoundation.org</email>
</author>
<published>2023-01-11T10:59:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=3d67b6c60fa968cd36b51c63e2a7f11bb87dd315'/>
<id>urn:sha1:3d67b6c60fa968cd36b51c63e2a7f11bb87dd315</id>
<content type='text'>
Effectively revert "qemux86-64: build for x86-64-v3 (2013 Haswell and later) rather than Core 2 from 2006"
(commit 6f2af1e5d1537b4d31e14946292bf58f0fd76fc9)

Much as I'd love us to use the latest tuning, we do have some autobuilder
hardware which isn't ready for this yet which breaks KVM and some qemu
user mode usage as there appear to be TCG bugs too. I suspect we're not
the only ones with such hardware.

Drop the tune back to core2-64, anyone can easily customise it
themselves if they need it. We can revisit this in a year or two
as we should be ready then. It has beena  good test of the rest of the
support which all seems ready.

I'd have preferred to use corei7-64 but that causes
runqemu.RunqemuTests.test_boot_machine_iso to hang.

Leave the newer tune file inclusion so people can change tunes
more easily.

(From OE-Core rev: 369b1dfa28b1791d45f068acc765190defecd460)

Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>qemux86-64: build for x86-64-v3 (2013 Haswell and later) rather than Core 2 from 2006</title>
<updated>2023-01-06T12:03:46+00:00</updated>
<author>
<name>Alexander Kanavin</name>
<email>alex.kanavin@gmail.com</email>
</author>
<published>2022-12-30T18:38:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=ba0326071edc4aa988ad5bfaa4215e24e31fc75b'/>
<id>urn:sha1:ba0326071edc4aa988ad5bfaa4215e24e31fc75b</id>
<content type='text'>
This allows us to
- test those more recent instruction sets (AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE)
- benefit from improved performance across the stack both in kvm-driven system emulation and when running
on real silicon.
For example, glibc:
https://www.phoronix.com/news/Glibc-strcasecmp-AVX2-EVEX

v4 level is adding AVX-512, which is far less established, particularly Intel has famously backtracked
from supporting it in Alder Lake/Raport Lake client CPUs and AMD has only implemented it in very recent Zen4 products:
https://www.phoronix.com/news/GCC-11-x86-64-Feature-Levels

(From OE-Core rev: 6f2af1e5d1537b4d31e14946292bf58f0fd76fc9)

Signed-off-by: Alexander Kanavin &lt;alex@linutronix.de&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>conf/machine/include: add x86-64-v3 tunes (AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE)</title>
<updated>2022-12-31T17:08:29+00:00</updated>
<author>
<name>Alexander Kanavin</name>
<email>alex.kanavin@gmail.com</email>
</author>
<published>2022-12-30T18:38:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=f2bb46285046f53fbfd20ae8cac00786092ce19d'/>
<id>urn:sha1:f2bb46285046f53fbfd20ae8cac00786092ce19d</id>
<content type='text'>
Qemu 7.2 finally allows us to move beyond building for original Core 2/Core i7 era hardware,
and this patch adds support for the newer generations. But first, a bit of
background:

Recently toolchains gained support for specifying x86-64 'levels' of
instruction set support; v3 corresponds to 2013-era Haswell CPUs
(and later), with AVX, AVX2 and a few other instructions that
were introduced in that generation. I believe this is preferrable
to picking a specific CPU model as the baseline.

Here's Phoronix's feature article that explains the feature and the available levels:

"Both LLVM Clang 12 and GCC 11 are ready to go in offering the new x86-64-v2, x86-64-v3, and x86-64-v4 targets.

These x86_64 micro-architecture feature levels have been about coming up with a few "classes" of Intel/AMD CPU processor support rather than continuing to rely on just the x86_64 baseline or targeting a
specific CPU family for optimizations. These new levels make it easier to raise the base requirements around Linux x86-64 whether it be for a Linux distribution or a particular software application where
the developer/ISV may be wanting to compile with greater instruction set extensions enabled in catering to more recent Intel/AMD CPUs."

https://www.phoronix.com/news/GCC-11-x86-64-Feature-Levels

Here's gcc docs for it:
https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html

And here's the formal specification (click on the pdf link):
https://gitlab.com/x86-psABIs/x86-64-ABI

The actual tune file was created by copying corei7 tunes and doing
search/replace on them. Qemu options were dropped as unnecessary.
32 bit tune was dropped as well, as there is no 32 bit only CPU
that also supports these new instructions; all of the v3 capable
chips are 64 bit.

(From OE-Core rev: ac041f90e71dba83b7144c91f929de88aaeae519)

Signed-off-by: Alexander Kanavin &lt;alex@linutronix.de&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
</feed>
