linux/poky.git/meta/conf/machine/include, branch daisy

Make ppce300c3 tune hard-float by default

2014-04-01T22:39:14+00:00

The tuning file for PowerPC e300c3 is soft-float. In OE-classic it was hard- float and it should be as the c3 has an fpu. I have modified the tuning file to include both a hard-float version (using the existing ppce300c3 name) and an optional soft-float version (called ppce300c3-nf). The following patch also passes a "--with-cpu=e300c3" argument to GLIBC. For this to have any effect the sqrt/sqrtf implementations added by the "glibc.fix_sqrt2.patch" are required and also an additional "Implies" file (added to the mentioned patch as a separate patch for eglibc_2.19). Tested with eglibc 2.19 on PowerPC MPC5125. (From OE-Core rev: 9d502ca8551fd461f869395b1b7e62d6dcf59a84) Signed-off-by: Mats Karrman Signed-off-by: Richard Purdie

tune-ppce6500: Fixes a typo in tune config file for e6500.

2014-03-25T09:55:36+00:00

This patch fixes a typo in the tune config file for ppc64 e6500 where the cpu type is a wrong one. (From OE-Core rev: 168d57f594f559d8f0cb5a9298055b62ff192f27) Signed-off-by: Valentin Cobelea Signed-off-by: Richard Purdie

Add Cortex A7 support for NEONv2 & FPv4

2014-02-02T11:22:10+00:00

[YOCTO #5710] Add tuning options for Cortex-A7 with NEONv2 & FPv4: - cortexa7hf-neon-vfpv4 - cortexa7thf-neon-vfpv4 (From OE-Core rev: e97d152ca13556b41a236c1a4cfb11e77ff857d7) Signed-off-by: Kristof Robot Signed-off-by: Saul Wold Signed-off-by: Richard Purdie

feature-arm-thumb: Fix missing t2 suffix for armv7a MACHINEs

2014-01-28T00:52:34+00:00

* unfortunatelly that note about armv7 matching also armv7a is no longer valid since armv7 include in armv7 was replaced with armv6+neon in this commit: commit 75b8adbc042e0f65fb1286bc550d02becd3b6aea Author: Khem Raj Date: Tue Mar 27 18:37:45 2012 -0700 tune/armv7: Delete since then thumb and arm feeds had the same architecture * be aware that this will rename lots of feeds (From OE-Core rev: 8e8839215032b57763a07363a560c3fd9d6f8e01) Signed-off-by: Martin Jansa Signed-off-by: Saul Wold Signed-off-by: Richard Purdie

tune: README: Typographical corrections

2014-01-28T00:50:54+00:00

No new content, just correcting a few typographical errors. (From OE-Core rev: 8df13f5013d92954ee76943dad58db75704c3cc5) Signed-off-by: Darren Hart Cc: Richard Purdie Cc: Paul Eggleton Cc: Tom Zanussi Cc: Nitin Kamble Cc: Mark Hatle Cc: Bruce Ashfield Cc: Martin Jansa Signed-off-by: Richard Purdie

tune: README: Document best practice

2014-01-28T00:50:54+00:00

Describe the expected usage of base architecture tune files and arch-specific files, specifically the stacking of generations. (From OE-Core rev: 282735d7c8fcbd7e354f544c45461b095700fb77) Signed-off-by: Darren Hart Cc: Richard Purdie Cc: Paul Eggleton Cc: Tom Zanussi Cc: Nitin Kamble Cc: Mark Hatle Cc: Bruce Ashfield Cc: Martin Jansa Signed-off-by: Richard Purdie

tune: README: Whitespace cleanup

2014-01-28T00:50:54+00:00

Before making content changes, cleanup the various whitespace errors in this file. Mostly end-of-line whitepsace. (From OE-Core rev: 112e291c14ce4c3b8d074b71e63500dce609784e) Signed-off-by: Darren Hart Cc: Richard Purdie Cc: Paul Eggleton Cc: Tom Zanussi Cc: Nitin Kamble Cc: Mark Hatle Cc: Bruce Ashfield Cc: Martin Jansa Signed-off-by: Richard Purdie

tune: Remove tune-x86_64.inc

2014-01-28T00:50:54+00:00

The tune-x86_64.inc file is conceptually flawed. x86_64 is more akin to the x86 and x86-32 ABIs defined in arch-x86.inc than it is a concrete tune file, such as i586 or core2 - to the extent that everything but the default tune is defined in the arch-x86.inc file. This becomes very apparant when attempting to include tune-x86_64.inc in the x86 tune hierarchy. Remove the tune-x86_64.inc tune file in favor of it being an ABI definition in arch-x86.inc and relying on the linear hierarchy of concrete cpu-types in tune-i586, tune-core2, and tune-corei7. core2_64 should suffice in lieu of x86_64 for all but a couple esoteric corner cases involving older pre-core2 CPUs. In these cases, if they exist at all, the BSP can replace the include tune-x86_64.inc with arch-x86.inc and set the default tune to x86_64. (From OE-Core rev: d8884649b2b3e76519bc10f5908f98d940a9c0cb) Signed-off-by: Darren Hart Cc: Richard Purdie Cc: Paul Eggleton Cc: Tom Zanussi Cc: Nitin Kamble Cc: Mark Hatle Cc: Bruce Ashfield Cc: Martin Jansa Signed-off-by: Richard Purdie

tune-corei7: Add support for cpu-type corei7

2014-01-28T00:50:53+00:00

corei7 offers a significant advancement since the previous core2 cpu-type described in the tune-core2 file. From the GCC(1): Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 instruction set support. This offers optimizations for Nehalem and Silvermont (e.g. Bay Trail) CPUs (and beyond). (From OE-Core rev: 21f8ce2a4b94034284eb74b9c3b4c9cc638511d6) Signed-off-by: Darren Hart Cc: Richard Purdie Cc: Paul Eggleton Cc: Tom Zanussi Cc: Nitin Kamble Cc: Mark Hatle Cc: Bruce Ashfield Cc: Martin Jansa Signed-off-by: Richard Purdie

tune: Make 32b or 64b explicit in tune name for core2

2014-01-28T00:50:53+00:00

Core2 has both a 32b and a 64b variant. Currently, core2 implies 32b, while core2_64 is the 64b version. This implicit 32b mode will become confusing in later architectures, such as corei7, where it would be natural for people to assume "corei7" meant 64 bit. Rather than carrying forward an implicit 32b mode and rather than changing the naming scheme part way through the architecture hiearchy, make the 32b and 64b variant explicit in the tune name by changing core2 to core2-32. This patch also standardises on using '-' in the names. (From OE-Core rev: 69e6395b8d11e2940892a6293ecbbe645c2a478b) Signed-off-by: Darren Hart Cc: Richard Purdie Cc: Paul Eggleton Cc: Tom Zanussi Cc: Nitin Kamble Cc: Mark Hatle Cc: Bruce Ashfield Cc: Martin Jansa Signed-off-by: Richard Purdie