linux/poky.git/meta/conf/machine/include, branch 5.3_M2

tunes: set valid clang tune for big.LITTLE Arm SoCs

2025-07-21T22:00:18+00:00

clang doesn't have Arm big.LITTLE specific tune options - when such an option is used, the compilation fails with an error like this: aarch64-poky-linux-clang: error: unsupported argument 'cortex-a72.cortex-a53+crc+crypto' to option '-mcpu=' To avoid this, in case a big.LITTLE SoC is the target and the toolchain is clang, select the tune corresponding to the LITTLE core. (From OE-Core rev: 12c820f624730a04a17ae2cdbecc4e6987c45cf7) Signed-off-by: Gyorgy Sarvari Signed-off-by: Mathieu Dubois-Briand Signed-off-by: Richard Purdie

qemu.inc: drop duplicates with default-providers.inc

2025-06-24T12:51:31+00:00

default-providers.inc already includes PREFERRED_PROVIDER values for xserver and GL libraries. Drop the same values being set in the machine config. (From OE-Core rev: 882e8c3cf28b33cdd6cb26ec412e63a0da8a3199) Signed-off-by: Dmitry Baryshkov Signed-off-by: Richard Purdie

meta: remove consecutive blank lines

2025-06-20T11:07:27+00:00

Some of them were introduced by mass-removal of S = WORKDIR/git assignments; rather than try to fix up (or redo) just these, I've run this sed command over the whole tree: sed -i -z -E 's/([ \t\f\v\r]*\n){3,}/\n\n/g' `find . -name *.bb -o -name *.inc` The rationale is that more than one empty line is wasting vertical screen space, and does nothing for readability. (From OE-Core rev: cedc4ff7c9bcfb22a20e43e47f9759f4007a4f1a) Signed-off-by: Alexander Kanavin Signed-off-by: Mathieu Dubois-Briand Signed-off-by: Richard Purdie

riscv tunes: ISA Implementation of RISC-V tune features

2025-06-20T08:52:28+00:00

This implements the following base ISAs: * rv32i, rv64i * rv32e, rv64i The following ABIs: * ilp32, ilp32e, ilp32f, ilp32d * lp64, lp64e, lp64f, lp64d The following ISA extension are also implemented: * M - Integer Multiplication and Division Extension * A - Atomic Memory Extension * F - Single-Precision Floating-Point Extension * D - Double-Precision Floating-Point Extension * C - Compressed Extension * B - Bit Manipulation Extension (implies Zba, Zbb, Zbs) * V - Vector Operations Extension * Zicsr - Control and Status Register Access Extension * Zifencei - Instruction-Fetch Fence Extension * Zba - Address bit manipulation extension * Zbb - Basic bit manipulation extension * Zbc - Carry-less multiplication extension * Zbs - Single-bit manipulation extension * Zicbom - Cache-block management extension The existing processors tunes are preserved: * riscv64 (rv64gc) * riscv32 (rv32gc) * riscv64nf (rv64imac_zicsr_zifencei) * riscv32nf (rv32imac_zicsr_zifencei) * riscv64nc (rv64imafd_zicsr_zifencei) Previously defined feature 'big-endian' has been removed as it was not used. (From OE-Core rev: bcaf298a146dfd10e4c8f44223ea083bc4baf45c) Signed-off-by: Mark Hatle Signed-off-by: Richard Purdie

tune-cortexr52: Remove aarch64 for ARM Cortex-R52

2025-06-12T10:03:43+00:00

Remove aarch64 for ARM Cortex-R52 processor as it supports only 32-bit ISA but not 64-bit ISA. Also update ARMPKGARCH for cortexr52hf. (From OE-Core rev: efe2e5289333bb6e7fca9cdeff784ab7e4872227) Signed-off-by: Sandeep Gundlupet Raju Signed-off-by: Sandeep Gundlupet Raju Signed-off-by: Mathieu Dubois-Briand Signed-off-by: Richard Purdie

arch-powerpc: Use -maltivec in compiler flags if altivec is in tune features

2025-05-12T21:01:55+00:00

(From OE-Core rev: 80ecd2c42e9e1215de403ef9b69ab290f26cd750) Signed-off-by: Khem Raj Signed-off-by: Richard Purdie

arch-mips.inc: Use -EB/-EL for denoting endianness

2025-05-08T09:28:18+00:00

While -meb/-mel works it is not documented as supported and using -EL/-EB also makes clang work without tweaking TUNE_CCARGS Fixes mips-poky-linux-musl-clang: error: unknown argument: '-meb' (From OE-Core rev: 3d4bbd917613968ef0a7059ec11cf236b290c43c) Signed-off-by: Khem Raj Signed-off-by: Mathieu Dubois-Briand Signed-off-by: Richard Purdie

qemuriscv: Enable Sv39 memory address scheme by default

2025-02-05T12:49:56+00:00

Currently, GCC Asan supports only Sv39 on RISC-V 64 due to custom allocator configurations optimized for large allocations. These configurations are incompatible with larger address spaces like Sv48/Sv57. This fix enables RISC-V 64 configuration for RVA22S64 profile(which has sv39 mode and other extensions) by default when running `runqemu nographic`, eliminating the need for manual configuration via command line flags (`qemuparams="-cpu rv64, sv39=true"`). Fixes [YOCTO #15691] https://bugzilla.yoctoproject.org/show_bug.cgi?id=15691 Reference: https://github.com/qemu/qemu/commit/af651969eb23ecf018bcaa8e0761b58425de550c https://git.openembedded.org/openembedded-core/commit/?id=4b4450ff695ef73bf7a2437e142d2e0730d6a547 (From OE-Core rev: 5e749a2576698e390392b5d522a2dc5fdc9556cd) Signed-off-by: Yash Shinde Signed-off-by: Richard Purdie

qemu/machine: rename QEMU_EXTRAOPTIONS for consistency

2025-01-11T18:34:15+00:00

The per-tune qemu options variable is QEMU_EXTRAOPTIONS_${TUNE_PKGARCH}, but this doesn't follow the pattern of all of the other tune-specific variables in the machine configuration which is VARIABLE:tune-[name]. Rename QEMU_EXTRAOPTIONS_${TUNE_PKGARCH} to QEMU_EXTRAOPTIONS:tune-${TUNE_PKGARCH} for consistency. Note that this will mean that BSPs need to update any assignments of this variable. (From OE-Core rev: 7f981d074442b901f7e64dbdb9db851ff31c3733) Signed-off-by: Ross Burton Signed-off-by: Richard Purdie

classes/qemu: move QEMU_EXTRAOPTIONS for PPC to the relevant tunes

2025-01-11T18:34:15+00:00

Every other architecture has the QEMU_EXTRAOPTIONS assignments in the tune files, so move the PPC ones too. (From OE-Core rev: ba05251c89d8cc243e861886124573c83197e949) Signed-off-by: Ross Burton Signed-off-by: Richard Purdie