<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/poky.git/meta/conf/machine/include/arm, branch halstead/hashclient</title>
<subtitle>Mirror of git.yoctoproject.org/poky</subtitle>
<id>https://git.enea.com/cgit/linux/poky.git/atom?h=halstead%2Fhashclient</id>
<link rel='self' href='https://git.enea.com/cgit/linux/poky.git/atom?h=halstead%2Fhashclient'/>
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<updated>2024-02-06T10:32:19+00:00</updated>
<entry>
<title>arm/armv*: add all the Arm tunes in GCC 13.2.0</title>
<updated>2024-02-06T10:32:19+00:00</updated>
<author>
<name>Jon Mason</name>
<email>jon.mason@arm.com</email>
</author>
<published>2024-02-05T12:40:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=cc740bf63dcb00bca9faa84c3316d85352c1e8db'/>
<id>urn:sha1:cc740bf63dcb00bca9faa84c3316d85352c1e8db</id>
<content type='text'>
(From OE-Core rev: 5af154b66459ac05409619c81dd247c252b673f3)

Signed-off-by: Jon Mason &lt;jon.mason@arm.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tunes/sve: Add support for sve2 instructions</title>
<updated>2024-02-06T10:32:19+00:00</updated>
<author>
<name>Jon Mason</name>
<email>jon.mason@arm.com</email>
</author>
<published>2024-02-05T12:40:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=e71f54c6efe8c2fe5054eaa6c202bdc40ffa6016'/>
<id>urn:sha1:e71f54c6efe8c2fe5054eaa6c202bdc40ffa6016</id>
<content type='text'>
Add support for SVE2 and add to 8-2a, as it can be used there.
Also, clean up the comments

(From OE-Core rev: 683443d57cb18b3b54245b1a09b6e5d2bae4f5d0)

Signed-off-by: Jon Mason &lt;jon.mason@arm.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tune-cortexr52: Add hard-float variant</title>
<updated>2024-02-03T21:43:35+00:00</updated>
<author>
<name>Mark Hatle</name>
<email>mark.hatle@amd.com</email>
</author>
<published>2024-02-01T20:45:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=dd4c941e9fe9e0f1b73a934d9ecd0d165ee85474'/>
<id>urn:sha1:dd4c941e9fe9e0f1b73a934d9ecd0d165ee85474</id>
<content type='text'>
Add the ability to specify cortexr52hf to get a version that enables the
hard-float calling convention.

(From OE-Core rev: be83bc937a76efaead4690237db25459a57673fc)

Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@kernel.crashing.org&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tune-cortexr5: Add hard-float variant</title>
<updated>2024-02-03T21:43:35+00:00</updated>
<author>
<name>Mark Hatle</name>
<email>mark.hatle@amd.com</email>
</author>
<published>2024-02-01T20:45:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=44f77871d3ee2ffd8efef2706537dd05e8762239'/>
<id>urn:sha1:44f77871d3ee2ffd8efef2706537dd05e8762239</id>
<content type='text'>
Add the ability to specify cortexr5hf to get a version that enables the
hard-float calling convention.

(From OE-Core rev: 992149023a896ecb38d07c54fa9ae9df82249a07)

Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@kernel.crashing.org&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>feature-arm-vfp.inc: Allow hard-float on newer simd targets</title>
<updated>2024-02-03T21:43:35+00:00</updated>
<author>
<name>Mark Hatle</name>
<email>mark.hatle@amd.com</email>
</author>
<published>2024-02-01T20:45:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=4019e8ecf8d84439d378f6da156081e81566e02f'/>
<id>urn:sha1:4019e8ecf8d84439d378f6da156081e81566e02f</id>
<content type='text'>
Currently hard-float is dependency upon the special TUNE_CCARGS_MFPU which
contains custom -mfpu= values.  However, newer 32-bit architectures like
cortex-r52 use 'simd' instead.  There is no 'simd' entry for -mfpu=
according to the GCC manual, it's more or less automatic based on the
cpu settings.

Add this as an exception to the TUNE_CCARGS_FLOAT setting of hard or softfp.

(From OE-Core rev: f122eb8b19528e1192fd0b68b0639d84aa288155)

Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@kernel.crashing.org&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tune-cortexa78.inc: Add cortexa78 tune, based on cortexa77</title>
<updated>2024-02-03T21:43:35+00:00</updated>
<author>
<name>Mark Hatle</name>
<email>mark.hatle@amd.com</email>
</author>
<published>2024-02-01T20:45:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=4cbec71b06e0758137fd483a0b44eeba3bca1a94'/>
<id>urn:sha1:4cbec71b06e0758137fd483a0b44eeba3bca1a94</id>
<content type='text'>
(From OE-Core rev: 6750384cbb4f8d90c8c32a85db66e8e3344d4ce6)

Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@kernel.crashing.org&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>armv8/armv9: Avoid using -march when -mcpu is chosen</title>
<updated>2024-02-02T10:38:28+00:00</updated>
<author>
<name>Khem Raj</name>
<email>raj.khem@gmail.com</email>
</author>
<published>2024-01-26T23:31:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=04eac1f2b67eac5f892a9e0f8fcfe54849923af5'/>
<id>urn:sha1:04eac1f2b67eac5f892a9e0f8fcfe54849923af5</id>
<content type='text'>
Current include logic goes into generic arm v8/v9 architecture tunes and
adds corresponding -march option after synthesizing it from various tune
fragments, this is fine for a machine which is using armv8/armv9 based
tunes but cortex tunes are intentionally using -mcpu option based on
selected tune value. So when cortex based default tune is selected for a
machine, it will add both -mcpu and -march to the compiler commandline
which can result in invalid combinations for this pair in gcc's own
logic. This can then result in compiler warnings/errors reporting this

e.g.

aarch64-yoe-linux-gcc  -mcpu=cortex-a72.cortex-a53 -march=armv8-a+crc+crypto -mbranch-protection=standard
...
cc1: error: switch '-mcpu=cortex-a72.cortex-a53' conflicts with '-march=armv8-a+crc+crypto' switch and resulted in options '+crc+crypto' being added [-Werror]

This is seen in lot of configure test results in glibc 2.39 and the
warning is promoted to errors by gcc in some of these checks especially
with gcc-14, the logs also show it as warning in other places in
configure checks.

mcpu option will compute relevant march implicitly as it specifies a cpu
implementation and this will be the right value to use, therefore do not
specify -march when -mcpu is already describing the cpu.

(From OE-Core rev: e64f0c1b6ac5d598a79a21de5f3060f83cb9523e)

Signed-off-by: Khem Raj &lt;raj.khem@gmail.com&gt;
Cc: Ross Burton &lt;ross.burton@arm.com&gt;
Cc: Jon Mason &lt;jdmason@kudzu.us&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>machine/arch-armv9: remove crc and sve tunes, they are mandatory</title>
<updated>2023-12-21T10:38:29+00:00</updated>
<author>
<name>Ross Burton</name>
<email>ross.burton@arm.com</email>
</author>
<published>2023-12-14T14:55:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=2f56aec05c584f094267efad26480d624821019b'/>
<id>urn:sha1:2f56aec05c584f094267efad26480d624821019b</id>
<content type='text'>
As per the Arm ARM section A2.3.2, FEAT_CRC32 is mandatory in Armv8.1
onwards, so there's no need to have an explicit optional tune for it.

SVE (which was a choice here) and SVE2 (which was not) are both optional
with v9.0, but GCC's -march=armv9-a defaults to enabling both SVE and
SVE2 on the grounds that there are no implementations of Armv9 that
don't support SVE2.  This means there's no point having an explicit sve
feature as it's enabled out of the box.

(From OE-Core rev: 28fabebf812cdf8e76eb508115a4b76944f1e729)

Signed-off-by: Ross Burton &lt;ross.burton@arm.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>arch-armv8,arch-armv9: Add sve based tune options</title>
<updated>2023-08-29T08:41:07+00:00</updated>
<author>
<name>Khem Raj</name>
<email>raj.khem@gmail.com</email>
</author>
<published>2023-08-21T06:30:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=8cd5d264af4c346730531cb98ae945ab862dbd69'/>
<id>urn:sha1:8cd5d264af4c346730531cb98ae945ab862dbd69</id>
<content type='text'>
(From OE-Core rev: 3109a48740546f6defc652fa1a6736dc484e6021)

(From OE-Core rev: d388bf00314639f82cd9143e786c482731d2719b)

Signed-off-by: Khem Raj &lt;raj.khem@gmail.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Luca Ceresoli &lt;luca.ceresoli@bootlin.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tunes: Add support for sve instructions on armv8/armv9</title>
<updated>2023-08-29T08:41:07+00:00</updated>
<author>
<name>Khem Raj</name>
<email>raj.khem@gmail.com</email>
</author>
<published>2023-08-21T06:30:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/poky.git/commit/?id=e4be03be5be62e367a40437a389121ef97d6cff3'/>
<id>urn:sha1:e4be03be5be62e367a40437a389121ef97d6cff3</id>
<content type='text'>
This helps in defining correct compiler options and configure options
for glibc and overall ABI for toolchain

(From OE-Core rev: 58330ce58719bd82530b1143623db7af7a85e897)

(From OE-Core rev: 43c980ad688cc4df5a5e687b0f693cf46778ce64)

Signed-off-by: Khem Raj &lt;raj.khem@gmail.com&gt;
Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Luca Ceresoli &lt;luca.ceresoli@bootlin.com&gt;
Signed-off-by: Richard Purdie &lt;richard.purdie@linuxfoundation.org&gt;
</content>
</entry>
</feed>
