From 06827f70486713b2af8a4ed30769ab59fcf0fba1 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:33 +0100 Subject: ai-engine-driver: Update branch to xlnx_rel_v2023.2 Changelog: driver: src: global: Correct documentation driver: src: Fixed MisraC mandatory violations driver: src: rsc: Fix resource (file descriptor) leak Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc index 4d4f6afd..70eadd74 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc @@ -2,8 +2,8 @@ SECTION = "libs" REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https" -BRANCH ?= "main-aie" -SRCREV ?= "c4b61e22a59b72ea40a8ff8bf1b75e321e58682f" +BRANCH ?= "xlnx_rel_v2023.2" +SRCREV ?= "83c84d3c9617f1b9d71bdcbf6e89b2794f749c78" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM ?= "file://license.txt;md5=04a153cae61a8a606fc79dff49c2c897" -- cgit v1.2.3-54-g00ecf From 4bd4efa2730e7a48c1b448413fc673f0622d3db2 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:34 +0100 Subject: dfx-mgr: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb index fd808d50..23057050 100644 --- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb +++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb @@ -8,7 +8,7 @@ REPO ?= "git://github.com/Xilinx/dfx-mgr.git;protocol=https" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -BRANCH = "master" +BRANCH = "xlnx_rel_v2023.2" SRCREV = "d78eac47f17bca4326a4540ff5d2ebea7d9c45ed" SOMAJOR = "1" SOMINOR = "0" -- cgit v1.2.3-54-g00ecf From a3eb6c1132cfeae1ee663db7a89fe18bf4b6c195 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:35 +0100 Subject: libdfx: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb index 11ad0268..b3ccb884 100644 --- a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb +++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb @@ -4,7 +4,7 @@ DESCRIPTION = "Xilinx libdfx Library and headers" LICENSE = "MIT & GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://LICENSE.md;md5=94aba86aec117f003b958a52f019f1a7" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/libdfx.git;protocol=https" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -- cgit v1.2.3-54-g00ecf From d95c0802ba95d4f2a1d491c4a9a81dde46dc8a6b Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:36 +0100 Subject: kernel-module-dp: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb index 7849cc93..d1c6bd3d 100644 --- a/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb @@ -9,7 +9,7 @@ PV = "${XLNX_DP_VERSION}+xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', Fal S = "${WORKDIR}/git" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/xilinx/dp-modules.git;protocol=https" SRCREV ?= "5b0969ac09f301c33bccc140c8f60e832f5cf222" -- cgit v1.2.3-54-g00ecf From 47207d37f8813ad334d4d00745441e28619f33e3 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:37 +0100 Subject: kernel-module-hdmi: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb index eba5d465..bc89f5f3 100644 --- a/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb @@ -9,7 +9,7 @@ PV = "${XLNX_HDMI_VERSION}+xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', F S = "${WORKDIR}/git" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/hdmi-modules.git;protocol=https" SRCREV = "82209b0021a7b5d7ef71a859eed4bafeb541ed08" -- cgit v1.2.3-54-g00ecf From 282fa478341a66f4d114c5aabd3799a974ba7ec2 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:38 +0100 Subject: vdu-firmware: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb index 7595c082..4deb1f51 100755 --- a/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb +++ b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb @@ -13,7 +13,7 @@ inherit autotools features_check REQUIRED_MACHINE_FEATURES = "vdu" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/vdu-firmware.git;protocol=https" SRCREV ?= "63fe2fce6e46d5bf03e33300a58a37d8568722ee" -- cgit v1.2.3-54-g00ecf From eecf6e157465d2a6bc4a2231bbc701113700451d Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:39 +0100 Subject: libvdu-ctrlsw: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.2.bb index 19db2456..2b9af94f 100644 --- a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.2.bb +++ b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.2.bb @@ -11,7 +11,7 @@ inherit autotools features_check REQUIRED_MACHINE_FEATURES = "vdu" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/vdu-ctrl-sw.git;protocol=https" SRCREV ?= "1beb8f247d01b1a728faea36ce8f7847c895482f" -- cgit v1.2.3-54-g00ecf From 4a577ccb72d6ddf7139d73042e7aaf951fe625fa Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:40 +0100 Subject: kernel-module-vdu: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.2.bb index 308b8eac..1c9ba8ad 100644 --- a/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.2.bb +++ b/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.2.bb @@ -11,7 +11,7 @@ PV .= "+git${SRCPV}" S = "${WORKDIR}/git" FILESEXTRAPATHS:prepend := "${THISDIR}/files:" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/vdu-modules.git;protocol=https" SRCREV ?= "4d5134f54006f904f0b28f00e05dd3febd5fcfd3" -- cgit v1.2.3-54-g00ecf From d2d45fb168abb4cde1581868dcc9d6ab69aee824 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:41 +0100 Subject: libomxil-xlnx: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2023.2.bb index 80d0155e..2c77e2b4 100644 --- a/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2023.2.bb @@ -6,7 +6,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=ef69c2bb405668101824f0b644631e2e" XILINX_VCU_VERSION = "1.0.0" PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/vcu-omx-il.git;protocol=https" SRCREV = "3a04b5adc661a0eced626c1373dbbfe699ae6fe0" -- cgit v1.2.3-54-g00ecf From e2ecb990b1b5e09e7311dc8b2cc051d6b917c1e4 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:42 +0100 Subject: kernel-module-vcu: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2023.2.bb index 7f2b205f..e8bd3397 100644 --- a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2023.2.bb +++ b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2023.2.bb @@ -11,7 +11,7 @@ S = "${WORKDIR}/git" FILESEXTRAPATHS:prepend := "${THISDIR}/files:" -BRANCH = "master" +BRANCH = "xlnx_rel_v2023.2" REPO = "git://github.com/Xilinx/vcu-modules.git;protocol=https" SRCREV = "689c8d823b383e2a8a5249be49de627f866cfaf2" -- cgit v1.2.3-54-g00ecf From e6e2958643409e6c09f131114853ff8d5f027869 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:43 +0100 Subject: libvcu-xlnx: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2023.2.bb index fdadca3f..e6d38a4a 100644 --- a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2023.2.bb @@ -6,7 +6,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=ef69c2bb405668101824f0b644631e2e" XILINX_VCU_VERSION = "1.0.0" PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/vcu-ctrl-sw.git;protocol=https" SRCREV = "84b0856cad7844d69f57ac4d9447c20930875475" -- cgit v1.2.3-54-g00ecf From 9a5f2b17e66c5ac9be09c70e4004587987f2d778 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:44 +0100 Subject: vcu-firmware: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2023.2.bb index 4ab139fc..b4cb66df 100644 --- a/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2023.2.bb +++ b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2023.2.bb @@ -8,7 +8,7 @@ PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', S = "${WORKDIR}/git" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/vcu-firmware.git;protocol=https" SRCREV = "f4ab98d26aa3e244a487f518f5a76071137c8402" -- cgit v1.2.3-54-g00ecf From e504824f03f591b3a557d00f035cbd7418ab1449 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:45 +0100 Subject: open-amp-xlnx: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- .../openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb index 0392bd86..eba124d9 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb @@ -1,6 +1,6 @@ SRCBRANCH ?= "2023.2" SRCREV = "e95b02aef72a21039b1d109087788d4675475813" -BRANCH = "2023" +BRANCH = "xlnx_rel_v2023.2" LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=ab88daf995c0bd0071c2e1e55f3d3505" PV = "${SRCBRANCH}+git${SRCPV}" REPO = "git://github.com/Xilinx/open-amp.git;protocol=https" -- cgit v1.2.3-54-g00ecf From ba4a08aa95e19c71ec0eba26da2f9de23b9027df Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:46 +0100 Subject: libmetal-xlnx: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- .../openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb index 057c1ef8..7a5dc70e 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb @@ -1,6 +1,6 @@ SRCBRANCH ?= "2023.2" SRCREV = "be635252271de342014a146825870b64bd41d6eb" -BRANCH = "2023" +BRANCH = "xlnx_rel_v2023.2" LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=f4d5df0f12dcea1b1a0124219c0dbab4" PV = "${SRCBRANCH}+git${SRCPV}" -- cgit v1.2.3-54-g00ecf From 536345748dc90512b7e6c250cc147c556198a106 Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:47 +0100 Subject: qemu-xlnx: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc index 15201959..d3effa9a 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc @@ -1,3 +1,3 @@ XILINX_QEMU_VERSION = "v7.1.0" -BRANCH = "master" +BRANCH = "xlnx_rel_v2023.2" SRCREV = "5b17802c28879d2150df5ea16d8719aab3ee26a0" -- cgit v1.2.3-54-g00ecf From 9b9f5c0a0f03ce7fc53dee9dfe66a522ffe4687e Mon Sep 17 00:00:00 2001 From: John Toomey Date: Tue, 29 Aug 2023 18:11:48 +0100 Subject: qemu-devicetrees: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: John Toomey Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb index 5db8c0b9..f6791406 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb @@ -1,6 +1,6 @@ require qemu-devicetrees.inc -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" SRCREV ?= "86b1a621919f2fb27e5ef4120fcacde67d43368d" -- cgit v1.2.3-54-g00ecf From 979bb9939a8628752b9c9f37ca191a5478c923d5 Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Tue, 29 Aug 2023 15:17:47 -0500 Subject: gen-machine-conf: Move to release branch Signed-off-by: Mark Hatle --- .gitmodules | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitmodules b/.gitmodules index 23c05b53..017e758a 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,4 +1,4 @@ [submodule "gen-machine-conf"] path = meta-xilinx-core/gen-machine-conf url = https://gitenterprise.xilinx.com/Petalinux/gen-machine-conf.git - branch = master + branch = xlnx_rel_v2023.2 -- cgit v1.2.3-54-g00ecf From 6e4cb5e2fdf3007c2841d22bc4019c111332a4ec Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Tue, 29 Aug 2023 17:08:45 -0500 Subject: bootgen: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: Mark Hatle --- .../recipes-bsp/bootgen/bootgen_2023.2.bb | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb diff --git a/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb new file mode 100644 index 00000000..cd4b1e36 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb @@ -0,0 +1,31 @@ +SUMMARY = "Building and installing bootgen" +DESCRIPTION = "Building and installing bootgen, a Xilinx tool that lets you stitch binary files together and generate device boot images" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=d526b6d0807bf263b97da1da876f39b1" + +S = "${WORKDIR}/git" + +DEPENDS += "openssl" +RDEPENDS:${PN} += "openssl" + +REPO ?= "git://github.com/Xilinx/bootgen.git;protocol=https" +BRANCH = "xlnx_rel_v2023.2" +SRCREV = "4f1e1caf2c09cdeacc35cbeedaf2550c6e44c7fd" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +EXTRA_OEMAKE += 'CROSS_COMPILER="${CXX}" -C ${S}' +CXXFLAGS:append = " -std=c++0x" + +TARGET_CC_ARCH += "${LDFLAGS}" + +do_install() { + install -d ${D}${bindir} + install -Dm 0755 ${S}/bootgen ${D}${bindir} +} + +FILES:${PN} = "${bindir}/bootgen" + +BBCLASSEXTEND = "native nativesdk" -- cgit v1.2.3-54-g00ecf From 129277a87654489e1d529946634419b503283b62 Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Tue, 29 Aug 2023 17:10:58 -0500 Subject: libvdu-omxil: Update branch to xlnx_rel_v2023.2 Changelog: (none) Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.2.bb index 466153d1..f6f159d2 100644 --- a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.2.bb +++ b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.2.bb @@ -7,7 +7,7 @@ XILINX_VDU_VERSION = "1.0.0" PV =. "${XILINX_VDU_VERSION}-xilinx-v" PV .= "+git${SRCPV}" -BRANCH ?= "master" +BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/vdu-omx-il.git;protocol=https" SRCREV ?= "811eefac953fd5e098c69cada97a0dd35f5e9015" -- cgit v1.2.3-54-g00ecf From 3aeb950696276c9f797ae6efc9642ec94155e56a Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 31 Aug 2023 13:09:23 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_2975 xilpm: versal_net: fix force power down issue xilpm: versal_net: fix suspend resume issue xilpm: versal_net: Add DDRMC5 bisr support sw_services: xilpuf: Declare variables that are passed to server in data section sw_services:xilloader:Added Redundancy for KekSrc sw_apps:versal_plm:EAM Error Check After PMC CDO sw_services:xilplmi:Security Review Fixes iicps: Add SDT flow support for xiicps_eeprom_intr_example iicps: Update Receive Polled and Interrupt Handler functions as modular gpiops: Add support for pmc, versal and versal-net in sdt flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 47b1e5dd..a2279f07 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "8070822a60c8a6e869522e9febd72ed7b188358d" +ESW_REV[2023.2] = "6ccd026d115ed986ccb1541c62dc7dac21bf2ab8" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From cb09236e7367a445e6ba224286944701509cbe19 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 31 Aug 2023 13:09:48 +0530 Subject: aie-rt : Updated SRCREV for 2023.2_1763 driver: src: global: Correct documentation driver: src: Fixed MisraC mandatory violations driver: src: rsc: Fix resource (file descriptor) leak Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc index 70eadd74..38bb7f9f 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc @@ -3,7 +3,7 @@ SECTION = "libs" REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https" BRANCH ?= "xlnx_rel_v2023.2" -SRCREV ?= "83c84d3c9617f1b9d71bdcbf6e89b2794f749c78" +SRCREV ?= "c4b61e22a59b72ea40a8ff8bf1b75e321e58682f" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM ?= "file://license.txt;md5=04a153cae61a8a606fc79dff49c2c897" -- cgit v1.2.3-54-g00ecf From 69ad019bfcd5dfb063165592d4751b76d8c872a5 Mon Sep 17 00:00:00 2001 From: saumya garg Date: Tue, 29 Aug 2023 17:56:30 +0530 Subject: xrt, zocl: Update commit id Changelog: Fix for CR-1170857, CR-1114740, CR-1114732 (#7669) Including Install Instructions for RHEL 9.x (#7672) Moving to petalinux version petalinux-v2023.2_08251450 (#7680) Fixed CR-1160856 (#7668) moving to latest petalinux (#7673) Update petalinux.build to stable version (#7677) Signed-off-by: saumya garg Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-xrt/xrt/xrt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc index 319b804a..08ad0f77 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc @@ -3,7 +3,7 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != ' SRC_URI = "${REPO};${BRANCHARG}" BRANCH= "master" -SRCREV= "eba10b68e5704a0070da1d7a958fdc11f58c3721" +SRCREV= "ff10e98baa0538aa6014fda44631f4c35fc577e0" PV = "202320.2.16.0" SRC_URI += "git://github.com/Xilinx/dma_ip_drivers.git;branch=master;name=dma_ip_drivers;destsuffix=git/src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma;protocol=https" -- cgit v1.2.3-54-g00ecf From 056045a31f59472bdce0ff6357e457fa7c7c0038 Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Wed, 30 Aug 2023 15:23:01 -0500 Subject: versal-net-generic: Make it clear versal-net is not supported in 2023.2 Signed-off-by: Mark Hatle --- meta-xilinx-core/conf/machine/versal-net-generic.conf | 2 ++ 1 file changed, 2 insertions(+) diff --git a/meta-xilinx-core/conf/machine/versal-net-generic.conf b/meta-xilinx-core/conf/machine/versal-net-generic.conf index 4b368e83..e1f222e2 100644 --- a/meta-xilinx-core/conf/machine/versal-net-generic.conf +++ b/meta-xilinx-core/conf/machine/versal-net-generic.conf @@ -1,3 +1,5 @@ +XILINX_DEPRECATED[versal-net] = "Versal-net is not supported in 2023.2" + #@TYPE: Machine #@NAME: versal-net-generic #@DESCRIPTION: Machine configuration for the versal-net-generic devices -- cgit v1.2.3-54-g00ecf From 6182a945ac9d53e0b90a69b100e1d8d208654dcb Mon Sep 17 00:00:00 2001 From: Sandeep Gundlupet Raju Date: Wed, 30 Aug 2023 16:14:27 -0600 Subject: meta-xilinx-bsp:machine: Use ATF_CONSOLE instead of ATF_CONSOLE_DEFAULT In arm-trusted-firmware recipe, ATF_CONSOLE_DEFAULT variable has override and setting this variable value from local.conf and machine.conf will not be effective during variable pre-expansion values. Hence use ATF_CONSOLE instead of ATF_CONSOLE_DEFAULT in machine conf files. Signed-off-by: Sandeep Gundlupet Raju Signed-off-by: Mark Hatle --- meta-xilinx-bsp/conf/machine/vck190-versal.conf | 2 +- meta-xilinx-bsp/conf/machine/vck5000-versal.conf | 2 +- meta-xilinx-bsp/conf/machine/vek280-versal.conf | 2 +- meta-xilinx-bsp/conf/machine/vhk158-versal.conf | 2 +- meta-xilinx-bsp/conf/machine/vmk180-versal.conf | 2 +- meta-xilinx-bsp/conf/machine/vpk120-versal.conf | 2 +- meta-xilinx-bsp/conf/machine/vpk180-versal.conf | 2 +- meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf | 2 +- meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf | 2 +- meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf | 2 +- meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf | 2 +- meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf | 2 +- meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf | 2 +- meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf | 2 +- 14 files changed, 14 insertions(+), 14 deletions(-) diff --git a/meta-xilinx-bsp/conf/machine/vck190-versal.conf b/meta-xilinx-bsp/conf/machine/vck190-versal.conf index db5d0a95..ed049268 100644 --- a/meta-xilinx-bsp/conf/machine/vck190-versal.conf +++ b/meta-xilinx-bsp/conf/machine/vck190-versal.conf @@ -15,7 +15,7 @@ YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "CIPS_0_pspmc_0_psv_sbsauart_0" YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vck190-reva-x-ebm-01-reva}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "pl011" +ATF_CONSOLE ?= "pl011" TFA_BL33_LOAD ?= "0x8000000" # Yocto PLM variables diff --git a/meta-xilinx-bsp/conf/machine/vck5000-versal.conf b/meta-xilinx-bsp/conf/machine/vck5000-versal.conf index 975cde93..9396bd97 100644 --- a/meta-xilinx-bsp/conf/machine/vck5000-versal.conf +++ b/meta-xilinx-bsp/conf/machine/vck5000-versal.conf @@ -15,7 +15,7 @@ YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart YAML_DT_BOARD_FLAGS ?= "{BOARD template}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "pl011" +ATF_CONSOLE ?= "pl011" TFA_BL33_LOAD ?= "0x8000000" # Yocto PLM variables diff --git a/meta-xilinx-bsp/conf/machine/vek280-versal.conf b/meta-xilinx-bsp/conf/machine/vek280-versal.conf index 75723946..625cbca1 100644 --- a/meta-xilinx-bsp/conf/machine/vek280-versal.conf +++ b/meta-xilinx-bsp/conf/machine/vek280-versal.conf @@ -15,7 +15,7 @@ YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "CIPS_0_pspmc_0_psv_sbsauart_0" YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vek280-revb}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "pl011" +ATF_CONSOLE ?= "pl011" TFA_BL33_LOAD ?= "0x8000000" # Yocto PLM variables diff --git a/meta-xilinx-bsp/conf/machine/vhk158-versal.conf b/meta-xilinx-bsp/conf/machine/vhk158-versal.conf index e22f264c..b09bde28 100644 --- a/meta-xilinx-bsp/conf/machine/vhk158-versal.conf +++ b/meta-xilinx-bsp/conf/machine/vhk158-versal.conf @@ -15,7 +15,7 @@ YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vhk158-reva}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "pl011" +ATF_CONSOLE ?= "pl011" TFA_BL33_LOAD ?= "0x8000000" # Yocto PLM variables diff --git a/meta-xilinx-bsp/conf/machine/vmk180-versal.conf b/meta-xilinx-bsp/conf/machine/vmk180-versal.conf index d0d58b0f..0f474f78 100644 --- a/meta-xilinx-bsp/conf/machine/vmk180-versal.conf +++ b/meta-xilinx-bsp/conf/machine/vmk180-versal.conf @@ -15,7 +15,7 @@ YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vmk180-reva-x-ebm-01-reva}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "pl011" +ATF_CONSOLE ?= "pl011" TFA_BL33_LOAD ?= "0x8000000" # Yocto PLM variables diff --git a/meta-xilinx-bsp/conf/machine/vpk120-versal.conf b/meta-xilinx-bsp/conf/machine/vpk120-versal.conf index b9f36564..e200d42d 100644 --- a/meta-xilinx-bsp/conf/machine/vpk120-versal.conf +++ b/meta-xilinx-bsp/conf/machine/vpk120-versal.conf @@ -15,7 +15,7 @@ YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vpk120-reva}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "pl011" +ATF_CONSOLE ?= "pl011" TFA_BL33_LOAD ?= "0x8000000" # Yocto PLM variables diff --git a/meta-xilinx-bsp/conf/machine/vpk180-versal.conf b/meta-xilinx-bsp/conf/machine/vpk180-versal.conf index 9b06ef8f..92630e97 100644 --- a/meta-xilinx-bsp/conf/machine/vpk180-versal.conf +++ b/meta-xilinx-bsp/conf/machine/vpk180-versal.conf @@ -15,7 +15,7 @@ YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vpk180-reva}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "pl011" +ATF_CONSOLE ?= "pl011" TFA_BL33_LOAD ?= "0x8000000" # Yocto PLM variables diff --git a/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf index 9e5e556a..acd2544a 100644 --- a/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf +++ b/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf @@ -16,7 +16,7 @@ YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" YAML_DT_BOARD_FLAGS ?= "{BOARD zcu102-rev1.0}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "cadence" +ATF_CONSOLE ?= "cadence" TFA_BL33_LOAD ?= "0x8000000" # Yocto PMUFW variables diff --git a/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf index 80bd34de..b4c11f3a 100644 --- a/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf +++ b/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf @@ -16,7 +16,7 @@ YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" YAML_DT_BOARD_FLAGS ?= "{BOARD zcu104-revc}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "cadence" +ATF_CONSOLE ?= "cadence" TFA_BL33_LOAD ?= "0x8000000" # Yocto PMUFW variables diff --git a/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf index be48e178..ff273134 100644 --- a/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf +++ b/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf @@ -16,7 +16,7 @@ YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" YAML_DT_BOARD_FLAGS ?= "{BOARD zcu106-reva}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "cadence" +ATF_CONSOLE ?= "cadence" TFA_BL33_LOAD ?= "0x8000000" # Yocto PMUFW variables diff --git a/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf index 4cf028de..77da93ca 100644 --- a/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf +++ b/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf @@ -16,7 +16,7 @@ YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" YAML_DT_BOARD_FLAGS ?= "{BOARD zcu111-reva}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "cadence" +ATF_CONSOLE ?= "cadence" TFA_BL33_LOAD ?= "0x8000000" # Yocto PMUFW variables diff --git a/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf index be1f310c..7bb2c9db 100644 --- a/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf +++ b/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf @@ -16,7 +16,7 @@ YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" YAML_DT_BOARD_FLAGS ?= "{BOARD zcu208-reva}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "cadence" +ATF_CONSOLE ?= "cadence" TFA_BL33_LOAD ?= "0x8000000" # Yocto PMUFW variables diff --git a/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf index cd2644af..f4e1619d 100644 --- a/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf +++ b/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf @@ -16,7 +16,7 @@ YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" YAML_DT_BOARD_FLAGS ?= "{BOARD zcu216-reva}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "cadence" +ATF_CONSOLE ?= "cadence" TFA_BL33_LOAD ?= "0x8000000" # Yocto PMUFW variables diff --git a/meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf index 48f81474..c726e9f5 100644 --- a/meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf +++ b/meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf @@ -16,7 +16,7 @@ YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" YAML_DT_BOARD_FLAGS ?= "{BOARD zcu670-revb}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "cadence" +ATF_CONSOLE ?= "cadence" TFA_BL33_LOAD ?= "0x8000000" # Yocto PMUFW variables -- cgit v1.2.3-54-g00ecf From bfc688aedfa595f5c85d65a0eec1468b64f1c0f9 Mon Sep 17 00:00:00 2001 From: Sandeep Gundlupet Raju Date: Wed, 30 Aug 2023 16:14:28 -0600 Subject: ultra96-zynqmp: Use ATF_CONSOLE instead of ATF_CONSOLE_DEFAULT In arm-trusted-firmware recipe, ATF_CONSOLE_DEFAULT variable has override and setting this variable value from local.conf and machine.conf will not be effective during variable pre-expansion values. Hence use ATF_CONSOLE instead of ATF_CONSOLE_DEFAULT in machine conf files. Signed-off-by: Sandeep Gundlupet Raju Signed-off-by: Mark Hatle --- meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf b/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf index 57f31c93..daa73f2a 100644 --- a/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf +++ b/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf @@ -16,7 +16,7 @@ YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" YAML_DT_BOARD_FLAGS ?= "{BOARD avnet-ultra96-rev1}" # Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "cadence1" +ATF_CONSOLE ?= "cadence1" TFA_BL33_LOAD ?= "0x8000000" # Yocto PMUFW variables -- cgit v1.2.3-54-g00ecf From 9240822918e8dabd8232ed4b3fa77f56252b6d6a Mon Sep 17 00:00:00 2001 From: Sandeep Gundlupet Raju Date: Wed, 30 Aug 2023 16:14:29 -0600 Subject: README: Update README on using ATF_CONSOLE Update README on using ATF_CONSOLE instead of ATF_CONSOLE_DEFAULT. Signed-off-by: Sandeep Gundlupet Raju Signed-off-by: Mark Hatle --- meta-xilinx-core/conf/machine/README | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/conf/machine/README b/meta-xilinx-core/conf/machine/README index 0b018b61..de8cf58d 100644 --- a/meta-xilinx-core/conf/machine/README +++ b/meta-xilinx-core/conf/machine/README @@ -199,7 +199,7 @@ YAML_DT_BOARD_FLAGS:pn-device-tree - YAML based configuration for setting eval board specific dtsi files available in DTG repo. arm-trusted-firmware recipe from meta-xilinx-core: -ATF_CONSOLE_DEFAULT - Uart console configuration for all aarch64 device families. +ATF_CONSOLE - Uart console configuration for all aarch64 device families. Example: pl011 or cadence or cadence1 etc,. TFA_BL33_LOAD - BL33 preloadded base address to EXTRA_OEMAKE for aarch64. -- cgit v1.2.3-54-g00ecf From 9b193fd5996062e81c5cda575cfd03d2c1692c49 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 5 Sep 2023 12:46:49 +0530 Subject: u-boot-xlnx : Updated SRCREV for 2023.2_1791 arm64: versal-net: Fix sysmon interrupt number Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc index 87839254..4165543b 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc @@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01" UBRANCH = "xlnx_rebase_v2023.01" -SRCREV = "ce3aa5cdb1b01239466028eabf918e3e0ba1d529" +SRCREV = "5af51afd459eaf5bac81ff5315fad0b2ee20972a" LICENSE = "GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" -- cgit v1.2.3-54-g00ecf From 3cbca881e5567624a5a1152acadf7a46e2477b05 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 5 Sep 2023 12:50:53 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_3567 sw_services:xilnvm: Fix SW-BP-REDUNDANCY drivers: trngpsx: Add volatile keyword to avoid optimization drivers: trngpsx: Remove Dead code sw_services:xilsecure: Fix updating KAT mask bits for external modules gpio: Add support for peripheral test for gpio in SDT flow sw_services: xilplmi: Reread from efuse cache sw_apps:versal_plm: Change exception print to DEBUG_PRINT_ALWAYS sw_services:xilplmi: DEBUG_PRINT_ALWAYS for critical error prints sw_services:xilplmi: Change PLM debug level to 0 for XilSEM xdmapcie: Replace csr-slcr property to populate xilpm: versal_net: clear pcil for rpu only sw_services:xilplmi:Added PSM Address range check xilpm: versal_net: skip halt if core is powered down sw_services:xilplmi:Updated IPI Timeout Value Revert "Revert "sw_services:xilsecure:Fix ECDSA boot failure on qemu"" xilsem: Replace Versal net SHA3 instance function with new API name avbuf: Ported changes for using the SDT flow dpdma: Ported changes for using the SDT flow dppsu: Ported changes for using the SDT flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index a2279f07..b6665012 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "6ccd026d115ed986ccb1541c62dc7dac21bf2ab8" +ESW_REV[2023.2] = "4b382e452bdc148cb10c99da03f0201150dbfe4d" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 386e73eb02e6447a2fc9a9f6c2c5305fa78c01f3 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 5 Sep 2023 23:47:49 +0530 Subject: linux-xlnx : Updated SRCREV for 2023.2_5539 mtd: spi-nor: Fix timeout issue with winbond multi die flash dt-bindings: net: xilinx_gmii2rgmii: Convert to json schema staging: xilinx_hdcp: Add mmult support for HDCP2x Rx staging: xilinx_hdcp: Add HDCP2x Rx cipher support staging: xilinx_hdcp: Add support for HDCP2x Rx arm64: versal-net: Fix sysmon interrupt number watchdog: of_xilinx_wdt: Remove unnecessary clock disable call in the remove path watchdog: of_xilinx_wdt: Use devm_clk_get_enabled() helper drivers: soc: xilinx: add check for platform firmware: xilinx: Register event manager driver drivers: soc: xilinx: add versal-net error event ids and masks drivers: soc: xilinx: rename error event header file for versal drivers: soc: xilinx: rename versal error event ids and masks Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb index ce505895..98257604 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.30" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "5cfa8a2ffb8ecdb3388280bf95dd82349e26a5fb" +SRCREV = "b88eef72401fcc3c669c785fdf114997bd63a5ac" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" -- cgit v1.2.3-54-g00ecf From 62fbb6868571550e5f8757017fa6187019a5dd9c Mon Sep 17 00:00:00 2001 From: Siva Addepalli Date: Tue, 5 Sep 2023 12:45:41 +0530 Subject: Updated SRCREV of dfx-mgr for 2023.2_2207 README.md: AIE and graph notes README.md: add libdfx, XRT, kria-dfx-hw links dfx_mgr: avoid reading Clear-On-Read register client: API to set Data-Mover configuration client: list or set Data-Mover configuration dfx_mgr: display or configure Data-Movers dfx-mgr: get Inter-RP address from shell.json accel: Use sbustring match to get VA address dfx-mgrd: add uid, pid checks Signed-off-by: Siva Addepalli Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb index 23057050..0d24c9fc 100644 --- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb +++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb @@ -9,7 +9,7 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != ' SRC_URI = "${REPO};${BRANCHARG}" BRANCH = "xlnx_rel_v2023.2" -SRCREV = "d78eac47f17bca4326a4540ff5d2ebea7d9c45ed" +SRCREV = "4dbd33accb043bd92ecbec2a3507f85a22045c51" SOMAJOR = "1" SOMINOR = "0" SOVERSION = "${SOMAJOR}.${SOMINOR}" -- cgit v1.2.3-54-g00ecf From 1d9c26a8158b3093c1753d81df145685fb8ff766 Mon Sep 17 00:00:00 2001 From: Siva Addepalli Date: Wed, 6 Sep 2023 11:42:04 +0530 Subject: Updated Commit ID gen_yocto_machine.py: Instead of ATF_CONSOLE_DEFAULT variable add ATF_CONSOLE Signed-off-by: Siva Addepalli --- meta-xilinx-core/gen-machine-conf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/gen-machine-conf b/meta-xilinx-core/gen-machine-conf index b98f7351..ae406ee0 160000 --- a/meta-xilinx-core/gen-machine-conf +++ b/meta-xilinx-core/gen-machine-conf @@ -1 +1 @@ -Subproject commit b98f73514d99663c9b5040947c39f6494496384a +Subproject commit ae406ee01558542afc0ab2002c37b0e9fd2d1c7d -- cgit v1.2.3-54-g00ecf From 4f66789386fff320e317fefe7ab806c289167e43 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 6 Sep 2023 17:46:01 +0530 Subject: linux-xlnx : Updated SRCREV for 2023.2_8435 v4l2: xilinx: dprx: Add HDCP2x support v4l2: xilinx: Add HDCP2x Rx support config: xilinx: versal: Enable reset-controller ptp: xilinx: Add workaround for EXTTS interrupt handling spi: spi-zynq-qspi: Fix issue in accessing the upper flash Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb index 98257604..88651319 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.30" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "b88eef72401fcc3c669c785fdf114997bd63a5ac" +SRCREV = "63a2ddb4ca597d67d4e4e858761c1f7ff81ebd11" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" -- cgit v1.2.3-54-g00ecf From ba09f7c7f68d7befd7345ad9615311e54c6ab899 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 6 Sep 2023 18:36:35 +0530 Subject: aie-rt : Updated SRCREV for 2023.2_4663 driver:src: Added the new transaction bufffer header to include dir driver: src: dma: Convert DMA WriteBD operations to BlockWrite operations for shim DMA BD driver:src:Add consistant way to access custom Opearator driver: src: global: Minor fixes to doxygen documentation Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc index 38bb7f9f..d454f44b 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc @@ -3,7 +3,7 @@ SECTION = "libs" REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https" BRANCH ?= "xlnx_rel_v2023.2" -SRCREV ?= "c4b61e22a59b72ea40a8ff8bf1b75e321e58682f" +SRCREV ?= "6311e50b014833568945edb3dc456f996a5da9d2" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM ?= "file://license.txt;md5=04a153cae61a8a606fc79dff49c2c897" -- cgit v1.2.3-54-g00ecf From daaefe2667cc65c219841b8f31050386e6f68eb9 Mon Sep 17 00:00:00 2001 From: Varalaxmi Bingi Date: Mon, 4 Sep 2023 16:48:40 +0530 Subject: xrt.inc:adding name to src_rev There are multiple SRC_URI's in xrt recipe file. Getting below warning if we wont specify the name to SRCREV Warning: WARNING: xrt-202320.2.16.0-r0 do_package_qa_setscene: ExpansionError('SRCPV', '${@bb.fetch2.get_srcrev(d)}', FetchError('The SRCREV_FORMAT variable must be set when multiple SCMs are used.\nThe SCMs are:\ngit://github.com/Xilinx/XRT.git;protocol=https;branch=master\ngit://github.com/Xilinx/dma_ip_drivers.git;branch=master;name=dma_ip_drivers;destsuffix=git/src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma;protocol=https\ngit://github.com/serge1/ELFIO.git;branch=main;name=ELFIO;destsuffix=git/src/runtime_src/core/common/elf;protocol=https', None)) Signed-off-by: Varalaxmi Bingi Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-xrt/xrt/xrt.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc index 08ad0f77..95c8de8e 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc @@ -1,9 +1,9 @@ REPO ?= "git://github.com/Xilinx/XRT.git;protocol=https" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" -SRC_URI = "${REPO};${BRANCHARG}" +SRC_URI = "${REPO};${BRANCHARG};name=xrt" BRANCH= "master" -SRCREV= "ff10e98baa0538aa6014fda44631f4c35fc577e0" +SRCREV_xrt = "ff10e98baa0538aa6014fda44631f4c35fc577e0" PV = "202320.2.16.0" SRC_URI += "git://github.com/Xilinx/dma_ip_drivers.git;branch=master;name=dma_ip_drivers;destsuffix=git/src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma;protocol=https" -- cgit v1.2.3-54-g00ecf From d7c631b528068650836ea53b7ff74a8dad11821f Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 6 Sep 2023 21:48:17 +0530 Subject: aie-rt : Updated SRCREV for 2023.2_7699 driver:src: fixe the BD iteration value boundary check Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc index d454f44b..8271189d 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc @@ -3,7 +3,7 @@ SECTION = "libs" REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https" BRANCH ?= "xlnx_rel_v2023.2" -SRCREV ?= "6311e50b014833568945edb3dc456f996a5da9d2" +SRCREV ?= "600c74adc4759a1df40f767edf11b41949b52728" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM ?= "file://license.txt;md5=04a153cae61a8a606fc79dff49c2c897" -- cgit v1.2.3-54-g00ecf From 012eb3b0c1118e14b2102066549b4daa65e84e81 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 6 Sep 2023 21:47:53 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7295 xilnvm: Validate DME key before programming xilocp: XPPU configurations for DME operations sdps: change data type of BaseAddress sdps: Fix MISRA C-2012 Rule 8.5 violation sdps: Fix MISRA C-2012 Rule 15.5 violation sdps: Fix MISRA C-2012 Rule 14.4 violation sdps: Fix MISRA C-2012 Rule 12.1 violation sdps: Fix MISRA C-2012 Rule 10.6 violation sdps: Fix MISRA C-2012 Rule 10.4 violation sdps: Fix MISRA C-2012 Rule 10.1 violation sdps: Fix MISRA C-2012 Rule 4.7 violation ipipsu: Fix HIS_COMF violations qspipsu: src: Fix code format issues with checkpatch tool qspipsu: src: Update Polled transfer and Interrupt Handler functions as modular xilfpga: Add proper ifdef platform checks sw_services: xilmailbox: Fix HIS_COMF violations sw_services: xilplmi: Added the NullCheck for EmInit parameters update Embedded SW license file for 2023.2 release sw_apps: imgsel: versal image selector clean up sw_services:xilskey: Fixed MISRA-C Rule 8.5 violation rfdc: SDT Add Dependency Files Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index b6665012..667f4249 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "4b382e452bdc148cb10c99da03f0201150dbfe4d" +ESW_REV[2023.2] = "27ae5596270e2e4cc6a0ae23bcc80d49b4754724" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -16,7 +16,7 @@ EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c' -LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '3c310a3ee2197a4c92c6a0e2937c207c' +LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '6677b545d223964a4906f97a2229bfc5' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From 2854d618010087bbffdc0c7d28055bdbff94e2f3 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 7 Sep 2023 12:45:43 +0530 Subject: arm-trusted-firmware : Updated SRCREV for 2023.2_8051 fix(xilinx): update dtb when dtb address and tf-a ddr flow is used fix(versal): use correct macro name for ocm base address Signed-off-by: Siva Addepalli --- .../recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb index 26c24498..6ebd6cb5 100644 --- a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb +++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb @@ -1,5 +1,5 @@ ATF_VERSION = "2.8" -SRCREV = "1ce681f023ba57a16c72538ee124a106cc4b3988" +SRCREV = "6be857cb66300fb21e3f61308e4197911c8ac30d" BRANCH = "xlnx_rebase_v2.8" LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031" -- cgit v1.2.3-54-g00ecf From b32098dffa5969c301b2da1bc94a4f040a1bab0c Mon Sep 17 00:00:00 2001 From: saumya garg Date: Wed, 6 Sep 2023 15:09:24 +0530 Subject: xrt, zocl: Update commit id Changelog: changing the dt names of versal nodes. (#7690) CR-1173506 Segmentation fault when running VAI application (#7689) Fix for CR-1146345 (#7688) CR-1155098 Missing host memory status in Platform report (#7675) CR-1173328 Add argument validation check after checking for configurations (#7686) VITIS-9039 Add an IPU specific test to validate (#7676) Fix ert_false issue for versal device (#7685) VITIS-9224 Xbutil Enhancements for Power Management (#7682) Remove stray prints (#7684) Fixes for CR-1167717, CR-1173167, and CR-1173061 (#7681) Use driver store path for xilinx_xrt on Windows (#7679) Updates to Profiling/Trace PS kernels (#7670) CR-1121893 Fix edge build for debian flow (#7671) Signed-off-by: saumya garg Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-xrt/xrt/xrt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc index 95c8de8e..fcb9574e 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc @@ -3,7 +3,7 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != ' SRC_URI = "${REPO};${BRANCHARG};name=xrt" BRANCH= "master" -SRCREV_xrt = "ff10e98baa0538aa6014fda44631f4c35fc577e0" +SRCREV_xrt = "efdc361cbecfd9e2968d632b4606bdf9276268dc" PV = "202320.2.16.0" SRC_URI += "git://github.com/Xilinx/dma_ip_drivers.git;branch=master;name=dma_ip_drivers;destsuffix=git/src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma;protocol=https" -- cgit v1.2.3-54-g00ecf From a60763e118eadeb4eb05aa72b81e33f314d20783 Mon Sep 17 00:00:00 2001 From: Sandeep Gundlupet Raju Date: Tue, 5 Sep 2023 18:57:08 -0600 Subject: boot.cmd.generic.root: Add kernel command line param support Add kernel command line parameters support in boot.scr, With this user can append additional kernel command line parameters to existing bootargs. Signed-off-by: Sandeep Gundlupet Raju Signed-off-by: Mark Hatle --- .../recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root index 816707cb..ed12f941 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root @@ -15,7 +15,7 @@ do if test "${boot_target}" = "jtag" ; then fdt addr @@DEVICETREE_ADDRESS@@ fdt get value bootargs /chosen bootargs - setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@ + setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@ @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ fi if test "${boot_target}" = "mmc0" || test "${boot_target}" = "mmc1" || test "${boot_target}" = "usb0" || test "${boot_target}" = "usb1"; then @@ -65,7 +65,7 @@ do fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ ${ramdisk_name}; fdt addr @@DEVICETREE_ADDRESS@@ fdt get value bootargs /chosen bootargs - setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@ + setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@ @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ fi echo "Checking for /${rootfs_name}" @@ -74,12 +74,12 @@ do fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ ${rootfs_name}; fdt addr @@DEVICETREE_ADDRESS@@ fdt get value bootargs /chosen bootargs - setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@ + setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@ @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ fi fdt addr @@DEVICETREE_ADDRESS@@ fdt get value bootargs /chosen bootargs - setenv bootargs $bootargs @@KERNEL_ROOT_SD@@ + setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_SD@@ @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ - @@DEVICETREE_ADDRESS@@ fi if test "${boot_target}" = "xspi0" || test "${boot_target}" = "qspi" || test "${boot_target}" = "qspi0"; then @@ -93,7 +93,7 @@ do sf read @@RAMDISK_IMAGE_ADDRESS@@ @@QSPI_RAMDISK_OFFSET@@ @@QSPI_RAMDISK_SIZE@@ fdt addr @@DEVICETREE_ADDRESS@@ fdt get value bootargs /chosen bootargs - setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@ + setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@ @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@; echo "Booting using Separate images failed" fi @@ -108,7 +108,7 @@ do nand read @@RAMDISK_IMAGE_ADDRESS@@ @@NAND_RAMDISK_OFFSET@@ @@NAND_RAMDISK_SIZE@@ fdt addr @@DEVICETREE_ADDRESS@@ fdt get value bootargs /chosen bootargs - setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@ + setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@ @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@; echo "Booting using Separate images failed" fi -- cgit v1.2.3-54-g00ecf From fcdc430282d33274670e1ddcd998f54e521f967d Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 8 Sep 2023 18:54:12 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_9143 cpu_riscv: Fix addgroup tag dp14rxss: Enable HDCP2X Timer handler calling function only when HDCP2X is enabled. xilpm: versal: server: Fix MISRA-C rule 10.4 xilpm: versal_common: server: Fix MISRA-C rule 8.13 sw_apps: zynqmp_pmufw: Fix MISRA-C rule 10.4 dfeprach: Remove immediate trigger dfeccf: Remove immediate trigger dfeofdm: Remove immediate trigger dfemix: Remove immediate trigger sw_services: xilpuf: Declare variable that are passed to server in data section srec_spi_bootloader: Adding a check in cmake to throw proper error srec_spi_bootloader: Adding linker_constraint for heap section in yaml srec_bootloader: Adding linker_constraint for heap section in yaml DP21: Add support for DP21 linkrates video_common: Fix compilation warning xilpm: versal: server: Add NPI read after enabling privilege write access for AIE2 dpdma: dppsu: Remove tapp section from yaml files Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 667f4249..9232a10e 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "27ae5596270e2e4cc6a0ae23bcc80d49b4754724" +ESW_REV[2023.2] = "ea73baf7767b879075b11b5a7831a9b0f90e59cc" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From b33e4fb9934a9c8d26150fa0f3908f24c53f889e Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 11 Sep 2023 16:16:37 +0530 Subject: linux-xlnx : Updated SRCREV for 2023.2_1703 misc: xilinx-ai-engine: Fix bug in setting Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb index 88651319..8641401a 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.30" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "63a2ddb4ca597d67d4e4e858761c1f7ff81ebd11" +SRCREV = "21bb2c6510c445347db84d59f6b5a7cc09be507b" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" -- cgit v1.2.3-54-g00ecf From 3df21fa78623fc20ccfc95104029d1305ceda478 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 11 Sep 2023 16:13:34 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_2891 ospipsv: Fix MISRA-C Rule 8.13 violation sw_services:xilplmi:Sec COE Review Fixes uartlite: Correct SDT and interrupt checks in xuartlite_intr_tapp_example csudma:Fix HIS_COMF violations axidma: Fix sg_cyclic_intr example failure on r5 Updated version number to latest in examples/index.html for multiple drivers BSP: microblaze: Fix prototypes of few cache APIs plm: versal_net: Use Reserved DDR Region for DS storage during update xilpki: fix issues with PKI IRQ signal lib: sw_apps: zynqmp_pmufw: Fix compilation error when ENABLE_RECOVERY flag is enabled in sdt flow xilpdi:Fix MISRA C violations for Rule 12.1 scuwdt: Update examples to stop the wdt at the end of the test scutimer: Update examples to stop the timer at end of the test xilplmi: versal: Allow loading of ELFs to XRAM dmaps: Fix example instance structure handling v_hdmitx1: Add support for configurable VTEM packets esw: Fix CMAKE_MACHINE for plm and psm microblaze processors in versalnet cmake: UserConfig.cmake: Disable USER_COMPILE_PROFILING_ENABLE configuration scripts: pyesw: build_bsp: Use cmake --build with verbose esw: Properly handle the processor extra compiler options ThirdParty: sw_services: lwip213: Fix the target name in clean target xilpki: Update XPki_GetVersion() API prototype Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9232a10e..27fd42c0 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "ea73baf7767b879075b11b5a7831a9b0f90e59cc" +ESW_REV[2023.2] = "5829c0d9de3f9c3d05163fed983c09b5a22ee276" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 01af6f27edfa17ab9fda40635ef090e14e9dab2c Mon Sep 17 00:00:00 2001 From: Siva Addepalli Date: Thu, 7 Sep 2023 20:03:18 +0530 Subject: Updated SRCREV of bootgen for 2023.2_4079 2023.2 Updates 1. Support for replace/append use cases based of include bif 2. Fix build on machines with modern flex 2023.2_ksb Updates 1. Support for Authentication Optimization 2. Support for User Optional Data 3. Support for TCM Boot Flag 4. Add set_ipi_access Command 5. Add Sub Marker Support 6. Bug Fix for Deterministic Builds 2023.2_ksb Updates Signed-off-by: Siva Addepalli Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb index cd4b1e36..03f323e1 100644 --- a/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb +++ b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb @@ -11,7 +11,7 @@ RDEPENDS:${PN} += "openssl" REPO ?= "git://github.com/Xilinx/bootgen.git;protocol=https" BRANCH = "xlnx_rel_v2023.2" -SRCREV = "4f1e1caf2c09cdeacc35cbeedaf2550c6e44c7fd" +SRCREV = "8e6702bb5064b806e45028486de7376962470a36" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -- cgit v1.2.3-54-g00ecf From 5c099ca15c020f7a857379631e1d7aff58c7bec3 Mon Sep 17 00:00:00 2001 From: Ben Levinsky Date: Thu, 7 Sep 2023 10:07:59 -0700 Subject: libmetal-xlnx: Updated SRCREV for 2023.2 Changelog: examples: linux: zynqmp: Remove MB definition examples: freertos: define xInterruptController in System Device T.. lib: freertos: Add support for A72 and A78 lib: generic: zynqmp_a78: Add support for versal_net a78 platform .. lib: utilities: Match upstream for MB/GB macros Export each of the memory_order enumerators lib: add support for A78 Baremetal This fixes compilation issue in build with latest libmetal Signed-off-by: Ben Levinsky Signed-off-by: Mark Hatle --- .../openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb index 7a5dc70e..5618ae88 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb @@ -1,5 +1,5 @@ SRCBRANCH ?= "2023.2" -SRCREV = "be635252271de342014a146825870b64bd41d6eb" +SRCREV = "00fd771adc7adaed664ed6c5bc3d48d25856fe5c" BRANCH = "xlnx_rel_v2023.2" LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=f4d5df0f12dcea1b1a0124219c0dbab4" PV = "${SRCBRANCH}+git${SRCPV}" -- cgit v1.2.3-54-g00ecf From 9215dae304584d11f921eb495d84288ae4b410dd Mon Sep 17 00:00:00 2001 From: Sergei Korneichuk Date: Wed, 30 Aug 2023 00:32:49 -0700 Subject: open-amp-xlnx: Updated SRCREV for 2023.2 Changelog: apps: zynq7: Move App specific variables to platform_info.h apps: zynqmp: Move App specific variables to platform_info.h apps: zynqmp_r5: Move App specific variables to platform_info.h Signed-off-by: Sergei Korneichuk Signed-off-by: Mark Hatle --- .../openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb index eba124d9..8c6b4431 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb @@ -1,5 +1,5 @@ SRCBRANCH ?= "2023.2" -SRCREV = "e95b02aef72a21039b1d109087788d4675475813" +SRCREV = "73a546f2b5faffe71680b1e5389f3328be60773f" BRANCH = "xlnx_rel_v2023.2" LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=ab88daf995c0bd0071c2e1e55f3d3505" PV = "${SRCBRANCH}+git${SRCPV}" -- cgit v1.2.3-54-g00ecf From 52b6fdee4dfa5e0f4c593a5b457fbd3a7084471f Mon Sep 17 00:00:00 2001 From: Varalaxmi Bingi Date: Fri, 8 Sep 2023 17:53:04 +0530 Subject: xrt.inc: adding SRCREV_FORMAT variable when there are multiple srcuri then we need to mention the SRC_URI names in SRCREV_FORMAT variable. otherwise it will throw warning Signed-off-by: Varalaxmi Bingi Set the format to only pay attention to XRT Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-xrt/xrt/xrt.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc index fcb9574e..cbdee970 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc @@ -11,3 +11,4 @@ SRCREV_dma_ip_drivers = "9f02769a2eddde008158c96efa39d7edb6512578" SRC_URI += "git://github.com/serge1/ELFIO.git;branch=main;name=ELFIO;destsuffix=git/src/runtime_src/core/common/elf;protocol=https" SRCREV_ELFIO = "a04810f12625207cce72665d783babb80f0175a8" +SRCREV_FORMAT = "xrt" -- cgit v1.2.3-54-g00ecf From 210637fe0599a55cff05facc13b2f706d2afb586 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 13 Sep 2023 12:46:46 +0530 Subject: u-boot-xlnx : Updated SRCREV for 2023.2_2883 mtd: spi-nor: Fix the issi_get_locked_range api arm64: zynqmp: Add output-enable pins to SOMs cmd: sf: Fix the flash_is_unlocked api size parameter mtd: spi-nor: Fix the giga_get_locked_range api Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc index 4165543b..30da126f 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc @@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01" UBRANCH = "xlnx_rebase_v2023.01" -SRCREV = "5af51afd459eaf5bac81ff5315fad0b2ee20972a" +SRCREV = "ae520c3d6f89a639ea76ed439735e142e18f5957" LICENSE = "GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" -- cgit v1.2.3-54-g00ecf From 29665dbde83e883d7673da4c8f53b9f84417b873 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 14 Sep 2023 12:46:51 +0530 Subject: u-boot-xlnx : Updated SRCREV for 2023.2_2643 arm64: versal-net: Add dts files for mini u-boot qspi and ospi configurations mtd: spi-nor: Update block protection flags for spansion flash Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc index 30da126f..b9d6a16e 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc @@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01" UBRANCH = "xlnx_rebase_v2023.01" -SRCREV = "ae520c3d6f89a639ea76ed439735e142e18f5957" +SRCREV = "ddaf9cd263bfce05bc7427f544b71a0cc75647ac" LICENSE = "GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" -- cgit v1.2.3-54-g00ecf From 95e3303f7cc56ca3e1197d49acdb2ac157ae423e Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 14 Sep 2023 12:50:57 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5147 xilffs: Fix compilation warning usb: usbpsu: fix HIS_RETURN violation Updated changelog for cpu, versal_plm and other components tmr_inject: Fix style issues in the driver sources tmr_manager: Correct the syntax for xlnx, mask-rst-value property sw_services:xilpki:Fixed doxygen warnings sw_services:xilsecure: Avoid returning XST_SUCCESS incase of glitch sw_services: xilocp: Avoid returning XST_SUCCESS incase of glitch scugic: Fixed source code-format issue. scugic: Include xplatform_info.h for all processors scugic: Fix HIS_COMF violations scugic: Fix MISRA C violation for Rule 14.4 scugic: Fix MISRA-C violation for Rule 10.3 sw_services:xilsecure:Removed NO_EFFECT coverity warning fix. nandpsu: Update the clock node qspipsu: Update the clock node uartpsu: Update the clock node iicps: Update the clock node lib: standalone: Add the clocking to the standalone v_hdmitxss1: added tx compliance changes v_hdmirxss1: added tx compliance values v_hdmiphy1: Added new registers openamp: apps: zynqmp_r5: freertos: Remove call to vPortEnableInterrupt() cframe: Fixed MISRA-C violation 8.13 cframe: Fixed MISRA-C violation 4.6 cframe: Fixed MISRA-C violation 7.2 cframe: Fixed MISRA-C violation 10.4 cframe: Fixed MISRA-C violation 10.1 trngpsx: add SDT support sdps: Update YAML with Versal NET eMMC compatible sdps: Add support to read Tap configurations sw_services:xilplmi:Remove redundant code Xilloader: PCR security review comments xilocp: Fixed Security review comments for OCP BSP: riscv: Fix definitions for hpmevent registers xilpm: Update SSIT temperature propagation xilpm: versal: server: Fix sub-system restart on vek280 iicps: Fix doxygen warnings mipicsiss: Removing linker script usb: usbpsu: src: fix HIS_VOCF metric violation usb: usbpsu: src: fix MISRA C-2012 Rule 10.3 violation sw_services: xilsecure: Removed unused code of TRNG in xilsecure library sw_Services: xilsecure: Restricted XSecure_EccRandInit API to VersalNet sw_services: xilsecure: Use CacheInvalidate as per ARM recommendations xilpm: versal_common: server: Add missing code while integrating into Rigel workflow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 27fd42c0..2d006765 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "5829c0d9de3f9c3d05163fed983c09b5a22ee276" +ESW_REV[2023.2] = "79ba04717ca52a460438f4ec2da12186248adf97" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 765d352c5ccac74ef882ce9e925ef4dab50d8435 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 14 Sep 2023 12:52:30 +0530 Subject: linux-xlnx : Updated SRCREV for 2023.2_9351 fpga: versal: Add support for 44-bit DMA operations Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb index 8641401a..80365907 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.30" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "21bb2c6510c445347db84d59f6b5a7cc09be507b" +SRCREV = "180fe9b4c8be35c0c75e38a533634dcfd5f39b84" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" -- cgit v1.2.3-54-g00ecf From f3a7eb8b2bf3cf6b99b2917300f0bffe721eca6a Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 15 Sep 2023 16:05:50 +0530 Subject: linux-xlnx : Updated SRCREV for 2023.2_9395 uio_xilinx_ai_engine: Fix return value of xilinx_ai_engine_simulate_irq uio_xilinx_ai_engine: Fix irq number in call to irq_set_irqchip_state Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb index 80365907..a464cdde 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.30" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "180fe9b4c8be35c0c75e38a533634dcfd5f39b84" +SRCREV = "4f412ed20fd2c5353c1e878ef9ed77952a5040a1" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" -- cgit v1.2.3-54-g00ecf From dd03a1f8314d2d4d9bf1d5a0d28ccd49874151f6 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 15 Sep 2023 16:04:22 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_2231 mipicsiss:Updated files with VEK280 Pre-Production board xilloader: Fix MISRA C violation 17.8 xilloader: Fix MISRA C violation 17.7 xilplmi: Fix MISRA C violation 12.2 xilloader: Fix MISRA C violation 12.1 xilloader: Fix MISRA C violation 10.3 xilloader: Fix MISRA C violations for Directive 4.5. v_hdmitxss1: Added tx compliance values v_hdmirxss1: Added tx compliance values ThirdParty: sw_services: Libmetal: sdt: Remove A78 support xilsem: Fix NPI Scan Status after In Place PLM Update Revert "xilpm:versal_net: save and restore PL devices hierarchy" Revert "xilpm:versal_net: Restore missing Pl Devices during PLM update" Revert "xloader:versal_net: save and restore image info table contents" Revert "xilpm:versal_common: fix potential issue on array out of bound." xilplmi: Fix MISRA C violation 13.4 xilplmi: Fixed MISRA C violation for Rule 17.7 xilplmi: Fix MISRA C violations for Rule 14.4 xilplmi: Fix MISRA C violation 10.8 xilplmi: MISRA C violation 10.3 updated for changelog dp21txss , v_hdmitxss1 and other components xilskey: added SDT support for examples xilpm: versal: server: Add XPM_POLL_TIMEOUT definition for CPPUTEST cmake: toolchainfiles: microblaze-plm_toolchain.cmake: Fix VERSAL_PLM redefined warning cmake: toolchainfiles: microblaze-p*: Force the CMAKE_MACHINE variable lib: sw_services: xilplmi: Fix implicit declaration of function Xil_SetMBFrequency warning lib: sw_services: xiltimer: Move the Xil_SetMBFrequency() API declaration to xiltimer.h sw_services:xilnvm:Fixed doxygen warnings scripts: pyesw: library_utils: Return proper error code ipipsu: Update macros to resolve redefinition issue lib: sw_services: xiltimer: Make changes with checkpatch lib: sw_services: xiltimer: Fix incorrect TTC counter handling for Zynq lib: sw_services: xiltimer: Fix sleep handling logic in scutimer adapter lib: sw_services: xiltimer: Add scutimer support for SDT flow ttcps: Fixed source code-format issue. ttcps: Fix HIS_COMF violations ttcps: Fix MISRA-C violation for RULE 14.3 ttcps: Fix MISRA-C violations for 10.7 and 12.2 ttcps: Fix MISRA-c violation for Rule 10.4 ttcps: Remove unnecessary call to XTtcPs_ClearInterruptStatus ttcps: Fix MISRA-C violations for Rule 10.5 ttcps: Fix MISRA-C violations for Rule 10.3 qspipsu: Update XQspiPsu_PolledRecvData and XQspiPsu_PolledMessageTransfer functions qspipsu: Fix MISRA-C violation 2.2 and 2.6 qspipsu: Fix MISRA-C violation 10.1 qspipsu: Fix MISRA-C violation 8.13 xilpm:versal_net: save and restore PL devices hierarchy xilpm:versal_net: Restore missing Pl Devices during PLM update xloader:versal_net: save and restore image info table contents xilpm:versal_common: fix potential issue on array out of bound. sw_services:xilpuf:Fixed MISRA-C Rule 2.5 violation ThirdParty: sw_services: OpenAMP: sdt: Remove A53, A72 and A78 support ThirdParty: sw_services: Libmetal: sdt: Add support for PMUFW and PMC Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 2d006765..e86f2eaa 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "79ba04717ca52a460438f4ec2da12186248adf97" +ESW_REV[2023.2] = "8c698994fb414274b530a1d1d36146a3ca69f993" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From efaf28a79e2cd25ec97bf74d24c5248899d6b292 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 18 Sep 2023 23:41:03 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_4139 sw_services: XilSecure: Input Validations are added for xsecure_elliptic.c file xilpm: examples: Integrate self-suspend example into vitisng/rigle flow sw_services:xilnvm:server: Avoid returning XST_SUCCESS incase of glitch sw_services:xilnvm:client: Avoid returning XST_SUCCESS incase of glitch sw_services: xilnvm: Add volatile keyword to avoid optimization sw_services: xilnvm: Fix assigning Status to XST_SUCCESS sw_services: xilnvm: Fix SW-BP-REDUNDANCY in XNvm_EfuseWriteDmeRevoke and XNvm_EfusePrgmIv lib: sw_apps: Fix race condition in the app CMakeLists.txt for sdt flow versal: Fix for ssit security review comments wdttb: Fixed MISRA-C violation 10.4 wdttb: Fix MISRA C violation 12.1 Fix internal security review comments bsp:standalone: Fixed source code-format issue. bsp:standalone: Fix MISRA-C violation for Rule 12.1 bsp:standalone: Fix MISRA-C violation for Rule 7.2 bsp:standalone: Fix MISRA-C violation for Directive 4.6 bsp:standalone: Fix Misra-c violation for Rule 10.3 xilpm:versal_net: save and restore PL devices hierarchy xilpm:versal_net: Restore missing Pl Devices during PLM update xloader:versal_net: save and restore image info table contents xilpm:versal_common: fix potential issue on array out of bound. updated for changelog xadcps and other components xilpm: versal: server: Fix MISRA-C violation for rule 8.13 xilpm: versal: server: Fix MISRA-C violation for rule 12.1 updated for changelog uartlite sw_services:xilocp:Fixes for Doxygen warnings dpdma: Fix MISRA-C rule 12.1 violation dpdma: Fix MISRA-C rule 15.5 violation Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index e86f2eaa..b635462f 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "8c698994fb414274b530a1d1d36146a3ca69f993" +ESW_REV[2023.2] = "6dd9d8283c5545c35353089e8ece1acb6c0d20b7" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 3142ae7db9ab448061030f81c3a857d9d8d1aff8 Mon Sep 17 00:00:00 2001 From: Siva Addepalli Date: Tue, 19 Sep 2023 12:04:21 +0530 Subject: Revert "gen_yocto_machine.py: Instead of ATF_CONSOLE_DEFAULT variable add ATF_CONSOLE" Signed-off-by: Siva Addepalli --- meta-xilinx-core/gen-machine-conf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/gen-machine-conf b/meta-xilinx-core/gen-machine-conf index ae406ee0..911941fc 160000 --- a/meta-xilinx-core/gen-machine-conf +++ b/meta-xilinx-core/gen-machine-conf @@ -1 +1 @@ -Subproject commit ae406ee01558542afc0ab2002c37b0e9fd2d1c7d +Subproject commit 911941fc094dc0073c2f01a2b94de3cc6e993fe3 -- cgit v1.2.3-54-g00ecf From d25c9ba4d0d300df0cd0594cb011ba306811b8f3 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 19 Sep 2023 12:46:43 +0530 Subject: u-boot-xlnx : Updated SRCREV for 2023.2_8535 net: phy: xilinx-gmii2rgmii: Removed hardcoded phy address 0 for bridge Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc index b9d6a16e..0473e4d4 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc @@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01" UBRANCH = "xlnx_rebase_v2023.01" -SRCREV = "ddaf9cd263bfce05bc7427f544b71a0cc75647ac" +SRCREV = "5e0cdf3feeaed4f8dc75c15f9f4ee4ccdff80d74" LICENSE = "GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" -- cgit v1.2.3-54-g00ecf From 658dc1c77ec2e6db8da533be68d9514628a446d6 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 19 Sep 2023 17:03:03 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_3699 sw_services:xilsecure:Fixed NO_EFFECT coverity warning scripts: pyesw: retarget_app: Add support for retargeting application for different platform scripts: pyesw: reconfig_bsp: Add support for shared platform/bsp Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index b635462f..1bc01b55 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "6dd9d8283c5545c35353089e8ece1acb6c0d20b7" +ESW_REV[2023.2] = "e7178d2069036c83173116c2ecd44e8487cc30bc" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 504e113159d4357e159f7d09405e2323b9edc586 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 20 Sep 2023 18:57:59 +0530 Subject: linux-xlnx : Updated SRCREV for 2023.2_7327 arm64: zynqmp: Add output-enable pins to SOMs v4l: xilinx: xcsirxss: Fix YUV420 format Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb index a464cdde..31f3a61f 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.30" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "4f412ed20fd2c5353c1e878ef9ed77952a5040a1" +SRCREV = "008e6788f5aa09862307822bfc396c926dc0dbac" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" -- cgit v1.2.3-54-g00ecf From e72a81faa5d8970e34891cf7703bfadd8a916c61 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 21 Sep 2023 20:17:07 +0530 Subject: linux-xlnx : Updated SRCREV for 2023.2_8771 mtd: spi-nor: Fix Write failure in SST flashes spi: spi-cadence: Correct irq sequence for read Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb index 31f3a61f..9f25028b 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.30" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "008e6788f5aa09862307822bfc396c926dc0dbac" +SRCREV = "2c6eef04c4fd6ede2f4de2437f5760da8e84ace2" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" -- cgit v1.2.3-54-g00ecf From f5611000dc098e51c0c488bc48aea999b9edf1b7 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 22 Sep 2023 12:51:24 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7391 sw_services:xilnvm:Fixed MISRA-C Rule 12.2 violation sw_services:xilnvm:Fixed MISRA-C Rule 8.3 violation sw_services:xilnvm:Fixed MISRA-C Rule 8.7 violation sw_services:xilnvm: Fixed MISRA-C Rule 2.5 violation reupdated emacps changelog sw_services: xilnvm: Fix review comments updated for changelog avbuf and other components sw_services: xilloader: Move KAT & hash calculation out of PLM_OCP macro trngpsv: Fix MISRA-C violation 2.5 trngpsv: Fix MISRA-C violations 8.13 trngpsv: Fix MISRA-C violations 12.1 trngpsv: Fix MISRA-C violations 10.1 sw_services:xilfpga: Fixed source code-format issues sw_services:xilfpga: Fix MISRA-C violations for Rule 10.3 v_hdmitxss1: updated defines for tx pre and post cursor v_hdmirxss1: updated define for pre and post cursor Updated for cframe and other components sw_services:xilsecure:zynqmp:Fixed MISRA-C Rule 15.6 violation sw_services:xilsecure:zynqmp: Fixed MISRA-C Rule 17.8 violation sw_services:xilsecure:zynqmp: Fixed MISRA-C Rule 7.2 sw_services:xilsecure:zynqmp: Fixed MISRA_C Rule 11.9 xilsecure:zynqmp: Fixed MISRA-C violations lib: sw_apps: Match title and description for OpenAMP and Libmetal apps xilsecure: Added Check for All Zero Exponent Case Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 1bc01b55..4074543e 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "e7178d2069036c83173116c2ecd44e8487cc30bc" +ESW_REV[2023.2] = "a27988ee36e7402ee991778aae462bf27ae70295" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 2260d3c48ab6095a603b963cb2f35c4ef2066e94 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 22 Sep 2023 21:58:30 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_3335 sw_services: xilloader: Use correct mask to indicate KAT for SHA3 Instance 1 is run xilocp: Allowed PCR mask for GetPcr shall be 0xFF Revert "sw_services: xilloader: Move KAT & hash calculation out of PLM_OCP macro" sw_services:xilsecure:Fix HIS COMF Violations for server. re-updated for changelog xilpm versal_psmfw: assert reset in power down sequence xilpm: versal_net: assert reset before setting operation mode xilpm: server: Fix max DDRMC count in PlDev -> MemCtrlr link Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 4074543e..85f0317c 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "a27988ee36e7402ee991778aae462bf27ae70295" +ESW_REV[2023.2] = "71b2d15b9b6c2341488f7ed47640e9b28ecacb43" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 9c74ee2982aba468f096069178973176f28b1d78 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 22 Sep 2023 21:54:22 +0530 Subject: u-boot-xlnx : Updated SRCREV for 2023.2_3243 net: zynq_gem: Update the MDC clock divisor in the probe function Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc index 0473e4d4..0cfbd846 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc @@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01" UBRANCH = "xlnx_rebase_v2023.01" -SRCREV = "5e0cdf3feeaed4f8dc75c15f9f4ee4ccdff80d74" +SRCREV = "0fc19cad5a07a09958443e7a5b6f11e420ef195c" LICENSE = "GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" -- cgit v1.2.3-54-g00ecf From deec333f32065037e273776cb583f4647f13c379 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Sat, 23 Sep 2023 12:51:24 +0530 Subject: aie-rt : Updated SRCREV for 2023.2_2687 driver:src: xaiengine directory & include files are missing Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc index 8271189d..0b12173c 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc @@ -3,7 +3,7 @@ SECTION = "libs" REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https" BRANCH ?= "xlnx_rel_v2023.2" -SRCREV ?= "600c74adc4759a1df40f767edf11b41949b52728" +SRCREV ?= "e75d9528bf4cbb1506e1b02cbba73cd90133b42b" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM ?= "file://license.txt;md5=04a153cae61a8a606fc79dff49c2c897" -- cgit v1.2.3-54-g00ecf From a04fc0c769c749950de0a8e7ad08719ba30d281e Mon Sep 17 00:00:00 2001 From: saumya garg Date: Fri, 22 Sep 2023 11:50:01 +0530 Subject: xrt, zocl: Update commit id MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Changelog: fixed S2MM events for memory tiles (#7711) Search for specified xclbin in cwd and repo if available (#7710) add interface uuid into xgq_vmr host driver for linux upstream project (#7704) Xbutil reset issue fixed related to hwmon (#7706) Accessing device memory from host is enabled now in emulation (#7708) including DMA-only tiles in 'all' (#7709) Add test for exporting and importing buffer on same device (#7707) CR-1175636 Performance mode not valid for device (#7705) CR-1114740 xbutil examine -d -r 'aieshim' console output does n… (#7701) Catching exceptions when XDP plugins are loaded (#7703) CR-1175649 Always wait for command completion through hwqueue in SHIM layer (#7702) Add xrt::version APIs (#7696) CR-1155098 Add missing logic for host-mem status (#7698) sleep for 1 second to yiled cpu (#7700) Adding RAVE device id to XRT (#7699) Update ulite function to match newer Linux kernel (#7695) Return ENODATA Error code if bitstream is not present (#7694) Fixed PS kernel only xclbin download issue (#7674) CR-1174490: Fixing crash when turning on aie_profile on systems without AIE (#7697) [CR-1161728]: emconfig.json path issue if host code is in python. (#7687) fixed port selection in trace (#7693) Signed-off-by: saumya garg Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-xrt/xrt/xrt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc index cbdee970..b0b19427 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc @@ -3,7 +3,7 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != ' SRC_URI = "${REPO};${BRANCHARG};name=xrt" BRANCH= "master" -SRCREV_xrt = "efdc361cbecfd9e2968d632b4606bdf9276268dc" +SRCREV_xrt = "f978a3c3ac72197564ce51cf30712f9dfddf28cd" PV = "202320.2.16.0" SRC_URI += "git://github.com/Xilinx/dma_ip_drivers.git;branch=master;name=dma_ip_drivers;destsuffix=git/src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma;protocol=https" -- cgit v1.2.3-54-g00ecf From 55e94b3042398422a2034b1c3ed4db6472eb48bb Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 25 Sep 2023 12:51:31 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_6539 sw_services: xilcert: Replace XSecure_MemCpy64 with Xil_SMemCpy sw_services: xilcert: Fix the value of UEID extension scripts: pyesw: reconfig_bsp: Add support for older platforms/bsp axidma: Fix simple interrupt example for SDT flow Xilsecure: Add version header file for client mode VersalNet: Disable cache for xilpuf and xilnvm libraries xilplmi: fixed missing header inclusion lib: sw_apps: Update the User Compile and Link options for c++ sources lib: sw_apps: Fix linker script LINK_DEPENDS in system device-tree flow updated for changelog vtc uartps: Fix xuartps_intr_example compilation errors in SDT flow sw_services:xilpuf:Fixed doxygen warnings sw_services:xilsecure:Fixed doxygen warnings Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 85f0317c..22584a66 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "71b2d15b9b6c2341488f7ed47640e9b28ecacb43" +ESW_REV[2023.2] = "26375a20f9790ee6b3afb180f6edb6fb70899257" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From ae34e7bcdad506013a1212609e55dadea0dfe150 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 25 Sep 2023 12:53:07 +0530 Subject: linux-xlnx : Updated SRCREV for 2023.2_1715 net: macb: Set MDIO clock divisor for pclk higher than 160MHz mtd: rawnand: arasan: Avoid overwriting valid data while checking for bitflips during HW-ECC read Revert "mtd: rawnand: arasan: Use on-host ecc engine in hw-ecc mode" Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb index 9f25028b..8842cb10 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.30" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "2c6eef04c4fd6ede2f4de2437f5760da8e84ace2" +SRCREV = "a19da02cf5b44420ec6afb1eef348c21d9e8cda2" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" -- cgit v1.2.3-54-g00ecf From 90f3a2744676c70ce9d67db3398416ee48cfe4cd Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 26 Sep 2023 12:53:04 +0530 Subject: dts : Updated SRCREV for 2023.2_9163 versal: Rename VEK280 cosim board Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb index f6791406..d41743c1 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb @@ -2,5 +2,5 @@ require qemu-devicetrees.inc BRANCH ?= "xlnx_rel_v2023.2" -SRCREV ?= "86b1a621919f2fb27e5ef4120fcacde67d43368d" +SRCREV ?= "d1013382d9a5ef816cd020e7840813b7a2d65c51" -- cgit v1.2.3-54-g00ecf From 9108010f9eb4602a8c60ab57c000a3e061e00067 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 26 Sep 2023 13:10:42 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5263 Revert "uartps: Fix xuartps_intr_example compilation errors in SDT flow" sw_services:xilsecure:Fixed MISRA-C Rule 12.2 violation sw_services:xilsecure:Fixed compilation warning for ecdsa example sw_services:xilsecure:Fixed MISRA-C Rule 10.3 and 10.4 violations sw_services:xilsecure:Fixed misra-c Rule 8.13 violation sw_services:xilsecure:Fixed coverity warnings updated for ddrcpsu changelog Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 22584a66..9be0d1eb 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "26375a20f9790ee6b3afb180f6edb6fb70899257" +ESW_REV[2023.2] = "fc4af27d47b5077522e98e41b44ff0e83d8ea2cd" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 6609c53110530de0b977bccae7e132f7f16a1e1e Mon Sep 17 00:00:00 2001 From: saumya garg Date: Tue, 26 Sep 2023 11:17:45 +0530 Subject: xrt: Final commit id for 2023.2 release Changelog: fixed TLAST based events (#7718) Fix for CR:1163285-changing field name (#7721) (#7722) CR-1160311 xbflash2 tool doc update (#7716) (#7719) Signed-off-by: saumya garg Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-xrt/xrt/xrt.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc index b0b19427..067e58d7 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc @@ -2,8 +2,8 @@ REPO ?= "git://github.com/Xilinx/XRT.git;protocol=https" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG};name=xrt" -BRANCH= "master" -SRCREV_xrt = "f978a3c3ac72197564ce51cf30712f9dfddf28cd" +BRANCH= "2023.2" +SRCREV_xrt = "323fc40274fc0cf44b253925385613aa742050cf" PV = "202320.2.16.0" SRC_URI += "git://github.com/Xilinx/dma_ip_drivers.git;branch=master;name=dma_ip_drivers;destsuffix=git/src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma;protocol=https" -- cgit v1.2.3-54-g00ecf From e091ac343fd937463f43ef20ee72442a5ff700fc Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 27 Sep 2023 14:33:17 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_6263 scripts: pyesw: library_utils: Pull the xilflash library irrespective of the hardware dependency Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9be0d1eb..aa558038 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "fc4af27d47b5077522e98e41b44ff0e83d8ea2cd" +ESW_REV[2023.2] = "cb3901374f25eb6d85976c87730fad98dc9f3622" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 1208ea87db4a5444514b72f98fdb8599ab861f51 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 29 Sep 2023 11:55:53 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_6459 update Embedded SW license 2023.2 release Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index aa558038..5c23ba88 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "cb3901374f25eb6d85976c87730fad98dc9f3622" +ESW_REV[2023.2] = "3be255338c1cede23b9dc83e5a44369b63042ddd" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -16,7 +16,7 @@ EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c' -LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '6677b545d223964a4906f97a2229bfc5' +LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '9fceecdbcad88698f265578f3d4cb26c' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From 70e0bf55be4cadbbe9c728b4f1a2966220bdb1e0 Mon Sep 17 00:00:00 2001 From: Jose Quaresma Date: Thu, 28 Sep 2023 08:44:12 -0600 Subject: README.building.md: fix bitbake-layers remove layer Based on github Pull Request #59. Signed-off-by: Jose Quaresma Update commit message and added PR number in commit message. Signed-off-by: Sandeep Gundlupet Raju --- README.building.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.building.md b/README.building.md index 8bb866a7..7ffc1ab3 100644 --- a/README.building.md +++ b/README.building.md @@ -31,7 +31,7 @@ $ source poky/oe-init-build-env 4. Once initialized configure `bblayers.conf` by adding dependency layers as shown below using `bitbake-layers` command. > **Note:** From step 3 by default `meta-yocto-bsp` will be included in bblayers.conf -> file and this can be removed using `$ bitbake-layers add-layer meta-yocto-bsp` +> file and this can be removed using `$ bitbake-layers remove-layer meta-yocto-bsp` > command. ``` -- cgit v1.2.3-54-g00ecf From 98ce3f1bca175168d24bf41a2b50f01a53af6dd0 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 4 Oct 2023 15:00:51 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_8615 scripts: pyesw: build_app: Add command line arg to specify .repo.yaml path Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 5c23ba88..9249ed8e 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "3be255338c1cede23b9dc83e5a44369b63042ddd" +ESW_REV[2023.2] = "2197dfbc59086e9fe15587a0df92d98184de6f67" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 9711aa74554f1afed5358d36cb9ba661abeb8e30 Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Tue, 3 Oct 2023 15:36:42 -0500 Subject: embeddedsw: Update to release version Move to release branch, which is rebased from the dev branch Signed-off-by: Mark Hatle --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9249ed8e..c940b154 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -4,11 +4,11 @@ ESW_VER ?= "${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or 'master' REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https" ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1" -ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" +ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "2197dfbc59086e9fe15587a0df92d98184de6f67" +ESW_REV[2023.2] = "19ade382dd3b8a89aa737d9a67ceb2d28c6ab1bc" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -16,7 +16,7 @@ EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c' -LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '9fceecdbcad88698f265578f3d4cb26c' +LIC_FILES_CHKSUM[xlnx_rel_v2023.2] = '9fceecdbcad88698f265578f3d4cb26c' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From 8c0bc6c8dbe46fa024083789ef8649240e23e690 Mon Sep 17 00:00:00 2001 From: Siva Addepalli Date: Tue, 3 Oct 2023 12:48:42 +0530 Subject: Updated SRCREV of vdu-firmware for 2023.2_5515 fix: data cache issue Signed-off-by: Siva Addepalli Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) mode change 100755 => 100644 meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb diff --git a/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb old mode 100755 new mode 100644 index 4deb1f51..e9ef222b --- a/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb +++ b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb @@ -15,7 +15,7 @@ REQUIRED_MACHINE_FEATURES = "vdu" BRANCH ?= "xlnx_rel_v2023.2" REPO ?= "git://github.com/Xilinx/vdu-firmware.git;protocol=https" -SRCREV ?= "63fe2fce6e46d5bf03e33300a58a37d8568722ee" +SRCREV ?= "731897772730178f6a4e77eedeb4fb53faa1ab4d" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -- cgit v1.2.3-54-g00ecf From 3c7ca26c2b0e0490d47fe81b50fbe90f79542ebf Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 5 Oct 2023 12:51:11 +0530 Subject: aie-rt : Updated SRCREV for 2023.2_6187 driver:src: AIE decoupling build bsp & build app failed Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc index 0b12173c..11059465 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc @@ -3,7 +3,7 @@ SECTION = "libs" REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https" BRANCH ?= "xlnx_rel_v2023.2" -SRCREV ?= "e75d9528bf4cbb1506e1b02cbba73cd90133b42b" +SRCREV ?= "84debe5d22c144fb09269b8410df4cb8a6aa3b2a" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM ?= "file://license.txt;md5=04a153cae61a8a606fc79dff49c2c897" -- cgit v1.2.3-54-g00ecf From c69f1e3d2675ded6d2a777a743c4eb424c9eea03 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 5 Oct 2023 12:46:19 +0530 Subject: qemu : Updated SRCREV for 2023.2_1999 arm: Add support for r52 IMP_PERIPHPREGIONR register Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc index d3effa9a..db6e1528 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc @@ -1,3 +1,3 @@ XILINX_QEMU_VERSION = "v7.1.0" BRANCH = "xlnx_rel_v2023.2" -SRCREV = "5b17802c28879d2150df5ea16d8719aab3ee26a0" +SRCREV = "23b643ba1683a47ef49447a45643fe2172d6f8ca" -- cgit v1.2.3-54-g00ecf From cae2a450d1aeb5abdbac594018bbfc8c23a636eb Mon Sep 17 00:00:00 2001 From: saumya garg Date: Wed, 4 Oct 2023 21:47:24 +0530 Subject: xrt, zocl: Update commit id for 2023.2 Changelog: backport the xbutil validate issue for ps kernel (#7732) Signed-off-by: saumya garg Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-xrt/xrt/xrt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc index 067e58d7..17290650 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc @@ -3,7 +3,7 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != ' SRC_URI = "${REPO};${BRANCHARG};name=xrt" BRANCH= "2023.2" -SRCREV_xrt = "323fc40274fc0cf44b253925385613aa742050cf" +SRCREV_xrt = "d69410b4338f4941df280d769615238f25cd5094" PV = "202320.2.16.0" SRC_URI += "git://github.com/Xilinx/dma_ip_drivers.git;branch=master;name=dma_ip_drivers;destsuffix=git/src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma;protocol=https" -- cgit v1.2.3-54-g00ecf From 5f3b406206690c18fa5dc77f3feed4c01ace8274 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 6 Oct 2023 12:50:40 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_4971 scripts: pyesw: open_amp: Extend cleanup support for Libmetal and OpenAMP scripts: pyesw: open_amp: Simplify openamp-lopper run scripts: pyesw: open_amp: Add support for Zynq for OpenAMP and Libmetal in BSP scripts: Enable OpenAMP and Libmetal demos to mimic convention of other ESW apps Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index c940b154..f5fc133c 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "19ade382dd3b8a89aa737d9a67ceb2d28c6ab1bc" +ESW_REV[2023.2] = "bd497446bded94d1ea627096127587f60c9b8db6" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 8b1d3589fbd11a22285c9a4c04a98a7a0aafbe5a Mon Sep 17 00:00:00 2001 From: saumya garg Date: Sat, 7 Oct 2023 10:32:14 +0530 Subject: xrt, zocl: Final commit id for 2023.2 Changelog: fix for AIE1 status (#7735) Signed-off-by: saumya garg Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-xrt/xrt/xrt.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc index 17290650..14b2b968 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc @@ -3,7 +3,7 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != ' SRC_URI = "${REPO};${BRANCHARG};name=xrt" BRANCH= "2023.2" -SRCREV_xrt = "d69410b4338f4941df280d769615238f25cd5094" +SRCREV_xrt = "2865a62b6a417dea523d2d5646154aa94a2cbc28" PV = "202320.2.16.0" SRC_URI += "git://github.com/Xilinx/dma_ip_drivers.git;branch=master;name=dma_ip_drivers;destsuffix=git/src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma;protocol=https" -- cgit v1.2.3-54-g00ecf From 05911e19d85fd98c42054238392afe95a5125265 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 12 Oct 2023 21:44:13 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_9035 xilpm: versal: server: Remove XRAM axi-lite clock selection Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index f5fc133c..12db0da2 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "bd497446bded94d1ea627096127587f60c9b8db6" +ESW_REV[2023.2] = "c9a0ee31b2a14cbcfcb56ca369037319b4ad4847" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf