From 75a03622cd16b265938222b5fbee85f902e1b96d Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Sat, 23 Mar 2024 13:00:26 +0530 Subject: vcu-ctrl-sw : Updated SRCREV for 2024.1_2159 fix: Force sample pack mode packed xv for > 8bits Acked-for-series: Varunkumar Allagadapa fix: add missing nDeviceIndex increment chore: update to revision d20240216 --- meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2024.1.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2024.1.bb b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2024.1.bb index ac7e4aa3..8c3df7db 100644 --- a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2024.1.bb +++ b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2024.1.bb @@ -8,7 +8,7 @@ PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', BRANCH ?= "master" REPO ?= "git://github.com/Xilinx/vcu-ctrl-sw.git;protocol=https" -SRCREV = "918ec1e87c67b2746fe0f2bfa9f1503d307b9bc2" +SRCREV = "940f9fa933402de6f959911c236f36add5dd3a40" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -- cgit v1.2.3-54-g00ecf