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authorNathan Rossi <nathan@nathanrossi.com>2016-02-23 23:57:25 +1000
committerNathan Rossi <nathan@nathanrossi.com>2016-03-06 20:04:03 +1000
commita6a32d6b80b218363e1c4dc147af124f55b89033 (patch)
treea24609a8ec9ad21e221cb777099712e07566cf1e /recipes-bsp
parentd9afe0553794e57682de10baeb413494e3399477 (diff)
downloadmeta-xilinx-a6a32d6b80b218363e1c4dc147af124f55b89033.tar.gz
device-tree.bb: Move zynq7-base.dtsi into recipe source
* Move zynq7-base.dtsi out of conf/machine/boards and into the files/ directory of the device-tree recipe * Also move the config from machine-xilinx-default.inc that includes the dtsi for zynq targets Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Diffstat (limited to 'recipes-bsp')
-rw-r--r--recipes-bsp/device-tree/device-tree.bb3
-rw-r--r--recipes-bsp/device-tree/files/common/zynq7-base.dtsi504
2 files changed, 507 insertions, 0 deletions
diff --git a/recipes-bsp/device-tree/device-tree.bb b/recipes-bsp/device-tree/device-tree.bb
index 6332e9c2..2cd47ce0 100644
--- a/recipes-bsp/device-tree/device-tree.bb
+++ b/recipes-bsp/device-tree/device-tree.bb
@@ -13,6 +13,9 @@ DEPENDS += "dtc-native"
13FILES_${PN} = "/boot/devicetree*" 13FILES_${PN} = "/boot/devicetree*"
14DEVICETREE_FLAGS ?= "-R 8 -p 0x3000" 14DEVICETREE_FLAGS ?= "-R 8 -p 0x3000"
15 15
16FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
17SRC_URI_append_zynq = " file://common/zynq7-base.dtsi"
18
16S = "${WORKDIR}" 19S = "${WORKDIR}"
17 20
18KERNEL_DTS_INCLUDE ??= "" 21KERNEL_DTS_INCLUDE ??= ""
diff --git a/recipes-bsp/device-tree/files/common/zynq7-base.dtsi b/recipes-bsp/device-tree/files/common/zynq7-base.dtsi
new file mode 100644
index 00000000..a59e0b85
--- /dev/null
+++ b/recipes-bsp/device-tree/files/common/zynq7-base.dtsi
@@ -0,0 +1,504 @@
1/*
2 * Zynq 7000 Base Device Tree (System Peripherals and Configuration)
3 *
4 * To use this base include it in the dts/dtsi which relies on it.
5 * /dts-v1/;
6 * /include/ "zynq7-base.dtsi"
7 * / {
8 * ...
9 *
10 * In order to configure your board specific configuration of the Zynq platform,
11 * or to configure additional devices attached to Zynq peripherals use the base
12 * include and override properties, add subnodes or disable existing
13 * peripherals.
14 *
15 * To disable or invalidate an existing Zynq peripheral:
16 * ...
17 * ps7_axi_interconnect_0: amba@0 {
18 * ps7_usb_1: ps7-usb@e0003000 { compatible = "invalid"; };
19 * } ;
20 * ...
21 *
22 * To override a property of an existing peripheral:
23 * ...
24 * ps7_axi_interconnect_0: amba@0 {
25 * ps7_usb_0: ps7-usb@e0002000 {
26 * dr_mode = "device";
27 * } ;
28 * } ;
29 * ...
30 *
31 * To add an additional subnode (e.g. a device attached to a bus) to an existing
32 * peripheral:
33 * ...
34 * ps7_axi_interconnect_0: amba@0 {
35 * ps7_ethernet_0: ps7-ethernet@e000b000 {
36 * phy0: phy@7 {
37 * device_type = "ethernet-phy";
38 * reg = <7>;
39 * } ;
40 * } ;
41 * } ;
42 * ...
43 *
44 * For more details, or for reference please refer to device trees in the
45 * meta-xilinx layer that use this base tree.
46 */
47
48/ {
49 #address-cells = <0x1>;
50 #size-cells = <0x1>;
51 compatible = "xlnx,zynq-7000";
52 aliases {
53 ethernet0 = &ps7_ethernet_0;
54 ethernet1 = &ps7_ethernet_1;
55 serial0 = &ps7_uart_1;
56 serial1 = &ps7_uart_0;
57 } ;
58 cpus {
59 #address-cells = <1>;
60 #size-cells = <0>;
61 ps7_cortexa9_0: cpu@0 {
62 bus-handle = <&ps7_axi_interconnect_0>;
63 clock-latency = <1000>;
64 clocks = <&clkc 3>;
65 compatible = "arm,cortex-a9";
66 d-cache-line-size = <0x20>;
67 d-cache-size = <0x8000>;
68 device_type = "cpu";
69 i-cache-line-size = <0x20>;
70 i-cache-size = <0x8000>;
71 interrupt-handle = <&ps7_scugic_0>;
72 cpu0-supply = <&regulator_vccpint>;
73 reg = <0x0>;
74 operating-points = <
75 666667 1000000
76 333334 1000000
77 >;
78 } ;
79 ps7_cortexa9_1: cpu@1 {
80 bus-handle = <&ps7_axi_interconnect_0>;
81 clocks = <&clkc 3>;
82 compatible = "arm,cortex-a9";
83 d-cache-line-size = <0x20>;
84 d-cache-size = <0x8000>;
85 device_type = "cpu";
86 i-cache-line-size = <0x20>;
87 i-cache-size = <0x8000>;
88 interrupt-handle = <&ps7_scugic_0>;
89 reg = <0x1>;
90 } ;
91 } ;
92 pmu {
93 compatible = "arm,cortex-a9-pmu";
94 interrupt-parent = <&ps7_scugic_0>;
95 interrupts = <0 5 4>, <0 6 4>;
96 reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
97 reg-names = "cpu0", "cpu1";
98 } ;
99 regulator_vccpint: fixedregulator@0 {
100 compatible = "regulator-fixed";
101 regulator-name = "VCCPINT";
102 regulator-min-microvolt = <1000000>;
103 regulator-max-microvolt = <1000000>;
104 regulator-boot-on;
105 regulator-always-on;
106 } ;
107 ps7_axi_interconnect_0: amba@0 {
108 #address-cells = <1>;
109 #size-cells = <1>;
110 compatible = "simple-bus", "xlnx,ps7-axi-interconnect-1.00.a";
111 ranges ;
112 ps7_afi_0: ps7-afi@f8008000 {
113 compatible = "xlnx,ps7-afi-1.00.a";
114 reg = <0xf8008000 0x1000>;
115 } ;
116 ps7_afi_1: ps7-afi@f8009000 {
117 compatible = "xlnx,ps7-afi-1.00.a";
118 reg = <0xf8009000 0x1000>;
119 } ;
120 ps7_afi_2: ps7-afi@f800a000 {
121 compatible = "xlnx,ps7-afi-1.00.a";
122 reg = <0xf800a000 0x1000>;
123 } ;
124 ps7_afi_3: ps7-afi@f800b000 {
125 compatible = "xlnx,ps7-afi-1.00.a";
126 reg = <0xf800b000 0x1000>;
127 } ;
128 ps7_scugic_0: ps7-scugic@f8f01000 {
129 #address-cells = <2>;
130 #interrupt-cells = <3>;
131 #size-cells = <1>;
132 compatible = "arm,cortex-a9-gic", "arm,gic", "xlnx,ps7-scugic-1.00.a";
133 interrupt-controller ;
134 num_cpus = <2>;
135 num_interrupts = <96>;
136 reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
137 } ;
138 ps7_pl310_0: ps7-pl310@f8f02000 {
139 compatible = "arm,pl310-cache", "xlnx,ps7-pl310-1.00.a";
140 cache-unified;
141 cache-level = <2>;
142 reg = <0xf8f02000 0x1000>;
143 interrupt-parent = <&ps7_scugic_0>;
144 interrupts = <0 2 4>;
145 arm,data-latency = <3 2 2>;
146 arm,tag-latency = <2 2 2>;
147 } ;
148 ps7_ddrc_0: ps7-ddrc@f8006000 {
149 compatible = "xlnx,zynq-ddrc-1.0", "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
150 reg = <0xf8006000 0x1000>;
151 xlnx,has-ecc = <0x0>;
152 } ;
153 ps7_ocmc_0: ps7-ocmc@f800c000 {
154 compatible = "xlnx,zynq-ocmc-1.0", "xlnx,ps7-ocm";
155 interrupt-parent = <&ps7_scugic_0>;
156 interrupts = <0 3 4>;
157 reg = <0xf800c000 0x1000>;
158 } ;
159 ps7_slcr_0: ps7-slcr@f8000000 {
160 #address-cells = <1>;
161 #size-cells = <1>;
162 compatible = "xlnx,zynq-slcr", "syscon", "simple-bus", "xlnx,ps7-slcr-1.00.a";
163 ranges ;
164 reg = <0xf8000000 0x1000>;
165 clkc: clkc@100 {
166 #clock-cells = <1>;
167 clock-output-names = "armpll", "ddrpll", "iopll",
168 "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
169 "ddr2x", "ddr3x", "dci",
170 "lqspi", "smc", "pcap",
171 "gem0", "gem1",
172 "fclk0", "fclk1", "fclk2", "fclk3",
173 "can0", "can1",
174 "sdio0", "sdio1",
175 "uart0", "uart1",
176 "spi0", "spi1",
177 "dma",
178 "usb0_aper", "usb1_aper",
179 "gem0_aper", "gem1_aper",
180 "sdio0_aper", "sdio1_aper",
181 "spi0_aper", "spi1_aper",
182 "can0_aper", "can1_aper",
183 "i2c0_aper", "i2c1_aper",
184 "uart0_aper", "uart1_aper",
185 "gpio_aper", "lqspi_aper", "smc_aper", "swdt",
186 "dbg_trc", "dbg_apb";
187 compatible = "xlnx,ps7-clkc";
188 fclk-enable = <0xf>;
189 ps-clk-frequency = <33333333>;
190 reg = <0x100 0x100>;
191 } ;
192 rstc: rstc@200 {
193 compatible = "xlnx,zynq-reset";
194 reg = <0x200 0x48>;
195 #reset-cells = <1>;
196 syscon = <&ps7_slcr_0>;
197 } ;
198 pinctl0: pinctrl@700 {
199 compatible = "xlnx,pinctrl-zynq";
200 reg = <0x700 0x200>;
201 syscon = <&ps7_slcr_0>;
202 } ;
203 } ;
204 ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
205 clocks = <&clkc 4>;
206 compatible = "arm,cortex-a9-global-timer", "xlnx,ps7-globaltimer-1.00.a";
207 interrupt-parent = <&ps7_scugic_0>;
208 interrupts = <1 11 0x301>;
209 reg = <0xf8f00200 0x100>;
210 } ;
211 ps7_scutimer_0: ps7-scutimer@f8f00600 {
212 clocks = <&clkc 4>;
213 compatible = "arm,cortex-a9-twd-timer", "xlnx,ps7-scutimer-1.00.a";
214 interrupt-parent = <&ps7_scugic_0>;
215 interrupts = <1 13 0x301>;
216 reg = <0xf8f00600 0x20>;
217 } ;
218 ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
219 clocks = <&clkc 4>;
220 compatible = "xlnx,ps7-scuwdt-1.00.a";
221 device_type = "watchdog";
222 interrupt-parent = <&ps7_scugic_0>;
223 interrupts = <1 14 0x301>;
224 reg = <0xf8f00620 0xe0>;
225 } ;
226 ps7_wdt_0: ps7-wdt@f8005000 {
227 clocks = <&clkc 45>;
228 compatible = "cdns,wdt-r1p2", "xlnx,zynq-wdt-r1p2";
229 interrupt-parent = <&ps7_scugic_0>;
230 interrupts = <0 9 4>;
231 reg = <0xf8005000 0x1000>;
232 reset = <0>;
233 timeout-sec = <10>;
234 } ;
235 /*ps7_dma_ns: ps7-dma@f8004000 {
236 #dma-cells = <1>;
237 #dma-channels = <8>;
238 #dma-requests = <4>;
239 arm,primecell-periphid = <0x41330>;
240 clock-names = "apb_pclk";
241 clocks = <&clkc 27>;
242 compatible = "arm,pl330", "arm,primecell", "xlnx,ps7-dma-1.00.a";
243 interrupt-parent = <&ps7_scugic_0>;
244 interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
245 interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
246 reg = <0xf8004000 0x1000>;
247 } ;*/
248 ps7_dma_s: ps7-dma@f8003000 {
249 #dma-cells = <1>;
250 #dma-channels = <8>;
251 #dma-requests = <4>;
252 arm,primecell-periphid = <0x41330>;
253 clock-names = "apb_pclk";
254 clocks = <&clkc 27>;
255 compatible = "arm,pl330", "arm,primecell", "xlnx,ps7-dma-1.00.a";
256 interrupt-parent = <&ps7_scugic_0>;
257 interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
258 interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
259 reg = <0xf8003000 0x1000>;
260 } ;
261 ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
262 clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
263 clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
264 compatible = "xlnx,zynq-devcfg-1.0", "xlnx,ps7-dev-cfg-1.00.a";
265 interrupt-parent = <&ps7_scugic_0>;
266 interrupts = <0 8 4>;
267 reg = <0xf8007000 0x100>;
268 syscon = <&ps7_slcr_0>;
269 } ;
270 ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
271 compatible = "xlnx,ps7-iop-bus-config-1.00.a";
272 reg = <0xe0200000 0x1000>;
273 } ;
274
275 /* ========= Peripherals ========= */
276
277 ps7_ethernet_0: ps7-ethernet@e000b000 {
278 #address-cells = <1>;
279 #size-cells = <0>;
280 clock-names = "pclk", "hclk", "tx_clk", "ref_clk", "aper_clk";
281 clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>, <&clkc 13>, <&clkc 30>;
282 compatible = "cdns,zynq-gem", "cdns,gem", "xlnx,ps7-ethernet-1.00.a";
283 interrupt-parent = <&ps7_scugic_0>;
284 interrupts = <0 22 4>;
285 local-mac-address = [ 00 0a 35 00 00 00 ];
286 reg = <0xe000b000 0x1000>;
287 xlnx,enet-reset = <0xffffffff>;
288 xlnx,eth-mode = <0x1>;
289 xlnx,has-mdio = <0x1>;
290 xlnx,ptp-enet-clock = <111111115>;
291 } ;
292 ps7_ethernet_1: ps7-ethernet@e000c000 {
293 #address-cells = <1>;
294 #size-cells = <0>;
295 clock-names = "pclk", "hclk", "tx_clk", "ref_clk", "aper_clk";
296 clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>, <&clkc 14>, <&clkc 31>;
297 compatible = "cdns,zynq-gem", "cdns,gem", "xlnx,ps7-ethernet-1.00.a";
298 interrupt-parent = <&ps7_scugic_0>;
299 interrupts = <0 45 4>;
300 local-mac-address = [ 00 0a 35 00 00 01 ];
301 reg = <0xe000c000 0x1000>;
302 xlnx,enet-reset = <0xffffffff>;
303 xlnx,eth-mode = <0x1>;
304 xlnx,has-mdio = <0x1>;
305 xlnx,ptp-enet-clock = <111111115>;
306 } ;
307
308 ps7_gpio_0: ps7-gpio@e000a000 {
309 #gpio-cells = <2>;
310 #interrupt-cells = <2>;
311 clocks = <&clkc 42>;
312 compatible = "xlnx,zynq-gpio-1.0", "xlnx,ps7-gpio-1.00.a";
313 emio-gpio-width = <64>;
314 gpio-controller ;
315 gpio-mask-high = <0x0>;
316 gpio-mask-low = <0x0>;
317 interrupt-controller;
318 interrupt-parent = <&ps7_scugic_0>;
319 interrupts = <0 20 4>;
320 reg = <0xe000a000 0x1000>;
321 } ;
322
323 ps7_qspi_0: ps7-qspi@e000d000 {
324 clock-names = "ref_clk", "pclk", "aper_clk";
325 clocks = <&clkc 10>, <&clkc 43>, <&clkc 43>;
326 compatible = "xlnx,zynq-qspi-1.0", "xlnx,ps7-qspi-1.00.a";
327 reg = <0xe000d000 0x1000>;
328 interrupt-parent = <&ps7_scugic_0>;
329 interrupts = <0 19 4>;
330 is-dual = <0>;
331 num-chip-select = <1>;
332 num-cs = <1>;
333 #address-cells = <1>;
334 #size-cells = <0>;
335 } ;
336 ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
337 clock-names = "ref_clk", "aper_clk";
338 clocks = <&clkc 10>, <&clkc 43>;
339 compatible = "xlnx,ps7-qspi-linear-1.00.a";
340 reg = <0xfc000000 0x1000000>;
341 } ;
342
343 ps7_spi_0: ps7-spi@e0006000 {
344 clock-names = "ref_clk", "pclk", "aper_clk";
345 clocks = <&clkc 25>, <&clkc 34>, <&clkc 34>;
346 compatible = "xlnx,zynq-spi-r1p6", "xlnx,ps7-spi-1.00.a";
347 interrupt-parent = <&ps7_scugic_0>;
348 interrupts = <0 26 4>;
349 num-chip-select = <4>;
350 reg = <0xe0006000 0x1000>;
351 #address-cells = <1>;
352 #size-cells = <0>;
353 } ;
354 ps7_spi_1: ps7-spi@e0007000 {
355 clock-names = "ref_clk", "pclk", "aper_clk";
356 clocks = <&clkc 26>, <&clkc 35>, <&clkc 35>;
357 compatible = "xlnx,zynq-spi-r1p6", "xlnx,ps7-spi-1.00.a";
358 interrupt-parent = <&ps7_scugic_0>;
359 interrupts = <0 49 4>;
360 num-chip-select = <4>;
361 reg = <0xe0007000 0x1000>;
362 #address-cells = <1>;
363 #size-cells = <0>;
364 } ;
365
366 ps7_sd_0: ps7-sdio@e0100000 {
367 clock-names = "clk_xin", "clk_ahb", "ref_clk", "aper_clk";
368 clocks = <&clkc 21>, <&clkc 32>, <&clkc 21>, <&clkc 32>;
369 clock-frequency = <50000000>;
370 compatible = "arasan,sdhci-8.9a", "arasan,sdhci", "generic-sdhci", "xlnx,ps7-sdio-1.00.a";
371 interrupt-parent = <&ps7_scugic_0>;
372 interrupts = <0 24 4>;
373 reg = <0xe0100000 0x1000>;
374 xlnx,has-cd = <0x1>;
375 xlnx,has-power = <0x0>;
376 xlnx,has-wp = <0x1>;
377 } ;
378 ps7_sd_1: ps7-sdio@e0101000 {
379 clock-names = "clk_xin", "clk_ahb", "ref_clk", "aper_clk";
380 clocks = <&clkc 22>, <&clkc 33>, <&clkc 22>, <&clkc 33>;
381 clock-frequency = <50000000>;
382 compatible = "arasan,sdhci-8.9a", "arasan,sdhci", "generic-sdhci", "xlnx,ps7-sdio-1.00.a";
383 interrupt-parent = <&ps7_scugic_0>;
384 interrupts = <0 47 4>;
385 reg = <0xe0101000 0x1000>;
386 xlnx,has-cd = <0x1>;
387 xlnx,has-power = <0x0>;
388 xlnx,has-wp = <0x1>;
389 } ;
390
391 ps7_ttc_0: ps7-ttc@f8001000 {
392 clocks = <&clkc 6>;
393 compatible = "cdns,ttc", "xlnx,ps7-ttc-1.00.a";
394 interrupt-names = "ttc0", "ttc1", "ttc2";
395 interrupt-parent = <&ps7_scugic_0>;
396 interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
397 reg = <0xf8001000 0x1000>;
398 } ;
399 ps7_ttc_1: ps7-ttc@f8002000 {
400 clocks = <&clkc 6>;
401 compatible = "cdns,ttc", "xlnx,ps7-ttc-1.00.a";
402 interrupt-names = "ttc0", "ttc1", "ttc2";
403 interrupt-parent = <&ps7_scugic_0>;
404 interrupts = <0 37 4>, <0 38 4>, <0 39 4>;
405 reg = <0xf8002000 0x1000>;
406 } ;
407
408 ps7_uart_0: serial@e0000000 {
409 clock-names = "uart_clk", "pclk", "ref_clk", "aper_clk";
410 clocks = <&clkc 23>, <&clkc 40>, <&clkc 23>, <&clkc 40>;
411 compatible = "xlnx,xuartps", "cdns,uart-r1p8", "xlnx,ps7-uart-1.00.a";
412 device_type = "serial";
413 interrupt-parent = <&ps7_scugic_0>;
414 interrupts = <0 27 4>;
415 reg = <0xe0000000 0x1000>;
416 port-number = <1>;
417 current-speed = <115200>;
418 xlnx,has-modem = <0x0>;
419 } ;
420 ps7_uart_1: serial@e0001000 {
421 clock-names = "uart_clk", "pclk", "ref_clk", "aper_clk";
422 clocks = <&clkc 24>, <&clkc 41>, <&clkc 24>, <&clkc 41>;
423 compatible = "xlnx,xuartps", "cdns,uart-r1p8", "xlnx,ps7-uart-1.00.a";
424 device_type = "serial";
425 interrupt-parent = <&ps7_scugic_0>;
426 interrupts = <0 50 4>;
427 reg = <0xe0001000 0x1000>;
428 port-number = <0>;
429 current-speed = <115200>;
430 xlnx,has-modem = <0x0>;
431 } ;
432
433 ps7_i2c_0: ps7-i2c@e0004000 {
434 bus-id = <0>;
435 clocks = <&clkc 38>;
436 compatible = "cdns,i2c-r1p10", "xlnx,ps7-i2c-1.00.a";
437 interrupt-parent = <&ps7_scugic_0>;
438 interrupts = <0 25 4>;
439 reg = <0xe0004000 0x1000>;
440 i2c-clk = <400000>;
441 #address-cells = <1>;
442 #size-cells = <0>;
443 } ;
444 ps7_i2c_1: ps7-i2c@e0005000 {
445 bus-id = <1>;
446 clocks = <&clkc 39>;
447 compatible = "cdns,i2c-r1p10", "xlnx,ps7-i2c-1.00.a";
448 interrupt-parent = <&ps7_scugic_0>;
449 interrupts = <0 48 4>;
450 reg = <0xe0005000 0x1000>;
451 i2c-clk = <400000>;
452 #address-cells = <1>;
453 #size-cells = <0>;
454 } ;
455
456 ps7_can_0: ps7-can@e0008000 {
457 clock-names = "can_clk", "pclk", "ref_clk", "aper_clk";
458 clocks = <&clkc 19>, <&clkc 36>, <&clkc 19>, <&clkc 36>;
459 compatible = "xlnx,ps7-can-1.0", "xlnx,ps7-can", "xlnx,ps7-can-1.00.a";
460 interrupt-parent = <&ps7_scugic_0>;
461 interrupts = <0 28 4>;
462 reg = <0xe0008000 0x1000>;
463 tx-fifo-depth = <0x40>;
464 rx-fifo-depth = <0x40>;
465 } ;
466 ps7_can_1: ps7-can@e0009000 {
467 clock-names = "can_clk", "pclk", "ref_clk", "aper_clk";
468 clocks = <&clkc 20>, <&clkc 37>, <&clkc 20>, <&clkc 37>;
469 compatible = "xlnx,ps7-can-1.0", "xlnx,ps7-can", "xlnx,ps7-can-1.00.a";
470 interrupt-parent = <&ps7_scugic_0>;
471 interrupts = <0 51 4>;
472 reg = <0xe0009000 0x1000>;
473 tx-fifo-depth = <0x40>;
474 rx-fifo-depth = <0x40>;
475 } ;
476
477 ps7_usb_0: ps7-usb@e0002000 {
478 clocks = <&clkc 28>;
479 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2", "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
480 reg = <0xe0002000 0x1000>;
481 interrupt-parent = <&ps7_scugic_0>;
482 interrupts = <0 21 4>;
483 dr_mode = "host";
484 phy_type = "ulpi";
485 } ;
486 ps7_usb_1: ps7-usb@e0003000 {
487 clocks = <&clkc 29>;
488 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2", "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
489 reg = <0xe0003000 0x1000>;
490 interrupt-parent = <&ps7_scugic_0>;
491 interrupts = <0 44 4>;
492 dr_mode = "host";
493 phy_type = "ulpi";
494 } ;
495
496 ps7_xadc: ps7-xadc@f8007100 {
497 clocks = <&clkc 12>;
498 compatible = "xlnx,zynq-xadc-1.00.a", "xlnx,ps7-xadc-1.00.a";
499 reg = <0xf8007100 0x20>;
500 interrupt-parent = <&ps7_scugic_0>;
501 interrupts = <0 7 4>;
502 } ;
503 } ;
504} ;
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2026-04-22 19:55:03 +0000