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authorSipke Vriend <sipke.vriend@xilinx.com>2013-04-30 15:59:32 +1000
committerSipke Vriend <sipke.vriend@xilinx.com>2013-05-02 12:57:50 +1000
commitf79f67aa40ad5416743394bc95e8a9220f927c6a (patch)
tree9f027612cc950ceba5c4833774e1017826d67231 /meta-zedboard
parent41fe4b09dfdfefd90c8945f1f02da6f45085fd2a (diff)
downloadmeta-xilinx-f79f67aa40ad5416743394bc95e8a9220f927c6a.tar.gz
Added meta-zc702 board layer.
Signed-off-by: Sipke Vriend <sipke.vriend@xilinx.com>
Diffstat (limited to 'meta-zedboard')
-rw-r--r--meta-zedboard/recipes-kernel/linux/linux-xlnx/defconfig31
-rw-r--r--meta-zedboard/recipes-kernel/linux/linux-xlnx/zedboard.dts365
2 files changed, 2 insertions, 394 deletions
diff --git a/meta-zedboard/recipes-kernel/linux/linux-xlnx/defconfig b/meta-zedboard/recipes-kernel/linux/linux-xlnx/defconfig
index 5512c11a..25723880 100644
--- a/meta-zedboard/recipes-kernel/linux/linux-xlnx/defconfig
+++ b/meta-zedboard/recipes-kernel/linux/linux-xlnx/defconfig
@@ -1,4 +1,3 @@
1#
2# Automatically generated file; DO NOT EDIT. 1# Automatically generated file; DO NOT EDIT.
3# Linux/arm 3.6.0 Kernel Configuration 2# Linux/arm 3.6.0 Kernel Configuration
4# 3#
@@ -1529,9 +1528,6 @@ CONFIG_VGA_ARB=y
1529CONFIG_VGA_ARB_MAX_GPUS=16 1528CONFIG_VGA_ARB_MAX_GPUS=16
1530# CONFIG_DRM is not set 1529# CONFIG_DRM is not set
1531# CONFIG_STUB_POULSBO is not set 1530# CONFIG_STUB_POULSBO is not set
1532CONFIG_XILINX_VIDEO_IP=y
1533CONFIG_XILINX_VDMA_WRAPPER=y
1534CONFIG_XILINX_SOBEL=y
1535# CONFIG_VGASTATE is not set 1531# CONFIG_VGASTATE is not set
1536# CONFIG_VIDEO_OUTPUT_CONTROL is not set 1532# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1537CONFIG_FB=y 1533CONFIG_FB=y
@@ -1586,7 +1582,7 @@ CONFIG_FB_CFB_IMAGEBLIT=y
1586# CONFIG_FB_CARMINE is not set 1582# CONFIG_FB_CARMINE is not set
1587# CONFIG_FB_SMSCUFX is not set 1583# CONFIG_FB_SMSCUFX is not set
1588# CONFIG_FB_UDL is not set 1584# CONFIG_FB_UDL is not set
1589CONFIG_FB_XILINX=y 1585# CONFIG_FB_XILINX is not set
1590# CONFIG_FB_VIRTUAL is not set 1586# CONFIG_FB_VIRTUAL is not set
1591# CONFIG_FB_METRONOME is not set 1587# CONFIG_FB_METRONOME is not set
1592# CONFIG_FB_MB862XX is not set 1588# CONFIG_FB_MB862XX is not set
@@ -1961,30 +1957,7 @@ CONFIG_RTC_DRV_PCF8563=y
1961# 1957#
1962# CONFIG_RTC_DRV_PL030 is not set 1958# CONFIG_RTC_DRV_PL030 is not set
1963# CONFIG_RTC_DRV_PL031 is not set 1959# CONFIG_RTC_DRV_PL031 is not set
1964CONFIG_DMADEVICES=y 1960# CONFIG_DMADEVICES is not set
1965# CONFIG_DMADEVICES_DEBUG is not set
1966
1967#
1968# DMA Devices
1969#
1970CONFIG_XILINX_DMA_ENGINES=y
1971CONFIG_XILINX_AXIDMA=y
1972# CONFIG_XILINX_DMATEST is not set
1973CONFIG_XILINX_AXIVDMA=y
1974# CONFIG_XILINX_VDMATEST is not set
1975# CONFIG_XILINX_AXICDMA is not set
1976# CONFIG_AMBA_PL08X is not set
1977# CONFIG_DW_DMAC is not set
1978# CONFIG_TIMB_DMA is not set
1979# CONFIG_PL330_DMA is not set
1980CONFIG_DMA_ENGINE=y
1981
1982#
1983# DMA Clients
1984#
1985# CONFIG_NET_DMA is not set
1986# CONFIG_ASYNC_TX_DMA is not set
1987# CONFIG_DMATEST is not set
1988# CONFIG_AUXDISPLAY is not set 1961# CONFIG_AUXDISPLAY is not set
1989CONFIG_UIO=y 1962CONFIG_UIO=y
1990# CONFIG_UIO_CIF is not set 1963# CONFIG_UIO_CIF is not set
diff --git a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zedboard.dts b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zedboard.dts
deleted file mode 100644
index bf1ea161..00000000
--- a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zedboard.dts
+++ /dev/null
@@ -1,365 +0,0 @@
1/*
2 * Device Tree Generator version: 1.1
3 *
4 * (C) Copyright 2007-2012 Xilinx, Inc.
5 * (C) Copyright 2007-2012 Michal Simek
6 * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
7 *
8 * Michal SIMEK <monstr@monstr.eu>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 *
25 * CAUTION: This file is automatically generated by libgen.
26 * Version: Xilinx EDK 14.4 EDK_P.49d
27 * Today is: Thursday, the 13 of December, 2012; 00:36:11
28 *
29 * XPS project directory: Avnet-Digilent-ZedBoard-14.4
30 */
31
32/dts-v1/;
33/ {
34 #address-cells = <1>;
35 #size-cells = <1>;
36 compatible = "xlnx,zynq-zc770";
37 model = "Avnet-Digilent-ZedBoard-14.4";
38 aliases {
39 ethernet0 = &ps7_ethernet_0;
40 serial0 = &ps7_uart_1;
41 } ;
42 chosen {
43 bootargs = "console=ttyPS0,115200 ";
44 linux,stdout-path = "/axi@0/serial@e0001000";
45 } ;
46 cpus {
47 #address-cells = <1>;
48 #cpus = <0x2>;
49 #size-cells = <0>;
50 ps7_cortexa9_0: cpu@0 {
51 clock-frequency = <666666688>;
52 compatible = "xlnx,ps7-cortexa9-1.00.a";
53 d-cache-line-size = <0x20>;
54 d-cache-size = <0x8000>;
55 device_type = "cpu";
56 i-cache-line-size = <0x20>;
57 i-cache-size = <0x8000>;
58 model = "ps7_cortexa9,1.00.a";
59 reg = <0>;
60 timebase-frequency = <333333344>;
61 xlnx,cpu-1x-clk-freq-hz = <0x69f6bca>;
62 xlnx,cpu-clk-freq-hz = <0x27bc86c0>;
63 } ;
64 ps7_cortexa9_1: cpu@1 {
65 clock-frequency = <666666688>;
66 compatible = "xlnx,ps7-cortexa9-1.00.a";
67 d-cache-line-size = <0x20>;
68 d-cache-size = <0x8000>;
69 device_type = "cpu";
70 i-cache-line-size = <0x20>;
71 i-cache-size = <0x8000>;
72 model = "ps7_cortexa9,1.00.a";
73 reg = <1>;
74 timebase-frequency = <333333344>;
75 xlnx,cpu-1x-clk-freq-hz = <0x69f6bca>;
76 xlnx,cpu-clk-freq-hz = <0x27bc86c0>;
77 } ;
78 } ;
79 ps7_ddr_0: memory@0 {
80 device_type = "memory";
81 reg = < 0x0 0x20000000 >;
82 } ;
83 ps7_axi_interconnect_0: axi@0 {
84 #address-cells = <1>;
85 #size-cells = <1>;
86 compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
87 ranges ;
88 btns_5bits: gpio@41240000 {
89 #gpio-cells = <2>;
90 compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
91 gpio-controller ;
92 reg = < 0x41240000 0x10000 >;
93 xlnx,all-inputs = <0x1>;
94 xlnx,all-inputs-2 = <0x0>;
95 xlnx,dout-default = <0x0>;
96 xlnx,dout-default-2 = <0x0>;
97 xlnx,family = "zynq";
98 xlnx,gpio-width = <0x5>;
99 xlnx,gpio2-width = <0x20>;
100 xlnx,instance = "BTNs_5Bits";
101 xlnx,interrupt-present = <0x0>;
102 xlnx,is-dual = <0x0>;
103 xlnx,tri-default = <0xffffffff>;
104 xlnx,tri-default-2 = <0xffffffff>;
105 } ;
106 leds_8bits: gpio@41220000 {
107 #gpio-cells = <2>;
108 compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
109 gpio-controller ;
110 reg = < 0x41220000 0x10000 >;
111 xlnx,all-inputs = <0x0>;
112 xlnx,all-inputs-2 = <0x0>;
113 xlnx,dout-default = <0x0>;
114 xlnx,dout-default-2 = <0x0>;
115 xlnx,family = "zynq";
116 xlnx,gpio-width = <0x8>;
117 xlnx,gpio2-width = <0x20>;
118 xlnx,instance = "LEDs_8Bits";
119 xlnx,interrupt-present = <0x0>;
120 xlnx,is-dual = <0x0>;
121 xlnx,tri-default = <0xffffffff>;
122 xlnx,tri-default-2 = <0xffffffff>;
123 } ;
124 ps7_afi_0: ps7-afi@f8008000 {
125 compatible = "xlnx,ps7-afi-1.00.a";
126 reg = < 0xf8008000 0x1000 >;
127 } ;
128 ps7_afi_1: ps7-afi@f8009000 {
129 compatible = "xlnx,ps7-afi-1.00.a";
130 reg = < 0xf8009000 0x1000 >;
131 } ;
132 ps7_afi_2: ps7-afi@f800a000 {
133 compatible = "xlnx,ps7-afi-1.00.a";
134 reg = < 0xf800a000 0x1000 >;
135 } ;
136 ps7_afi_3: ps7-afi@f800b000 {
137 compatible = "xlnx,ps7-afi-1.00.a";
138 reg = < 0xf800b000 0x1000 >;
139 } ;
140 ps7_ddrc_0: ps7-ddrc@f8006000 {
141 compatible = "xlnx,ps7-ddrc-1.00.a";
142 reg = < 0xf8006000 0x1000 >;
143 xlnx,has-ecc = <0x0>;
144 } ;
145 ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
146 compatible = "xlnx,ps7-dev-cfg-1.00.a";
147 interrupt-parent = <&ps7_scugic_0>;
148 interrupts = < 0 8 4 >;
149 reg = < 0xf8007000 0x1000 >;
150 } ;
151 ps7_dma_ns: ps7-dma@f8004000 {
152 compatible = "xlnx,ps7-dma-1.00.a", "arm,pl330";
153 interrupt-parent = <&ps7_scugic_0>;
154 interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
155 reg = < 0xf8004000 0x1000 >;
156 } ;
157 ps7_dma_s: ps7-dma@f8003000 {
158 compatible = "xlnx,ps7-dma-1.00.a", "arm,pl330";
159 interrupt-parent = <&ps7_scugic_0>;
160 interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
161 reg = < 0xf8003000 0x1000 >;
162 } ;
163 ps7_ethernet_0: ps7-ethernet@e000b000 {
164 #address-cells = <1>;
165 #size-cells = <0>;
166 compatible = "xlnx,ps7-ethernet-1.00.a";
167 interrupt-parent = <&ps7_scugic_0>;
168 interrupts = < 0 22 4 >;
169 local-mac-address = [ 00 0a 35 00 60 31 ];
170 phy-handle = <&phy0>;
171 reg = < 0xe000b000 0x1000 >;
172 xlnx,enet-clk-freq-hz = <0x7735940>;
173 xlnx,enet-reset = <0xffffffff>;
174 xlnx,enet-slcr-1000mbps-div0 = <0x8>;
175 xlnx,enet-slcr-1000mbps-div1 = <0x1>;
176 xlnx,enet-slcr-100mbps-div0 = <0x8>;
177 xlnx,enet-slcr-100mbps-div1 = <0x5>;
178 xlnx,enet-slcr-10mbps-div0 = <0x8>;
179 xlnx,enet-slcr-10mbps-div1 = <0x32>;
180 xlnx,eth-mode = <0x1>;
181 xlnx,has-mdio = <0x1>;
182 xlnx,ptp-enet-clock = <111111114>;
183 mdio {
184 #address-cells = <1>;
185 #size-cells = <0>;
186 phy0: phy@0 {
187 compatible = "marvell,88e1111";
188 device_type = "ethernet-phy";
189 reg = <0>;
190 } ;
191 } ;
192 } ;
193 ps7_gpio_0: ps7-gpio@e000a000 {
194 #gpio-cells = <2>;
195 compatible = "xlnx,ps7-gpio-1.00.a";
196 emio-gpio-width = <64>;
197 gpio-controller ;
198 gpio-mask-high = <0xc0000>;
199 gpio-mask-low = <0xfe81>;
200 interrupt-parent = <&ps7_scugic_0>;
201 interrupts = < 0 20 4 >;
202 reg = < 0xe000a000 0x1000 >;
203 } ;
204 ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
205 compatible = "xlnx,ps7-iop-bus-config-1.00.a";
206 reg = < 0xe0200000 0x1000 >;
207 } ;
208 ps7_pl310_0: ps7-pl310@f8f02000 {
209 arm,data-latency = < 3 2 2 >;
210 arm,tag-latency = < 2 2 2 >;
211 cache-level = < 2 >;
212 cache-unified ;
213 compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
214 reg = < 0xf8f02000 0x1000 >;
215 } ;
216 ps7_qspi_0: ps7-qspi@e000d000 {
217 #address-cells = <1>;
218 #size-cells = <0>;
219 bus-num = <0>;
220 compatible = "xlnx,ps7-qspi-1.00.a";
221 interrupt-parent = <&ps7_scugic_0>;
222 interrupts = < 0 19 4 >;
223 is-dual = <0>;
224 num-chip-select = <1>;
225 reg = < 0xe000d000 0x1000 >;
226 speed-hz = <200000000>;
227 xlnx,fb-clk = <0x1>;
228 xlnx,qspi-clk-freq-hz = <0xbebc200>;
229 xlnx,qspi-mode = <0x0>;
230 primary_flash: ps7-qspi@0 {
231 #address-cells = <1>;
232 #size-cells = <1>;
233 compatible = "st,m25p80";
234 reg = < 0x0 >;
235 spi-max-frequency = <50000000>;
236 partition@0x00000000 {
237 label = "boot";
238 reg = <0x00000000 0x00500000>;
239 };
240 partition@0x00500000 {
241 label = "bootenv";
242 reg = <0x00500000 0x00020000>;
243 };
244 partition@0x00520000 {
245 label = "config";
246 reg = <0x00520000 0x00020000>;
247 };
248 partition@0x00540000 {
249 label = "image";
250 reg = <0x00540000 0x00a80000>;
251 };
252 partition@0x00fc0000 {
253 label = "spare";
254 reg = <0x00fc0000 0x00000000>;
255 };
256 } ;
257 } ;
258 ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
259 compatible = "xlnx,ps7-qspi-linear-1.00.a";
260 reg = < 0xfc000000 0x1000000 >;
261 xlnx,qspi-clk-freq-hz = <0xe4e1c0>;
262 } ;
263 ps7_scugic_0: ps7-scugic@f8f01000 {
264 #address-cells = < 2 >;
265 #interrupt-cells = < 3 >;
266 #size-cells = < 1 >;
267 compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
268 interrupt-controller ;
269 linux,phandle = < 0x1 >;
270 phandle = < 0x1 >;
271 reg = < 0xf8f01000 0x1000 0xf8f00100 0x100 >;
272 } ;
273 ps7_scutimer_0: ps7-scutimer@f8f00600 {
274 clock-frequency = <333333344>;
275 compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
276 interrupt-parent = <&ps7_scugic_0>;
277 interrupts = < 1 13 769 >;
278 reg = < 0xf8f00600 0x20 >;
279 } ;
280 ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
281 clock-frequency = <333333344>;
282 compatible = "xlnx,ps7-scuwdt-1.00.a";
283 device_type = "watchdog";
284 interrupt-parent = <&ps7_scugic_0>;
285 interrupts = < 1 14 769 >;
286 reg = < 0xf8f00620 0xe0 >;
287 } ;
288 ps7_sd_0: ps7-sdio@e0100000 {
289 clock-frequency = <50000000>;
290 compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci";
291 interrupt-parent = <&ps7_scugic_0>;
292 interrupts = < 0 24 4 >;
293 reg = < 0xe0100000 0x1000 >;
294 xlnx,has-cd = <0x1>;
295 xlnx,has-power = <0x0>;
296 xlnx,has-wp = <0x1>;
297 xlnx,sdio-clk-freq-hz = <0x2faf080>;
298 } ;
299 ps7_slcr_0: ps7-slcr@f8000000 {
300 compatible = "xlnx,ps7-slcr-1.00.a";
301 reg = < 0xf8000000 0x1000 >;
302 } ;
303 ps7_ttc_0: ps7-ttc@f8001000 {
304 clock-frequency = <111111112>;
305 clock-frequency-timer0 = <111111112>;
306 clock-frequency-timer1 = <111111112>;
307 clock-frequency-timer2 = <111111112>;
308 compatible = "xlnx,ps7-ttc-1.00.a";
309 interrupt-parent = <&ps7_scugic_0>;
310 interrupts = < 0 10 4 0 11 4 0 12 4 >;
311 reg = < 0xf8001000 0x1000 >;
312 xlnx,ttc-clk0-clksrc = <0x0>;
313 xlnx,ttc-clk0-freq-hz = <0x69f6bc8>;
314 xlnx,ttc-clk1-clksrc = <0x0>;
315 xlnx,ttc-clk1-freq-hz = <0x69f6bc8>;
316 xlnx,ttc-clk2-clksrc = <0x0>;
317 xlnx,ttc-clk2-freq-hz = <0x69f6bc8>;
318 } ;
319 ps7_uart_1: serial@e0001000 {
320 clock = <50000000>;
321 clock-frequency = <50000000>;
322 compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
323 current-speed = <115200>;
324 device_type = "serial";
325 interrupt-parent = <&ps7_scugic_0>;
326 interrupts = < 0 50 4 >;
327 port-number = <0>;
328 reg = < 0xe0001000 0x1000 >;
329 xlnx,has-modem = <0x0>;
330 xlnx,uart-clk-freq-hz = <0x2faf080>;
331 } ;
332 ps7_usb_0: ps7-usb@e0002000 {
333 compatible = "xlnx,ps7-usb-1.00.a";
334 dr_mode = "otg";
335 interrupt-parent = <&ps7_scugic_0>;
336 interrupts = < 0 21 4 >;
337 phy_type = "ulpi";
338 reg = < 0xe0002000 0x1000 >;
339 xlnx,usb-reset = <0xffffffff>;
340 } ;
341 ps7_xadc: ps7_xadc@f8007100 {
342 compatible = "xlnx,ps7-xadc-1.00.a";
343 interrupts = < 0 7 4 >;
344 reg = < 0xf8007100 0x20 >;
345 } ;
346 sws_8bits: gpio@41200000 {
347 #gpio-cells = <2>;
348 compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
349 gpio-controller ;
350 reg = < 0x41200000 0x10000 >;
351 xlnx,all-inputs = <0x1>;
352 xlnx,all-inputs-2 = <0x0>;
353 xlnx,dout-default = <0x0>;
354 xlnx,dout-default-2 = <0x0>;
355 xlnx,family = "zynq";
356 xlnx,gpio-width = <0x8>;
357 xlnx,gpio2-width = <0x20>;
358 xlnx,instance = "SWs_8Bits";
359 xlnx,interrupt-present = <0x0>;
360 xlnx,is-dual = <0x0>;
361 xlnx,tri-default = <0xffffffff>;
362 xlnx,tri-default-2 = <0xffffffff>;
363 } ;
364 } ;
365} ;
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2026-07-29 19:11:36 +0000