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authorMark Hatle <mark.hatle@amd.com>2022-12-03 13:26:29 -0800
committerMark Hatle <mark.hatle@amd.com>2022-12-05 10:35:50 -0600
commit1b42c8b686cf911ff696bc42bf66b25d610a9cbe (patch)
treed7ab9cf52a61320eb38d42ed3553a86a5c6f6330 /meta-xilinx-core/dynamic-layers/openamp-layer
parentc56f1380b4b49c9a463fa73ccb03618fa1008fd6 (diff)
downloadmeta-xilinx-1b42c8b686cf911ff696bc42bf66b25d610a9cbe.tar.gz
device-tree.bbappend: Add bbappend for openamp usage
If meta-openamp is available, ENABLE_OPENAMP_DTSI is set to 1, automatically add the openamp nodes to the system-top.dts. This may not work in all configurations, but should work in most. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
Diffstat (limited to 'meta-xilinx-core/dynamic-layers/openamp-layer')
-rw-r--r--meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend28
-rw-r--r--meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-openamp.dtsi150
-rw-r--r--meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp.dtsi43
-rw-r--r--meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynqmp-openamp.dtsi93
4 files changed, 314 insertions, 0 deletions
diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend
new file mode 100644
index 00000000..b050dee6
--- /dev/null
+++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend
@@ -0,0 +1,28 @@
1FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
2
3SRC_URI = " \
4 file://zynq-openamp.dtsi \
5 file://zynqmp-openamp.dtsi \
6 file://versal-openamp.dtsi \
7"
8
9# openamp.dtsi is in the WORKDIR
10DT_INCLUDE:append = " ${WORKDIR}"
11
12do_configure:append() {
13 if ${@bb.utils.contains('DISTRO_FEATURES', 'openamp', ' true', 'false', d)} && [ "${ENABLE_OPENAMP_DTSI}" = "1" ]; then
14 if [ -e "${DT_FILES_PATH}/system-top.dts" ]; then
15 if [ -e "${WORKDIR}/${MACHINE}-openamp.dtsi" ]; then
16 sed -i '/${MACHINE}-openamp\.dtsi/d' ${DT_FILES_PATH}/system-top.dts
17 echo '/include/ "${MACHINE}-openamp.dtsi"' >> ${DT_FILES_PATH}/system-top.dts
18 elif [ -e "${WORKDIR}/${SOC_FAMILY}-openamp.dtsi" ]; then
19 sed -i '/${SOC_FAMILY}-openamp\.dtsi/d' ${DT_FILES_PATH}/system-top.dts
20 echo '/include/ "${SOC_FAMILY}-openamp.dtsi"' >> ${DT_FILES_PATH}/system-top.dts
21 else
22 bbfatal "${MACHINE}-openamp.dtsi or ${SOC_FAMILY}-openamp.dtsi file is not available. Cannot automatically add to system-top.dts."
23 fi
24 else
25 bbfatal "system-top.dts not found in this configuration, cannot automatically add OpenAmp device tree nodes (openamp.dtsi)"
26 fi
27 fi
28}
diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-openamp.dtsi b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-openamp.dtsi
new file mode 100644
index 00000000..01e337c7
--- /dev/null
+++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-openamp.dtsi
@@ -0,0 +1,150 @@
1/*
2 * SPDX-License-Identifier: MIT
3 *
4 * dts file for Versal OpenAMP
5 *
6 * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved.
7 *
8 */
9
10&{/} {
11 reserved-memory {
12 #address-cells = <2>;
13 #size-cells = <2>;
14 ranges;
15 rproc_0_reserved: rproc@3ed00000 {
16 no-map;
17 reg = <0x0 0x3ed00000 0x0 0x40000>;
18 };
19 rpu0vdev0vring0: rpu0vdev0vring0@3ed40000 {
20 no-map;
21 reg = <0x0 0x3ed40000 0x0 0x4000>;
22 };
23 rpu0vdev0vring1: rpu0vdev0vring1@3ed44000 {
24 no-map;
25 reg = <0x0 0x3ed44000 0x0 0x4000>;
26 };
27 rpu0vdev0buffer: rpu0vdev0buffer@3ed48000 {
28 no-map;
29 reg = <0x0 0x3ed48000 0x0 0x100000>;
30 };
31 rproc_1_reserved: rproc@3ef00000 {
32 no-map;
33 reg = <0x0 0x3ef00000 0x0 0x40000>;
34 };
35 rpu1vdev0vring0: rpu1vdev0vring0@3ef40000 {
36 no-map;
37 reg = <0x0 0x3ef40000 0x0 0x4000>;
38 };
39 rpu1vdev0vring1: rpu1vdev0vring1@3ef44000 {
40 no-map;
41 reg = <0x0 0x3ef44000 0x0 0x4000>;
42 };
43 rpu1vdev0buffer: rpu1vdev0buffer@3ef48000 {
44 no-map;
45 compatible = "shared-dma-pool";
46 reg = <0x0 0x3ef48000 0x0 0x100000>;
47 };
48 };
49
50 tcm_0a: tcm_0a@ffe00000 {
51 no-map;
52 reg = <0x0 0xffe00000 0x0 0x10000>;
53 status = "okay";
54 compatible = "mmio-sram";
55 power-domain = <&versal_firmware 0x1831800b>;
56 };
57
58 tcm_0b: tcm_0b@ffe20000 {
59 no-map;
60 reg = <0x0 0xffe20000 0x0 0x10000>;
61 status = "okay";
62 compatible = "mmio-sram";
63 power-domain = <&versal_firmware 0x1831800c>;
64 };
65
66 tcm_1a: tcm_1a@ffe90000 {
67 no-map;
68 reg = <0x0 0xffe90000 0x0 0x10000>;
69 status = "okay";
70 compatible = "mmio-sram";
71 power-domain = <&versal_firmware 0x1831800d>;
72 };
73
74 tcm_1b: tcm_1b@ffeb0000 {
75 no-map;
76 reg = <0x0 0xffeb0000 0x0 0x10000>;
77 status = "okay";
78 compatible = "mmio-sram";
79 power-domain = <&versal_firmware 0x1831800e>;
80 };
81
82 rf5ss@ff9a0000 {
83 compatible = "xlnx,zynqmp-r5-remoteproc";
84 #address-cells = <0x2>;
85 #size-cells = <0x2>;
86 ranges;
87 xlnx,cluster-mode = <1>;
88 reg = <0x0 0xff9a0000 0x0 0x10000>;
89
90 r5f_0 {
91 compatible = "xilinx,r5f";
92 #address-cells = <0x2>;
93 #size-cells = <0x2>;
94 ranges;
95 sram = <&tcm_0a>, <&tcm_0b>;
96 memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
97 power-domain = <&versal_firmware 0x18110005>;
98 mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
99 mbox-names = "tx", "rx";
100 };
101 r5f_1 {
102 compatible = "xilinx,r5f";
103 #address-cells = <0x2>;
104 #size-cells = <0x2>;
105 ranges;
106 sram = <&tcm_1a>, <&tcm_1b>;
107 memory-region = <&rproc_1_reserved>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
108 power-domain = <&versal_firmware 0x18110006>;
109 mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
110 mbox-names = "tx", "rx";
111 };
112 };
113
114 zynqmp_ipi1 {
115 compatible = "xlnx,zynqmp-ipi-mailbox";
116 interrupt-parent = <&gic>;
117 interrupts = <0 33 4>;
118 xlnx,ipi-id = <5>;
119 #address-cells = <1>;
120 #size-cells = <1>;
121 ranges;
122
123 /* APU<->RPU0 IPI mailbox controller */
124 ipi_mailbox_rpu0: mailbox@ff990600 {
125 reg = <0xff3f0ac0 0x20>,
126 <0xff3f0ae0 0x20>,
127 <0xff3f0740 0x20>,
128 <0xff3f0760 0x20>;
129 reg-names = "local_request_region",
130 "local_response_region",
131 "remote_request_region",
132 "remote_response_region";
133 #mbox-cells = <1>;
134 xlnx,ipi-id = <3>;
135 };
136 /* APU<->RPU1 IPI mailbox controller */
137 ipi_mailbox_rpu1: mailbox@ff990640 {
138 reg = <0xff3f0b00 0x20>,
139 <0xff3f0b20 0x20>,
140 <0xff3f0940 0x20>,
141 <0xff3f0960 0x20>;
142 reg-names = "local_request_region",
143 "local_response_region",
144 "remote_request_region",
145 "remote_response_region";
146 #mbox-cells = <1>;
147 xlnx,ipi-id = <4>;
148 };
149 };
150};
diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp.dtsi b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp.dtsi
new file mode 100644
index 00000000..0e822202
--- /dev/null
+++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp.dtsi
@@ -0,0 +1,43 @@
1/*
2 * SPDX-License-Identifier: MIT
3 *
4 * dts file for Zynq OpenAMP
5 *
6 * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved.
7 *
8 */
9
10&{/} {
11 reserved-memory {
12 #address-cells = <1>;
13 #size-cells = <1>;
14 ranges;
15 vdev0vring0: vdev0vring0@3e800000 {
16 no-map;
17 compatible = "shared-dma-pool";
18 reg = <0x3e800000 0x4000>;
19 };
20 vdev0vring1: vdev0vring1@3e804000 {
21 no-map;
22 compatible = "shared-dma-pool";
23 reg = <0x3e804000 0x4000>;
24 };
25 vdev0buffer: vdev0buffer@3e808000 {
26 no-map;
27 compatible = "shared-dma-pool";
28 reg = <0x3e808000 0x100000>;
29 };
30 rproc_0_reserved: rproc@3e000000 {
31 no-map;
32 compatible = "shared-dma-pool";
33 reg = <0x3e000000 0x800000>;
34 };
35 };
36
37 remoteproc0: remoteproc@0 {
38 compatible = "xlnx,zynq_remoteproc";
39 firmware = "firmware";
40 memory-region = <&rproc_0_reserved>, <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>;
41 interrupt-parent = <&intc>;
42 };
43};
diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynqmp-openamp.dtsi b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynqmp-openamp.dtsi
new file mode 100644
index 00000000..c8a60d81
--- /dev/null
+++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynqmp-openamp.dtsi
@@ -0,0 +1,93 @@
1/*
2 * SPDX-License-Identifier: MIT
3 *
4 * dts file for ZynqMP OpenAMP
5 *
6 * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved.
7 *
8 */
9
10&{/} {
11 reserved-memory {
12 #address-cells = <2>;
13 #size-cells = <2>;
14 ranges;
15 rpu0vdev0vring0: rpu0vdev0vring0@3ed40000 {
16 no-map;
17 reg = <0x0 0x3ed40000 0x0 0x4000>;
18 };
19 rpu0vdev0vring1: rpu0vdev0vring1@3ed44000 {
20 no-map;
21 reg = <0x0 0x3ed44000 0x0 0x4000>;
22 };
23 rpu0vdev0buffer: rpu0vdev0buffer@3ed48000 {
24 no-map;
25 reg = <0x0 0x3ed48000 0x0 0x100000>;
26 };
27 rproc_0_reserved: rproc@3ed00000 {
28 no-map;
29 reg = <0x0 0x3ed00000 0x0 0x40000>;
30 };
31 };
32
33 tcm_0a: tcm_0a@ffe00000 {
34 no-map;
35 reg = <0x0 0xffe00000 0x0 0x10000>;
36 status = "okay";
37 compatible = "mmio-sram";
38 power-domain = <&zynqmp_firmware 15>;
39 };
40
41 tcm_0b: tcm_0b@ffe20000 {
42 no-map;
43 reg = <0x0 0xffe20000 0x0 0x10000>;
44 status = "okay";
45 compatible = "mmio-sram";
46 power-domain = <&zynqmp_firmware 16>;
47 };
48
49 rf5ss@ff9a0000 {
50 compatible = "xlnx,zynqmp-r5-remoteproc";
51 xlnx,cluster-mode = <1>;
52 ranges;
53 reg = <0x0 0xFF9A0000 0x0 0x10000>;
54 #address-cells = <0x2>;
55 #size-cells = <0x2>;
56
57 r5f_0: r5f@0 {
58 compatible = "xilinx,r5f";
59 #address-cells = <2>;
60 #size-cells = <2>;
61 ranges;
62 sram = <&tcm_0a>, <&tcm_0b>;
63 memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
64 power-domain = <&zynqmp_firmware 7>;
65 mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
66 mbox-names = "tx", "rx";
67 };
68 };
69
70 zynqmp_ipi1 {
71 compatible = "xlnx,zynqmp-ipi-mailbox";
72 interrupt-parent = <&gic>;
73 interrupts = <0 29 4>;
74 xlnx,ipi-id = <7>;
75 #address-cells = <1>;
76 #size-cells = <1>;
77 ranges;
78
79 /* APU<->RPU0 IPI mailbox controller */
80 ipi_mailbox_rpu0: mailbox@ff990600 {
81 reg = <0xff990600 0x20>,
82 <0xff990620 0x20>,
83 <0xff9900c0 0x20>,
84 <0xff9900e0 0x20>;
85 reg-names = "local_request_region",
86 "local_response_region",
87 "remote_request_region",
88 "remote_response_region";
89 #mbox-cells = <1>;
90 xlnx,ipi-id = <1>;
91 };
92 };
93};
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2026-04-22 17:35:01 +0000