meta-microblaze: Update to current binutils

Latest binutils contains everything we need to Linux support.

Signed-off-by: Mark Hatle <mark.hatle@amd.com>

35 files changed, 0 insertions, 9989 deletions

diff --git a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
index 5e85eedc..3701d245 100644
--- a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
+++ b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
@@ -1,41 +1,4 @@
 FILESEXTRAPATHS:append := ":${THISDIR}/binutils"
 
-SRC_URI:append = " \
-     file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
-     file://0002-Add-mlittle-endian-and-mbig-endian-flags.patch \
-     file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \
-     file://0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch \
-     file://0005-upstream-change-to-garbage-collection-sweep-causes-m.patch \
-     file://0006-Fix-bug-in-TLSTPREL-Relocation.patch \
-     file://0007-Added-Address-extension-instructions.patch \
-     file://0008-Add-new-bit-field-instructions.patch \
-     file://0009-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \
-     file://0010-fixing-the-constant-range-check-issue.patch \
-     file://0011-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \
-     file://0012-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch \
-     file://0013-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
-     file://0014-Added-relocations-for-MB-X.patch \
-     file://0015-Fixed-MB-x-relocation-issues.patch \
-     file://0016-Fixing-the-branch-related-issues.patch \
-     file://0017-Fixed-address-computation-issues-with-64bit-address.patch \
-     file://0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch \
-     file://0019-fixing-the-.bss-relocation-issue.patch \
-     file://0020-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \
-     file://0021-Revert-ld-Remove-unused-expression-state.patch \
-     file://0022-fixing-the-long-long-long-mingw-toolchain-issue.patch \
-     file://0023-Added-support-to-new-arithmetic-single-register-inst.patch \
-     file://0024-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
-     file://0025-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \
-     file://0026-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch \
-     file://0027-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch \
-     file://0028-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch \
-     file://0029-gas-revert-moving-of-md_pseudo_table-from-const.patch \
-     file://0030-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch \
-     file://0031-Patch-MicroBlaze-Invalid-data-offsets-pointer-after-.patch \
-     file://0032-Patch-MicroBlaze-Double-free-with-ld-no-keep-memory.patch \
-     file://0033-Patch-MB-MB-binutils-Upstream-port-issues.patch \
-     file://0034-Patch-MicroBlaze-By-default-the-linker-will-generate.patch \
-     "
-
 LDGOLD_ALTS:microblaze = ""
 USE_ALTERNATIVES_FOR:remove:microblaze = "gprof"
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
deleted file mode 100644
index f026e828..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 38ae9c3ae1270b9873e1cfa4397bae4a5269d1aa Mon Sep 17 00:00:00 2001
-From: David Holsgrove <david.holsgrove@xilinx.com>
-Date: Wed, 8 May 2013 11:03:36 +1000
-Subject: [PATCH 01/34] Add wdc.ext.clear and wdc.ext.flush insns
-
-Added two new instructions, wdc.ext.clear and wdc.ext.flush,
-to enable MicroBlaze to flush an external cache, which is
-used with the new coherency support for multiprocessing.
-
-Upstream-Status: Pending
-
-Signed-off-by:nagaraju <nmekala@xilix.com>
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
----
- opcodes/microblaze-opc.h  | 5 ++++-
- opcodes/microblaze-opcm.h | 4 ++--
- 2 files changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index ffb0f08c692..b8a0cf82516 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -91,6 +91,7 @@
- #define OPCODE_MASK_H3  0xFC000600  /* High 6 bits and bits 21, 22.  */
- #define OPCODE_MASK_H32 0xFC00FC00  /* High 6 bits and bit 16-21.  */
- #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits.  */
-+#define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits.  */
- #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26.  */
- 
- /* New Mask for msrset, msrclr insns.  */
-@@ -101,7 +102,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
- 
--#define MAX_OPCODES 289
-+#define MAX_OPCODES 291
- 
- const struct op_code_struct
- {
-@@ -174,7 +175,9 @@ const struct op_code_struct
-   {"wic",   INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000068, OPCODE_MASK_H34B, wic, special_inst },
-   {"wdc",   INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000064, OPCODE_MASK_H34B, wdc, special_inst },
-   {"wdc.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000066, OPCODE_MASK_H34B, wdcclear, special_inst },
-+  {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
-   {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
-+  {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst },
-   {"mts",   INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst },
-   {"mfs",   INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
-   {"br",    INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 8e293465fec..e56c1d2d47c 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
-@@ -33,8 +33,8 @@ enum microblaze_instr
-   /* 'or/and/xor' are C++ keywords.  */
-   microblaze_or, microblaze_and, microblaze_xor,
-   andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,
--  wic, wdc, wdcclear, wdcflush, mts, mfs, mbar, br, brd,
--  brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt,
-+  wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar, br,
-+  brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt,
-   bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
-   imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
-   brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch
deleted file mode 100644
index 0b1236aa..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From d5645c82ce39b1950a6d0ee279088d10af390642 Mon Sep 17 00:00:00 2001
-From: nagaraju <nmekala@xilix.com>
-Date: Tue, 19 Mar 2013 17:18:23 +0530
-Subject: [PATCH 02/34] Add mlittle-endian and mbig-endian flags
-
-Added support in gas for mlittle-endian and mbig-endian flags
-as options.
-
-Updated show usage for MicroBlaze specific assembler options
-to include new entries.
-
-Upstream-Status: Pending
-
-Signed-off-by:nagaraju <nmekala@xilix.com>
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
----
- gas/config/tc-microblaze.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 3db17a76ee7..c927331ea0a 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -37,6 +37,8 @@
- 
- #define OPTION_EB (OPTION_MD_BASE + 0)
- #define OPTION_EL (OPTION_MD_BASE + 1)
-+#define OPTION_LITTLE (OPTION_MD_BASE + 2)
-+#define OPTION_BIG (OPTION_MD_BASE + 3)
- 
- void microblaze_generate_symbol (char *sym);
- static bool check_spl_reg (unsigned *);
-@@ -1854,6 +1856,8 @@ struct option md_longopts[] =
- {
-   {"EB", no_argument, NULL, OPTION_EB},
-   {"EL", no_argument, NULL, OPTION_EL},
-+  {"mlittle-endian", no_argument, NULL, OPTION_LITTLE},
-+  {"mbig-endian", no_argument, NULL, OPTION_BIG},
-   { NULL,          no_argument, NULL, 0}
- };
- 
-@@ -2507,9 +2511,11 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
-   switch (c)
-     {
-     case OPTION_EB:
-+    case OPTION_BIG:
-       target_big_endian = 1;
-       break;
-     case OPTION_EL:
-+    case OPTION_LITTLE:
-       target_big_endian = 0;
-       break;
-     default:
-@@ -2524,6 +2530,9 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
-   /*  fprintf(stream, _("\
-       MicroBlaze options:\n\
-       -noSmall         Data in the comm and data sections do not go into the small data section\n")); */
-+  fprintf (stream, _(" MicroBlaze specific assembler options:\n"));
-+  fprintf (stream, "  -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu"));
-+  fprintf (stream, "  -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu"));
- }
- 
- 
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
deleted file mode 100644
index 1c24a3d4..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 6f53d25f9817f4d9fbc8d838b36d7026d184e63f Mon Sep 17 00:00:00 2001
-From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
-Date: Fri, 22 Jun 2012 01:20:20 +0200
-Subject: [PATCH 03/34] Disable the warning message for eh_frame_hdr
-
-Upstream-Status: Pending
-
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-
-Conflicts:
-        bfd/elf-eh-frame.c
----
- bfd/elf-eh-frame.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
-index 2e22d0c9215..db470ed43c3 100644
---- a/bfd/elf-eh-frame.c
-+++ b/bfd/elf-eh-frame.c
-@@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info,
-   goto success;
- 
-  free_no_table:
-+/* FIXME: Remove the microblaze specifics when relaxing gets fixed.  */
-+if (bfd_get_arch(abfd) != bfd_arch_microblaze) {
-   _bfd_error_handler
-     /* xgettext:c-format */
-     (_("error in %pB(%pA); no .eh_frame_hdr table will be created"),
-      abfd, sec);
-+}
-   hdr_info->u.dwarf.table = false;
-   free (sec_info);
-  success:
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch
deleted file mode 100644
index d645db9f..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch
+++ /dev/null
@@ -1,312 +0,0 @@
-From f7c540994e73e430e73d220109e911dff5961f16 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 8 Nov 2016 11:54:08 +0530
-Subject: [PATCH 04/34] [LOCAL]: Fix relaxation of assembler resolved
- references,Fixup debug_loc sections after linker relaxation Adds a new
- reloctype R_MICROBLAZE_32_NONE, used for passing reloc info from the
- assembler to the linker when the linker manages to fully resolve a local
- symbol reference.
-
-This is a workaround for design flaws in the assembler to
-linker interface with regards to linker relaxation.
-
-Upstream-Status: Pending
-
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
-
-Conflicts:
-        bfd/elf32-microblaze.c
-        binutils/readelf.c
-        include/elf/microblaze.h
-
-Conflicts:
-        binutils/readelf.c
-
-Conflicts:
-        bfd/elf32-microblaze.c
----
- bfd/bfd-in2.h              |   5 ++
- bfd/elf32-microblaze.c     | 126 ++++++++++++++++++++++++++++---------
- bfd/libbfd.h               |   1 +
- bfd/reloc.c                |   6 ++
- binutils/readelf.c         |   4 ++
- gas/config/tc-microblaze.c |   4 ++
- include/elf/microblaze.h   |   2 +
- 7 files changed, 119 insertions(+), 29 deletions(-)
-
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 1f0f18a7e75..26e3bb2b34b 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5379,6 +5379,11 @@ value relative to the read-write small data area anchor  */
- expressions of the form "Symbol Op Symbol"  */
-   BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
- 
-+/* This is a 32 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imm instruction).No relocation is 
-+done here - only used for relaxing  */
-+  BFD_RELOC_MICROBLAZE_32_NONE,
-+
- /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  No relocation is
- done here - only used for relaxing  */
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 013c32a1e51..7cf1b6eab5b 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -175,6 +175,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
-          false),               /* PC relative offset?  */
- 
-    /* This reloc does nothing. Used for relaxation.  */
-+   HOWTO (R_MICROBLAZE_32_NONE,        /* Type.  */
-+          0,                   /* Rightshift.  */
-+          2,                   /* Size (0 = byte, 1 = short, 2 = long).  */
-+          32,                  /* Bitsize.  */
-+          true,                        /* PC_relative.  */
-+          0,                   /* Bitpos.  */
-+          complain_overflow_bitfield,  /* Complain on overflow.  */
-+          NULL,                  /* Special Function.  */
-+          "R_MICROBLAZE_32_NONE",/* Name.  */
-+          false,               /* Partial Inplace.  */
-+          0,                   /* Source Mask.  */
-+          0,                   /* Dest Mask.  */
-+          false),              /* PC relative offset?  */
-+
-    HOWTO (R_MICROBLAZE_64_NONE,        /* Type.  */
-          0,                    /* Rightshift.  */
-          0,                    /* Size.  */
-@@ -560,7 +574,10 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
-     case BFD_RELOC_NONE:
-       microblaze_reloc = R_MICROBLAZE_NONE;
-       break;
--    case BFD_RELOC_MICROBLAZE_64_NONE:
-+    case BFD_RELOC_MICROBLAZE_32_NONE:
-+      microblaze_reloc = R_MICROBLAZE_32_NONE;
-+      break;
-+     case BFD_RELOC_MICROBLAZE_64_NONE:
-       microblaze_reloc = R_MICROBLAZE_64_NONE;
-       break;
-     case BFD_RELOC_32:
-@@ -1954,18 +1971,26 @@ microblaze_elf_relax_section (bfd *abfd,
-                }
-              break;
-            case R_MICROBLAZE_NONE:
-+           case R_MICROBLAZE_32_NONE:
-              {
-                /* This was a PC-relative instruction that was
-                   completely resolved.  */
-                size_t sfix, efix;
-+                unsigned int val;
-                bfd_vma target_address;
-                target_address = irel->r_addend + irel->r_offset;
-                sfix = calc_fixup (irel->r_offset, 0, sec);
-                efix = calc_fixup (target_address, 0, sec);
--               irel->r_addend -= (efix - sfix);
--               /* Should use HOWTO.  */
--               microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
--                                                  irel->r_addend);
-+
-+                /* Validate the in-band val.  */
-+                val = bfd_get_32 (abfd, contents + irel->r_offset);
-+                if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
-+                    fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
-+                }
-+               irel->r_addend -= (efix - sfix);
-+               /* Should use HOWTO.  */
-+               microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
-+                                                  irel->r_addend);
-              }
-              break;
-            case R_MICROBLAZE_64_NONE:
-@@ -2009,30 +2034,73 @@ microblaze_elf_relax_section (bfd *abfd,
-          irelscanend = irelocs + o->reloc_count;
-          for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
-            {
--             if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
--               {
--                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+              if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
-+                {
-+                  unsigned int val;
-+
-+                  isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+
-+                  /* hax: We only do the following fixup for debug location lists.  */
-+                  if (strcmp(".debug_loc", o->name))
-+                    continue;
-+
-+                  /* This was a PC-relative instruction that was completely resolved.  */
-+                  if (ocontents == NULL)
-+                    {
-+                     if (elf_section_data (o)->this_hdr.contents != NULL)
-+                         ocontents = elf_section_data (o)->this_hdr.contents;
-+                     else
-+                       {
-+                         /* We always cache the section contents.
-+                            Perhaps, if info->keep_memory is FALSE, we
-+                            should free them, if we are permitted to.  */
-+
-+                         if (o->rawsize == 0)
-+                             o->rawsize = o->size;
-+                         ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+                         if (ocontents == NULL)
-+                             goto error_return;
-+                         if (!bfd_get_section_contents (abfd, o, ocontents,
-+                                                         (file_ptr) 0,
-+                                                         o->rawsize))
-+                              goto error_return;
-+                         elf_section_data (o)->this_hdr.contents = ocontents;
-+                       }
-+                   }
- 
--                 /* Look at the reloc only if the value has been resolved.  */
--                 if (isym->st_shndx == shndx
--                     && (ELF32_ST_TYPE (isym->st_info) == STT_SECTION))
--                   {
--                     if (ocontents == NULL)
--                       {
--                         if (elf_section_data (o)->this_hdr.contents != NULL)
--                           ocontents = elf_section_data (o)->this_hdr.contents;
--                         else
--                           {
--                             /* We always cache the section contents.
--                                Perhaps, if info->keep_memory is FALSE, we
--                                should free them, if we are permitted to.  */
--                             if (o->rawsize == 0)
--                               o->rawsize = o->size;
--                             ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
--                             if (ocontents == NULL)
--                               goto error_return;
--                             if (!bfd_get_section_contents (abfd, o, ocontents,
--                                                            (file_ptr) 0,
-+                  val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
-+                  if (val != irelscan->r_addend) {
-+                       fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
-+                  }
-+
-+                  irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
-+                  microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
-+                                                     irelscan->r_addend);
-+              }
-+              if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-+                {
-+                 isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+
-+                  /* Look at the reloc only if the value has been resolved.  */
-+                  if (isym->st_shndx == shndx
-+                      && (ELF32_ST_TYPE (isym->st_info) == STT_SECTION))
-+                    {
-+                      if (ocontents == NULL)
-+                        {
-+                          if (elf_section_data (o)->this_hdr.contents != NULL)
-+                            ocontents = elf_section_data (o)->this_hdr.contents;
-+                          else
-+                            {
-+                              /* We always cache the section contents.
-+                                 Perhaps, if info->keep_memory is FALSE, we
-+                                 should free them, if we are permitted to.  */
-+                             if (o->rawsize == 0)
-+                               o->rawsize = o->size;
-+                              ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+                              if (ocontents == NULL)
-+                                goto error_return;
-+                              if (!bfd_get_section_contents (abfd, o, ocontents,
-+                                                             (file_ptr) 0,
-                                                             o->rawsize))
-                                goto error_return;
-                              elf_section_data (o)->this_hdr.contents = ocontents;
-@@ -2068,7 +2136,7 @@ microblaze_elf_relax_section (bfd *abfd,
-                              elf_section_data (o)->this_hdr.contents = ocontents;
-                            }
-                        }
--                     irelscan->r_addend -= calc_fixup (irel->r_addend
-+                     irelscan->r_addend -= calc_fixup (irelscan->r_addend
-                                                        + isym->st_value,
-                                                        0,
-                                                        sec);
-diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index 29e8187f95f..ea2507d1879 100644
---- a/bfd/libbfd.h
-+++ b/bfd/libbfd.h
-@@ -2989,6 +2989,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
-   "BFD_RELOC_MICROBLAZE_32_ROSDA",
-   "BFD_RELOC_MICROBLAZE_32_RWSDA",
-   "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
-+  "BFD_RELOC_MICROBLAZE_32_NONE",
-   "BFD_RELOC_MICROBLAZE_64_NONE",
-   "BFD_RELOC_MICROBLAZE_64_GOTPC",
-   "BFD_RELOC_MICROBLAZE_64_GOT",
-diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 36999fe9a40..5ac8a8536a7 100644
---- a/bfd/reloc.c
-+++ b/bfd/reloc.c
-@@ -6867,6 +6867,12 @@ ENUM
- ENUMDOC
-   This is a 32 bit reloc for the microblaze to handle
-   expressions of the form "Symbol Op Symbol"
-+ENUM
-+  BFD_RELOC_MICROBLAZE_32_NONE
-+ENUMDOC
-+  This is a 32 bit reloc that stores the 32 bit pc relative
-+  value in two words (with an imm instruction).  No relocation is
-+  done here - only used for relaxing
- ENUM
-   BFD_RELOC_MICROBLAZE_64_NONE
- ENUMDOC
-diff --git a/binutils/readelf.c b/binutils/readelf.c
-index 0f5977bc072..acd12713361 100644
---- a/binutils/readelf.c
-+++ b/binutils/readelf.c
-@@ -14621,6 +14621,10 @@ is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
-       return reloc_type == 1;  /* R_Z80_8.  */
-     default:
-       return false;
-+    case EM_MICROBLAZE:
-+      return reloc_type == 33 /* R_MICROBLAZE_32_NONE.  */
-+             || reloc_type == 0 /* R_MICROBLAZE_NONE.  */
-+             || reloc_type == 9; /* R_MICROBLAZE_64_NONE.  */
-     }
- }
- 
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index c927331ea0a..8018d1f5686 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2211,9 +2211,12 @@ md_apply_fix (fixS *   fixP,
-         moves code around due to relaxing.  */
-       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
-+      else if (fixP->fx_r_type == BFD_RELOC_32)
-+       fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-       else
-        fixP->fx_r_type = BFD_RELOC_NONE;
-       fixP->fx_addsy = section_symbol (absolute_section);
-+      fixP->fx_done = 0;
-     }
-   return;
- }
-@@ -2434,6 +2437,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
-   switch (fixp->fx_r_type)
-     {
-     case BFD_RELOC_NONE:
-+    case BFD_RELOC_MICROBLAZE_32_NONE:
-     case BFD_RELOC_MICROBLAZE_64_NONE:
-     case BFD_RELOC_32:
-     case BFD_RELOC_MICROBLAZE_32_LO:
-diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 43ad3ad3904..a2e1ce4580f 100644
---- a/include/elf/microblaze.h
-+++ b/include/elf/microblaze.h
-@@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
-   RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30)  /* PC-relative TEXT offset.  */
-   RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31)    /* TEXT Entry offset 64-bit.  */
-   RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit.  */
-+  RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
-+   
- END_RELOC_NUMBERS (R_MICROBLAZE_max)
- 
- /* Global base address names.  */
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
deleted file mode 100644
index 55fcf92a..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 5f27701e5c8bd1784e1c814fb527a1f8f7755ad9 Mon Sep 17 00:00:00 2001
-From: David Holsgrove <david.holsgrove@xilinx.com>
-Date: Wed, 27 Feb 2013 13:56:11 +1000
-Subject: [PATCH 05/34] upstream change to garbage collection sweep causes mb
- regression
-
-Upstream change for PR13177 now clears the def_regular during gc_sweep of a
-section. (All other archs in binutils/bfd/elf32-*.c received an update
-to a warning about unresolvable relocations - this warning is not present
-in binutils/bfd/elf32-microblaze.c, but this warning check would not
-prevent the error being seen)
-
-The visible issue with this change is when running a c++ application
-in Petalinux which links libstdc++.so for exception handling it segfaults
-on execution.
-
-This does not occur if static linking libstdc++.a, so its during the
-relocations for a shared lib with garbage collection this occurs
-
-Upstream-Status: Pending
-
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
-
-Conflicts:
-        bfd/elflink.c
----
- bfd/elflink.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/bfd/elflink.c b/bfd/elflink.c
-index 2b1450fa4e1..c50919060b3 100644
---- a/bfd/elflink.c
-+++ b/bfd/elflink.c
-@@ -6576,7 +6576,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
- 
-       inf = (struct elf_gc_sweep_symbol_info *) data;
-       (*inf->hide_symbol) (inf->info, h, true);
--      h->def_regular = 0;
-       h->ref_regular = 0;
-       h->ref_regular_nonweak = 0;
-     }
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch
deleted file mode 100644
index 827b5a41..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 63c56c953483dd62a2c2ac8e750947a4673f9e86 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Mon, 15 Jun 2015 16:50:30 +0530
-Subject: [PATCH 06/34] Fix bug in TLSTPREL Relocation
-
-Fixed the problem related to the fixup/relocations TLSTPREL.
-When the fixup is applied the addend is not added at the correct offset
-of the instruction. The offset is hard coded considering its big endian
-and it fails for Little endian. This patch allows support for both
-big & little-endian compilers
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/elf32-microblaze.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 7cf1b6eab5b..edde04bafe4 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1484,9 +1484,9 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-              relocation += addend;
-              relocation -= dtprel_base(info);
-              bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
--                         contents + offset + 2);
-+                         contents + offset + endian);
-              bfd_put_16 (input_bfd, relocation & 0xffff,
--                         contents + offset + 2 + INST_WORD_SIZE);
-+                         contents + offset + endian + INST_WORD_SIZE);
-              break;
-            case (int) R_MICROBLAZE_TEXTREL_64:
-            case (int) R_MICROBLAZE_TEXTREL_32_LO:
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch
deleted file mode 100644
index d33a64e1..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From 7e1cbc2f96a1905eecf3a211153735ed915a5ad5 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Mon, 18 Jan 2016 12:28:21 +0530
-Subject: [PATCH 07/34] Added Address extension instructions
-
-This patch adds the support of new instructions which are required
-for supporting Address extension feature.
-
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
-
-ChangeLog:
-  2016-01-18 Nagaraju Mekala <nmekala@xilix.com>
-
-  *microblaze-opc.h (op_code_struct): Update
-     Added new instructions
-  *microblaze-opcm.h (microblaze_instr): Update
-     Added new instructions
-
-Conflicts:
-        opcodes/microblaze-opcm.h
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- opcodes/microblaze-opc.h  | 11 +++++++++++
- opcodes/microblaze-opcm.h | 10 +++++-----
- 2 files changed, 16 insertions(+), 5 deletions(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index b8a0cf82516..d3f8e36199e 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -178,8 +178,11 @@ const struct op_code_struct
-   {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
-   {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
-   {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst },
-+  {"wdc.clear.ea", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E6, OPCODE_MASK_H34B, wdcclearea, special_inst },
-   {"mts",   INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst },
-+  {"mtse",  INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9500C000, OPCODE_MASK_H13S, mtse,special_inst },
-   {"mfs",   INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
-+  {"mfse",  INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94088000, OPCODE_MASK_H23S, mfse, special_inst },
-   {"br",    INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
-   {"brd",   INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98100000, OPCODE_MASK_H124, brd, branch_inst },
-   {"brld",  INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98140000, OPCODE_MASK_H24, brld, branch_inst },
-@@ -229,18 +232,24 @@ const struct op_code_struct
-   {"bgeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBEA00000, OPCODE_MASK_H1, bgeid, branch_inst },
-   {"lbu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000000, OPCODE_MASK_H4, lbu, memory_load_inst },
-   {"lbur",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000200, OPCODE_MASK_H4, lbur, memory_load_inst },
-+  {"lbuea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000080, OPCODE_MASK_H4, lbuea, memory_load_inst },
-   {"lhu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000000, OPCODE_MASK_H4, lhu, memory_load_inst },
-   {"lhur",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000200, OPCODE_MASK_H4, lhur, memory_load_inst },
-+  {"lhuea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000080, OPCODE_MASK_H4, lhuea, memory_load_inst },
-   {"lw",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000000, OPCODE_MASK_H4, lw, memory_load_inst },
-   {"lwr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000200, OPCODE_MASK_H4, lwr, memory_load_inst },
-   {"lwx",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000400, OPCODE_MASK_H4, lwx, memory_load_inst },
-+  {"lwea",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000080, OPCODE_MASK_H4, lwea, memory_load_inst },
-   {"sb",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000000, OPCODE_MASK_H4, sb, memory_store_inst },
-   {"sbr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000200, OPCODE_MASK_H4, sbr, memory_store_inst },
-+  {"sbea",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000080, OPCODE_MASK_H4, sbea, memory_store_inst },
-   {"sh",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000000, OPCODE_MASK_H4, sh, memory_store_inst },
-   {"shr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000200, OPCODE_MASK_H4, shr, memory_store_inst },
-+  {"shea",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000080, OPCODE_MASK_H4, shea, memory_store_inst },
-   {"sw",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000000, OPCODE_MASK_H4, sw, memory_store_inst },
-   {"swr",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000200, OPCODE_MASK_H4, swr, memory_store_inst },
-   {"swx",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000400, OPCODE_MASK_H4, swx, memory_store_inst },
-+  {"swea",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000080, OPCODE_MASK_H4, swea, memory_store_inst },
-   {"lbui",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE0000000, OPCODE_MASK_H, lbui, memory_load_inst },
-   {"lhui",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE4000000, OPCODE_MASK_H, lhui, memory_load_inst },
-   {"lwi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, lwi, memory_load_inst },
-@@ -405,6 +414,8 @@ const struct op_code_struct
-   {"clz",       INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34,  clz,       special_inst },
-   {"mbar",      INST_TYPE_IMM5,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN,   mbar,      special_inst },
-   {"sleep",     INST_TYPE_NONE,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN,   invalid_inst, special_inst }, /* translates to mbar 16.  */
-+  {"hibernate", INST_TYPE_NONE,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB9020004, OPCODE_MASK_HN,   invalid_inst, special_inst }, /* translates to mbar 8.   */
-+  {"suspend",   INST_TYPE_NONE,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN,   invalid_inst, special_inst }, /* translates to mbar 24.  */
-   {"swapb",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4,   swapb,     arithmetic_inst },
-   {"swaph",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4,   swaph,     arithmetic_inst },
-   {"", 0, 0, 0, 0, 0, 0, 0, 0},
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index e56c1d2d47c..ad964560c17 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
-@@ -33,13 +33,13 @@ enum microblaze_instr
-   /* 'or/and/xor' are C++ keywords.  */
-   microblaze_or, microblaze_and, microblaze_xor,
-   andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,
--  wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar, br,
--  brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt,
--  bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
-+  wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, wdcclearea, mts, mtse,
-+  mfs, mfse, mbar, br, brd, brld, bra, brad, brald, microblaze_brk, beq, beqd,
-+  bne, bned, blt, bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
-   imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
-   brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
--  bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh,
--  shr, sw, swr, swx, lbui, lhui, lwi,
-+  bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
-+  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
-   sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
-   fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
-   /* 'fsqrt' is a glibc:math.h symbol.  */
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0008-Add-new-bit-field-instructions.patch
deleted file mode 100644
index d2e6424b..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0008-Add-new-bit-field-instructions.patch
+++ /dev/null
@@ -1,245 +0,0 @@
-From c02813b6a27e6eed281609e5d696bb67ac74c804 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Mon, 18 Jul 2016 12:24:28 +0530
-Subject: [PATCH 08/34] Add new bit-field instructions
-
-This patches adds new bsefi and bsifi instructions.
-BSEFI- The instruction shall extract a bit field from a
-register and place it right-adjusted in the destination register.
-The other bits in the destination register shall be set to zero
-BSIFI- The instruction shall insert a right-adjusted bit field
-from a register at another position in the destination register.
-The rest of the bits in the destination register shall be unchanged
-
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
-
-Conflicts:
-        opcodes/microblaze-dis.c
-
-Conflicts:
-        gas/config/tc-microblaze.c
-        opcodes/microblaze-opc.h
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++-
- opcodes/microblaze-dis.c   | 20 +++++++++--
- opcodes/microblaze-opc.h   | 12 ++++++-
- opcodes/microblaze-opcm.h  |  6 +++-
- 4 files changed, 104 insertions(+), 5 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 8018d1f5686..1cb9b2519c3 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -917,7 +917,7 @@ md_assemble (char * str)
-   unsigned reg2;
-   unsigned reg3;
-   unsigned isize;
--  unsigned int immed = 0, temp;
-+  unsigned int immed = 0, immed2 = 0, temp;
-   expressionS exp;
-   char name[20];
- 
-@@ -1178,7 +1178,76 @@ md_assemble (char * str)
-       inst |= (reg2 << RA_LOW) & RA_MASK;
-       inst |= (immed << IMM_LOW) & IMM5_MASK;
-       break;
-+ case INST_TYPE_RD_R1_IMM5_IMM5:
-+      if (strcmp (op_end, ""))
-+        op_end = parse_reg (op_end + 1, &reg1);  /* Get rd.  */
-+      else
-+       {
-+          as_fatal (_("Error in statement syntax"));
-+          reg1 = 0;
-+        }
-+      if (strcmp (op_end, ""))
-+        op_end = parse_reg (op_end + 1, &reg2);  /* Get r1.  */
-+      else
-+       {
-+          as_fatal (_("Error in statement syntax"));
-+          reg2 = 0;
-+        }
-+
-+      /* Check for spl registers.  */
-+      if (check_spl_reg (&reg1))
-+        as_fatal (_("Cannot use special register with this instruction"));
-+      if (check_spl_reg (&reg2))
-+        as_fatal (_("Cannot use special register with this instruction"));
- 
-+      /* Width immediate value.  */
-+      if (strcmp (op_end, ""))
-+        op_end = parse_imm (op_end + 1, &exp, MIN_IMM_WIDTH, MAX_IMM_WIDTH);
-+      else
-+        as_fatal (_("Error in statement syntax"));
-+      if (exp.X_op != O_constant)
-+       {
-+          as_warn (_("Symbol used as immediate width value for bit field instruction"));
-+          immed = 1;
-+        }
-+      else
-+        immed = exp.X_add_number;
-+      if (opcode->instr == bsefi && immed > 31)
-+        as_fatal (_("Width value must be less than 32"));
-+
-+      /* Shift immediate value.  */
-+      if (strcmp (op_end, ""))
-+        op_end = parse_imm (op_end + 1, &exp, MIN_IMM, MAX_IMM);
-+      else
-+        as_fatal (_("Error in statement syntax"));
-+      if (exp.X_op != O_constant)
-+           {
-+          as_warn (_("Symbol used as immediate shift value for bit field instruction"));
-+          immed2 = 0;
-+        }
-+      else
-+           {
-+          output = frag_more (isize);
-+          immed2 = exp.X_add_number;
-+           }
-+      if (immed2 != (immed2 % 32))
-+           {
-+          as_warn (_("Shift value greater than 32. using <value %% 32>"));
-+          immed2 = immed2 % 32;
-+        }
-+
-+      /* Check combined value.  */
-+      if (immed + immed2 > 32)
-+        as_fatal (_("Width value + shift value must not be greater than 32"));
-+
-+      inst |= (reg1 << RD_LOW) & RD_MASK;
-+      inst |= (reg2 << RA_LOW) & RA_MASK;
-+      if (opcode->instr == bsefi)
-+        inst |= (immed & IMM5_MASK) << IMM_WIDTH_LOW; /* bsefi */
-+      else
-+        inst |= ((immed + immed2 - 1) & IMM5_MASK) << IMM_WIDTH_LOW; /* bsifi */
-+      inst |= (immed2 << IMM_LOW) & IMM5_MASK;
-+      break;
-     case INST_TYPE_R1_R2:
-       if (strcmp (op_end, ""))
-         op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
-diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index b057492ba93..f57b98fc9f7 100644
---- a/opcodes/microblaze-dis.c
-+++ b/opcodes/microblaze-dis.c
-@@ -91,7 +91,19 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
- }
- 
- static char *
--get_field_rfsl (struct string_buf *buf, long instr)
-+get_field_imm5width (struct string_buf *buf, long instr)
-+{
-+  char *p = strbuf (buf);
-+
-+  if (instr & 0x00004000)
-+    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
-+ else
-+    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
-+  return p;
-+}
-+
-+static char *
-+get_field_rfsl (struct string_buf *buf,long instr)
- {
-   char *p = strbuf (buf);
- 
-@@ -427,7 +439,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-          /* For mbar 16 or sleep insn.  */
-        case INST_TYPE_NONE:
-          break;
--         /* For tuqula instruction */
-+        /* For bit field insns.  */
-+       case INST_TYPE_RD_R1_IMM5_IMM5:
-+          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
-+            break;
-+       /* For tuqula instruction */
-        case INST_TYPE_RD:
-          print_func (stream, "\t%s", get_field_rd (&buf, inst));
-          break;
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index d3f8e36199e..825c639a41e 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -59,6 +59,9 @@
- /* For mbar.  */
- #define INST_TYPE_IMM5 20
- 
-+/* For bsefi and bsifi */
-+#define INST_TYPE_RD_R1_IMM5_IMM5  21
-+
- #define INST_TYPE_NONE 25
- 
- 
-@@ -89,7 +92,9 @@
- #define OPCODE_MASK_H124  0xFFFF07FF /* High 16, and low 11 bits.  */
- #define OPCODE_MASK_H1234 0xFFFFFFFF /* All 32 bits.  */
- #define OPCODE_MASK_H3  0xFC000600  /* High 6 bits and bits 21, 22.  */
-+#define OPCODE_MASK_H3B 0xFC00C600  /* High 6 bits and bits 16, 17, 21, 22.  */
- #define OPCODE_MASK_H32 0xFC00FC00  /* High 6 bits and bit 16-21.  */
-+#define OPCODE_MASK_H32B 0xFC00C000  /* High 6 bits and bit 16, 17.  */
- #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits.  */
- #define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits.  */
- #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26.  */
-@@ -102,7 +107,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
- 
--#define MAX_OPCODES 291
-+#define MAX_OPCODES 301
- 
- const struct op_code_struct
- {
-@@ -159,6 +164,8 @@ const struct op_code_struct
-   {"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3, bslli, barrel_shift_inst },
-   {"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3, bsrai, barrel_shift_inst },
-   {"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3, bsrli, barrel_shift_inst },
-+  {"bsefi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst },
-+  {"bsifi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst },
-   {"or",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, microblaze_or, logical_inst },
-   {"and",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, microblaze_and, logical_inst },
-   {"xor",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, microblaze_xor, logical_inst },
-@@ -438,5 +445,8 @@ char pvr_register_prefix[] = "rpvr";
- #define MIN_IMM5  ((int) 0x00000000)
- #define MAX_IMM5  ((int) 0x0000001f)
- 
-+#define MIN_IMM_WIDTH  ((int) 0x00000001)
-+#define MAX_IMM_WIDTH  ((int) 0x00000020)
-+
- #endif /* MICROBLAZE_OPC */
- 
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index ad964560c17..aa3401610d9 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
-@@ -29,7 +29,7 @@ enum microblaze_instr
-   addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul,
-   mulh, mulhu, mulhsu,swapb,swaph,
-   idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput,
--  ncget, ncput, muli, bslli, bsrai, bsrli, mului,
-+  ncget, ncput, muli, bslli, bsrai, bsrli, bsefi, bsifi, mului,
-   /* 'or/and/xor' are C++ keywords.  */
-   microblaze_or, microblaze_and, microblaze_xor,
-   andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,
-@@ -130,6 +130,7 @@ enum microblaze_instr_type
- #define RB_LOW  11 /* Low bit for RB.  */
- #define IMM_LOW  0 /* Low bit for immediate.  */
- #define IMM_MBAR 21 /* low bit for mbar instruction.  */
-+#define IMM_WIDTH_LOW 6 /* Low bit for immediate width */
- 
- #define RD_MASK 0x03E00000
- #define RA_MASK 0x001F0000
-@@ -142,6 +143,9 @@ enum microblaze_instr_type
- /* Imm mask for mbar.  */
- #define IMM5_MBAR_MASK 0x03E00000
- 
-+/* Imm mask for extract/insert width. */
-+#define IMM5_WIDTH_MASK 0x000007C0
-+
- /* FSL imm mask for get, put instructions.  */
- #define  RFSL_MASK 0x000000F
- 
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0009-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
deleted file mode 100644
index ec3ee897..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0009-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 81fc7ef231ca2890dfa827b4e8f3d0da107f9be2 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Fri, 29 Sep 2017 18:00:23 +0530
-Subject: [PATCH 09/34] [Patch,Microblaze]: fixed bug in GCC so that It will
- support .long 0U and .long 0u
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- gas/expr.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/gas/expr.c b/gas/expr.c
-index 6ad8bee2733..a1281ef71a8 100644
---- a/gas/expr.c
-+++ b/gas/expr.c
-@@ -832,6 +832,15 @@ operand (expressionS *expressionP, enum expr_mode mode)
-              break;
-            }
-        }
-+      if ((*input_line_pointer == 'U') || (*input_line_pointer == 'u'))
-+      {
-+      input_line_pointer--;
-+
-+      integer_constant ((NUMBERS_WITH_SUFFIX || flag_m68k_mri)
-+                        ? 0 : 10,
-+                        expressionP);
-+      break;
-+      }
-       c = *input_line_pointer;
-       switch (c)
-        {
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-constant-range-check-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-constant-range-check-issue.patch
deleted file mode 100644
index 339e598c..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-constant-range-check-issue.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From adfa8ca9782799670d87d03a01414aca5d9cc9e5 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Mon, 16 Oct 2017 15:44:23 +0530
-Subject: [PATCH 10/34] fixing the constant range check issue sample error: not
- in range ffffffff80000000..7fffffff, not ffffffff70000000
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- gas/config/tc-microblaze.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 1cb9b2519c3..086f8704156 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -757,7 +757,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
-       if ((e->X_add_number >> 31) == 1)
-        e->X_add_number |= -((addressT) (1U << 31));
- 
--      if (e->X_add_number < min || e->X_add_number > max)
-+      if ((int)e->X_add_number < min || (int)e->X_add_number > max)
-        {
-          as_fatal (_("operand must be absolute in range %lx..%lx, not %lx"),
-                    (long) min, (long) max, (long) e->X_add_number);
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-Compiler-will-give-error-messages-i.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
deleted file mode 100644
index 4228d3a2..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 3efcb580af783ace64a9485af6bfee6dc18499ba Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 21 Feb 2018 12:32:02 +0530
-Subject: [PATCH 11/34] [Patch,Microblaze]: Compiler will give error messages
- in more detail for mxl-gp-opt flag..
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- ld/ldmain.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/ld/ldmain.c b/ld/ldmain.c
-index ea72b14a301..4e63b8fdf3b 100644
---- a/ld/ldmain.c
-+++ b/ld/ldmain.c
-@@ -1564,6 +1564,18 @@ reloc_overflow (struct bfd_link_info *info,
-          break;
-        case bfd_link_hash_defined:
-        case bfd_link_hash_defweak:
-+
-+         if((strcmp(reloc_name,"R_MICROBLAZE_SRW32") == 0) &&  entry->type == bfd_link_hash_defined)
-+         {
-+         einfo (_(" relocation truncated to fit: don't enable small data pointer optimizations[mxl-gp-opt] if extern or multiple declarations used: "
-+                "%s against symbol `%T' defined in %A section in %B"),
-+                 reloc_name, entry->root.string,
-+                 entry->u.def.section,
-+                 entry->u.def.section == bfd_abs_section_ptr
-+                  ? info->output_bfd : entry->u.def.section->owner);
-+             break;
-+         }
-+
-          einfo (_(" relocation truncated to fit: "
-                   "%s against symbol `%pT' defined in %pA section in %pB"),
-                 reloc_name, entry->root.string,
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch
deleted file mode 100644
index f1115743..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-MicroBlaze-initial-support-for-MicroBlaze-64-b.patch
+++ /dev/null
@@ -1,5251 +0,0 @@
-From 6d3b976c0f75225614d299faca766f9043bbd2d0 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 1 Nov 2021 19:06:53 +0530
-Subject: [PATCH 12/34] [Patch,MicroBlaze] : initial support for MicroBlaze 64
- bit [-m64]
-
-Conflicts:
-        bfd/elf32-microblaze.c
-        include/elf/common.h
-        ld/Makefile.am
-        ld/Makefile.in
-signed-off-by:Nagaraju Mekala<nmekala@xilinx.com>
-              Mahesh Bodapati<mbodapat@xilinx.com>
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/Makefile.am                    |    2 +
- bfd/Makefile.in                    |    3 +
- bfd/bfd-in2.h                      |   10 +
- bfd/config.bfd                     |    4 +
- bfd/configure                      |    2 +
- bfd/configure.ac                   |    2 +
- bfd/cpu-microblaze.c               |   53 +-
- bfd/elf32-microblaze.c             |   59 +-
- bfd/elf64-microblaze.c             | 3612 ++++++++++++++++++++++++++++
- bfd/libbfd.h                       |    2 +
- bfd/reloc.c                        |   12 +
- bfd/targets.c                      |    6 +
- gas/config/tc-microblaze.c         |  419 +++-
- gas/config/tc-microblaze.h         |    4 +-
- include/elf/common.h               |    1 +
- include/elf/microblaze.h           |    2 +
- ld/Makefile.am                     |    4 +
- ld/Makefile.in                     |    6 +
- ld/configure.tgt                   |    3 +
- ld/emulparams/elf64microblaze.sh   |   23 +
- ld/emulparams/elf64microblazeel.sh |   23 +
- opcodes/microblaze-dis.c           |   36 +-
- opcodes/microblaze-opc.h           |  162 +-
- opcodes/microblaze-opcm.h          |   24 +-
- 24 files changed, 4408 insertions(+), 66 deletions(-)
- create mode 100644 bfd/elf64-microblaze.c
- create mode 100644 ld/emulparams/elf64microblaze.sh
- create mode 100644 ld/emulparams/elf64microblazeel.sh
-
-diff --git a/bfd/Makefile.am b/bfd/Makefile.am
-index 670e0598f55..c76adec960a 100644
---- a/bfd/Makefile.am
-+++ b/bfd/Makefile.am
-@@ -563,6 +563,7 @@ BFD64_BACKENDS = \
-        elf64-riscv.lo \
-        elfxx-riscv.lo \
-        elf64-s390.lo \
-+       elf64-microblaze.lo \
-        elf64-sparc.lo \
-        elf64-tilegx.lo \
-        elf64-x86-64.lo \
-@@ -600,6 +601,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-nfp.c \
-        elf64-ppc.c \
-        elf64-s390.c \
-+       elf64-microblaze.c \
-        elf64-sparc.c \
-        elf64-tilegx.c \
-        elf64-x86-64.c \
-diff --git a/bfd/Makefile.in b/bfd/Makefile.in
-index a26f74d7199..b0420bd440f 100644
---- a/bfd/Makefile.in
-+++ b/bfd/Makefile.in
-@@ -1027,6 +1027,7 @@ BFD64_BACKENDS = \
-        elf64-riscv.lo \
-        elfxx-riscv.lo \
-        elf64-s390.lo \
-+       elf64-microblaze.lo \
-        elf64-sparc.lo \
-        elf64-tilegx.lo \
-        elf64-x86-64.lo \
-@@ -1064,6 +1065,7 @@ BFD64_BACKENDS_CFILES = \
-        elf64-nfp.c \
-        elf64-ppc.c \
-        elf64-s390.c \
-+       elf64-microblaze.c \
-        elf64-sparc.c \
-        elf64-tilegx.c \
-        elf64-x86-64.c \
-@@ -1647,6 +1649,7 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 26e3bb2b34b..6cf701abf10 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5389,11 +5389,21 @@ value in two words (with an imm instruction).  No relocation is
- done here - only used for relaxing  */
-   BFD_RELOC_MICROBLAZE_64_NONE,
- 
-+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imml instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64,
-+
- /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  The relocation is
- PC-relative GOT offset  */
-   BFD_RELOC_MICROBLAZE_64_GOTPC,
- 
-+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imml instruction).  The relocation is
-+PC-relative GOT offset  */
-+  BFD_RELOC_MICROBLAZE_64_GPC,
-+
- /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  The relocation is
- GOT offset  */
-diff --git a/bfd/config.bfd b/bfd/config.bfd
-index a4c6c8e8854..49208534de3 100644
---- a/bfd/config.bfd
-+++ b/bfd/config.bfd
-@@ -855,11 +855,15 @@ case "${targ}" in
-   microblazeel*-*)
-     targ_defvec=microblaze_elf32_le_vec
-     targ_selvecs=microblaze_elf32_vec
-+    targ64_selvecs=microblaze_elf64_vec
-+    targ64_selvecs=microblaze_elf64_le_vec
-     ;;
- 
-   microblaze*-*)
-     targ_defvec=microblaze_elf32_vec
-     targ_selvecs=microblaze_elf32_le_vec
-+    targ64_selvecs=microblaze_elf64_vec
-+    targ64_selvecs=microblaze_elf64_le_vec
-     ;;
- 
- #ifdef BFD64
-diff --git a/bfd/configure b/bfd/configure
-index 4f591b750d8..efeb1c2d717 100755
---- a/bfd/configure
-+++ b/bfd/configure
-@@ -13546,6 +13546,8 @@ do
-     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
-     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
-     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
-+    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-+    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
-     sh_coff_le_vec)             tb="$tb coff-sh.lo $coff" ;;
-     sh_coff_small_vec)          tb="$tb coff-sh.lo $coff" ;;
-diff --git a/bfd/configure.ac b/bfd/configure.ac
-index 6146efb5ae3..387a0af3703 100644
---- a/bfd/configure.ac
-+++ b/bfd/configure.ac
-@@ -603,6 +603,8 @@ do
-     s390_elf64_vec)             tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
-     score_elf32_be_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
-     score_elf32_le_vec)                 tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
-+    microblaze_elf64_vec)       tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-+    microblaze_elf64_le_vec)    tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
-     sh_coff_vec)                tb="$tb coff-sh.lo $coff" ;;
-     sh_coff_le_vec)             tb="$tb coff-sh.lo $coff" ;;
-     sh_coff_small_vec)          tb="$tb coff-sh.lo $coff" ;;
-diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index 0c1d2b1aa69..a9abb9166cc 100644
---- a/bfd/cpu-microblaze.c
-+++ b/bfd/cpu-microblaze.c
-@@ -23,7 +23,24 @@
- #include "bfd.h"
- #include "libbfd.h"
- 
--const bfd_arch_info_type bfd_microblaze_arch =
-+const bfd_arch_info_type bfd_microblaze_arch[] =
-+{
-+#if BFD_DEFAULT_TARGET_SIZE == 64
-+{
-+  64,                          /* 32 bits in a word.  */
-+  64,                          /* 32 bits in an address.  */
-+  8,                           /* 8 bits in a byte.  */
-+  bfd_arch_microblaze,                 /* Architecture.  */
-+  0,                           /* Machine number - 0 for now.  */
-+  "microblaze",                        /* Architecture name.  */
-+  "MicroBlaze",                        /* Printable name.  */
-+  3,                           /* Section align power.  */
-+  false,                               /* Is this the default architecture ?  */
-+  bfd_default_compatible,      /* Architecture comparison function.  */
-+  bfd_default_scan,            /* String to architecture conversion.  */
-+  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1]      /* Next in list.  */
-+},
- {
-   32,                          /* Bits in a word.  */
-   32,                          /* Bits in an address.  */
-@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_arch =
-   bfd_arch_default_fill,       /* Default fill.  */
-   NULL,                                /* Next in list.  */
-   0 /* Maximum offset of a reloc from the start of an insn.  */
-+}
-+#else
-+{
-+  32,                          /* 32 bits in a word.  */
-+  32,                          /* 32 bits in an address.  */
-+  8,                           /* 8 bits in a byte.  */
-+  bfd_arch_microblaze,                 /* Architecture.  */
-+  0,                           /* Machine number - 0 for now.  */
-+  "microblaze",                        /* Architecture name.  */
-+  "MicroBlaze",                        /* Printable name.  */
-+  3,                           /* Section align power.  */
-+  true,                                /* Is this the default architecture ?  */
-+  bfd_default_compatible,      /* Architecture comparison function.  */
-+  bfd_default_scan,            /* String to architecture conversion.  */
-+  bfd_arch_default_fill,       /* Default fill.  */
-+  &bfd_microblaze_arch[1]      /* Next in list.  */
-+},
-+{
-+  64,                          /* 32 bits in a word.  */
-+  64,                          /* 32 bits in an address.  */
-+  8,                           /* 8 bits in a byte.  */
-+  bfd_arch_microblaze,                 /* Architecture.  */
-+  0,                           /* Machine number - 0 for now.  */
-+  "microblaze",                        /* Architecture name.  */
-+  "MicroBlaze",                        /* Printable name.  */
-+  3,                           /* Section align power.  */
-+  false,                               /* Is this the default architecture ?  */
-+  bfd_default_compatible,      /* Architecture comparison function.  */
-+  bfd_default_scan,            /* String to architecture conversion.  */
-+  bfd_arch_default_fill,       /* Default fill.  */
-+  NULL,                                /* Next in list.  */
-+  0  /* Maximum offset of a reloc from the start of an insn.  */
-+}
-+#endif
- };
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index edde04bafe4..f20adb6fd73 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -114,6 +114,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
-          0x0000ffff,           /* Dest Mask.  */
-          true),                /* PC relative offset?  */
- 
-+   HOWTO (R_MICROBLAZE_IMML_64,        /* Type.  */
-+          0,                   /* Rightshift.  */
-+          2,                   /* Size (0 = byte, 1 = short, 2 = long).  */
-+          16,                  /* Bitsize.  */
-+          true,                /* PC_relative.  */
-+          0,                   /* Bitpos.  */
-+          complain_overflow_dont, /* Complain on overflow.  */
-+          bfd_elf_generic_reloc,/* Special Function.  */
-+          "R_MICROBLAZE_IMML_64",      /* Name.  */
-+          false,               /* Partial Inplace.  */
-+          0,                   /* Source Mask.  */
-+          0x0000ffff,          /* Dest Mask.  */
-+          false),              /* PC relative offset?  */
-+
-    /* A 64 bit relocation.  Table entry not really used.  */
-    HOWTO (R_MICROBLAZE_64,     /* Type.  */
-          0,                    /* Rightshift.  */
-@@ -278,6 +292,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
-          0x0000ffff,           /* Dest Mask.  */
-          true),                /* PC relative offset?  */
- 
-+   /* A 64 bit GOTPC relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_GPC_64,         /* Type.  */
-+          0,                   /* Rightshift.  */
-+          2,                   /* Size (0 = byte, 1 = short, 2 = long).  */
-+          16,                  /* Bitsize.  */
-+          true,                        /* PC_relative.  */
-+          0,                   /* Bitpos.  */
-+          complain_overflow_dont, /* Complain on overflow.  */
-+          bfd_elf_generic_reloc,       /* Special Function.  */
-+          "R_MICROBLAZE_GPC_64",       /* Name.  */
-+          false,               /* Partial Inplace.  */
-+          0,                   /* Source Mask.  */
-+          0x0000ffff,          /* Dest Mask.  */
-+          true),               /* PC relative offset?  */
-+
-    /* A 64 bit GOT relocation.  Table-entry not really used.  */
-    HOWTO (R_MICROBLAZE_GOT_64,  /* Type.  */
-          0,                    /* Rightshift.  */
-@@ -617,9 +646,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
-     case BFD_RELOC_VTABLE_ENTRY:
-       microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY;
-       break;
-+    case BFD_RELOC_MICROBLAZE_64:
-+      microblaze_reloc = R_MICROBLAZE_IMML_64;
-+      break;
-     case BFD_RELOC_MICROBLAZE_64_GOTPC:
-       microblaze_reloc = R_MICROBLAZE_GOTPC_64;
-       break;
-+    case BFD_RELOC_MICROBLAZE_64_GPC:
-+      microblaze_reloc = R_MICROBLAZE_GPC_64;
-+      break;
-     case BFD_RELOC_MICROBLAZE_64_GOT:
-       microblaze_reloc = R_MICROBLAZE_GOT_64;
-       break;
-@@ -1500,7 +1535,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
-                  {
-                    relocation += addend;
--                   if (r_type == R_MICROBLAZE_32)
-+                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
-                      bfd_put_32 (input_bfd, relocation, contents + offset);
-                    else
-                      {
-@@ -1970,6 +2005,28 @@ microblaze_elf_relax_section (bfd *abfd,
-                    irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
-                }
-              break;
-+           case R_MICROBLAZE_IMML_64:
-+             {
-+               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
-+               int sfix, efix;
-+            unsigned int val;
-+               bfd_vma target_address;
-+               target_address = irel->r_addend + irel->r_offset;
-+               sfix = calc_fixup (irel->r_offset, 0, sec);
-+               efix = calc_fixup (target_address, 0, sec);
-+
-+            /* Validate the in-band val.  */
-+            val = bfd_get_32 (abfd, contents + irel->r_offset);
-+            if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
-+               fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
-+            }
-+               irel->r_addend -= (efix - sfix);
-+               /* Should use HOWTO.  */
-+               microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
-+                                                  irel->r_addend);
-+             }
-+             break;
-            case R_MICROBLAZE_NONE:
-            case R_MICROBLAZE_32_NONE:
-              {
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-new file mode 100644
-index 00000000000..0faa8de73c8
---- /dev/null
-+++ b/bfd/elf64-microblaze.c
-@@ -0,0 +1,3612 @@
-+/* Xilinx MicroBlaze-specific support for 32-bit ELF
-+
-+   Copyright (C) 2009-2021 Free Software Foundation, Inc.
-+
-+   This file is part of BFD, the Binary File Descriptor library.
-+
-+   This program is free software; you can redistribute it and/or modify
-+   it under the terms of the GNU General Public License as published by
-+   the Free Software Foundation; either version 3 of the License, or
-+   (at your option) any later version.
-+
-+   This program is distributed in the hope that it will be useful,
-+   but WITHOUT ANY WARRANTY; without even the implied warranty of
-+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+   GNU General Public License for more details.
-+
-+   You should have received a copy of the GNU General Public License
-+   along with this program; if not, write to the
-+   Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
-+   Boston, MA 02110-1301, USA.  */
-+
-+
-+#include "sysdep.h"
-+#include "bfd.h"
-+#include "bfdlink.h"
-+#include "libbfd.h"
-+#include "elf-bfd.h"
-+#include "elf/microblaze.h"
-+#include <assert.h>
-+
-+#define        USE_RELA        /* Only USE_REL is actually significant, but this is
-+                          here are a reminder...  */
-+#define INST_WORD_SIZE 4
-+
-+static int ro_small_data_pointer = 0;
-+static int rw_small_data_pointer = 0;
-+
-+static reloc_howto_type * microblaze_elf_howto_table [(int) R_MICROBLAZE_max];
-+
-+static reloc_howto_type microblaze_elf_howto_raw[] =
-+{
-+   /* This reloc does nothing.  */
-+   HOWTO (R_MICROBLAZE_NONE,   /* Type.  */
-+         0,                    /* Rightshift.  */
-+         0,                    /* Size.  */
-+         0,                    /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont,  /* Complain on overflow.  */
-+         NULL,                  /* Special Function.  */
-+         "R_MICROBLAZE_NONE",  /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0,                    /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* A standard 32 bit relocation.  */
-+   HOWTO (R_MICROBLAZE_32,     /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         32,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_bitfield, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_32",    /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0xffffffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* A standard PCREL 32 bit relocation.  */
-+   HOWTO (R_MICROBLAZE_32_PCREL,/* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         32,                   /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_bitfield, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_32_PCREL",      /* Name.  */
-+         true,                 /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0xffffffff,           /* Dest Mask.  */
-+         true),                /* PC relative offset?  */
-+
-+   /* A 64 bit PCREL relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_64_PCREL,/* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_64_PCREL",      /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         true),                /* PC relative offset?  */
-+
-+   /* The low half of a PCREL 32 bit relocation.  */
-+   HOWTO (R_MICROBLAZE_32_PCREL_LO,    /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_signed, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,        /* Special Function.  */
-+         "R_MICROBLAZE_32_PCREL_LO",   /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         true),                /* PC relative offset?  */
-+
-+   HOWTO (R_MICROBLAZE_IMML_64,        /* Type.  */
-+          0,                   /* Rightshift.  */
-+          4,                   /* Size (0 = byte, 1 = short, 2 = long).  */
-+          64,                  /* Bitsize.  */
-+          true,                /* PC_relative.  */
-+          0,                   /* Bitpos.  */
-+          complain_overflow_dont, /* Complain on overflow.  */
-+          bfd_elf_generic_reloc,/* Special Function.  */
-+          "R_MICROBLAZE_IMML_64",      /* Name.  */
-+          false,               /* Partial Inplace.  */
-+          0,                   /* Source Mask.  */
-+          0x0000ffff,          /* Dest Mask.  */
-+          false),              /* PC relative offset?  */
-+
-+   /* A 64 bit relocation.  Table entry not really used.  */
-+   HOWTO (R_MICROBLAZE_64,             /* Type.  */
-+          0,                   /* Rightshift.  */
-+          2,                   /* Size (0 = byte, 1 = short, 2 = long).  */
-+          16,                  /* Bitsize.  */
-+          false,               /* PC_relative.  */
-+          0,                   /* Bitpos.  */
-+          complain_overflow_dont, /* Complain on overflow.  */
-+          bfd_elf_generic_reloc,/* Special Function.  */
-+          "R_MICROBLAZE_64",           /* Name.  */
-+          false,               /* Partial Inplace.  */
-+          0,                   /* Source Mask.  */
-+          0x0000ffff,          /* Dest Mask.  */
-+          false),              /* PC relative offset?  */
-+
-+   /* The low half of a 32 bit relocation.  */
-+   HOWTO (R_MICROBLAZE_32_LO,  /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_signed, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_32_LO", /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* Read-only small data section relocation.  */
-+   HOWTO (R_MICROBLAZE_SRO32,  /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_bitfield, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_SRO32", /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* Read-write small data area relocation.  */
-+   HOWTO (R_MICROBLAZE_SRW32,  /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_bitfield, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_SRW32", /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* This reloc does nothing. Used for relaxation.  */
-+   HOWTO (R_MICROBLAZE_32_NONE,        /* Type.  */
-+          0,                   /* Rightshift.  */
-+          2,                   /* Size (0 = byte, 1 = short, 2 = long).  */
-+          32,                  /* Bitsize.  */
-+          true,                        /* PC_relative.  */
-+          0,                   /* Bitpos.  */
-+          complain_overflow_bitfield,  /* Complain on overflow.  */
-+          NULL,                  /* Special Function.  */
-+          "R_MICROBLAZE_32_NONE",/* Name.  */
-+          false,               /* Partial Inplace.  */
-+          0,                   /* Source Mask.  */
-+          0,                   /* Dest Mask.  */
-+          false),              /* PC relative offset?  */
-+
-+   /* This reloc does nothing.  Used for relaxation.  */
-+   HOWTO (R_MICROBLAZE_64_NONE,        /* Type.  */
-+         0,                    /* Rightshift.  */
-+         0,                    /* Size.  */
-+         0,                    /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         NULL,                  /* Special Function.  */
-+         "R_MICROBLAZE_64_NONE",/* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0,                    /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* Symbol Op Symbol relocation.  */
-+   HOWTO (R_MICROBLAZE_32_SYM_OP_SYM,          /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         32,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_bitfield, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_32_SYM_OP_SYM",         /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0xffffffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* GNU extension to record C++ vtable hierarchy.  */
-+   HOWTO (R_MICROBLAZE_GNU_VTINHERIT, /* Type.  */
-+         0,                     /* Rightshift.  */
-+         4,                     /* Size.  */
-+         0,                     /* Bitsize.  */
-+         false,                 /* PC_relative.  */
-+         0,                     /* Bitpos.  */
-+         complain_overflow_dont,/* Complain on overflow.  */
-+         NULL,                  /* Special Function.  */
-+         "R_MICROBLAZE_GNU_VTINHERIT", /* Name.  */
-+         false,                 /* Partial Inplace.  */
-+         0,                     /* Source Mask.  */
-+         0,                     /* Dest Mask.  */
-+         false),                /* PC relative offset?  */
-+
-+   /* GNU extension to record C++ vtable member usage.  */
-+   HOWTO (R_MICROBLAZE_GNU_VTENTRY,   /* Type.  */
-+         0,                     /* Rightshift.  */
-+         4,                     /* Size.  */
-+         0,                     /* Bitsize.  */
-+         false,                 /* PC_relative.  */
-+         0,                     /* Bitpos.  */
-+         complain_overflow_dont,/* Complain on overflow.  */
-+         _bfd_elf_rel_vtable_reloc_fn,  /* Special Function.  */
-+         "R_MICROBLAZE_GNU_VTENTRY", /* Name.  */
-+         false,                 /* Partial Inplace.  */
-+         0,                     /* Source Mask.  */
-+         0,                     /* Dest Mask.  */
-+         false),                /* PC relative offset?  */
-+
-+   /* A 64 bit GOTPC relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_GOTPC_64,       /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,        /* Special Function.  */
-+         "R_MICROBLAZE_GOTPC_64",      /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         true),                /* PC relative offset?  */
-+
-+     /* A 64 bit TEXTPCREL relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_TEXTPCREL_64,   /* Type.  */
-+         0,                    /* Rightshift.  */
-+         2,                    /* Size (0 = byte, 1 = short, 2 = long).  */
-+         16,                   /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,        /* Special Function.  */
-+         "R_MICROBLAZE_TEXTPCREL_64",  /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         true),                /* PC relative offset?  */
-+
-+   /* A 64 bit GOTPC relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_GPC_64,         /* Type.  */
-+          0,                   /* Rightshift.  */
-+          2,                   /* Size (0 = byte, 1 = short, 2 = long).  */
-+          16,                  /* Bitsize.  */
-+          true,                        /* PC_relative.  */
-+          0,                   /* Bitpos.  */
-+          complain_overflow_dont, /* Complain on overflow.  */
-+          bfd_elf_generic_reloc,       /* Special Function.  */
-+          "R_MICROBLAZE_GPC_64",       /* Name.  */
-+          false,               /* Partial Inplace.  */
-+          0,                   /* Source Mask.  */
-+          0x0000ffff,          /* Dest Mask.  */
-+          true),               /* PC relative offset?  */
-+
-+   /* A 64 bit GOT relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_GOT_64,  /* Type.  */
-+         0,                    /* Rightshift.  */
-+         2,                    /* Size (0 = byte, 1 = short, 2 = long).  */
-+         16,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_GOT_64",/* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+    /* A 64 bit TEXTREL relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_TEXTREL_64,  /* Type.  */
-+         0,                    /* Rightshift.  */
-+         2,                    /* Size (0 = byte, 1 = short, 2 = long).  */
-+         16,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_TEXTREL_64",/* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* A 64 bit PLT relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_PLT_64,  /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_PLT_64",/* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         true),                /* PC relative offset?  */
-+
-+   /*  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_REL,    /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_REL",   /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         true),                /* PC relative offset?  */
-+
-+   /*  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_JUMP_SLOT,/* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_JUMP_SLOT",     /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         true),                /* PC relative offset?  */
-+
-+   /*  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_GLOB_DAT,/* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         true,                 /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_GLOB_DAT",      /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         true),                /* PC relative offset?  */
-+
-+   /* A 64 bit GOT relative relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_GOTOFF_64,      /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_GOTOFF_64",     /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* A 32 bit GOT relative relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_GOTOFF_32,      /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,        /* Special Function.  */
-+         "R_MICROBLAZE_GOTOFF_32",     /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* COPY relocation.  Table-entry not really used.  */
-+   HOWTO (R_MICROBLAZE_COPY,   /* Type.  */
-+         0,                    /* Rightshift.  */
-+         4,                    /* Size.  */
-+         16,                   /* Bitsize.  */
-+         false,                /* PC_relative.  */
-+         0,                    /* Bitpos.  */
-+         complain_overflow_dont, /* Complain on overflow.  */
-+         bfd_elf_generic_reloc,/* Special Function.  */
-+         "R_MICROBLAZE_COPY",  /* Name.  */
-+         false,                /* Partial Inplace.  */
-+         0,                    /* Source Mask.  */
-+         0x0000ffff,           /* Dest Mask.  */
-+         false),               /* PC relative offset?  */
-+
-+   /* Marker relocs for TLS.  */
-+   HOWTO (R_MICROBLAZE_TLS,
-+        0,                     /* rightshift */
-+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
-+        32,                    /* bitsize */
-+        false,                 /* pc_relative */
-+        0,                     /* bitpos */
-+        complain_overflow_dont, /* complain_on_overflow */
-+        bfd_elf_generic_reloc, /* special_function */
-+        "R_MICROBLAZE_TLS",            /* name */
-+        false,                 /* partial_inplace */
-+        0,                     /* src_mask */
-+        0x0000ffff,                    /* dst_mask */
-+        false),                /* pcrel_offset */
-+
-+   HOWTO (R_MICROBLAZE_TLSGD,
-+        0,                     /* rightshift */
-+        4,                     /* size */
-+        32,                    /* bitsize */
-+        false,                 /* pc_relative */
-+        0,                     /* bitpos */
-+        complain_overflow_dont, /* complain_on_overflow */
-+        bfd_elf_generic_reloc, /* special_function */
-+        "R_MICROBLAZE_TLSGD",          /* name */
-+        false,                 /* partial_inplace */
-+        0,                     /* src_mask */
-+        0x0000ffff,                    /* dst_mask */
-+        false),                /* pcrel_offset */
-+
-+   HOWTO (R_MICROBLAZE_TLSLD,
-+        0,                     /* rightshift */
-+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
-+        32,                    /* bitsize */
-+        false,                 /* pc_relative */
-+        0,                     /* bitpos */
-+        complain_overflow_dont, /* complain_on_overflow */
-+        bfd_elf_generic_reloc, /* special_function */
-+        "R_MICROBLAZE_TLSLD",          /* name */
-+        false,                 /* partial_inplace */
-+        0,                     /* src_mask */
-+        0x0000ffff,            /* dst_mask */
-+        false),                /* pcrel_offset */
-+
-+   /* Computes the load module index of the load module that contains the
-+      definition of its TLS sym.  */
-+   HOWTO (R_MICROBLAZE_TLSDTPMOD32,
-+        0,                     /* rightshift */
-+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
-+        32,                    /* bitsize */
-+        false,                 /* pc_relative */
-+        0,                     /* bitpos */
-+        complain_overflow_dont, /* complain_on_overflow */
-+        bfd_elf_generic_reloc, /* special_function */
-+        "R_MICROBLAZE_TLSDTPMOD32",    /* name */
-+        false,                 /* partial_inplace */
-+        0,                     /* src_mask */
-+        0x0000ffff,            /* dst_mask */
-+        false),                /* pcrel_offset */
-+
-+   /* Computes a dtv-relative displacement, the difference between the value
-+      of sym+add and the base address of the thread-local storage block that
-+      contains the definition of sym, minus 0x8000.  Used for initializing GOT */
-+   HOWTO (R_MICROBLAZE_TLSDTPREL32,
-+        0,                     /* rightshift */
-+        4,                     /* size */
-+        32,                    /* bitsize */
-+        false,                 /* pc_relative */
-+        0,                     /* bitpos */
-+        complain_overflow_dont, /* complain_on_overflow */
-+        bfd_elf_generic_reloc, /* special_function */
-+        "R_MICROBLAZE_TLSDTPREL32",    /* name */
-+        false,                 /* partial_inplace */
-+        0,                     /* src_mask */
-+        0x0000ffff,            /* dst_mask */
-+        false),                /* pcrel_offset */
-+
-+   /* Computes a dtv-relative displacement, the difference between the value
-+      of sym+add and the base address of the thread-local storage block that
-+      contains the definition of sym, minus 0x8000.  */
-+   HOWTO (R_MICROBLAZE_TLSDTPREL64,
-+        0,                     /* rightshift */
-+        4,                     /* size */
-+        32,                    /* bitsize */
-+        false,                 /* pc_relative */
-+        0,                     /* bitpos */
-+        complain_overflow_dont, /* complain_on_overflow */
-+        bfd_elf_generic_reloc, /* special_function */
-+        "R_MICROBLAZE_TLSDTPREL64",    /* name */
-+        false,                 /* partial_inplace */
-+        0,                     /* src_mask */
-+        0x0000ffff,            /* dst_mask */
-+        false),                /* pcrel_offset */
-+
-+   /* Computes a tp-relative displacement, the difference between the value of
-+      sym+add and the value of the thread pointer (r13).  */
-+   HOWTO (R_MICROBLAZE_TLSGOTTPREL32,
-+        0,                     /* rightshift */
-+        4,                     /* size */
-+        32,                    /* bitsize */
-+        false,                 /* pc_relative */
-+        0,                     /* bitpos */
-+        complain_overflow_dont, /* complain_on_overflow */
-+        bfd_elf_generic_reloc, /* special_function */
-+        "R_MICROBLAZE_TLSGOTTPREL32",  /* name */
-+        false,                 /* partial_inplace */
-+        0,                     /* src_mask */
-+        0x0000ffff,            /* dst_mask */
-+        false),                /* pcrel_offset */
-+
-+   /* Computes a tp-relative displacement, the difference between the value of
-+      sym+add and the value of the thread pointer (r13).  */
-+   HOWTO (R_MICROBLAZE_TLSTPREL32,
-+        0,                     /* rightshift */
-+        4,                     /* size */
-+        32,                    /* bitsize */
-+        false,                 /* pc_relative */
-+        0,                     /* bitpos */
-+        complain_overflow_dont, /* complain_on_overflow */
-+        bfd_elf_generic_reloc, /* special_function */
-+        "R_MICROBLAZE_TLSTPREL32",     /* name */
-+        false,                 /* partial_inplace */
-+        0,                     /* src_mask */
-+        0x0000ffff,            /* dst_mask */
-+        false),                /* pcrel_offset */
-+
-+};
-+
-+#ifndef NUM_ELEM
-+#define NUM_ELEM(a) (sizeof (a) / sizeof (a)[0])
-+#endif
-+
-+/* Initialize the microblaze_elf_howto_table, so that linear accesses can be done.  */
-+
-+static void
-+microblaze_elf_howto_init (void)
-+{
-+  unsigned int i;
-+
-+  for (i = NUM_ELEM (microblaze_elf_howto_raw); i--;)
-+    {
-+      unsigned int type;
-+
-+      type = microblaze_elf_howto_raw[i].type;
-+
-+      BFD_ASSERT (type < NUM_ELEM (microblaze_elf_howto_table));
-+
-+      microblaze_elf_howto_table [type] = & microblaze_elf_howto_raw [i];
-+    }
-+}
-+
-+static reloc_howto_type *
-+microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
-+                                 bfd_reloc_code_real_type code)
-+{
-+  enum elf_microblaze_reloc_type microblaze_reloc = R_MICROBLAZE_NONE;
-+
-+  switch (code)
-+    {
-+    case BFD_RELOC_NONE:
-+      microblaze_reloc = R_MICROBLAZE_NONE;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_32_NONE:
-+      microblaze_reloc = R_MICROBLAZE_32_NONE;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_NONE:
-+      microblaze_reloc = R_MICROBLAZE_64_NONE;
-+      break;
-+    case BFD_RELOC_32:
-+      microblaze_reloc = R_MICROBLAZE_32;
-+      break;
-+      /* RVA is treated the same as 32 */
-+    case BFD_RELOC_RVA:
-+      microblaze_reloc = R_MICROBLAZE_32;
-+      break;
-+    case BFD_RELOC_32_PCREL:
-+      microblaze_reloc = R_MICROBLAZE_32_PCREL;
-+      break;
-+    case BFD_RELOC_64_PCREL:
-+      microblaze_reloc = R_MICROBLAZE_64_PCREL;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_32_LO_PCREL:
-+      microblaze_reloc = R_MICROBLAZE_32_PCREL_LO;
-+      break;
-+    case BFD_RELOC_64:
-+      microblaze_reloc = R_MICROBLAZE_64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_32_LO:
-+      microblaze_reloc = R_MICROBLAZE_32_LO;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_32_ROSDA:
-+      microblaze_reloc = R_MICROBLAZE_SRO32;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_32_RWSDA:
-+      microblaze_reloc = R_MICROBLAZE_SRW32;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
-+      microblaze_reloc = R_MICROBLAZE_32_SYM_OP_SYM;
-+      break;
-+    case BFD_RELOC_VTABLE_INHERIT:
-+      microblaze_reloc = R_MICROBLAZE_GNU_VTINHERIT;
-+      break;
-+    case BFD_RELOC_VTABLE_ENTRY:
-+      microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64:
-+      microblaze_reloc = R_MICROBLAZE_IMML_64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_GOTPC:
-+      microblaze_reloc = R_MICROBLAZE_GOTPC_64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_GPC:
-+      microblaze_reloc = R_MICROBLAZE_GPC_64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_GOT:
-+      microblaze_reloc = R_MICROBLAZE_GOT_64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_TEXTPCREL:
-+      microblaze_reloc = R_MICROBLAZE_TEXTPCREL_64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_TEXTREL:
-+      microblaze_reloc = R_MICROBLAZE_TEXTREL_64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_PLT:
-+      microblaze_reloc = R_MICROBLAZE_PLT_64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-+      microblaze_reloc = R_MICROBLAZE_GOTOFF_64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_32_GOTOFF:
-+      microblaze_reloc = R_MICROBLAZE_GOTOFF_32;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_TLSGD:
-+      microblaze_reloc = R_MICROBLAZE_TLSGD;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_TLSLD:
-+      microblaze_reloc = R_MICROBLAZE_TLSLD;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_32_TLSDTPREL:
-+      microblaze_reloc = R_MICROBLAZE_TLSDTPREL32;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_TLSDTPREL:
-+      microblaze_reloc = R_MICROBLAZE_TLSDTPREL64;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_32_TLSDTPMOD:
-+      microblaze_reloc = R_MICROBLAZE_TLSDTPMOD32;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL:
-+      microblaze_reloc = R_MICROBLAZE_TLSGOTTPREL32;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_64_TLSTPREL:
-+      microblaze_reloc = R_MICROBLAZE_TLSTPREL32;
-+      break;
-+    case BFD_RELOC_MICROBLAZE_COPY:
-+      microblaze_reloc = R_MICROBLAZE_COPY;
-+      break;
-+    default:
-+      return (reloc_howto_type *) NULL;
-+    }
-+
-+  if (!microblaze_elf_howto_table [R_MICROBLAZE_32])
-+    /* Initialize howto table if needed.  */
-+    microblaze_elf_howto_init ();
-+
-+  return microblaze_elf_howto_table [(int) microblaze_reloc];
-+};
-+
-+static reloc_howto_type *
-+microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
-+                                 const char *r_name)
-+{
-+  unsigned int i;
-+
-+  for (i = 0; i < NUM_ELEM (microblaze_elf_howto_raw); i++)
-+    if (microblaze_elf_howto_raw[i].name != NULL
-+       && strcasecmp (microblaze_elf_howto_raw[i].name, r_name) == 0)
-+      return &microblaze_elf_howto_raw[i];
-+
-+  return NULL;
-+}
-+
-+/* Set the howto pointer for a RCE ELF reloc.  */
-+
-+static bool
-+microblaze_elf_info_to_howto (bfd * abfd,
-+                             arelent * cache_ptr,
-+                             Elf_Internal_Rela * dst)
-+{
-+  unsigned int r_type;
-+
-+  if (!microblaze_elf_howto_table [R_MICROBLAZE_32])
-+    /* Initialize howto table if needed.  */
-+    microblaze_elf_howto_init ();
-+
-+  r_type = ELF64_R_TYPE (dst->r_info);
-+  if (r_type >= R_MICROBLAZE_max)
-+    {
-+      /* xgettext:c-format */
-+      _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
-+                         abfd, r_type);
-+      bfd_set_error (bfd_error_bad_value);
-+      return false;
-+    }
-+
-+  cache_ptr->howto = microblaze_elf_howto_table [r_type];
-+  return true;
-+}
-+
-+/* Relax table contains information about instructions which can
-+   be removed by relaxation -- replacing a long address with a
-+   short address.  */
-+struct relax_table
-+{
-+  /* Address where bytes may be deleted.  */
-+  bfd_vma addr;
-+
-+  /* Number of bytes to be deleted.  */
-+  size_t size;
-+};
-+
-+struct _microblaze_elf_section_data
-+{
-+  struct bfd_elf_section_data elf;
-+  /* Count of used relaxation table entries.  */
-+  size_t relax_count;
-+  /* Relaxation table.  */
-+  struct relax_table *relax;
-+};
-+
-+#define microblaze_elf_section_data(sec) \
-+  ((struct _microblaze_elf_section_data *) elf_section_data (sec))
-+
-+static bool
-+microblaze_elf_new_section_hook (bfd *abfd, asection *sec)
-+{
-+  if (!sec->used_by_bfd)
-+    {
-+      struct _microblaze_elf_section_data *sdata;
-+      size_t amt = sizeof (*sdata);
-+
-+      sdata = bfd_zalloc (abfd, amt);
-+      if (sdata == NULL)
-+       return false;
-+      sec->used_by_bfd = sdata;
-+    }
-+
-+  return _bfd_elf_new_section_hook (abfd, sec);
-+}
-+
-+/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'.  */
-+
-+static bool
-+microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
-+{
-+  if (name[0] == 'L' && name[1] == '.')
-+    return true;
-+
-+  if (name[0] == '$' && name[1] == 'L')
-+    return true;
-+
-+  /* With gcc, the labels go back to starting with '.', so we accept
-+     the generic ELF local label syntax as well.  */
-+  return _bfd_elf_is_local_label_name (abfd, name);
-+}
-+
-+/* ELF linker hash entry.  */
-+
-+struct elf64_mb_link_hash_entry
-+{
-+  struct elf_link_hash_entry elf;
-+
-+  /* TLS Reference Types for the symbol; Updated by check_relocs */
-+#define TLS_GD     1  /* GD reloc. */
-+#define TLS_LD     2  /* LD reloc. */
-+#define TLS_TPREL  4  /* TPREL reloc, => IE. */
-+#define TLS_DTPREL 8  /* DTPREL reloc, => LD. */
-+#define TLS_TLS    16 /* Any TLS reloc.  */
-+  unsigned char tls_mask;
-+
-+};
-+
-+#define IS_TLS_GD(x)     (x == (TLS_TLS | TLS_GD))
-+#define IS_TLS_LD(x)     (x == (TLS_TLS | TLS_LD))
-+#define IS_TLS_DTPREL(x) (x == (TLS_TLS | TLS_DTPREL))
-+#define IS_TLS_NONE(x)   (x == 0)
-+
-+#define elf64_mb_hash_entry(ent) ((struct elf64_mb_link_hash_entry *)(ent))
-+
-+/* ELF linker hash table.  */
-+
-+struct elf64_mb_link_hash_table
-+{
-+  struct elf_link_hash_table elf;
-+
-+  /* TLS Local Dynamic GOT Entry */
-+  union {
-+    bfd_signed_vma refcount;
-+    bfd_vma offset;
-+  } tlsld_got;
-+};
-+
-+/* Nonzero if this section has TLS related relocations.  */
-+#define has_tls_reloc sec_flg0
-+
-+/* Get the ELF linker hash table from a link_info structure.  */
-+
-+#define elf64_mb_hash_table(p) \
-+  ((is_elf_hash_table ((p)->hash)                                      \
-+    && elf_hash_table_id (elf_hash_table (p)) == MICROBLAZE_ELF_DATA)  \
-+   ? (struct elf64_mb_link_hash_table *) (p)->hash : NULL)
-+
-+/* Create an entry in a microblaze ELF linker hash table.  */
-+
-+static struct bfd_hash_entry *
-+link_hash_newfunc (struct bfd_hash_entry *entry,
-+                  struct bfd_hash_table *table,
-+                  const char *string)
-+{
-+  /* Allocate the structure if it has not already been allocated by a
-+     subclass.  */
-+  if (entry == NULL)
-+    {
-+      entry = bfd_hash_allocate (table,
-+                                sizeof (struct elf64_mb_link_hash_entry));
-+      if (entry == NULL)
-+       return entry;
-+    }
-+
-+  /* Call the allocation method of the superclass.  */
-+  entry = _bfd_elf_link_hash_newfunc (entry, table, string);
-+  if (entry != NULL)
-+    {
-+      struct elf64_mb_link_hash_entry *eh;
-+
-+      eh = (struct elf64_mb_link_hash_entry *) entry;
-+      eh->tls_mask = 0;
-+    }
-+
-+  return entry;
-+}
-+
-+/* Create a mb ELF linker hash table.  */
-+
-+static struct bfd_link_hash_table *
-+microblaze_elf_link_hash_table_create (bfd *abfd)
-+{
-+  struct elf64_mb_link_hash_table *ret;
-+  size_t amt = sizeof (struct elf64_mb_link_hash_table);
-+
-+  ret = (struct elf64_mb_link_hash_table *) bfd_zmalloc (amt);
-+  if (ret == NULL)
-+    return NULL;
-+
-+  if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc,
-+                                     sizeof (struct elf64_mb_link_hash_entry),
-+                                     MICROBLAZE_ELF_DATA))
-+    {
-+      free (ret);
-+      return NULL;
-+    }
-+
-+  return &ret->elf.root;
-+}
-+
-+/* Set the values of the small data pointers.  */
-+
-+static void
-+microblaze_elf_final_sdp (struct bfd_link_info *info)
-+{
-+  struct bfd_link_hash_entry *h;
-+
-+  h = bfd_link_hash_lookup (info->hash, RO_SDA_ANCHOR_NAME, false, false, true);
-+  if (h != (struct bfd_link_hash_entry *) NULL
-+      && h->type == bfd_link_hash_defined)
-+    ro_small_data_pointer = (h->u.def.value
-+                            + h->u.def.section->output_section->vma
-+                            + h->u.def.section->output_offset);
-+
-+  h = bfd_link_hash_lookup (info->hash, RW_SDA_ANCHOR_NAME, false, false, true);
-+  if (h != (struct bfd_link_hash_entry *) NULL
-+      && h->type == bfd_link_hash_defined)
-+    rw_small_data_pointer = (h->u.def.value
-+                            + h->u.def.section->output_section->vma
-+                            + h->u.def.section->output_offset);
-+}
-+
-+static bfd_vma
-+dtprel_base (struct bfd_link_info *info)
-+{
-+  /* If tls_sec is NULL, we should have signalled an error already.  */
-+  if (elf_hash_table (info)->tls_sec == NULL)
-+    return 0;
-+  return elf_hash_table (info)->tls_sec->vma;
-+}
-+
-+/* The size of the thread control block.  */
-+#define TCB_SIZE       8
-+
-+/* Output a simple dynamic relocation into SRELOC.  */
-+
-+static void
-+microblaze_elf_output_dynamic_relocation (bfd *output_bfd,
-+                                         asection *sreloc,
-+                                         unsigned long reloc_index,
-+                                         unsigned long indx,
-+                                         int r_type,
-+                                         bfd_vma offset,
-+                                         bfd_vma addend)
-+{
-+
-+  Elf_Internal_Rela rel;
-+
-+  rel.r_info = ELF64_R_INFO (indx, r_type);
-+  rel.r_offset = offset;
-+  rel.r_addend = addend;
-+
-+  bfd_elf64_swap_reloca_out (output_bfd, &rel,
-+              (sreloc->contents + reloc_index * sizeof (Elf64_External_Rela)));
-+}
-+
-+/* This code is taken from elf64-m32r.c
-+   There is some attempt to make this function usable for many architectures,
-+   both USE_REL and USE_RELA ['twould be nice if such a critter existed],
-+   if only to serve as a learning tool.
-+
-+   The RELOCATE_SECTION function is called by the new ELF backend linker
-+   to handle the relocations for a section.
-+
-+   The relocs are always passed as Rela structures; if the section
-+   actually uses Rel structures, the r_addend field will always be
-+   zero.
-+
-+   This function is responsible for adjust the section contents as
-+   necessary, and (if using Rela relocs and generating a
-+   relocatable output file) adjusting the reloc addend as
-+   necessary.
-+
-+   This function does not have to worry about setting the reloc
-+   address or the reloc symbol index.
-+
-+   LOCAL_SYMS is a pointer to the swapped in local symbols.
-+
-+   LOCAL_SECTIONS is an array giving the section in the input file
-+   corresponding to the st_shndx field of each local symbol.
-+
-+   The global hash table entry for the global symbols can be found
-+   via elf_sym_hashes (input_bfd).
-+
-+   When generating relocatable output, this function must handle
-+   STB_LOCAL/STT_SECTION symbols specially.  The output symbol is
-+   going to be the section symbol corresponding to the output
-+   section, which means that the addend must be adjusted
-+   accordingly.  */
-+
-+static int
-+microblaze_elf_relocate_section (bfd *output_bfd,
-+                                struct bfd_link_info *info,
-+                                bfd *input_bfd,
-+                                asection *input_section,
-+                                bfd_byte *contents,
-+                                Elf_Internal_Rela *relocs,
-+                                Elf_Internal_Sym *local_syms,
-+                                asection **local_sections)
-+{
-+  struct elf64_mb_link_hash_table *htab;
-+  Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
-+  struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
-+  Elf_Internal_Rela *rel, *relend;
-+  int endian = (bfd_little_endian (output_bfd)) ? 0 : 2;
-+  /* Assume success.  */
-+  bool ret = true;
-+  asection *sreloc;
-+  bfd_vma *local_got_offsets;
-+  unsigned int tls_type;
-+
-+  if (!microblaze_elf_howto_table[R_MICROBLAZE_max-1])
-+    microblaze_elf_howto_init ();
-+
-+  htab = elf64_mb_hash_table (info);
-+  if (htab == NULL)
-+    return false;
-+
-+  local_got_offsets = elf_local_got_offsets (input_bfd);
-+
-+  sreloc = elf_section_data (input_section)->sreloc;
-+
-+  rel = relocs;
-+  relend = relocs + input_section->reloc_count;
-+  for (; rel < relend; rel++)
-+    {
-+      int r_type;
-+      reloc_howto_type *howto;
-+      unsigned long r_symndx;
-+      bfd_vma addend = rel->r_addend;
-+      bfd_vma offset = rel->r_offset;
-+      struct elf_link_hash_entry *h;
-+      Elf_Internal_Sym *sym;
-+      asection *sec;
-+      const char *sym_name;
-+      bfd_reloc_status_type r = bfd_reloc_ok;
-+      const char *errmsg = NULL;
-+      bool unresolved_reloc = false;
-+
-+      h = NULL;
-+      r_type = ELF64_R_TYPE (rel->r_info);
-+      tls_type = 0;
-+
-+      if (r_type < 0 || r_type >= (int) R_MICROBLAZE_max)
-+       {
-+         /* xgettext:c-format */
-+         _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
-+                             input_bfd, (int) r_type);
-+         bfd_set_error (bfd_error_bad_value);
-+         ret = false;
-+         continue;
-+       }
-+
-+      howto = microblaze_elf_howto_table[r_type];
-+      r_symndx = ELF64_R_SYM (rel->r_info);
-+
-+      if (bfd_link_relocatable (info))
-+       {
-+         /* This is a relocatable link.  We don't have to change
-+            anything, unless the reloc is against a section symbol,
-+            in which case we have to adjust according to where the
-+            section symbol winds up in the output section.  */
-+         sec = NULL;
-+         if (r_symndx >= symtab_hdr->sh_info)
-+           /* External symbol.  */
-+           continue;
-+
-+         /* Local symbol.  */
-+         sym = local_syms + r_symndx;
-+         sym_name = "<local symbol>";
-+         /* STT_SECTION: symbol is associated with a section.  */
-+         if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
-+           /* Symbol isn't associated with a section.  Nothing to do.  */
-+           continue;
-+
-+         sec = local_sections[r_symndx];
-+         addend += sec->output_offset + sym->st_value;
-+#ifndef USE_REL
-+         /* This can't be done for USE_REL because it doesn't mean anything
-+            and elf_link_input_bfd asserts this stays zero.  */
-+         /* rel->r_addend = addend; */
-+#endif
-+
-+#ifndef USE_REL
-+         /* Addends are stored with relocs.  We're done.  */
-+         continue;
-+#else /* USE_REL */
-+         /* If partial_inplace, we need to store any additional addend
-+            back in the section.  */
-+         if (!howto->partial_inplace)
-+           continue;
-+         /* ??? Here is a nice place to call a special_function like handler.  */
-+         r = _bfd_relocate_contents (howto, input_bfd, addend,
-+                                     contents + offset);
-+#endif /* USE_REL */
-+       }
-+      else
-+       {
-+         bfd_vma relocation;
-+         bool resolved_to_zero;
-+
-+         /* This is a final link.  */
-+         sym = NULL;
-+         sec = NULL;
-+         unresolved_reloc = false;
-+
-+         if (r_symndx < symtab_hdr->sh_info)
-+           {
-+             /* Local symbol.  */
-+             sym = local_syms + r_symndx;
-+             sec = local_sections[r_symndx];
-+             if (sec == 0)
-+               continue;
-+             sym_name = "<local symbol>";
-+             relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
-+             /* r_addend may have changed if the reference section was
-+                a merge section.  */
-+             addend = rel->r_addend;
-+           }
-+         else
-+           {
-+             /* External symbol.  */
-+             bool warned ATTRIBUTE_UNUSED;
-+             bool ignored ATTRIBUTE_UNUSED;
-+
-+             RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
-+                                      r_symndx, symtab_hdr, sym_hashes,
-+                                      h, sec, relocation,
-+                                      unresolved_reloc, warned, ignored);
-+             sym_name = h->root.root.string;
-+           }
-+
-+         /* Sanity check the address.  */
-+         if (offset > bfd_get_section_limit (input_bfd, input_section))
-+           {
-+             r = bfd_reloc_outofrange;
-+             goto check_reloc;
-+           }
-+
-+         resolved_to_zero = (h != NULL
-+                             && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
-+
-+         switch ((int) r_type)
-+           {
-+           case (int) R_MICROBLAZE_SRO32 :
-+             {
-+               const char *name;
-+
-+               /* Only relocate if the symbol is defined.  */
-+               if (sec)
-+                 {
-+                   name = bfd_section_name (sec);
-+
-+                   if (strcmp (name, ".sdata2") == 0
-+                       || strcmp (name, ".sbss2") == 0)
-+                     {
-+                       if (ro_small_data_pointer == 0)
-+                         microblaze_elf_final_sdp (info);
-+                       if (ro_small_data_pointer == 0)
-+                         {
-+                           ret = false;
-+                           r = bfd_reloc_undefined;
-+                           goto check_reloc;
-+                         }
-+
-+                       /* At this point `relocation' contains the object's
-+                          address.  */
-+                       relocation -= ro_small_data_pointer;
-+                       /* Now it contains the offset from _SDA2_BASE_.  */
-+                       r = _bfd_final_link_relocate (howto, input_bfd,
-+                                                     input_section,
-+                                                     contents, offset,
-+                                                     relocation, addend);
-+                     }
-+                   else
-+                     {
-+                       _bfd_error_handler
-+                         /* xgettext:c-format */
-+                         (_("%pB: the target (%s) of an %s relocation"
-+                            " is in the wrong section (%pA)"),
-+                          input_bfd,
-+                          sym_name,
-+                          microblaze_elf_howto_table[(int) r_type]->name,
-+                          sec);
-+                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
-+                       ret = false;
-+                       continue;
-+                     }
-+                 }
-+             }
-+             break;
-+
-+           case (int) R_MICROBLAZE_SRW32 :
-+             {
-+               const char *name;
-+
-+               /* Only relocate if the symbol is defined.  */
-+               if (sec)
-+                 {
-+                   name = bfd_section_name (sec);
-+
-+                   if (strcmp (name, ".sdata") == 0
-+                       || strcmp (name, ".sbss") == 0)
-+                     {
-+                       if (rw_small_data_pointer == 0)
-+                         microblaze_elf_final_sdp (info);
-+                       if (rw_small_data_pointer == 0)
-+                         {
-+                           ret = false;
-+                           r = bfd_reloc_undefined;
-+                           goto check_reloc;
-+                         }
-+
-+                       /* At this point `relocation' contains the object's
-+                          address.  */
-+                       relocation -= rw_small_data_pointer;
-+                       /* Now it contains the offset from _SDA_BASE_.  */
-+                       r = _bfd_final_link_relocate (howto, input_bfd,
-+                                                     input_section,
-+                                                     contents, offset,
-+                                                     relocation, addend);
-+                     }
-+                   else
-+                     {
-+                       _bfd_error_handler
-+                         /* xgettext:c-format */
-+                         (_("%pB: the target (%s) of an %s relocation"
-+                            " is in the wrong section (%pA)"),
-+                          input_bfd,
-+                          sym_name,
-+                          microblaze_elf_howto_table[(int) r_type]->name,
-+                          sec);
-+                       /*bfd_set_error (bfd_error_bad_value); ??? why? */
-+                       ret = false;
-+                       continue;
-+                     }
-+                 }
-+             }
-+             break;
-+
-+           case (int) R_MICROBLAZE_32_SYM_OP_SYM:
-+             break; /* Do nothing.  */
-+
-+           case (int) R_MICROBLAZE_GOTPC_64:
-+             relocation = (htab->elf.sgotplt->output_section->vma
-+                           + htab->elf.sgotplt->output_offset);
-+             relocation -= (input_section->output_section->vma
-+                            + input_section->output_offset
-+                            + offset + INST_WORD_SIZE);
-+             relocation += addend;
-+             bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-+                         contents + offset + endian);
-+             bfd_put_16 (input_bfd, relocation & 0xffff,
-+                         contents + offset + endian + INST_WORD_SIZE);
-+             break;
-+
-+           case (int) R_MICROBLAZE_TEXTPCREL_64:
-+             relocation = input_section->output_section->vma;
-+             relocation -= (input_section->output_section->vma
-+                            + input_section->output_offset
-+                            + offset + INST_WORD_SIZE);
-+             relocation += addend;
-+             bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-+                         contents + offset + endian);
-+             bfd_put_16 (input_bfd, relocation & 0xffff,
-+                         contents + offset + endian + INST_WORD_SIZE);
-+             break;
-+
-+           case (int) R_MICROBLAZE_PLT_64:
-+             {
-+               bfd_vma immediate;
-+               if (htab->elf.splt != NULL && h != NULL
-+                   && h->plt.offset != (bfd_vma) -1)
-+                 {
-+                   relocation = (htab->elf.splt->output_section->vma
-+                                 + htab->elf.splt->output_offset
-+                                 + h->plt.offset);
-+                   unresolved_reloc = false;
-+                   immediate = relocation - (input_section->output_section->vma
-+                                             + input_section->output_offset
-+                                             + offset + INST_WORD_SIZE);
-+                   bfd_put_16 (input_bfd, (immediate >> 16) & 0xffff,
-+                               contents + offset + endian);
-+                   bfd_put_16 (input_bfd, immediate & 0xffff,
-+                               contents + offset + endian + INST_WORD_SIZE);
-+                 }
-+               else
-+                 {
-+                   relocation -= (input_section->output_section->vma
-+                                  + input_section->output_offset
-+                                  + offset + INST_WORD_SIZE);
-+                   immediate = relocation;
-+                   bfd_put_16 (input_bfd, (immediate >> 16) & 0xffff,
-+                               contents + offset + endian);
-+                   bfd_put_16 (input_bfd, immediate & 0xffff,
-+                               contents + offset + endian + INST_WORD_SIZE);
-+                 }
-+               break;
-+             }
-+
-+           case (int) R_MICROBLAZE_TLSGD:
-+             tls_type = (TLS_TLS | TLS_GD);
-+             goto dogot;
-+           case (int) R_MICROBLAZE_TLSLD:
-+             tls_type = (TLS_TLS | TLS_LD);
-+             /* Fall through.  */
-+           dogot:
-+           case (int) R_MICROBLAZE_GOT_64:
-+             {
-+               bfd_vma *offp;
-+               bfd_vma off, off2;
-+               unsigned long indx;
-+               bfd_vma static_value;
-+
-+               bool need_relocs = false;
-+               if (htab->elf.sgot == NULL)
-+                 abort ();
-+
-+               indx = 0;
-+               offp = NULL;
-+
-+               /* 1. Identify GOT Offset;
-+                  2. Compute Static Values
-+                  3. Process Module Id, Process Offset
-+                  4. Fixup Relocation with GOT offset value. */
-+
-+               /* 1. Determine GOT Offset to use : TLS_LD, global, local */
-+               if (IS_TLS_LD (tls_type))
-+                 offp = &htab->tlsld_got.offset;
-+               else if (h != NULL)
-+                 {
-+                   if (htab->elf.sgotplt != NULL
-+                       && h->got.offset != (bfd_vma) -1)
-+                     offp = &h->got.offset;
-+                   else
-+                     abort ();
-+                 }
-+               else
-+                 {
-+                   if (local_got_offsets == NULL)
-+                     abort ();
-+                   offp = &local_got_offsets[r_symndx];
-+                 }
-+
-+               if (!offp)
-+                 abort ();
-+
-+               off = (*offp) & ~1;
-+               off2 = off;
-+
-+               if (IS_TLS_LD(tls_type) || IS_TLS_GD(tls_type))
-+                 off2 = off + 4;
-+
-+               /* Symbol index to use for relocs */
-+               if (h != NULL)
-+                 {
-+                   bool dyn =
-+                       elf_hash_table (info)->dynamic_sections_created;
-+
-+                   if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
-+                                                        bfd_link_pic (info),
-+                                                        h)
-+                       && (!bfd_link_pic (info)
-+                           || !SYMBOL_REFERENCES_LOCAL (info, h)))
-+                     indx = h->dynindx;
-+                 }
-+
-+               /* Need to generate relocs ? */
-+               if ((bfd_link_pic (info) || indx != 0)
-+                   && (h == NULL
-+                   || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
-+                       && !resolved_to_zero)
-+                   || h->root.type != bfd_link_hash_undefweak))
-+                 need_relocs = true;
-+
-+               /* 2. Compute/Emit Static value of r-expression */
-+               static_value = relocation + addend;
-+
-+               /* 3. Process module-id and offset */
-+               if (! ((*offp) & 1) )
-+                 {
-+                   bfd_vma got_offset;
-+
-+                   got_offset = (htab->elf.sgot->output_section->vma
-+                                 + htab->elf.sgot->output_offset
-+                                 + off);
-+
-+                   /* Process module-id */
-+                   if (IS_TLS_LD(tls_type))
-+                     {
-+                       if (! bfd_link_pic (info))
-+                         bfd_put_32 (output_bfd, 1,
-+                                     htab->elf.sgot->contents + off);
-+                       else
-+                         microblaze_elf_output_dynamic_relocation
-+                           (output_bfd,
-+                            htab->elf.srelgot,
-+                            htab->elf.srelgot->reloc_count++,
-+                            /* symindex= */ 0, R_MICROBLAZE_TLSDTPMOD32,
-+                            got_offset, 0);
-+                     }
-+                   else if (IS_TLS_GD(tls_type))
-+                     {
-+                       if (! need_relocs)
-+                         bfd_put_32 (output_bfd, 1,
-+                                     htab->elf.sgot->contents + off);
-+                       else
-+                         microblaze_elf_output_dynamic_relocation
-+                           (output_bfd,
-+                            htab->elf.srelgot,
-+                            htab->elf.srelgot->reloc_count++,
-+                            /* symindex= */ indx, R_MICROBLAZE_TLSDTPMOD32,
-+                            got_offset, indx ? 0 : static_value);
-+                     }
-+
-+                   /* Process Offset */
-+                   if (htab->elf.srelgot == NULL)
-+                     abort ();
-+
-+                   got_offset = (htab->elf.sgot->output_section->vma
-+                                 + htab->elf.sgot->output_offset
-+                                 + off2);
-+                   if (IS_TLS_LD(tls_type))
-+                     {
-+                       /* For LD, offset should be 0 */
-+                       *offp |= 1;
-+                       bfd_put_32 (output_bfd, 0,
-+                                   htab->elf.sgot->contents + off2);
-+                     }
-+                   else if (IS_TLS_GD(tls_type))
-+                     {
-+                       *offp |= 1;
-+                       static_value -= dtprel_base(info);
-+                       if (need_relocs)
-+                         microblaze_elf_output_dynamic_relocation
-+                           (output_bfd,
-+                            htab->elf.srelgot,
-+                            htab->elf.srelgot->reloc_count++,
-+                            /* symindex= */ indx, R_MICROBLAZE_TLSDTPREL32,
-+                            got_offset, indx ? 0 : static_value);
-+                       else
-+                         bfd_put_32 (output_bfd, static_value,
-+                                     htab->elf.sgot->contents + off2);
-+                     }
-+                   else
-+                     {
-+                       bfd_put_32 (output_bfd, static_value,
-+                                   htab->elf.sgot->contents + off2);
-+
-+                       /* Relocs for dyn symbols generated by
-+                          finish_dynamic_symbols */
-+                       if (bfd_link_pic (info) && h == NULL)
-+                         {
-+                           *offp |= 1;
-+                           microblaze_elf_output_dynamic_relocation
-+                             (output_bfd,
-+                              htab->elf.srelgot,
-+                              htab->elf.srelgot->reloc_count++,
-+                              /* symindex= */ indx, R_MICROBLAZE_REL,
-+                              got_offset, static_value);
-+                         }
-+                     }
-+                 }
-+
-+               /* 4. Fixup Relocation with GOT offset value
-+                     Compute relative address of GOT entry for applying
-+                     the current relocation */
-+               relocation = htab->elf.sgot->output_section->vma
-+                            + htab->elf.sgot->output_offset
-+                            + off
-+                            - htab->elf.sgotplt->output_section->vma
-+                            - htab->elf.sgotplt->output_offset;
-+
-+               /* Apply Current Relocation */
-+               bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-+                           contents + offset + endian);
-+               bfd_put_16 (input_bfd, relocation & 0xffff,
-+                           contents + offset + endian + INST_WORD_SIZE);
-+
-+               unresolved_reloc = false;
-+               break;
-+             }
-+
-+           case (int) R_MICROBLAZE_GOTOFF_64:
-+             {
-+               bfd_vma immediate;
-+               unsigned short lo, high;
-+               relocation += addend;
-+               relocation -= (htab->elf.sgotplt->output_section->vma
-+                              + htab->elf.sgotplt->output_offset);
-+               /* Write this value into correct location.  */
-+               immediate = relocation;
-+               lo = immediate & 0x0000ffff;
-+               high = (immediate >> 16) & 0x0000ffff;
-+               bfd_put_16 (input_bfd, high, contents + offset + endian);
-+               bfd_put_16 (input_bfd, lo,
-+                           contents + offset + INST_WORD_SIZE + endian);
-+               break;
-+             }
-+
-+           case (int) R_MICROBLAZE_GOTOFF_32:
-+             {
-+               relocation += addend;
-+               relocation -= (htab->elf.sgotplt->output_section->vma
-+                              + htab->elf.sgotplt->output_offset);
-+               /* Write this value into correct location.  */
-+               bfd_put_32 (input_bfd, relocation, contents + offset);
-+               break;
-+             }
-+
-+           case (int) R_MICROBLAZE_TLSDTPREL64:
-+             relocation += addend;
-+             relocation -= dtprel_base(info);
-+             bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-+                         contents + offset + endian);
-+             bfd_put_16 (input_bfd, relocation & 0xffff,
-+                         contents + offset + endian + INST_WORD_SIZE);
-+             break;
-+           case (int) R_MICROBLAZE_TEXTREL_64:
-+           case (int) R_MICROBLAZE_TEXTREL_32_LO:
-+           case (int) R_MICROBLAZE_64_PCREL :
-+           case (int) R_MICROBLAZE_64:
-+           case (int) R_MICROBLAZE_32:
-+             {
-+               /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
-+                  from removed linkonce sections, or sections discarded by
-+                  a linker script.  */
-+               if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
-+                 {
-+                   relocation += addend;
-+                   if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
-+                     bfd_put_32 (input_bfd, relocation, contents + offset);
-+                   else
-+                     {
-+                       if (r_type == R_MICROBLAZE_64_PCREL)
-+                         relocation -= (input_section->output_section->vma
-+                                        + input_section->output_offset
-+                                        + offset + INST_WORD_SIZE);
-+                       else if (r_type == R_MICROBLAZE_TEXTREL_64
-+                                || r_type == R_MICROBLAZE_TEXTREL_32_LO)
-+                         relocation -= input_section->output_section->vma;
-+
-+                       if (r_type == R_MICROBLAZE_TEXTREL_32_LO)
-+                         bfd_put_16 (input_bfd, relocation & 0xffff,
-+                                     contents + offset + endian);
-+
-+                       else
-+                         {
-+                           bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-+                                   contents + offset + endian);
-+                           bfd_put_16 (input_bfd, relocation & 0xffff,
-+                                   contents + offset + endian + INST_WORD_SIZE);
-+                     }
-+                   }
-+                   break;
-+                 }
-+
-+               if ((bfd_link_pic (info)
-+                    && (h == NULL
-+                        || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
-+                            && !resolved_to_zero)
-+                        || h->root.type != bfd_link_hash_undefweak)
-+                    && (!howto->pc_relative
-+                        || (h != NULL
-+                            && h->dynindx != -1
-+                            && (!info->symbolic
-+                                || !h->def_regular))))
-+                   || (!bfd_link_pic (info)
-+                       && h != NULL
-+                       && h->dynindx != -1
-+                       && !h->non_got_ref
-+                       && ((h->def_dynamic
-+                            && !h->def_regular)
-+                           || h->root.type == bfd_link_hash_undefweak
-+                           || h->root.type == bfd_link_hash_undefined)))
-+                 {
-+                   Elf_Internal_Rela outrel;
-+                   bfd_byte *loc;
-+                   bool skip;
-+
-+                   /* When generating a shared object, these relocations
-+                      are copied into the output file to be resolved at run
-+                      time.  */
-+
-+                   BFD_ASSERT (sreloc != NULL);
-+
-+                   skip = false;
-+
-+                   outrel.r_offset =
-+                     _bfd_elf_section_offset (output_bfd, info, input_section,
-+                                              rel->r_offset);
-+                   if (outrel.r_offset == (bfd_vma) -1)
-+                     skip = true;
-+                   else if (outrel.r_offset == (bfd_vma) -2)
-+                     skip = true;
-+                   outrel.r_offset += (input_section->output_section->vma
-+                                       + input_section->output_offset);
-+
-+                   if (skip)
-+                     memset (&outrel, 0, sizeof outrel);
-+                   /* h->dynindx may be -1 if the symbol was marked to
-+                      become local.  */
-+                   else if (h != NULL
-+                            && ((! info->symbolic && h->dynindx != -1)
-+                                || !h->def_regular))
-+                     {
-+                       BFD_ASSERT (h->dynindx != -1);
-+                       outrel.r_info = ELF64_R_INFO (h->dynindx, r_type);
-+                       outrel.r_addend = addend;
-+                     }
-+                   else
-+                     {
-+                       if (r_type == R_MICROBLAZE_32)
-+                         {
-+                           outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
-+                           outrel.r_addend = relocation + addend;
-+                         }
-+                       else
-+                         {
-+                           BFD_FAIL ();
-+                           _bfd_error_handler
-+                             (_("%pB: probably compiled without -fPIC?"),
-+                              input_bfd);
-+                           bfd_set_error (bfd_error_bad_value);
-+                           return false;
-+                         }
-+                     }
-+
-+                   loc = sreloc->contents;
-+                   loc += sreloc->reloc_count++ * sizeof (Elf64_External_Rela);
-+                   bfd_elf64_swap_reloca_out (output_bfd, &outrel, loc);
-+                   break;
-+                 }
-+               else
-+                 {
-+                   relocation += addend;
-+                   if (r_type == R_MICROBLAZE_32)
-+                     bfd_put_32 (input_bfd, relocation, contents + offset);
-+                   else
-+                     {
-+                       if (r_type == R_MICROBLAZE_64_PCREL)
-+                         relocation -= (input_section->output_section->vma
-+                                        + input_section->output_offset
-+                                        + offset + INST_WORD_SIZE);
-+                       else if (r_type == R_MICROBLAZE_TEXTREL_64
-+                                || r_type == R_MICROBLAZE_TEXTREL_32_LO)
-+                         relocation -= input_section->output_section->vma;
-+
-+                       if (r_type == R_MICROBLAZE_TEXTREL_32_LO)
-+                         {
-+                            bfd_put_16 (input_bfd, relocation & 0xffff,
-+                                        contents + offset + endian);
-+                         }
-+                       else
-+                         {
-+                           bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-+                                       contents + offset + endian);
-+                           bfd_put_16 (input_bfd, relocation & 0xffff,
-+                                       contents + offset + endian
-+                                       + INST_WORD_SIZE);
-+                         }
-+                   }
-+                   break;
-+                 }
-+             }
-+
-+           default :
-+             r = _bfd_final_link_relocate (howto, input_bfd, input_section,
-+                                           contents, offset,
-+                                           relocation, addend);
-+             break;
-+           }
-+       }
-+
-+    check_reloc:
-+
-+      if (r != bfd_reloc_ok)
-+       {
-+         /* FIXME: This should be generic enough to go in a utility.  */
-+         const char *name;
-+
-+         if (h != NULL)
-+           name = h->root.root.string;
-+         else
-+           {
-+             name = (bfd_elf_string_from_elf_section
-+                     (input_bfd, symtab_hdr->sh_link, sym->st_name));
-+             if (name == NULL || *name == '\0')
-+               name = bfd_section_name (sec);
-+           }
-+
-+         if (errmsg != NULL)
-+           goto common_error;
-+
-+         switch (r)
-+           {
-+           case bfd_reloc_overflow:
-+             (*info->callbacks->reloc_overflow)
-+               (info, (h ? &h->root : NULL), name, howto->name,
-+                (bfd_vma) 0, input_bfd, input_section, offset);
-+             break;
-+
-+           case bfd_reloc_undefined:
-+             (*info->callbacks->undefined_symbol)
-+               (info, name, input_bfd, input_section, offset, true);
-+             break;
-+
-+           case bfd_reloc_outofrange:
-+             errmsg = _("internal error: out of range error");
-+             goto common_error;
-+
-+           case bfd_reloc_notsupported:
-+             errmsg = _("internal error: unsupported relocation error");
-+             goto common_error;
-+
-+           case bfd_reloc_dangerous:
-+             errmsg = _("internal error: dangerous error");
-+             goto common_error;
-+
-+           default:
-+             errmsg = _("internal error: unknown error");
-+             /* Fall through.  */
-+           common_error:
-+             (*info->callbacks->warning) (info, errmsg, name, input_bfd,
-+                                          input_section, offset);
-+             break;
-+           }
-+       }
-+    }
-+
-+  return ret;
-+}
-+
-+/* Calculate fixup value for reference.  */
-+
-+static size_t
-+calc_fixup (bfd_vma start, bfd_vma size, asection *sec)
-+{
-+  bfd_vma end = start + size;
-+  size_t i, fixup = 0;
-+  struct _microblaze_elf_section_data *sdata;
-+
-+  if (sec == NULL || (sdata = microblaze_elf_section_data (sec)) == NULL)
-+    return 0;
-+
-+  /* Look for addr in relax table, total fixup value.  */
-+  for (i = 0; i < sdata->relax_count; i++)
-+    {
-+      if (end <= sdata->relax[i].addr)
-+       break;
-+      if (end != start && start > sdata->relax[i].addr)
-+       continue;
-+      fixup += sdata->relax[i].size;
-+    }
-+  return fixup;
-+}
-+
-+/* Read-modify-write into the bfd, an immediate value into appropriate fields of
-+   a 32-bit instruction.  */
-+static void
-+microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
-+{
-+    unsigned long instr = bfd_get_32 (abfd, bfd_addr);
-+    instr &= ~0x0000ffff;
-+    instr |= (val & 0x0000ffff);
-+    bfd_put_32 (abfd, instr, bfd_addr);
-+}
-+
-+/* Read-modify-write into the bfd, an immediate value into appropriate fields of
-+   two consecutive 32-bit instructions.  */
-+static void
-+microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
-+{
-+    unsigned long instr_hi;
-+    unsigned long instr_lo;
-+
-+    instr_hi = bfd_get_32 (abfd, bfd_addr);
-+    instr_hi &= ~0x0000ffff;
-+    instr_hi |= ((val >> 16) & 0x0000ffff);
-+    bfd_put_32 (abfd, instr_hi, bfd_addr);
-+
-+    instr_lo = bfd_get_32 (abfd, bfd_addr + INST_WORD_SIZE);
-+    instr_lo &= ~0x0000ffff;
-+    instr_lo |= (val & 0x0000ffff);
-+    bfd_put_32 (abfd, instr_lo, bfd_addr + INST_WORD_SIZE);
-+}
-+
-+static bool
-+microblaze_elf_relax_section (bfd *abfd,
-+                             asection *sec,
-+                             struct bfd_link_info *link_info,
-+                             bool *again)
-+{
-+  Elf_Internal_Shdr *symtab_hdr;
-+  Elf_Internal_Rela *internal_relocs;
-+  Elf_Internal_Rela *free_relocs = NULL;
-+  Elf_Internal_Rela *irel, *irelend;
-+  bfd_byte *contents = NULL;
-+  bfd_byte *free_contents = NULL;
-+  int rel_count;
-+  unsigned int shndx;
-+  size_t i, sym_index;
-+  asection *o;
-+  struct elf_link_hash_entry *sym_hash;
-+  Elf_Internal_Sym *isymbuf, *isymend;
-+  Elf_Internal_Sym *isym;
-+  size_t symcount;
-+  size_t offset;
-+  bfd_vma src, dest;
-+  struct _microblaze_elf_section_data *sdata;
-+
-+  /* We only do this once per section.  We may be able to delete some code
-+     by running multiple passes, but it is not worth it.  */
-+  *again = false;
-+
-+  /* Only do this for a text section.  */
-+  if (bfd_link_relocatable (link_info)
-+      || (sec->flags & SEC_RELOC) == 0
-+      || (sec->flags & SEC_CODE) == 0
-+      || sec->reloc_count == 0
-+      || (sdata = microblaze_elf_section_data (sec)) == NULL)
-+    return true;
-+
-+  BFD_ASSERT ((sec->size > 0) || (sec->rawsize > 0));
-+
-+  /* If this is the first time we have been called for this section,
-+     initialize the cooked size.  */
-+  if (sec->size == 0)
-+    sec->size = sec->rawsize;
-+
-+  /* Get symbols for this section.  */
-+  symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-+  isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
-+  symcount =  symtab_hdr->sh_size / sizeof (Elf64_External_Sym);
-+  if (isymbuf == NULL)
-+    isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, symcount,
-+                                   0, NULL, NULL, NULL);
-+  BFD_ASSERT (isymbuf != NULL);
-+
-+  internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
-+  if (internal_relocs == NULL)
-+    goto error_return;
-+  if (! link_info->keep_memory)
-+    free_relocs = internal_relocs;
-+
-+  sdata->relax_count = 0;
-+  sdata->relax = (struct relax_table *) bfd_malloc ((sec->reloc_count + 1)
-+                                                   * sizeof (*sdata->relax));
-+  if (sdata->relax == NULL)
-+    goto error_return;
-+
-+  irelend = internal_relocs + sec->reloc_count;
-+  rel_count = 0;
-+  for (irel = internal_relocs; irel < irelend; irel++, rel_count++)
-+    {
-+      bfd_vma symval;
-+      if ((ELF64_R_TYPE (irel->r_info) != (int) R_MICROBLAZE_64_PCREL)
-+         && (ELF64_R_TYPE (irel->r_info) != (int) R_MICROBLAZE_64 )
-+&& (ELF64_R_TYPE (irel->r_info) != (int) R_MICROBLAZE_TEXTREL_64))
-+       continue; /* Can't delete this reloc.  */
-+
-+      /* Get the section contents.  */
-+      if (contents == NULL)
-+       {
-+         if (elf_section_data (sec)->this_hdr.contents != NULL)
-+           contents = elf_section_data (sec)->this_hdr.contents;
-+         else
-+           {
-+             contents = (bfd_byte *) bfd_malloc (sec->size);
-+             if (contents == NULL)
-+               goto error_return;
-+             free_contents = contents;
-+
-+             if (!bfd_get_section_contents (abfd, sec, contents,
-+                                            (file_ptr) 0, sec->size))
-+               goto error_return;
-+              elf_section_data (sec)->this_hdr.contents = contents;
-+           }
-+       }
-+
-+      /* Get the value of the symbol referred to by the reloc.  */
-+      if (ELF64_R_SYM (irel->r_info) < symtab_hdr->sh_info)
-+       {
-+         /* A local symbol.  */
-+         asection *sym_sec;
-+
-+         isym = isymbuf + ELF64_R_SYM (irel->r_info);
-+          if (isym->st_shndx == SHN_UNDEF)
-+           sym_sec = bfd_und_section_ptr;
-+         else if (isym->st_shndx == SHN_ABS)
-+           sym_sec = bfd_abs_section_ptr;
-+         else if (isym->st_shndx == SHN_COMMON)
-+           sym_sec = bfd_com_section_ptr;
-+         else
-+           sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
-+
-+         symval = _bfd_elf_rela_local_sym (abfd, isym, &sym_sec, irel);
-+       }
-+      else
-+       {
-+         unsigned long indx;
-+         struct elf_link_hash_entry *h;
-+
-+         indx = ELF64_R_SYM (irel->r_info) - symtab_hdr->sh_info;
-+         h = elf_sym_hashes (abfd)[indx];
-+         BFD_ASSERT (h != NULL);
-+
-+          if (h->root.type != bfd_link_hash_defined
-+             && h->root.type != bfd_link_hash_defweak)
-+           /* This appears to be a reference to an undefined
-+              symbol.  Just ignore it--it will be caught by the
-+              regular reloc processing.  */
-+           continue;
-+
-+         symval = (h->root.u.def.value
-+                   + h->root.u.def.section->output_section->vma
-+                   + h->root.u.def.section->output_offset);
-+       }
-+
-+      /* If this is a PC-relative reloc, subtract the instr offset from
-+         the symbol value.  */
-+      if (ELF64_R_TYPE (irel->r_info) == (int) R_MICROBLAZE_64_PCREL)
-+       {
-+         symval = symval + irel->r_addend
-+           - (irel->r_offset
-+              + sec->output_section->vma
-+              + sec->output_offset);
-+        }
-+      else if (ELF64_R_TYPE (irel->r_info) == (int) R_MICROBLAZE_TEXTREL_64)
-+       {
-+         symval = symval + irel->r_addend - (sec->output_section->vma);
-+       }
-+      else
-+       symval += irel->r_addend;
-+
-+      if ((symval & 0xffff8000) == 0
-+         || (symval & 0xffff8000) == 0xffff8000)
-+       {
-+         /* We can delete this instruction.  */
-+         sdata->relax[sdata->relax_count].addr = irel->r_offset;
-+         sdata->relax[sdata->relax_count].size = INST_WORD_SIZE;
-+         sdata->relax_count++;
-+
-+         /* Rewrite relocation type.  */
-+          switch ((enum elf_microblaze_reloc_type) ELF64_R_TYPE (irel->r_info))
-+           {
-+           case R_MICROBLAZE_64_PCREL:
-+             irel->r_info = ELF64_R_INFO (ELF64_R_SYM (irel->r_info),
-+                                           (int) R_MICROBLAZE_32_PCREL_LO);
-+             break;
-+           case R_MICROBLAZE_64:
-+              irel->r_info = ELF64_R_INFO (ELF64_R_SYM (irel->r_info),
-+                                           (int) R_MICROBLAZE_32_LO);
-+             break;
-+           case R_MICROBLAZE_TEXTREL_64:
-+             irel->r_info = ELF64_R_INFO (ELF64_R_SYM (irel->r_info),
-+                                          (int) R_MICROBLAZE_TEXTREL_32_LO);
-+             break;
-+           default:
-+             /* Cannot happen.  */
-+             BFD_ASSERT (false);
-+            }
-+        }
-+    } /* Loop through all relocations.  */
-+
-+  /* Loop through the relocs again, and see if anything needs to change.  */
-+  if (sdata->relax_count > 0)
-+    {
-+      shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
-+      rel_count = 0;
-+      sdata->relax[sdata->relax_count].addr = sec->size;
-+
-+      for (irel = internal_relocs; irel < irelend; irel++, rel_count++)
-+        {
-+         bfd_vma nraddr;
-+
-+          /* Get the new reloc address.  */
-+         nraddr = irel->r_offset - calc_fixup (irel->r_offset, 0, sec);
-+          switch ((enum elf_microblaze_reloc_type) ELF64_R_TYPE (irel->r_info))
-+           {
-+           default:
-+             break;
-+           case R_MICROBLAZE_64_PCREL:
-+             break;
-+           case R_MICROBLAZE_64:
-+           case R_MICROBLAZE_32_LO:
-+             /* If this reloc is against a symbol defined in this
-+                section, we must check the addend to see it will put the value in
-+                range to be adjusted, and hence must be changed.  */
-+             if (ELF64_R_SYM (irel->r_info) < symtab_hdr->sh_info)
-+               {
-+                 isym = isymbuf + ELF64_R_SYM (irel->r_info);
-+                 /* Only handle relocs against .text.  */
-+                 if (isym->st_shndx == shndx
-+                     && ELF64_ST_TYPE (isym->st_info) == STT_SECTION)
-+                   irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
-+               }
-+             break;
-+           case R_MICROBLAZE_IMML_64:
-+             {
-+               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
-+               int sfix, efix;
-+            unsigned int val;
-+               bfd_vma target_address;
-+               target_address = irel->r_addend + irel->r_offset;
-+               sfix = calc_fixup (irel->r_offset, 0, sec);
-+               efix = calc_fixup (target_address, 0, sec);
-+
-+            /* Validate the in-band val.  */
-+            val = bfd_get_32 (abfd, contents + irel->r_offset);
-+            if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
-+               fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
-+            }
-+               irel->r_addend -= (efix - sfix);
-+               /* Should use HOWTO.  */
-+               microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
-+                                                  irel->r_addend);
-+             }
-+             break;
-+           case R_MICROBLAZE_NONE:
-+           case R_MICROBLAZE_32_NONE:
-+             {
-+               /* This was a PC-relative instruction that was
-+                  completely resolved.  */
-+               size_t sfix, efix;
-+                unsigned int val;
-+               bfd_vma target_address;
-+               target_address = irel->r_addend + irel->r_offset;
-+               sfix = calc_fixup (irel->r_offset, 0, sec);
-+               efix = calc_fixup (target_address, 0, sec);
-+
-+            /* Validate the in-band val.  */
-+            val = bfd_get_32 (abfd, contents + irel->r_offset);
-+            if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
-+               fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
-+            }
-+               irel->r_addend -= (efix - sfix);
-+               /* Should use HOWTO.  */
-+               microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
-+                                                  irel->r_addend);
-+             }
-+             break;
-+           case R_MICROBLAZE_64_NONE:
-+             {
-+               /* This was a PC-relative 64-bit instruction that was
-+                  completely resolved.  */
-+               size_t sfix, efix;
-+               bfd_vma target_address;
-+               target_address = irel->r_addend + irel->r_offset + INST_WORD_SIZE;
-+               sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
-+               efix = calc_fixup (target_address, 0, sec);
-+               irel->r_addend -= (efix - sfix);
-+    microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset
-+                                      + INST_WORD_SIZE, irel->r_addend);
-+             }
-+             break;
-+           }
-+          irel->r_offset = nraddr;
-+        } /* Change all relocs in this section.  */
-+
-+      /* Look through all other sections.  */
-+      for (o = abfd->sections; o != NULL; o = o->next)
-+        {
-+          Elf_Internal_Rela *irelocs;
-+          Elf_Internal_Rela *irelscan, *irelscanend;
-+          bfd_byte *ocontents;
-+
-+          if (o == sec
-+              || (o->flags & SEC_RELOC) == 0
-+              || o->reloc_count == 0)
-+            continue;
-+
-+          /* We always cache the relocs.  Perhaps, if info->keep_memory is
-+             false, we should free them, if we are permitted to.  */
-+
-+          irelocs = _bfd_elf_link_read_relocs (abfd, o, NULL, NULL, true);
-+          if (irelocs == NULL)
-+            goto error_return;
-+
-+          ocontents = NULL;
-+          irelscanend = irelocs + o->reloc_count;
-+          for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
-+            {
-+              if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
-+                {
-+                  unsigned int val;
-+
-+                  isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
-+
-+                  /* hax: We only do the following fixup for debug location lists.  */
-+                  if (strcmp(".debug_loc", o->name))
-+                    continue;
-+
-+                  /* This was a PC-relative instruction that was completely resolved.  */
-+                  if (ocontents == NULL)
-+                    {
-+                     if (elf_section_data (o)->this_hdr.contents != NULL)
-+                         ocontents = elf_section_data (o)->this_hdr.contents;
-+                     else
-+                       {
-+                         /* We always cache the section contents.
-+                            Perhaps, if info->keep_memory is false, we
-+                            should free them, if we are permitted to.  */
-+
-+                         if (o->rawsize == 0)
-+                             o->rawsize = o->size;
-+                         ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+                         if (ocontents == NULL)
-+                             goto error_return;
-+                         if (!bfd_get_section_contents (abfd, o, ocontents,
-+                                                         (file_ptr) 0,
-+                                                         o->rawsize))
-+                              goto error_return;
-+                         elf_section_data (o)->this_hdr.contents = ocontents;
-+                       }
-+                   }
-+
-+                  val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
-+                  if (val != irelscan->r_addend) {
-+                    fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
-+                  }
-+                  irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
-+                  microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
-+                                                     irelscan->r_addend);
-+              }
-+              if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-+                {
-+                 isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
-+
-+                  /* Look at the reloc only if the value has been resolved.  */
-+                  if (isym->st_shndx == shndx
-+                      && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION))
-+                    {
-+                      if (ocontents == NULL)
-+                        {
-+                          if (elf_section_data (o)->this_hdr.contents != NULL)
-+                            ocontents = elf_section_data (o)->this_hdr.contents;
-+                          else
-+                            {
-+                              /* We always cache the section contents.
-+                                 Perhaps, if info->keep_memory is false, we
-+                                 should free them, if we are permitted to.  */
-+                             if (o->rawsize == 0)
-+                               o->rawsize = o->size;
-+                              ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+                              if (ocontents == NULL)
-+                                goto error_return;
-+                              if (!bfd_get_section_contents (abfd, o, ocontents,
-+                                                             (file_ptr) 0,
-+                                                            o->rawsize))
-+                                goto error_return;
-+                              elf_section_data (o)->this_hdr.contents = ocontents;
-+                            }
-+
-+                        }
-+                     irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
-+                    }
-+                 else if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_SYM_OP_SYM)
-+                   {
-+                     isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
-+
-+                     /* Look at the reloc only if the value has been resolved.  */
-+                     if (ocontents == NULL)
-+                       {
-+                         if (elf_section_data (o)->this_hdr.contents != NULL)
-+                           ocontents = elf_section_data (o)->this_hdr.contents;
-+                         else
-+                           {
-+                             /* We always cache the section contents.
-+                                Perhaps, if info->keep_memory is false, we
-+                                should free them, if we are permitted to.  */
-+
-+                             if (o->rawsize == 0)
-+                               o->rawsize = o->size;
-+                             ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+                             if (ocontents == NULL)
-+                               goto error_return;
-+                             if (!bfd_get_section_contents (abfd, o, ocontents,
-+                                                            (file_ptr) 0,
-+                                                            o->rawsize))
-+                               goto error_return;
-+                             elf_section_data (o)->this_hdr.contents = ocontents;
-+                           }
-+                       }
-+              irelscan->r_addend -= calc_fixup (irelscan->r_addend
-+                                                       + isym->st_value,
-+                                                       0,
-+                                                       sec);
-+                   }
-+               }
-+             else if ((ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_PCREL_LO)
-+                      || (ELF32_R_TYPE (irelscan->r_info)
-+                                  == (int) R_MICROBLAZE_32_LO)
-+                      || (ELF32_R_TYPE (irelscan->r_info)
-+                                  == (int) R_MICROBLAZE_TEXTREL_32_LO))
-+               {
-+                 isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
-+
-+                 /* Look at the reloc only if the value has been resolved.  */
-+                 if (isym->st_shndx == shndx
-+                     && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION))
-+                   {
-+                     bfd_vma immediate;
-+                     bfd_vma target_address;
-+
-+                     if (ocontents == NULL)
-+                       {
-+                         if (elf_section_data (o)->this_hdr.contents != NULL)
-+                           ocontents = elf_section_data (o)->this_hdr.contents;
-+                         else
-+                           {
-+                             /* We always cache the section contents.
-+                                Perhaps, if info->keep_memory is false, we
-+                                should free them, if we are permitted to.  */
-+                             if (o->rawsize == 0)
-+                               o->rawsize = o->size;
-+                             ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+                             if (ocontents == NULL)
-+                               goto error_return;
-+                             if (!bfd_get_section_contents (abfd, o, ocontents,
-+                                                            (file_ptr) 0,
-+                                                            o->rawsize))
-+                               goto error_return;
-+                             elf_section_data (o)->this_hdr.contents = ocontents;
-+                           }
-+                       }
-+
-+                     unsigned long instr = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
-+                     immediate = instr & 0x0000ffff;
-+                     target_address = immediate;
-+                     offset = calc_fixup (target_address, 0, sec);
-+                     immediate -= offset;
-+                     irelscan->r_addend -= offset;
-+          microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
-+                                             irelscan->r_addend);
-+                   }
-+               }
-+
-+             if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64
-+          || (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_TEXTREL_64))
-+               {
-+                 isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
-+
-+                 /* Look at the reloc only if the value has been resolved.  */
-+                 if (isym->st_shndx == shndx
-+                     && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION))
-+                   {
-+                     if (ocontents == NULL)
-+                       {
-+                         if (elf_section_data (o)->this_hdr.contents != NULL)
-+                           ocontents = elf_section_data (o)->this_hdr.contents;
-+                         else
-+                           {
-+                             /* We always cache the section contents.
-+                                Perhaps, if info->keep_memory is false, we
-+                                should free them, if we are permitted to.  */
-+
-+                             if (o->rawsize == 0)
-+                               o->rawsize = o->size;
-+                             ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+                             if (ocontents == NULL)
-+                               goto error_return;
-+                             if (!bfd_get_section_contents (abfd, o, ocontents,
-+                                                            (file_ptr) 0,
-+                                                            o->rawsize))
-+                               goto error_return;
-+                             elf_section_data (o)->this_hdr.contents = ocontents;
-+                           }
-+                       }
-+                     offset = calc_fixup (irelscan->r_addend, 0, sec);
-+                     irelscan->r_addend -= offset;
-+                   }
-+               }
-+             else if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_PCREL)
-+               {
-+                 isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
-+
-+                 /* Look at the reloc only if the value has been resolved.  */
-+                 if (isym->st_shndx == shndx
-+                     && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION))
-+                   {
-+                     bfd_vma immediate;
-+                     bfd_vma target_address;
-+
-+                     if (ocontents == NULL)
-+                       {
-+                         if (elf_section_data (o)->this_hdr.contents != NULL)
-+                           ocontents = elf_section_data (o)->this_hdr.contents;
-+                         else
-+                           {
-+                             /* We always cache the section contents.
-+                                Perhaps, if info->keep_memory is false, we
-+                                should free them, if we are permitted to.  */
-+                             if (o->rawsize == 0)
-+                               o->rawsize = o->size;
-+                             ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+                             if (ocontents == NULL)
-+                               goto error_return;
-+                             if (!bfd_get_section_contents (abfd, o, ocontents,
-+                                                            (file_ptr) 0,
-+                                                            o->rawsize))
-+                               goto error_return;
-+                             elf_section_data (o)->this_hdr.contents = ocontents;
-+                           }
-+                       }
-+          unsigned long instr_hi =  bfd_get_32 (abfd, ocontents
-+                                                + irelscan->r_offset);
-+          unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
-+                                                + irelscan->r_offset
-+                                                + INST_WORD_SIZE);
-+          immediate = (instr_hi & 0x0000ffff) << 16;
-+          immediate |= (instr_lo & 0x0000ffff);
-+                     target_address = immediate;
-+                     offset = calc_fixup (target_address, 0, sec);
-+                     immediate -= offset;
-+                     irelscan->r_addend -= offset;
-+          microblaze_bfd_write_imm_value_64 (abfd, ocontents
-+                                             + irelscan->r_offset, immediate);
-+                   }
-+               }
-+            }
-+        }
-+
-+      /* Adjust the local symbols defined in this section.  */
-+      isymend = isymbuf + symtab_hdr->sh_info;
-+      for (isym = isymbuf; isym < isymend; isym++)
-+        {
-+          if (isym->st_shndx == shndx)
-+            {
-+              isym->st_value -= calc_fixup (isym->st_value, 0, sec);
-+              if (isym->st_size)
-+                isym->st_size -= calc_fixup (isym->st_value, isym->st_size, sec);
-+            }
-+        }
-+
-+      /* Now adjust the global symbols defined in this section.  */
-+      isym = isymbuf + symtab_hdr->sh_info;
-+      symcount =  (symtab_hdr->sh_size / sizeof (Elf64_External_Sym)) - symtab_hdr->sh_info;
-+      for (sym_index = 0; sym_index < symcount; sym_index++)
-+        {
-+          sym_hash = elf_sym_hashes (abfd)[sym_index];
-+          if ((sym_hash->root.type == bfd_link_hash_defined
-+                  || sym_hash->root.type == bfd_link_hash_defweak)
-+              && sym_hash->root.u.def.section == sec)
-+            {
-+              sym_hash->root.u.def.value -= calc_fixup (sym_hash->root.u.def.value,
-+                                                        0, sec);
-+              if (sym_hash->size)
-+                sym_hash->size -= calc_fixup (sym_hash->root.u.def.value,
-+                                              sym_hash->size, sec);
-+            }
-+        }
-+
-+      /* Physically move the code and change the cooked size.  */
-+      dest = sdata->relax[0].addr;
-+      for (i = 0; i < sdata->relax_count; i++)
-+       {
-+         size_t len;
-+         src = sdata->relax[i].addr + sdata->relax[i].size;
-+         len = (sdata->relax[i+1].addr - sdata->relax[i].addr
-+                - sdata->relax[i].size);
-+
-+         memmove (contents + dest, contents + src, len);
-+         sec->size -= sdata->relax[i].size;
-+         dest += len;
-+       }
-+
-+      elf_section_data (sec)->relocs = internal_relocs;
-+      free_relocs = NULL;
-+
-+      elf_section_data (sec)->this_hdr.contents = contents;
-+      free_contents = NULL;
-+
-+      symtab_hdr->contents = (bfd_byte *) isymbuf;
-+    }
-+
-+  free (free_relocs);
-+  free_relocs = NULL;
-+
-+  if (free_contents != NULL)
-+    {
-+      if (!link_info->keep_memory)
-+       free (free_contents);
-+      else
-+       /* Cache the section contents for elf_link_input_bfd.  */
-+       elf_section_data (sec)->this_hdr.contents = contents;
-+      free_contents = NULL;
-+    }
-+
-+  if (sdata->relax_count == 0)
-+    {
-+      *again = false;
-+      free (sdata->relax);
-+      sdata->relax = NULL;
-+    }
-+  else
-+    *again = true;
-+  return true;
-+
-+ error_return:
-+  free (free_relocs);
-+  free (free_contents);
-+  free (sdata->relax);
-+  sdata->relax = NULL;
-+  sdata->relax_count = 0;
-+  return false;
-+}
-+
-+/* Return the section that should be marked against GC for a given
-+   relocation.  */
-+
-+static asection *
-+microblaze_elf_gc_mark_hook (asection *sec,
-+                            struct bfd_link_info * info,
-+                            Elf_Internal_Rela * rel,
-+                            struct elf_link_hash_entry * h,
-+                            Elf_Internal_Sym * sym)
-+{
-+  if (h != NULL)
-+    switch (ELF64_R_TYPE (rel->r_info))
-+      {
-+      case R_MICROBLAZE_GNU_VTINHERIT:
-+      case R_MICROBLAZE_GNU_VTENTRY:
-+       return NULL;
-+      }
-+
-+  return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
-+}
-+
-+/* PIC support.  */
-+
-+#define PLT_ENTRY_SIZE 16
-+
-+#define PLT_ENTRY_WORD_0  0xb0000000          /* "imm 0".  */
-+#define PLT_ENTRY_WORD_1  0xe9940000          /* "lwi r12,r20,0" - relocated to lwi r12,r20,func@GOT.  */
-+#define PLT_ENTRY_WORD_1_NOPIC  0xe9800000    /* "lwi r12,r0,0" - non-PIC object.  */
-+#define PLT_ENTRY_WORD_2  0x98186000          /* "brad r12".  */
-+#define PLT_ENTRY_WORD_3  0x80000000          /* "nop".  */
-+
-+/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up
-+   shortcuts to them in our hash table.  */
-+
-+static bool
-+update_local_sym_info (bfd *abfd,
-+                      Elf_Internal_Shdr *symtab_hdr,
-+                      unsigned long r_symndx,
-+                      unsigned int tls_type)
-+{
-+  bfd_signed_vma *local_got_refcounts = elf_local_got_refcounts (abfd);
-+  unsigned char *local_got_tls_masks;
-+
-+  if (local_got_refcounts == NULL)
-+    {
-+      bfd_size_type size = symtab_hdr->sh_info;
-+
-+      size *= (sizeof (*local_got_refcounts) + sizeof (*local_got_tls_masks));
-+      local_got_refcounts = bfd_zalloc (abfd, size);
-+      if (local_got_refcounts == NULL)
-+        return false;
-+      elf_local_got_refcounts (abfd) = local_got_refcounts;
-+    }
-+
-+  local_got_tls_masks =
-+         (unsigned char *) (local_got_refcounts + symtab_hdr->sh_info);
-+  local_got_tls_masks[r_symndx] |= tls_type;
-+  local_got_refcounts[r_symndx] += 1;
-+
-+  return true;
-+}
-+/* Look through the relocs for a section during the first phase.  */
-+
-+static bool
-+microblaze_elf_check_relocs (bfd * abfd,
-+                            struct bfd_link_info * info,
-+                            asection * sec,
-+                            const Elf_Internal_Rela * relocs)
-+{
-+  Elf_Internal_Shdr *           symtab_hdr;
-+  struct elf_link_hash_entry ** sym_hashes;
-+  struct elf_link_hash_entry ** sym_hashes_end;
-+  const Elf_Internal_Rela *     rel;
-+  const Elf_Internal_Rela *     rel_end;
-+  struct elf64_mb_link_hash_table *htab;
-+  asection *sreloc = NULL;
-+
-+  if (bfd_link_relocatable (info))
-+    return true;
-+
-+  htab = elf64_mb_hash_table (info);
-+  if (htab == NULL)
-+    return false;
-+
-+  symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
-+  sym_hashes = elf_sym_hashes (abfd);
-+  sym_hashes_end = sym_hashes + symtab_hdr->sh_size / sizeof (Elf64_External_Sym);
-+  if (!elf_bad_symtab (abfd))
-+    sym_hashes_end -= symtab_hdr->sh_info;
-+
-+  rel_end = relocs + sec->reloc_count;
-+
-+  for (rel = relocs; rel < rel_end; rel++)
-+    {
-+      unsigned int r_type;
-+      struct elf_link_hash_entry * h;
-+      unsigned long r_symndx;
-+      unsigned char tls_type = 0;
-+
-+      r_symndx = ELF64_R_SYM (rel->r_info);
-+      r_type = ELF64_R_TYPE (rel->r_info);
-+
-+      if (r_symndx < symtab_hdr->sh_info)
-+        h = NULL;
-+      else
-+       {
-+         h = sym_hashes [r_symndx - symtab_hdr->sh_info];
-+         while (h->root.type == bfd_link_hash_indirect
-+                || h->root.type == bfd_link_hash_warning)
-+           h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+       }
-+
-+      switch (r_type)
-+        {
-+         /* This relocation describes the C++ object vtable hierarchy.
-+            Reconstruct it for later use during GC.  */
-+        case R_MICROBLAZE_GNU_VTINHERIT:
-+          if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
-+            return false;
-+          break;
-+
-+         /* This relocation describes which C++ vtable entries are actually
-+            used.  Record for later use during GC.  */
-+        case R_MICROBLAZE_GNU_VTENTRY:
-+          if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
-+            return false;
-+          break;
-+
-+         /* This relocation requires .plt entry.  */
-+        case R_MICROBLAZE_PLT_64:
-+          if (h != NULL)
-+           {
-+             h->needs_plt = 1;
-+             h->plt.refcount += 1;
-+           }
-+          break;
-+
-+         /* This relocation requires .got entry.  */
-+       case R_MICROBLAZE_TLSGD:
-+         tls_type |= (TLS_TLS | TLS_GD);
-+         goto dogottls;
-+       case R_MICROBLAZE_TLSLD:
-+         tls_type |= (TLS_TLS | TLS_LD);
-+         /* Fall through.  */
-+       dogottls:
-+         sec->has_tls_reloc = 1;
-+         /* Fall through.  */
-+       case R_MICROBLAZE_GOT_64:
-+         if (htab->elf.sgot == NULL)
-+           {
-+             if (htab->elf.dynobj == NULL)
-+               htab->elf.dynobj = abfd;
-+             if (!_bfd_elf_create_got_section (htab->elf.dynobj, info))
-+               return false;
-+           }
-+         if (h != NULL)
-+           {
-+             h->got.refcount += 1;
-+             elf64_mb_hash_entry (h)->tls_mask |= tls_type;
-+           }
-+          else
-+           {
-+             if (! update_local_sym_info(abfd, symtab_hdr, r_symndx, tls_type) )
-+               return false;
-+           }
-+         break;
-+
-+       case R_MICROBLAZE_GOTOFF_64:
-+       case R_MICROBLAZE_GOTOFF_32:
-+         if (htab->elf.sgot == NULL)
-+           {
-+             if (htab->elf.dynobj == NULL)
-+               htab->elf.dynobj = abfd;
-+             if (!_bfd_elf_create_got_section (htab->elf.dynobj, info))
-+               return false;
-+           }
-+          break;
-+
-+        case R_MICROBLAZE_64:
-+        case R_MICROBLAZE_64_PCREL:
-+        case R_MICROBLAZE_32:
-+          {
-+            if (h != NULL && !bfd_link_pic (info))
-+             {
-+               /* we may need a copy reloc.  */
-+               h->non_got_ref = 1;
-+
-+               /* we may also need a .plt entry.  */
-+               h->plt.refcount += 1;
-+               if (ELF64_R_TYPE (rel->r_info) != R_MICROBLAZE_64_PCREL)
-+                 h->pointer_equality_needed = 1;
-+             }
-+
-+
-+           /* If we are creating a shared library, and this is a reloc
-+              against a global symbol, or a non PC relative reloc
-+              against a local symbol, then we need to copy the reloc
-+              into the shared library.  However, if we are linking with
-+              -Bsymbolic, we do not need to copy a reloc against a
-+              global symbol which is defined in an object we are
-+              including in the link (i.e., DEF_REGULAR is set).  At
-+              this point we have not seen all the input files, so it is
-+              possible that DEF_REGULAR is not set now but will be set
-+              later (it is never cleared).  In case of a weak definition,
-+              DEF_REGULAR may be cleared later by a strong definition in
-+              a shared library.  We account for that possibility below by
-+              storing information in the relocs_copied field of the hash
-+              table entry.  A similar situation occurs when creating
-+              shared libraries and symbol visibility changes render the
-+              symbol local.
-+
-+              If on the other hand, we are creating an executable, we
-+              may need to keep relocations for symbols satisfied by a
-+              dynamic library if we manage to avoid copy relocs for the
-+              symbol.  */
-+
-+            if ((bfd_link_pic (info)
-+                 && (sec->flags & SEC_ALLOC) != 0
-+                 && (r_type != R_MICROBLAZE_64_PCREL
-+                     || (h != NULL
-+                        && (! info->symbolic
-+                            || h->root.type == bfd_link_hash_defweak
-+                            || !h->def_regular))))
-+               || (!bfd_link_pic (info)
-+                   && (sec->flags & SEC_ALLOC) != 0
-+                   && h != NULL
-+                   && (h->root.type == bfd_link_hash_defweak
-+                       || !h->def_regular)))
-+             {
-+               struct elf_dyn_relocs *p;
-+               struct elf_dyn_relocs **head;
-+
-+                /* When creating a shared object, we must copy these
-+                   relocs into the output file.  We create a reloc
-+                   section in dynobj and make room for the reloc.  */
-+
-+               if (sreloc == NULL)
-+                 {
-+                   bfd *dynobj;
-+
-+                   if (htab->elf.dynobj == NULL)
-+                     htab->elf.dynobj = abfd;
-+                   dynobj = htab->elf.dynobj;
-+
-+                   sreloc = _bfd_elf_make_dynamic_reloc_section (sec, dynobj,
-+                                                                 2, abfd, 1);
-+                   if (sreloc == NULL)
-+                     return false;
-+                 }
-+
-+               /* If this is a global symbol, we count the number of
-+                  relocations we need for this symbol.  */
-+               if (h != NULL)
-+                 head = &h->dyn_relocs;
-+               else
-+                 {
-+                   /* Track dynamic relocs needed for local syms too.
-+                      We really need local syms available to do this
-+                      easily.  Oh well.  */
-+
-+                   asection *s;
-+                   Elf_Internal_Sym *isym;
-+                   void *vpp;
-+
-+                   isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache,
-+                                                 abfd, r_symndx);
-+                   if (isym == NULL)
-+                     return false;
-+
-+                   s = bfd_section_from_elf_index (abfd, isym->st_shndx);
-+                   if (s == NULL)
-+                     return false;
-+
-+                   vpp = &elf_section_data (s)->local_dynrel;
-+                   head = (struct elf_dyn_relocs **) vpp;
-+                 }
-+
-+               p = *head;
-+               if (p == NULL || p->sec != sec)
-+                 {
-+                   size_t amt = sizeof *p;
-+                   p = ((struct elf_dyn_relocs *)
-+                        bfd_alloc (htab->elf.dynobj, amt));
-+                   if (p == NULL)
-+                     return false;
-+                   p->next = *head;
-+                   *head = p;
-+                   p->sec = sec;
-+                   p->count = 0;
-+                   p->pc_count = 0;
-+                 }
-+
-+               p->count += 1;
-+               if (r_type == R_MICROBLAZE_64_PCREL)
-+                 p->pc_count += 1;
-+             }
-+          }
-+          break;
-+        }
-+    }
-+
-+  return true;
-+}
-+
-+/* Copy the extra info we tack onto an elf_link_hash_entry.  */
-+
-+static void
-+microblaze_elf_copy_indirect_symbol (struct bfd_link_info *info,
-+                                    struct elf_link_hash_entry *dir,
-+                                    struct elf_link_hash_entry *ind)
-+{
-+  struct elf64_mb_link_hash_entry *edir, *eind;
-+
-+  edir = (struct elf64_mb_link_hash_entry *) dir;
-+  eind = (struct elf64_mb_link_hash_entry *) ind;
-+
-+  edir->tls_mask |= eind->tls_mask;
-+
-+  _bfd_elf_link_hash_copy_indirect (info, dir, ind);
-+}
-+
-+static bool
-+microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
-+                                     struct elf_link_hash_entry *h)
-+{
-+  struct elf64_mb_link_hash_table *htab;
-+  asection *s, *srel;
-+  unsigned int power_of_two;
-+
-+  htab = elf64_mb_hash_table (info);
-+  if (htab == NULL)
-+    return false;
-+
-+  /* If this is a function, put it in the procedure linkage table.  We
-+     will fill in the contents of the procedure linkage table later,
-+     when we know the address of the .got section.  */
-+  if (h->type == STT_FUNC
-+      || h->needs_plt)
-+    {
-+      if (h->plt.refcount <= 0
-+         || SYMBOL_CALLS_LOCAL (info, h)
-+         || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
-+             && h->root.type == bfd_link_hash_undefweak))
-+       {
-+         /* This case can occur if we saw a PLT reloc in an input
-+            file, but the symbol was never referred to by a dynamic
-+            object, or if all references were garbage collected.  In
-+            such a case, we don't actually need to build a procedure
-+            linkage table, and we can just do a PC32 reloc instead.  */
-+         h->plt.offset = (bfd_vma) -1;
-+         h->needs_plt = 0;
-+       }
-+
-+      return true;
-+    }
-+  else
-+    /* It's possible that we incorrectly decided a .plt reloc was
-+       needed for an R_MICROBLAZE_64_PCREL reloc to a non-function sym in
-+       check_relocs.  We can't decide accurately between function and
-+       non-function syms in check-relocs;  Objects loaded later in
-+       the link may change h->type.  So fix it now.  */
-+    h->plt.offset = (bfd_vma) -1;
-+
-+  /* If this is a weak symbol, and there is a real definition, the
-+     processor independent code will have arranged for us to see the
-+     real definition first, and we can just use the same value.  */
-+  if (h->is_weakalias)
-+    {
-+      struct elf_link_hash_entry *def = weakdef (h);
-+      BFD_ASSERT (def->root.type == bfd_link_hash_defined);
-+      h->root.u.def.section = def->root.u.def.section;
-+      h->root.u.def.value = def->root.u.def.value;
-+      return true;
-+    }
-+
-+  /* This is a reference to a symbol defined by a dynamic object which
-+     is not a function.  */
-+
-+  /* If we are creating a shared library, we must presume that the
-+     only references to the symbol are via the global offset table.
-+     For such cases we need not do anything here; the relocations will
-+     be handled correctly by relocate_section.  */
-+  if (bfd_link_pic (info))
-+    return true;
-+
-+  /* If there are no references to this symbol that do not use the
-+     GOT, we don't need to generate a copy reloc.  */
-+  if (!h->non_got_ref)
-+    return true;
-+
-+  /* If -z nocopyreloc was given, we won't generate them either.  */
-+  if (info->nocopyreloc)
-+    {
-+      h->non_got_ref = 0;
-+      return true;
-+    }
-+
-+  /* If we don't find any dynamic relocs in read-only sections, then
-+     we'll be keeping the dynamic relocs and avoiding the copy reloc.  */
-+  if (!_bfd_elf_readonly_dynrelocs (h))
-+    {
-+      h->non_got_ref = 0;
-+      return true;
-+    }
-+
-+  /* We must allocate the symbol in our .dynbss section, which will
-+     become part of the .bss section of the executable.  There will be
-+     an entry for this symbol in the .dynsym section.  The dynamic
-+     object will contain position independent code, so all references
-+     from the dynamic object to this symbol will go through the global
-+     offset table.  The dynamic linker will use the .dynsym entry to
-+     determine the address it must put in the global offset table, so
-+     both the dynamic object and the regular object will refer to the
-+     same memory location for the variable.  */
-+
-+  /* We must generate a R_MICROBLAZE_COPY reloc to tell the dynamic linker
-+     to copy the initial value out of the dynamic object and into the
-+     runtime process image.  */
-+  if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
-+    {
-+      s = htab->elf.sdynrelro;
-+      srel = htab->elf.sreldynrelro;
-+    }
-+  else
-+    {
-+      s = htab->elf.sdynbss;
-+      srel = htab->elf.srelbss;
-+    }
-+  if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
-+    {
-+      srel->size += sizeof (Elf64_External_Rela);
-+      h->needs_copy = 1;
-+    }
-+
-+  /* We need to figure out the alignment required for this symbol.  I
-+     have no idea how ELF linkers handle this.  */
-+  power_of_two = bfd_log2 (h->size);
-+  if (power_of_two > 3)
-+    power_of_two = 3;
-+
-+  /* Apply the required alignment.  */
-+  s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
-+  if (power_of_two > s->alignment_power)
-+    {
-+      if (!bfd_set_section_alignment (s, power_of_two))
-+       return false;
-+    }
-+
-+  /* Define the symbol as being at this point in the section.  */
-+  h->root.u.def.section = s;
-+  h->root.u.def.value = s->size;
-+
-+  /* Increment the section size to make room for the symbol.  */
-+  s->size += h->size;
-+  return true;
-+}
-+
-+/* Allocate space in .plt, .got and associated reloc sections for
-+   dynamic relocs.  */
-+
-+static bool
-+allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
-+{
-+  struct bfd_link_info *info;
-+  struct elf64_mb_link_hash_table *htab;
-+  struct elf64_mb_link_hash_entry *eh;
-+  struct elf_dyn_relocs *p;
-+
-+  if (h->root.type == bfd_link_hash_indirect)
-+    return true;
-+
-+  info = (struct bfd_link_info *) dat;
-+  htab = elf64_mb_hash_table (info);
-+  if (htab == NULL)
-+    return false;
-+
-+  if (htab->elf.dynamic_sections_created
-+      && h->plt.refcount > 0)
-+    {
-+      /* Make sure this symbol is output as a dynamic symbol.
-+        Undefined weak syms won't yet be marked as dynamic.  */
-+      if (h->dynindx == -1
-+          && !h->forced_local)
-+        {
-+          if (! bfd_elf_link_record_dynamic_symbol (info, h))
-+            return false;
-+        }
-+
-+      if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
-+       {
-+         asection *s = htab->elf.splt;
-+
-+          /* The first entry in .plt is reserved.  */
-+          if (s->size == 0)
-+            s->size = PLT_ENTRY_SIZE;
-+
-+          h->plt.offset = s->size;
-+
-+          /* If this symbol is not defined in a regular file, and we are
-+             not generating a shared library, then set the symbol to this
-+             location in the .plt.  This is required to make function
-+             pointers compare as equal between the normal executable and
-+             the shared library.  */
-+          if (! bfd_link_pic (info)
-+              && !h->def_regular)
-+            {
-+              h->root.u.def.section = s;
-+              h->root.u.def.value = h->plt.offset;
-+            }
-+
-+          /* Make room for this entry.  */
-+          s->size += PLT_ENTRY_SIZE;
-+
-+         /* We also need to make an entry in the .got.plt section, which
-+            will be placed in the .got section by the linker script.  */
-+         htab->elf.sgotplt->size += 4;
-+
-+         /* We also need to make an entry in the .rel.plt section.  */
-+         htab->elf.srelplt->size += sizeof (Elf32_External_Rela);
-+       }
-+      else
-+        {
-+          h->plt.offset = (bfd_vma) -1;
-+          h->needs_plt = 0;
-+        }
-+    }
-+  else
-+    {
-+      h->plt.offset = (bfd_vma) -1;
-+      h->needs_plt = 0;
-+    }
-+
-+  eh = (struct elf64_mb_link_hash_entry *) h;
-+  if (h->got.refcount > 0)
-+    {
-+      unsigned int need;
-+      asection *s;
-+
-+      /* Make sure this symbol is output as a dynamic symbol.
-+         Undefined weak syms won't yet be marked as dynamic.  */
-+      if (h->dynindx == -1
-+          && !h->forced_local)
-+        {
-+          if (! bfd_elf_link_record_dynamic_symbol (info, h))
-+            return false;
-+        }
-+
-+      need = 0;
-+      if ((eh->tls_mask & TLS_TLS) != 0)
-+        {
-+          /* Handle TLS Symbol */
-+          if ((eh->tls_mask & TLS_LD) != 0)
-+            {
-+              if (!eh->elf.def_dynamic)
-+                /* We'll just use htab->tlsld_got.offset.  This should
-+                   always be the case.  It's a little odd if we have
-+                   a local dynamic reloc against a non-local symbol.  */
-+                htab->tlsld_got.refcount += 1;
-+              else
-+                need += 8;
-+            }
-+          if ((eh->tls_mask & TLS_GD) != 0)
-+            need += 8;
-+        }
-+      else
-+        {
-+          /* Regular (non-TLS) symbol */
-+          need += 4;
-+        }
-+      if (need == 0)
-+        {
-+          h->got.offset = (bfd_vma) -1;
-+        }
-+      else
-+       {
-+         s = htab->elf.sgot;
-+         h->got.offset = s->size;
-+         s->size += need;
-+         htab->elf.srelgot->size += need * (sizeof (Elf64_External_Rela) / 4);
-+       }
-+    }
-+  else
-+    h->got.offset = (bfd_vma) -1;
-+
-+  if (h->dyn_relocs == NULL)
-+    return true;
-+
-+  /* In the shared -Bsymbolic case, discard space allocated for
-+     dynamic pc-relative relocs against symbols which turn out to be
-+     defined in regular objects.  For the normal shared case, discard
-+     space for pc-relative relocs that have become local due to symbol
-+     visibility changes.  */
-+
-+  if (bfd_link_pic (info))
-+    {
-+      if (h->def_regular
-+         && (h->forced_local
-+             || info->symbolic))
-+       {
-+         struct elf_dyn_relocs **pp;
-+
-+         for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
-+           {
-+             p->count -= p->pc_count;
-+             p->pc_count = 0;
-+             if (p->count == 0)
-+               *pp = p->next;
-+             else
-+               pp = &p->next;
-+           }
-+       }
-+      else if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
-+       h->dyn_relocs = NULL;
-+    }
-+  else
-+    {
-+      /* For the non-shared case, discard space for relocs against
-+        symbols which turn out to need copy relocs or are not
-+        dynamic.  */
-+
-+      if (!h->non_got_ref
-+         && ((h->def_dynamic
-+              && !h->def_regular)
-+             || (htab->elf.dynamic_sections_created
-+                 && (h->root.type == bfd_link_hash_undefweak
-+                     || h->root.type == bfd_link_hash_undefined))))
-+       {
-+         /* Make sure this symbol is output as a dynamic symbol.
-+            Undefined weak syms won't yet be marked as dynamic.  */
-+         if (h->dynindx == -1
-+             && !h->forced_local)
-+           {
-+             if (! bfd_elf_link_record_dynamic_symbol (info, h))
-+               return false;
-+           }
-+
-+         /* If that succeeded, we know we'll be keeping all the
-+            relocs.  */
-+         if (h->dynindx != -1)
-+           goto keep;
-+       }
-+
-+      h->dyn_relocs = NULL;
-+
-+    keep: ;
-+    }
-+
-+  /* Finally, allocate space.  */
-+  for (p = h->dyn_relocs; p != NULL; p = p->next)
-+    {
-+      asection *sreloc = elf_section_data (p->sec)->sreloc;
-+      sreloc->size += p->count * sizeof (Elf64_External_Rela);
-+    }
-+
-+  return true;
-+}
-+
-+/* Set the sizes of the dynamic sections.  */
-+
-+static bool
-+microblaze_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
-+                                     struct bfd_link_info *info)
-+{
-+  struct elf64_mb_link_hash_table *htab;
-+  bfd *dynobj;
-+  asection *s;
-+  bfd *ibfd;
-+
-+  htab = elf64_mb_hash_table (info);
-+  if (htab == NULL)
-+    return false;
-+
-+  dynobj = htab->elf.dynobj;
-+  BFD_ASSERT (dynobj != NULL);
-+
-+  /* Set up .got offsets for local syms, and space for local dynamic
-+     relocs.  */
-+  for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
-+    {
-+      bfd_signed_vma *local_got;
-+      bfd_signed_vma *end_local_got;
-+      bfd_size_type locsymcount;
-+      Elf_Internal_Shdr *symtab_hdr;
-+      unsigned char *lgot_masks;
-+      asection *srel;
-+
-+      if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
-+        continue;
-+
-+      for (s = ibfd->sections; s != NULL; s = s->next)
-+       {
-+         struct elf_dyn_relocs *p;
-+
-+         for (p = ((struct elf_dyn_relocs *)
-+                   elf_section_data (s)->local_dynrel);
-+              p != NULL;
-+              p = p->next)
-+           {
-+             if (!bfd_is_abs_section (p->sec)
-+                 && bfd_is_abs_section (p->sec->output_section))
-+               {
-+                 /* Input section has been discarded, either because
-+                    it is a copy of a linkonce section or due to
-+                    linker script /DISCARD/, so we'll be discarding
-+                    the relocs too.  */
-+               }
-+             else if (p->count != 0)
-+               {
-+                 srel = elf_section_data (p->sec)->sreloc;
-+                 srel->size += p->count * sizeof (Elf64_External_Rela);
-+                 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
-+                   info->flags |= DF_TEXTREL;
-+               }
-+           }
-+       }
-+
-+      local_got = elf_local_got_refcounts (ibfd);
-+      if (!local_got)
-+        continue;
-+
-+      symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
-+      locsymcount = symtab_hdr->sh_info;
-+      end_local_got = local_got + locsymcount;
-+      lgot_masks = (unsigned char *) end_local_got;
-+      s = htab->elf.sgot;
-+      srel = htab->elf.srelgot;
-+
-+      for (; local_got < end_local_got; ++local_got, ++lgot_masks)
-+       {
-+         if (*local_got > 0)
-+           {
-+             unsigned int need = 0;
-+             if ((*lgot_masks & TLS_TLS) != 0)
-+               {
-+                 if ((*lgot_masks & TLS_GD) != 0)
-+                   need += 8;
-+                 if ((*lgot_masks & TLS_LD) != 0)
-+                   htab->tlsld_got.refcount += 1;
-+               }
-+             else
-+               need += 4;
-+
-+             if (need == 0)
-+               {
-+                 *local_got = (bfd_vma) -1;
-+               }
-+             else
-+               {
-+                 *local_got = s->size;
-+                 s->size += need;
-+                 if (bfd_link_pic (info))
-+                   srel->size += need * (sizeof (Elf64_External_Rela) / 4);
-+               }
-+            }
-+          else
-+            *local_got = (bfd_vma) -1;
-+        }
-+    }
-+
-+  /* Allocate global sym .plt and .got entries, and space for global
-+     sym dynamic relocs.  */
-+  elf_link_hash_traverse (elf_hash_table (info), allocate_dynrelocs, info);
-+
-+  if (htab->tlsld_got.refcount > 0)
-+    {
-+      htab->tlsld_got.offset = htab->elf.sgot->size;
-+      htab->elf.sgot->size += 8;
-+      if (bfd_link_pic (info))
-+       htab->elf.srelgot->size += sizeof (Elf64_External_Rela);
-+    }
-+  else
-+    htab->tlsld_got.offset = (bfd_vma) -1;
-+
-+  if (elf_hash_table (info)->dynamic_sections_created)
-+    {
-+      /* Make space for the trailing nop in .plt.  */
-+      if (htab->elf.splt->size > 0)
-+       htab->elf.splt->size += 4;
-+    }
-+
-+  /* The check_relocs and adjust_dynamic_symbol entry points have
-+     determined the sizes of the various dynamic sections.  Allocate
-+     memory for them.  */
-+  for (s = dynobj->sections; s != NULL; s = s->next)
-+    {
-+      const char *name;
-+      bool strip = false;
-+
-+      if ((s->flags & SEC_LINKER_CREATED) == 0)
-+        continue;
-+
-+      /* It's OK to base decisions on the section name, because none
-+        of the dynobj section names depend upon the input files.  */
-+      name = bfd_section_name (s);
-+
-+      if (startswith (name, ".rela"))
-+       {
-+         if (s->size == 0)
-+           {
-+             /* If we don't need this section, strip it from the
-+                output file.  This is to handle .rela.bss and
-+                .rela.plt.  We must create it in
-+                create_dynamic_sections, because it must be created
-+                before the linker maps input sections to output
-+                sections.  The linker does that before
-+                adjust_dynamic_symbol is called, and it is that
-+                function which decides whether anything needs to go
-+                into these sections.  */
-+             strip = true;
-+           }
-+         else
-+           {
-+             /* We use the reloc_count field as a counter if we need
-+                to copy relocs into the output file.  */
-+             s->reloc_count = 0;
-+           }
-+       }
-+      else if (s != htab->elf.splt
-+              && s != htab->elf.sgot
-+              && s != htab->elf.sgotplt
-+              && s != htab->elf.sdynbss
-+              && s != htab->elf.sdynrelro)
-+       {
-+         /* It's not one of our sections, so don't allocate space.  */
-+         continue;
-+       }
-+
-+      if (strip)
-+       {
-+         s->flags |= SEC_EXCLUDE;
-+         continue;
-+       }
-+
-+      /* Allocate memory for the section contents.  */
-+      /* FIXME: This should be a call to bfd_alloc not bfd_zalloc.
-+        Unused entries should be reclaimed before the section's contents
-+        are written out, but at the moment this does not happen.  Thus in
-+        order to prevent writing out garbage, we initialise the section's
-+        contents to zero.  */
-+      s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
-+      if (s->contents == NULL && s->size != 0)
-+       return false;
-+    }
-+
-+  /* ??? Force DF_BIND_NOW?  */
-+  info->flags |= DF_BIND_NOW;
-+  return _bfd_elf_add_dynamic_tags (output_bfd, info, true);
-+}
-+
-+/* Finish up dynamic symbol handling.  We set the contents of various
-+   dynamic sections here.  */
-+
-+static bool
-+microblaze_elf_finish_dynamic_symbol (bfd *output_bfd,
-+                                     struct bfd_link_info *info,
-+                                     struct elf_link_hash_entry *h,
-+                                     Elf_Internal_Sym *sym)
-+{
-+  struct elf64_mb_link_hash_table *htab;
-+  struct elf64_mb_link_hash_entry *eh = elf64_mb_hash_entry(h);
-+
-+  htab = elf64_mb_hash_table (info);
-+  if (htab == NULL)
-+    return false;
-+
-+  if (h->plt.offset != (bfd_vma) -1)
-+    {
-+      asection *splt;
-+      asection *srela;
-+      asection *sgotplt;
-+      Elf_Internal_Rela rela;
-+      bfd_byte *loc;
-+      bfd_vma plt_index;
-+      bfd_vma got_offset;
-+      bfd_vma got_addr;
-+
-+      /* This symbol has an entry in the procedure linkage table.  Set
-+         it up.  */
-+      BFD_ASSERT (h->dynindx != -1);
-+
-+      splt = htab->elf.splt;
-+      srela = htab->elf.srelplt;
-+      sgotplt = htab->elf.sgotplt;
-+      BFD_ASSERT (splt != NULL && srela != NULL && sgotplt != NULL);
-+
-+      plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1; /* first entry reserved.  */
-+      got_offset = (plt_index + 3) * 4; /* 3 reserved ???  */
-+      got_addr = got_offset;
-+
-+      /* For non-PIC objects we need absolute address of the GOT entry.  */
-+      if (!bfd_link_pic (info))
-+       got_addr += sgotplt->output_section->vma + sgotplt->output_offset;
-+
-+      /* Fill in the entry in the procedure linkage table.  */
-+      bfd_put_32 (output_bfd, PLT_ENTRY_WORD_0 + ((got_addr >> 16) & 0xffff),
-+                  splt->contents + h->plt.offset);
-+      if (bfd_link_pic (info))
-+        bfd_put_32 (output_bfd, PLT_ENTRY_WORD_1 + (got_addr & 0xffff),
-+                    splt->contents + h->plt.offset + 4);
-+      else
-+        bfd_put_32 (output_bfd, PLT_ENTRY_WORD_1_NOPIC + (got_addr & 0xffff),
-+                    splt->contents + h->plt.offset + 4);
-+      bfd_put_32 (output_bfd, (bfd_vma) PLT_ENTRY_WORD_2,
-+                  splt->contents + h->plt.offset + 8);
-+      bfd_put_32 (output_bfd, (bfd_vma) PLT_ENTRY_WORD_3,
-+                  splt->contents + h->plt.offset + 12);
-+
-+      /* Any additions to the .got section??? */
-+      /*      bfd_put_32 (output_bfd,
-+             splt->output_section->vma + splt->output_offset + h->plt.offset + 4,
-+             sgotplt->contents + got_offset); */
-+
-+      /* Fill in the entry in the .rela.plt section.  */
-+      rela.r_offset = (sgotplt->output_section->vma
-+                       + sgotplt->output_offset
-+                       + got_offset);
-+      rela.r_info = ELF64_R_INFO (h->dynindx, R_MICROBLAZE_JUMP_SLOT);
-+      rela.r_addend = 0;
-+      loc = srela->contents;
-+      loc += plt_index * sizeof (Elf64_External_Rela);
-+      bfd_elf64_swap_reloca_out (output_bfd, &rela, loc);
-+
-+      if (!h->def_regular)
-+        {
-+          /* Mark the symbol as undefined, rather than as defined in
-+             the .plt section.  Zero the value.  */
-+          sym->st_shndx = SHN_UNDEF;
-+          sym->st_value = 0;
-+        }
-+    }
-+
-+  /* h->got.refcount to be checked ? */
-+  if (h->got.offset != (bfd_vma) -1 &&
-+      ! ((h->got.offset & 1) ||
-+          IS_TLS_LD(eh->tls_mask) || IS_TLS_GD(eh->tls_mask)))
-+    {
-+      asection *sgot;
-+      asection *srela;
-+      bfd_vma offset;
-+
-+      /* This symbol has an entry in the global offset table.  Set it
-+         up.  */
-+
-+      sgot = htab->elf.sgot;
-+      srela = htab->elf.srelgot;
-+      BFD_ASSERT (sgot != NULL && srela != NULL);
-+
-+      offset = (sgot->output_section->vma + sgot->output_offset
-+               + (h->got.offset &~ (bfd_vma) 1));
-+
-+      /* If this is a -Bsymbolic link, and the symbol is defined
-+         locally, we just want to emit a RELATIVE reloc.  Likewise if
-+         the symbol was forced to be local because of a version file.
-+         The entry in the global offset table will already have been
-+         initialized in the relocate_section function.  */
-+      if (bfd_link_pic (info)
-+          && ((info->symbolic && h->def_regular)
-+             || h->dynindx == -1))
-+       {
-+         asection *sec = h->root.u.def.section;
-+         bfd_vma value;
-+
-+         value = h->root.u.def.value;
-+         if (sec->output_section != NULL)
-+           /* PR 21180: If the output section is NULL, then the symbol is no
-+              longer needed, and in theory the GOT entry is redundant.  But
-+              it is too late to change our minds now...  */
-+           value += sec->output_section->vma + sec->output_offset;
-+
-+         microblaze_elf_output_dynamic_relocation (output_bfd,
-+                                                   srela, srela->reloc_count++,
-+                                                   /* symindex= */ 0,
-+                                                   R_MICROBLAZE_REL, offset,
-+                                                   value);
-+       }
-+      else
-+        {
-+          microblaze_elf_output_dynamic_relocation (output_bfd,
-+                                                    srela, srela->reloc_count++,
-+                                                    h->dynindx,
-+                                                    R_MICROBLAZE_GLOB_DAT,
-+                                                    offset, 0);
-+        }
-+
-+      bfd_put_32 (output_bfd, (bfd_vma) 0,
-+                  sgot->contents + (h->got.offset &~ (bfd_vma) 1));
-+    }
-+
-+  if (h->needs_copy)
-+    {
-+      asection *s;
-+      Elf_Internal_Rela rela;
-+      bfd_byte *loc;
-+
-+      /* This symbols needs a copy reloc.  Set it up.  */
-+
-+      BFD_ASSERT (h->dynindx != -1);
-+
-+      rela.r_offset = (h->root.u.def.value
-+                       + h->root.u.def.section->output_section->vma
-+                       + h->root.u.def.section->output_offset);
-+      rela.r_info = ELF64_R_INFO (h->dynindx, R_MICROBLAZE_COPY);
-+      rela.r_addend = 0;
-+      if (h->root.u.def.section == htab->elf.sdynrelro)
-+       s = htab->elf.sreldynrelro;
-+      else
-+       s = htab->elf.srelbss;
-+      loc = s->contents + s->reloc_count++ * sizeof (Elf32_External_Rela);
-+      bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
-+    }
-+
-+  /* Mark some specially defined symbols as absolute.  */
-+  if (h == htab->elf.hdynamic
-+      || h == htab->elf.hgot
-+      || h == htab->elf.hplt)
-+    sym->st_shndx = SHN_ABS;
-+
-+  return true;
-+}
-+
-+
-+/* Finish up the dynamic sections.  */
-+
-+static bool
-+microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
-+                                       struct bfd_link_info *info)
-+{
-+  bfd *dynobj;
-+  asection *sdyn, *sgot;
-+  struct elf64_mb_link_hash_table *htab;
-+
-+  htab = elf64_mb_hash_table (info);
-+  if (htab == NULL)
-+    return false;
-+
-+  dynobj = htab->elf.dynobj;
-+
-+  sdyn = bfd_get_linker_section (dynobj, ".dynamic");
-+
-+  if (htab->elf.dynamic_sections_created)
-+    {
-+      asection *splt;
-+      Elf64_External_Dyn *dyncon, *dynconend;
-+
-+      dyncon = (Elf64_External_Dyn *) sdyn->contents;
-+      dynconend = (Elf64_External_Dyn *) (sdyn->contents + sdyn->size);
-+      for (; dyncon < dynconend; dyncon++)
-+       {
-+         Elf_Internal_Dyn dyn;
-+         asection *s;
-+         bool size;
-+
-+          bfd_elf64_swap_dyn_in (dynobj, dyncon, &dyn);
-+
-+         switch (dyn.d_tag)
-+           {
-+           case DT_PLTGOT:
-+             s = htab->elf.sgotplt;
-+             size = false;
-+             break;
-+
-+           case DT_PLTRELSZ:
-+             s = htab->elf.srelplt;
-+             size = true;
-+             break;
-+
-+           case DT_JMPREL:
-+             s = htab->elf.srelplt;
-+             size = false;
-+             break;
-+
-+           default:
-+             continue;
-+           }
-+
-+         if (s == NULL)
-+           dyn.d_un.d_val = 0;
-+         else
-+           {
-+             if (!size)
-+               dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
-+             else
-+               dyn.d_un.d_val = s->size;
-+           }
-+         bfd_elf64_swap_dyn_out (output_bfd, &dyn, dyncon);
-+       }
-+
-+      splt = htab->elf.splt;
-+      BFD_ASSERT (splt != NULL && sdyn != NULL);
-+
-+      /* Clear the first entry in the procedure linkage table,
-+        and put a nop in the last four bytes.  */
-+      if (splt->size > 0)
-+       {
-+         memset (splt->contents, 0, PLT_ENTRY_SIZE);
-+         bfd_put_32 (output_bfd, (bfd_vma) 0x80000000 /* nop.  */,
-+                     splt->contents + splt->size - 4);
-+
-+         if (splt->output_section != bfd_abs_section_ptr)
-+           elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
-+       }
-+    }
-+
-+  /* Set the first entry in the global offset table to the address of
-+     the dynamic section.  */
-+  sgot = htab->elf.sgotplt;
-+  if (sgot && sgot->size > 0)
-+    {
-+      if (sdyn == NULL)
-+        bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
-+      else
-+        bfd_put_32 (output_bfd,
-+                    sdyn->output_section->vma + sdyn->output_offset,
-+                    sgot->contents);
-+      elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
-+    }
-+
-+  if (htab->elf.sgot && htab->elf.sgot->size > 0)
-+    elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize = 4;
-+
-+  return true;
-+}
-+
-+/* Hook called by the linker routine which adds symbols from an object
-+   file.  We use it to put .comm items in .sbss, and not .bss.  */
-+
-+static bool
-+microblaze_elf_add_symbol_hook (bfd *abfd,
-+                               struct bfd_link_info *info,
-+                               Elf_Internal_Sym *sym,
-+                               const char **namep ATTRIBUTE_UNUSED,
-+                               flagword *flagsp ATTRIBUTE_UNUSED,
-+                               asection **secp,
-+                               bfd_vma *valp)
-+{
-+  if (sym->st_shndx == SHN_COMMON
-+      && !bfd_link_relocatable (info)
-+      && sym->st_size <= elf_gp_size (abfd))
-+    {
-+      /* Common symbols less than or equal to -G nn bytes are automatically
-+        put into .sbss.  */
-+      *secp = bfd_make_section_old_way (abfd, ".sbss");
-+      if (*secp == NULL
-+         || !bfd_set_section_flags (*secp, SEC_IS_COMMON | SEC_SMALL_DATA))
-+       return false;
-+
-+      *valp = sym->st_size;
-+    }
-+
-+  return true;
-+}
-+
-+#define TARGET_LITTLE_SYM      microblaze_elf64_le_vec
-+#define TARGET_LITTLE_NAME     "elf64-microblazeel"
-+
-+#define TARGET_BIG_SYM          microblaze_elf64_vec
-+#define TARGET_BIG_NAME                "elf64-microblaze"
-+
-+#define ELF_ARCH               bfd_arch_microblaze
-+#define ELF_TARGET_ID          MICROBLAZE_ELF_DATA
-+#define ELF_MACHINE_CODE       EM_MICROBLAZE
-+#define ELF_MACHINE_ALT1       EM_MICROBLAZE_OLD
-+#define ELF_MAXPAGESIZE                0x1000
-+#define elf_info_to_howto      microblaze_elf_info_to_howto
-+#define elf_info_to_howto_rel  NULL
-+
-+#define bfd_elf64_bfd_reloc_type_lookup                microblaze_elf_reloc_type_lookup
-+#define bfd_elf64_bfd_is_local_label_name       microblaze_elf_is_local_label_name
-+#define bfd_elf64_new_section_hook             microblaze_elf_new_section_hook
-+#define elf_backend_relocate_section           microblaze_elf_relocate_section
-+#define bfd_elf64_bfd_relax_section             microblaze_elf_relax_section
-+#define bfd_elf64_bfd_merge_private_bfd_data    _bfd_generic_verify_endian_match
-+#define bfd_elf64_bfd_reloc_name_lookup                microblaze_elf_reloc_name_lookup
-+
-+#define elf_backend_gc_mark_hook               microblaze_elf_gc_mark_hook
-+#define elf_backend_check_relocs               microblaze_elf_check_relocs
-+#define elf_backend_copy_indirect_symbol       microblaze_elf_copy_indirect_symbol
-+#define bfd_elf64_bfd_link_hash_table_create   microblaze_elf_link_hash_table_create
-+#define elf_backend_can_gc_sections            1
-+#define elf_backend_can_refcount               1
-+#define elf_backend_want_got_plt               1
-+#define elf_backend_plt_readonly               1
-+#define elf_backend_got_header_size            12
-+#define elf_backend_want_dynrelro              1
-+#define elf_backend_rela_normal                        1
-+#define elf_backend_dtrel_excludes_plt         1
-+
-+#define elf_backend_adjust_dynamic_symbol      microblaze_elf_adjust_dynamic_symbol
-+#define elf_backend_create_dynamic_sections    _bfd_elf_create_dynamic_sections
-+#define elf_backend_finish_dynamic_sections    microblaze_elf_finish_dynamic_sections
-+#define elf_backend_finish_dynamic_symbol      microblaze_elf_finish_dynamic_symbol
-+#define elf_backend_size_dynamic_sections      microblaze_elf_size_dynamic_sections
-+#define elf_backend_add_symbol_hook            microblaze_elf_add_symbol_hook
-+
-+#include "elf64-target.h"
-diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index ea2507d1879..e74c051e781 100644
---- a/bfd/libbfd.h
-+++ b/bfd/libbfd.h
-@@ -2991,7 +2991,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
-   "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
-   "BFD_RELOC_MICROBLAZE_32_NONE",
-   "BFD_RELOC_MICROBLAZE_64_NONE",
-+  "BFD_RELOC_MICROBLAZE_64",
-   "BFD_RELOC_MICROBLAZE_64_GOTPC",
-+  "BFD_RELOC_MICROBLAZE_64_GPC",
-   "BFD_RELOC_MICROBLAZE_64_GOT",
-   "BFD_RELOC_MICROBLAZE_64_PLT",
-   "BFD_RELOC_MICROBLAZE_64_GOTOFF",
-diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 5ac8a8536a7..0f99df91299 100644
---- a/bfd/reloc.c
-+++ b/bfd/reloc.c
-@@ -6875,12 +6875,24 @@ ENUMDOC
-   done here - only used for relaxing
- ENUM
-   BFD_RELOC_MICROBLAZE_64_NONE
-+ENUMDOC
-+  This is a 32 bit reloc that stores the 32 bit pc relative
-+  value in two words (with an imml instruction).  No relocation is
-+  done here - only used for relaxing
-+ENUM
-+  BFD_RELOC_MICROBLAZE_64
- ENUMDOC
-   This is a 64 bit reloc that stores the 32 bit pc relative
-   value in two words (with an imm instruction).  No relocation is
-   done here - only used for relaxing
- ENUM
-   BFD_RELOC_MICROBLAZE_64_GOTPC
-+ENUMDOC
-+  This is a 64 bit reloc that stores the 32 bit pc relative
-+  value in two words (with an imml instruction).  No relocation is
-+  done here - only used for relaxing
-+ENUM
-+  BFD_RELOC_MICROBLAZE_64_GPC
- ENUMDOC
-   This is a 64 bit reloc that stores the 32 bit pc relative
-   value in two words (with an imm instruction).  The relocation is
-diff --git a/bfd/targets.c b/bfd/targets.c
-index 3284bb88aa8..6e93cb2f995 100644
---- a/bfd/targets.c
-+++ b/bfd/targets.c
-@@ -791,6 +791,8 @@ extern const bfd_target mep_elf32_le_vec;
- extern const bfd_target metag_elf32_vec;
- extern const bfd_target microblaze_elf32_vec;
- extern const bfd_target microblaze_elf32_le_vec;
-+extern const bfd_target microblaze_elf64_vec;
-+extern const bfd_target microblaze_elf64_le_vec;
- extern const bfd_target mips_ecoff_be_vec;
- extern const bfd_target mips_ecoff_le_vec;
- extern const bfd_target mips_ecoff_bele_vec;
-@@ -1153,6 +1155,10 @@ static const bfd_target * const _bfd_target_vector[] =
- 
-        &metag_elf32_vec,
- 
-+#ifdef BFD64
-+       &microblaze_elf64_vec,
-+       &microblaze_elf64_le_vec,
-+#endif
-        &microblaze_elf32_vec,
- 
-        &mips_ecoff_be_vec,
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 086f8704156..a6f12dda54a 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -35,10 +35,13 @@
- #define streq(a,b) (strcmp (a, b) == 0)
- #endif
- 
-+static int microblaze_arch_size = 0;
-+
- #define OPTION_EB (OPTION_MD_BASE + 0)
- #define OPTION_EL (OPTION_MD_BASE + 1)
- #define OPTION_LITTLE (OPTION_MD_BASE + 2)
- #define OPTION_BIG (OPTION_MD_BASE + 3)
-+#define OPTION_M64 (OPTION_MD_BASE + 4)
- 
- void microblaze_generate_symbol (char *sym);
- static bool check_spl_reg (unsigned *);
-@@ -91,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
- #define TLSTPREL_OFFSET      16
- #define TEXT_OFFSET         17
- #define TEXT_PC_OFFSET       18
-+#define DEFINED_64_OFFSET   19
- 
- /* Initialize the relax table.  */
- const relax_typeS md_relax_table[] =
-@@ -113,7 +117,9 @@ const relax_typeS md_relax_table[] =
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 15: TLSGOTTPREL_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 16: TLSTPREL_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
--  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 18: TEXT_PC_OFFSET.  */
-+  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },   /* 18: TEXT_PC_OFFSET.  */
-+//  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 17: DEFINED_64_OFFSET.  */
- };
- 
- static htab_t  opcode_hash_control;    /* Opcode mnemonics.  */
-@@ -393,7 +399,8 @@ const pseudo_typeS md_pseudo_table[] =
-   {"data32", cons, 4},     /* Same as word.  */
-   {"ent", s_func, 0}, /* Treat ent as function entry point.  */
-   {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
--  {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section.  */
-+  {"gpword", s_rva, 8}, /* gpword label => store resolved label address in data section.  */
-+  {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section.  */
-   {"weakext", microblaze_s_weakext, 0},
-   {"rodata", microblaze_s_rdata, 0},
-   {"sdata2", microblaze_s_rdata, 1},
-@@ -402,6 +409,7 @@ const pseudo_typeS md_pseudo_table[] =
-   {"sbss", microblaze_s_bss, 1},
-   {"text", microblaze_s_text, 0},
-   {"word", cons, 4},
-+  {"dword", cons, 8},
-   {"frame", s_ignore, 0},
-   {"mask", s_ignore, 0}, /* Emitted by gcc.  */
-   {NULL, NULL, 0}
-@@ -773,6 +781,74 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
-   return new_pointer;
- }
- 
-+ static char *
-+parse_imml (char * s, expressionS * e, long min, long max)
-+{
-+  char *new_pointer;
-+  char *atp;
-+  int itype, ilen;
-+
-+  ilen = 0;
-+
-+  /* Find the start of "@GOT" or "@PLT" suffix (if any) */
-+  for (atp = s; *atp != '@'; atp++)
-+    if (is_end_of_line[(unsigned char) *atp])
-+      break;
-+
-+  if (*atp == '@')
-+    {
-+      itype = match_imm (atp + 1, &ilen);
-+      if (itype != 0)
-+        {
-+          *atp = 0;
-+          e->X_md = itype;
-+        }
-+      else
-+        {
-+          atp = NULL;
-+          e->X_md = 0;
-+          ilen = 0;
-+        }
-+      *atp = 0;
-+    }
-+  else
-+    {
-+      atp = NULL;
-+      e->X_md = 0;
-+    }
-+
-+  if (atp && !GOT_symbol)
-+    {
-+      GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME);
-+    }
-+
-+  new_pointer = parse_exp (s, e);
-+
-+  if (!GOT_symbol && ! strncmp (s, GOT_SYMBOL_NAME, 20))
-+    {
-+      GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME);
-+    }
-+
-+  if (e->X_op == O_absent)
-+    ; /* An error message has already been emitted.  */
-+  else if ((e->X_op != O_constant && e->X_op != O_symbol) )
-+    as_fatal (_("operand must be a constant or a label"));
-+  else if ((e->X_op == O_constant) && ((long) e->X_add_number < min
-+                                      || (long) e->X_add_number > max))
-+    {
-+      as_fatal (_("operand must be absolute in range %ld..%ld, not %ld"),
-+                min, max, (long) e->X_add_number);
-+    }
-+
-+  if (atp)
-+    {
-+      *atp = '@'; /* restore back (needed?)  */
-+      if (new_pointer >= atp)
-+        new_pointer += ilen + 1; /* sizeof (imm_suffix) + 1 for '@' */
-+    }
-+  return new_pointer;
-+}
-+
- static char *
- check_got (int * got_type, int * got_len)
- {
-@@ -827,7 +903,7 @@ check_got (int * got_type, int * got_len)
- extern bfd_reloc_code_real_type
- parse_cons_expression_microblaze (expressionS *exp, int size)
- {
--  if (size == 4)
-+  if (size == 4 || (microblaze_arch_size == 64 && size == 8))
-     {
-       /* Handle @GOTOFF et.al.  */
-       char *save, *gotfree_copy;
-@@ -859,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
- 
- static const char * str_microblaze_ro_anchor = "RO";
- static const char * str_microblaze_rw_anchor = "RW";
-+static const char * str_microblaze_64 = "64";
- 
- static bool
- check_spl_reg (unsigned * reg)
-@@ -920,6 +997,7 @@ md_assemble (char * str)
-   unsigned int immed = 0, immed2 = 0, temp;
-   expressionS exp;
-   char name[20];
-+  long immedl;
- 
-   /* Drop leading whitespace.  */
-   while (ISSPACE (* str))
-@@ -1106,6 +1184,33 @@ md_assemble (char * str)
-               inst |= (immed << IMM_LOW) & IMM_MASK;
-             }
-        }
-+#if 0 //revisit
-+      else if (streq (name, "lli") || streq (name, "sli"))
-+       {
-+          temp = immed & 0xFFFFFFFFFFFF8000;
-+          if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
-+           {
-+              /* Needs an immediate inst.  */
-+              opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+
-+              inst1 = opcode1->bit_sequence;
-+             inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+           }
-+         inst |= (reg1 << RD_LOW) & RD_MASK;
-+         inst |= (reg2 << RA_LOW) & RA_MASK;
-+         inst |= (immed << IMM_LOW) & IMM_MASK;
-+        }
-+#endif
-       else
-        {
-           temp = immed & 0xFFFF8000;
-@@ -1135,7 +1240,7 @@ md_assemble (char * str)
-        }
-       break;
- 
--    case INST_TYPE_RD_R1_IMM5:
-+    case INST_TYPE_RD_R1_IMMS:
-       if (strcmp (op_end, ""))
-         op_end = parse_reg (op_end + 1, &reg1);  /* Get rd.  */
-       else
-@@ -1169,16 +1274,22 @@ md_assemble (char * str)
-           immed = exp.X_add_number;
-         }
- 
--      if (immed != (immed % 32))
-+      if ((immed != (immed % 32)) &&
-+          (opcode->instr == bslli || opcode->instr == bsrai || opcode->instr == bsrli))
-        {
-           as_warn (_("Shift value > 32. using <value %% 32>"));
-           immed = immed % 32;
-         }
-+      else if (immed != (immed % 64))
-+       {
-+          as_warn (_("Shift value > 64. using <value %% 64>"));
-+          immed = immed % 64;
-+        }
-       inst |= (reg1 << RD_LOW) & RD_MASK;
-       inst |= (reg2 << RA_LOW) & RA_MASK;
--      inst |= (immed << IMM_LOW) & IMM5_MASK;
-+      inst |= (immed << IMM_LOW) & IMM6_MASK;
-       break;
-- case INST_TYPE_RD_R1_IMM5_IMM5:
-+ case INST_TYPE_RD_R1_IMMW_IMMS:
-       if (strcmp (op_end, ""))
-         op_end = parse_reg (op_end + 1, &reg1);  /* Get rd.  */
-       else
-@@ -1202,7 +1313,7 @@ md_assemble (char * str)
- 
-       /* Width immediate value.  */
-       if (strcmp (op_end, ""))
--        op_end = parse_imm (op_end + 1, &exp, MIN_IMM_WIDTH, MAX_IMM_WIDTH);
-+        op_end = parse_imm (op_end + 1, &exp, MIN_IMM, MAX_IMM);
-       else
-         as_fatal (_("Error in statement syntax"));
-       if (exp.X_op != O_constant)
-@@ -1214,6 +1325,8 @@ md_assemble (char * str)
-         immed = exp.X_add_number;
-       if (opcode->instr == bsefi && immed > 31)
-         as_fatal (_("Width value must be less than 32"));
-+      else if (opcode->instr == bslefi && immed > 63)
-+        as_fatal (_("Width value must be less than 64"));
- 
-       /* Shift immediate value.  */
-       if (strcmp (op_end, ""))
-@@ -1221,32 +1334,40 @@ md_assemble (char * str)
-       else
-         as_fatal (_("Error in statement syntax"));
-       if (exp.X_op != O_constant)
--           {
-+       {
-           as_warn (_("Symbol used as immediate shift value for bit field instruction"));
-           immed2 = 0;
-         }
-       else
--           {
-+        {
-           output = frag_more (isize);
-           immed2 = exp.X_add_number;
--           }
--      if (immed2 != (immed2 % 32))
--           {
--          as_warn (_("Shift value greater than 32. using <value %% 32>"));
-+       }
-+      if ((immed2 != (immed2 % 32)) && (opcode->instr == bsefi || opcode->instr == bsifi))
-+       {
-+          
-+         as_warn (_("Shift value greater than 32. using <value %% 32>"));
-           immed2 = immed2 % 32;
-         }
-+      else if (immed2 != (immed2 % 64))
-+       {
-+          as_warn (_("Shift value greater than 64. using <value %% 64>"));
-+          immed2 = immed2 % 64;
-+        }
- 
-       /* Check combined value.  */
--      if (immed + immed2 > 32)
-+      if ((immed + immed2 > 32) && (opcode->instr == bsefi || opcode->instr == bsifi))
-         as_fatal (_("Width value + shift value must not be greater than 32"));
- 
-+      else if (immed + immed2 > 64)
-+        as_fatal (_("Width value + shift value must not be greater than 64"));
-       inst |= (reg1 << RD_LOW) & RD_MASK;
-       inst |= (reg2 << RA_LOW) & RA_MASK;
--      if (opcode->instr == bsefi)
--        inst |= (immed & IMM5_MASK) << IMM_WIDTH_LOW; /* bsefi */
-+      if (opcode->instr == bsefi || opcode->instr == bslefi)
-+        inst |= (immed & IMM6_MASK) << IMM_WIDTH_LOW; /* bsefi or bslefi */
-       else
--        inst |= ((immed + immed2 - 1) & IMM5_MASK) << IMM_WIDTH_LOW; /* bsifi */
--      inst |= (immed2 << IMM_LOW) & IMM5_MASK;
-+        inst |= ((immed + immed2 - 1) & IMM6_MASK) << IMM_WIDTH_LOW; /* bsifi or bslifi */
-+      inst |= (immed2 << IMM_LOW) & IMM6_MASK;
-       break;
-     case INST_TYPE_R1_R2:
-       if (strcmp (op_end, ""))
-@@ -1820,6 +1941,143 @@ md_assemble (char * str)
-       }
-       inst |= (immed << IMM_MBAR);
-       break;
-+    /* For 64-bit instructions */
-+    case INST_TYPE_RD_R1_IMML:
-+      if (strcmp (op_end, ""))
-+       op_end = parse_reg (op_end + 1, &reg1);  /* Get rd.  */
-+      else
-+       {
-+          as_fatal (_("Error in statement syntax"));
-+          reg1 = 0;
-+        }
-+      if (strcmp (op_end, ""))
-+       op_end = parse_reg (op_end + 1, &reg2);  /* Get r1.  */
-+      else
-+       {
-+          as_fatal (_("Error in statement syntax"));
-+          reg2 = 0;
-+        }
-+      if (strcmp (op_end, ""))
-+       op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+      else
-+       as_fatal (_("Error in statement syntax"));
-+
-+      /* Check for spl registers.  */
-+      if (check_spl_reg (& reg1))
-+       as_fatal (_("Cannot use special register with this instruction"));
-+      if (check_spl_reg (& reg2))
-+       as_fatal (_("Cannot use special register with this instruction"));
-+
-+      if (exp.X_op != O_constant)
-+       {
-+         char *opc = NULL;
-+         //char *opc = str_microblaze_64;
-+         relax_substateT subtype;
-+
-+         if (exp.X_md != 0)
-+           subtype = get_imm_otype(exp.X_md);
-+         else
-+           subtype = opcode->inst_offset_type;
-+
-+         output = frag_var (rs_machine_dependent,
-+                            isize * 2, /* maxm of 2 words.  */
-+                            isize * 2, /* minm of 2 words.  */
-+                            subtype,   /* PC-relative or not.  */
-+                            exp.X_add_symbol,
-+                            exp.X_add_number,
-+                            (char *) opc);
-+         immedl = 0L;
-+        }
-+      else
-+       {
-+         output = frag_more (isize);
-+         immedl = exp.X_add_number;
-+
-+         opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+         if (opcode1 == NULL)
-+           {
-+             as_bad (_("unknown opcode \"%s\""), "imml");
-+             return;
-+           }
-+
-+         inst1 = opcode1->bit_sequence;
-+         inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+         output[0] = INST_BYTE0 (inst1);
-+         output[1] = INST_BYTE1 (inst1);
-+         output[2] = INST_BYTE2 (inst1);
-+         output[3] = INST_BYTE3 (inst1);
-+         output = frag_more (isize);
-+        }
-+
-+      inst |= (reg1 << RD_LOW) & RD_MASK;
-+      inst |= (reg2 << RA_LOW) & RA_MASK;
-+      inst |= (immedl << IMM_LOW) & IMM_MASK;
-+      break;
-+
-+    case INST_TYPE_R1_IMML:
-+      if (strcmp (op_end, ""))
-+        op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
-+      else
-+       {
-+          as_fatal (_("Error in statement syntax"));
-+          reg1 = 0;
-+        }
-+      if (strcmp (op_end, ""))
-+        op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+      else
-+        as_fatal (_("Error in statement syntax"));
-+
-+      /* Check for spl registers.  */
-+      if (check_spl_reg (&reg1))
-+        as_fatal (_("Cannot use special register with this instruction"));
-+
-+      if (exp.X_op != O_constant)
-+       {
-+         //char *opc = NULL;
-+          char *opc = str_microblaze_64;
-+          relax_substateT subtype;
-+
-+         if (exp.X_md != 0)
-+           subtype = get_imm_otype(exp.X_md);
-+         else
-+           subtype = opcode->inst_offset_type;
-+
-+         output = frag_var (rs_machine_dependent,
-+                            isize * 2, /* maxm of 2 words.  */
-+                            isize * 2, /* minm of 2 words.  */
-+                            subtype,   /* PC-relative or not.  */
-+                            exp.X_add_symbol,
-+                            exp.X_add_number,
-+                            (char *) opc);
-+         immedl = 0L;
-+       }
-+      else
-+       {
-+          output = frag_more (isize);
-+          immedl = exp.X_add_number;
-+         opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+         if (opcode1 == NULL)
-+           {
-+             as_bad (_("unknown opcode \"%s\""), "imml");
-+             return;
-+           }
-+
-+          inst1 = opcode1->bit_sequence;
-+         inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+          output[0] = INST_BYTE0 (inst1);
-+          output[1] = INST_BYTE1 (inst1);
-+          output[2] = INST_BYTE2 (inst1);
-+          output[3] = INST_BYTE3 (inst1);
-+          output = frag_more (isize);
-+        }
-+
-+      inst |= (reg1 << RA_LOW) & RA_MASK;
-+      inst |= (immedl << IMM_LOW) & IMM_MASK;
-+      break;
-+
-+    case INST_TYPE_IMML:
-+      as_fatal (_("An IMML instruction should not be present in the .s file"));
-+      break;
- 
-     default:
-       as_fatal (_("unimplemented opcode \"%s\""), name);
-@@ -1927,6 +2185,7 @@ struct option md_longopts[] =
-   {"EL", no_argument, NULL, OPTION_EL},
-   {"mlittle-endian", no_argument, NULL, OPTION_LITTLE},
-   {"mbig-endian", no_argument, NULL, OPTION_BIG},
-+  {"m64", no_argument, NULL, OPTION_M64},
-   { NULL,          no_argument, NULL, 0}
- };
- 
-@@ -1971,13 +2230,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
-       fragP->fr_fix += INST_WORD_SIZE * 2;
-       fragP->fr_var = 0;
-       break;
-+    case DEFINED_64_OFFSET:
-+      if (fragP->fr_symbol == GOT_symbol)
-+        fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol,
-+                fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GPC);
-+      else
-+        fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol,
-+                fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64);
-+      fragP->fr_fix += INST_WORD_SIZE * 2;
-+      fragP->fr_var = 0;
-+      break;
-     case DEFINED_ABS_SEGMENT:
-       if (fragP->fr_symbol == GOT_symbol)
-         fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
-                 fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GOTPC);
-       else
-         fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
--                fragP->fr_offset, false, BFD_RELOC_64);
-+                fragP->fr_offset, true, BFD_RELOC_64);
-       fragP->fr_fix += INST_WORD_SIZE * 2;
-       fragP->fr_var = 0;
-       break;
-@@ -2198,23 +2467,38 @@ md_apply_fix (fixS *   fixP,
-     case BFD_RELOC_64_PCREL:
-     case BFD_RELOC_64:
-     case BFD_RELOC_MICROBLAZE_64_TEXTREL:
-+    case BFD_RELOC_MICROBLAZE_64:
-       /* Add an imm instruction.  First save the current instruction.  */
-       for (i = 0; i < INST_WORD_SIZE; i++)
-        buf[i + INST_WORD_SIZE] = buf[i];
-+      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+        {
-+          /* Generate the imm instruction.  */
-+          opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+          if (opcode1 == NULL)
-+           {
-+             as_bad (_("unknown opcode \"%s\""), "imml");
-+             return;
-+           }
- 
--      /* Generate the imm instruction.  */
--      opcode1
--       = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
--      if (opcode1 == NULL)
--       {
--         as_bad (_("unknown opcode \"%s\""), "imm");
--         return;
--       }
--
--      inst1 = opcode1->bit_sequence;
--      if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
--       inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
--
-+           inst1 = opcode1->bit_sequence;
-+           if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-+            inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+         }
-+      else
-+        {
-+          /* Generate the imm instruction.  */
-+          opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
-+          if (opcode1 == NULL)
-+           {
-+             as_bad (_("unknown opcode \"%s\""), "imm");
-+             return;
-+           }
-+     
-+          inst1 = opcode1->bit_sequence;
-+          if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-+           inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
-+         }
-       buf[0] = INST_BYTE0 (inst1);
-       buf[1] = INST_BYTE1 (inst1);
-       buf[2] = INST_BYTE2 (inst1);
-@@ -2243,6 +2527,7 @@ md_apply_fix (fixS *   fixP,
-       /* Fall through.  */
- 
-     case BFD_RELOC_MICROBLAZE_64_GOTPC:
-+    case BFD_RELOC_MICROBLAZE_64_GPC:
-     case BFD_RELOC_MICROBLAZE_64_GOT:
-     case BFD_RELOC_MICROBLAZE_64_PLT:
-     case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2250,13 +2535,17 @@ md_apply_fix (fixS *   fixP,
-       /* Add an imm instruction.  First save the current instruction.  */
-       for (i = 0; i < INST_WORD_SIZE; i++)
-        buf[i + INST_WORD_SIZE] = buf[i];
--
-       /* Generate the imm instruction.  */
--      opcode1
--       = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
-+      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC)
-+        opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+      else
-+        opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
-       if (opcode1 == NULL)
-        {
--         as_bad (_("unknown opcode \"%s\""), "imm");
-+         if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC)
-+           as_bad (_("unknown opcode \"%s\""), "imml");
-+          else
-+           as_bad (_("unknown opcode \"%s\""), "imm");
-          return;
-        }
- 
-@@ -2280,6 +2569,8 @@ md_apply_fix (fixS *   fixP,
-         moves code around due to relaxing.  */
-       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
-+      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
-       else if (fixP->fx_r_type == BFD_RELOC_32)
-        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-       else
-@@ -2323,6 +2614,32 @@ md_estimate_size_before_relax (fragS * fragP,
-           as_bad (_("Absolute PC-relative value in relaxation code.  Assembler error....."));
-           abort ();
-         }
-+      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type
-+               && !S_IS_WEAK (fragP->fr_symbol))
-+        {
-+           if (fragP->fr_opcode != NULL) {
-+            if(streq (fragP->fr_opcode, str_microblaze_64)) 
-+             {
-+               /* Used as an absolute value.  */
-+              fragP->fr_subtype = DEFINED_64_OFFSET;
-+               /* Variable part does not change.  */
-+              fragP->fr_var = INST_WORD_SIZE;
-+            }
-+          else
-+            {
-+               fragP->fr_subtype = DEFINED_PC_OFFSET;
-+              /* Don't know now whether we need an imm instruction.  */
-+               fragP->fr_var = INST_WORD_SIZE;
-+            }
-+          }  
-+          else
-+            {
-+               fragP->fr_subtype = DEFINED_PC_OFFSET;
-+              /* Don't know now whether we need an imm instruction.  */
-+               fragP->fr_var = INST_WORD_SIZE;
-+            }
-+        }
-+    #if 0
-       else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
-                !S_IS_WEAK (fragP->fr_symbol))
-         {
-@@ -2330,6 +2647,7 @@ md_estimate_size_before_relax (fragS * fragP,
-           /* Don't know now whether we need an imm instruction.  */
-           fragP->fr_var = INST_WORD_SIZE;
-         }
-+#endif
-       else if (S_IS_DEFINED (fragP->fr_symbol)
-               && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
-         {
-@@ -2432,6 +2750,7 @@ md_estimate_size_before_relax (fragS * fragP,
-     case TLSLD_OFFSET:
-     case TLSTPREL_OFFSET:
-     case TLSDTPREL_OFFSET:
-+    case DEFINED_64_OFFSET:
-       fragP->fr_var = INST_WORD_SIZE*2;
-       break;
-     case DEFINED_RO_SEGMENT:
-@@ -2485,7 +2804,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
-   else
-     {
-       /* The case where we are going to resolve things... */
--      if (fixp->fx_r_type == BFD_RELOC_64_PCREL)
-+      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-         return  fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
-       else
-         return  fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2518,6 +2837,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
-     case BFD_RELOC_MICROBLAZE_32_RWSDA:
-     case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
-     case BFD_RELOC_MICROBLAZE_64_GOTPC:
-+    case BFD_RELOC_MICROBLAZE_64_GPC:
-+    case BFD_RELOC_MICROBLAZE_64:
-     case BFD_RELOC_MICROBLAZE_64_GOT:
-     case BFD_RELOC_MICROBLAZE_64_PLT:
-     case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2578,6 +2899,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
-   return rel;
- }
- 
-+/* Called by TARGET_FORMAT.  */
-+const char *
-+microblaze_target_format (void)
-+{
-+
-+  if (microblaze_arch_size == 64)
-+    return "elf64-microblazeel";
-+  else 
-+      return target_big_endian ? "elf32-microblaze" : "elf32-microblazeel";
-+}
-+
-+
- int
- md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
- {
-@@ -2591,6 +2924,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
-     case OPTION_LITTLE:
-       target_big_endian = 0;
-       break;
-+    case OPTION_M64:
-+      //if (arg != NULL && strcmp (arg, "64") == 0)
-+      microblaze_arch_size = 64;
-+      break;
-     default:
-       return 0;
-     }
-@@ -2606,6 +2943,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
-   fprintf (stream, _(" MicroBlaze specific assembler options:\n"));
-   fprintf (stream, "  -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu"));
-   fprintf (stream, "  -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu"));
-+  fprintf (stream, "  -%-23s%s\n", "m64", N_("generate 64-bit elf"));
- }
- 
- 
-@@ -2643,7 +2981,10 @@ cons_fix_new_microblaze (fragS * frag,
-           r = BFD_RELOC_32;
-           break;
-         case 8:
--          r = BFD_RELOC_64;
-+          if (microblaze_arch_size == 64)
-+            r = BFD_RELOC_32;
-+          else
-+            r = BFD_RELOC_64;
-           break;
-         default:
-           as_bad (_("unsupported BFD relocation size %u"), size);
-diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h
-index 36f56725c46..5a97b460212 100644
---- a/gas/config/tc-microblaze.h
-+++ b/gas/config/tc-microblaze.h
-@@ -81,7 +81,9 @@ extern const struct relax_type md_relax_table[];
- 
- #ifdef OBJ_ELF
- 
--#define TARGET_FORMAT (target_big_endian ? "elf32-microblaze" : "elf32-microblazeel")
-+#define TARGET_FORMAT microblaze_target_format()
-+extern const char *microblaze_target_format (void);
-+//#define TARGET_FORMAT (target_big_endian ? "elf32-microblaze" : "elf32-microblazeel")
- 
- #define ELF_TC_SPECIAL_SECTIONS \
-   { ".sdata",          SHT_PROGBITS,   SHF_ALLOC + SHF_WRITE }, \
-diff --git a/include/elf/common.h b/include/elf/common.h
-index e4bc53e35b4..1ad565adf7a 100644
---- a/include/elf/common.h
-+++ b/include/elf/common.h
-@@ -360,6 +360,7 @@
- #define EM_U16_U8CORE  260     /* LAPIS nX-U16/U8 */
- #define EM_TACHYUM     261     /* Tachyum */
- #define EM_56800EF     262     /* NXP 56800EF Digital Signal Controller (DSC) */
-+#define EM_MB_64       263     /* Xilinx MicroBlaze 32-bit RISC soft processor core */
- 
- /* If it is necessary to assign new unofficial EM_* values, please pick large
-    random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
-diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index a2e1ce4580f..79799b86a49 100644
---- a/include/elf/microblaze.h
-+++ b/include/elf/microblaze.h
-@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
-   RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31)    /* TEXT Entry offset 64-bit.  */
-   RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit.  */
-   RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
-+  RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34)
-+  RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35)    /* GOT entry offset.  */
-    
- END_RELOC_NUMBERS (R_MICROBLAZE_max)
- 
-diff --git a/ld/Makefile.am b/ld/Makefile.am
-index d31021c13e2..bd1a2e5a625 100644
---- a/ld/Makefile.am
-+++ b/ld/Makefile.am
-@@ -418,6 +418,8 @@ ALL_64_EMULATION_SOURCES = \
-        eelf32ltsmipn32.c \
-        eelf32ltsmipn32_fbsd.c \
-        eelf32mipswindiss.c \
-+        eelf64microblazeel.c \
-+        eelf64microblaze.c \
-        eelf64_aix.c \
-        eelf64_ia64.c \
-        eelf64_ia64_fbsd.c \
-@@ -906,6 +908,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Pc@am__quote@
-diff --git a/ld/Makefile.in b/ld/Makefile.in
-index ee0c98f65b0..f4b7ee0623e 100644
---- a/ld/Makefile.in
-+++ b/ld/Makefile.in
-@@ -914,6 +914,8 @@ ALL_64_EMULATION_SOURCES = \
-        eelf32ltsmipn32.c \
-        eelf32ltsmipn32_fbsd.c \
-        eelf32mipswindiss.c \
-+       eelf64microblazeel.c \
-+       eelf64microblaze.c \
-        eelf64_aix.c \
-        eelf64_ia64.c \
-        eelf64_ia64_fbsd.c \
-@@ -1407,6 +1409,8 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xstormy16.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xtensa.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32z80.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Po@am__quote@
-@@ -2572,6 +2576,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Pc@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Pc@am__quote@
-diff --git a/ld/configure.tgt b/ld/configure.tgt
-index 2bae9099b6a..80ffbcf23b3 100644
---- a/ld/configure.tgt
-+++ b/ld/configure.tgt
-@@ -515,6 +515,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux"
- microblazeel*)         targ_emul=elf32microblazeel
-                        targ_extra_emuls=elf32microblaze
-                        ;;
-+microblazeel64*)       targ_emul=elf64microblazeel
-+                       targ_extra_emuls=elf64microblaze
-+                       ;;
- microblaze*)           targ_emul=elf32microblaze
-                        targ_extra_emuls=elf32microblazeel
-                        ;;
-diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh
-new file mode 100644
-index 00000000000..9c7b0eb7080
---- /dev/null
-+++ b/ld/emulparams/elf64microblaze.sh
-@@ -0,0 +1,23 @@
-+SCRIPT_NAME=elfmicroblaze
-+OUTPUT_FORMAT="elf64-microblazeel"
-+#BIG_OUTPUT_FORMAT="elf64-microblaze"
-+LITTLE_OUTPUT_FORMAT="elf64-microblazeel"
-+#TEXT_START_ADDR=0
-+NONPAGED_TEXT_START_ADDR=0x28
-+ALIGNMENT=4
-+MAXPAGESIZE=4
-+ARCH=microblaze
-+EMBEDDED=yes
-+
-+NOP=0x80000000
-+
-+# Hmmm, there's got to be a better way.  This sets the stack to the
-+# top of the simulator memory (2^19 bytes).
-+#PAGE_SIZE=0x1000
-+#DATA_ADDR=0x10000
-+#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }'
-+#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
-+#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
-+
-+TEMPLATE_NAME=elf32
-+#GENERATE_SHLIB_SCRIPT=yes
-diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh
-new file mode 100644
-index 00000000000..9c7b0eb7080
---- /dev/null
-+++ b/ld/emulparams/elf64microblazeel.sh
-@@ -0,0 +1,23 @@
-+SCRIPT_NAME=elfmicroblaze
-+OUTPUT_FORMAT="elf64-microblazeel"
-+#BIG_OUTPUT_FORMAT="elf64-microblaze"
-+LITTLE_OUTPUT_FORMAT="elf64-microblazeel"
-+#TEXT_START_ADDR=0
-+NONPAGED_TEXT_START_ADDR=0x28
-+ALIGNMENT=4
-+MAXPAGESIZE=4
-+ARCH=microblaze
-+EMBEDDED=yes
-+
-+NOP=0x80000000
-+
-+# Hmmm, there's got to be a better way.  This sets the stack to the
-+# top of the simulator memory (2^19 bytes).
-+#PAGE_SIZE=0x1000
-+#DATA_ADDR=0x10000
-+#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }'
-+#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
-+#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
-+
-+TEMPLATE_NAME=elf32
-+#GENERATE_SHLIB_SCRIPT=yes
-diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index f57b98fc9f7..921adce04ea 100644
---- a/opcodes/microblaze-dis.c
-+++ b/opcodes/microblaze-dis.c
-@@ -33,6 +33,7 @@
- #define get_field_r1(buf, instr)   get_field (buf, instr, RA_MASK, RA_LOW)
- #define get_field_r2(buf, instr)   get_field (buf, instr, RB_MASK, RB_LOW)
- #define get_int_field_imm(instr)   ((instr & IMM_MASK) >> IMM_LOW)
-+#define get_int_field_imml(instr)  ((instr & IMML_MASK) >> IMM_LOW)
- #define get_int_field_r1(instr)    ((instr & RA_MASK) >> RA_LOW)
- 
- #define NUM_STRBUFS 3
-@@ -73,11 +74,19 @@ get_field_imm (struct string_buf *buf, long instr)
- }
- 
- static char *
--get_field_imm5 (struct string_buf *buf, long instr)
-+get_field_imml (struct string_buf *buf, long instr)
-+{
-+  char *p = strbuf (buf);
-+  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
-+  return p;
-+}
-+
-+static char *
-+get_field_imms (struct string_buf *buf, long instr)
- {
-   char *p = strbuf (buf);
- 
--  sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
-+  sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW));
-   return p;
- }
- 
-@@ -91,14 +100,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
- }
- 
- static char *
--get_field_imm5width (struct string_buf *buf, long instr)
-+get_field_immw (struct string_buf *buf, long instr)
- {
-   char *p = strbuf (buf);
- 
-   if (instr & 0x00004000)
--    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
-+    sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */
-  else
--    sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */
-+    sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */
-   return p;
- }
- 
-@@ -308,9 +317,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-                }
-            }
-          break;
--       case INST_TYPE_RD_R1_IMM5:
-+       case INST_TYPE_RD_R1_IMML:
-          print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
--                     get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst));
-+                     get_field_r1 (&buf, inst), get_field_imm (&buf, inst));
-+          /* TODO: Also print symbol */
-+         break;
-+       case INST_TYPE_RD_R1_IMMS:
-+         print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
-+                  get_field_r1(&buf, inst), get_field_imms (&buf, inst));
-          break;
-        case INST_TYPE_RD_RFSL:
-          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
-@@ -417,6 +431,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-        case INST_TYPE_RD_R2:
-          print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
-                      get_field_r2 (&buf, inst));
-+          break;
-+        case INST_TYPE_IMML:
-+         print_func (stream, "\t%s", get_field_imml (&buf, inst));
-+          /* TODO: Also print symbol */
-          break;
-        case INST_TYPE_R2:
-          print_func (stream, "\t%s", get_field_r2 (&buf, inst));
-@@ -440,8 +458,8 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-        case INST_TYPE_NONE:
-          break;
-         /* For bit field insns.  */
--       case INST_TYPE_RD_R1_IMM5_IMM5:
--          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
-+       case INST_TYPE_RD_R1_IMMW_IMMS:
-+          print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst));
-             break;
-        /* For tuqula instruction */
-        case INST_TYPE_RD:
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 825c639a41e..ab90240d88a 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -40,7 +40,7 @@
- #define INST_TYPE_RD_SPECIAL 11
- #define INST_TYPE_R1 12
- /* New instn type for barrel shift imms.  */
--#define INST_TYPE_RD_R1_IMM5  13
-+#define INST_TYPE_RD_R1_IMMS  13
- #define INST_TYPE_RD_RFSL    14
- #define INST_TYPE_R1_RFSL    15
- 
-@@ -60,7 +60,13 @@
- #define INST_TYPE_IMM5 20
- 
- /* For bsefi and bsifi */
--#define INST_TYPE_RD_R1_IMM5_IMM5  21
-+#define INST_TYPE_RD_R1_IMMW_IMMS  21
-+
-+/* For 64-bit instructions */
-+#define INST_TYPE_IMML 22
-+#define INST_TYPE_RD_R1_IMML 23
-+#define INST_TYPE_R1_IMML 24
-+#define INST_TYPE_RD_R1_IMMW_IMMS  21
- 
- #define INST_TYPE_NONE 25
- 
-@@ -91,13 +97,14 @@
- #define OPCODE_MASK_H24 0xFC1F07FF  /* High 6, bits 20-16 and low 11 bits.  */
- #define OPCODE_MASK_H124  0xFFFF07FF /* High 16, and low 11 bits.  */
- #define OPCODE_MASK_H1234 0xFFFFFFFF /* All 32 bits.  */
--#define OPCODE_MASK_H3  0xFC000600  /* High 6 bits and bits 21, 22.  */
--#define OPCODE_MASK_H3B 0xFC00C600  /* High 6 bits and bits 16, 17, 21, 22.  */
-+#define OPCODE_MASK_H3  0xFC000700  /* High 6 bits and bits 21, 22, 23.  */
-+#define OPCODE_MASK_H3B 0xFC00E600  /* High 6 bits and bits 16, 17, 18, 21, 22.  */
- #define OPCODE_MASK_H32 0xFC00FC00  /* High 6 bits and bit 16-21.  */
--#define OPCODE_MASK_H32B 0xFC00C000  /* High 6 bits and bit 16, 17.  */
-+#define OPCODE_MASK_H32B 0xFC00E000  /* High 6 bits and bit 16, 17, 18.  */
- #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits.  */
- #define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits.  */
- #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26.  */
-+#define OPCODE_MASK_H8  0xFF000000  /* High 8 bits only.  */
- 
- /* New Mask for msrset, msrclr insns.  */
- #define OPCODE_MASK_H23N  0xFC1F8000 /* High 6 and bits 11 - 16.  */
-@@ -107,7 +114,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
- 
--#define MAX_OPCODES 301
-+#define MAX_OPCODES 412
- 
- const struct op_code_struct
- {
-@@ -125,6 +132,7 @@ const struct op_code_struct
-   /* More info about output format here.  */
- } microblaze_opcodes[MAX_OPCODES] =
- {
-+  /* 32-bit instructions */
-   {"add",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000000, OPCODE_MASK_H4, add, arithmetic_inst },
-   {"rsub",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H4, rsub, arithmetic_inst },
-   {"addc",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000000, OPCODE_MASK_H4, addc, arithmetic_inst },
-@@ -161,11 +169,11 @@ const struct op_code_struct
-   {"ncget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006000, OPCODE_MASK_H32, ncget, anyware_inst },
-   {"ncput", INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E000, OPCODE_MASK_H32, ncput, anyware_inst },
-   {"muli",  INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x60000000, OPCODE_MASK_H, muli, mult_inst },
--  {"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3, bslli, barrel_shift_inst },
--  {"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3, bsrai, barrel_shift_inst },
--  {"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3, bsrli, barrel_shift_inst },
--  {"bsefi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst },
--  {"bsifi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst },
-+  {"bslli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3B, bslli, barrel_shift_inst },
-+  {"bsrai", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3B, bsrai, barrel_shift_inst },
-+  {"bsrli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3B, bsrli, barrel_shift_inst },
-+  {"bsefi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst },
-+  {"bsifi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst },
-   {"or",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, microblaze_or, logical_inst },
-   {"and",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, microblaze_and, logical_inst },
-   {"xor",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, microblaze_xor, logical_inst },
-@@ -425,6 +433,129 @@ const struct op_code_struct
-   {"suspend",   INST_TYPE_NONE,  INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN,   invalid_inst, special_inst }, /* translates to mbar 24.  */
-   {"swapb",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4,   swapb,     arithmetic_inst },
-   {"swaph",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4,   swaph,     arithmetic_inst },
-+
-+  /* 64-bit instructions */
-+  {"addl",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000100, OPCODE_MASK_H4, addl, arithmetic_inst },
-+  {"rsubl",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000100, OPCODE_MASK_H4, rsubl, arithmetic_inst },
-+  {"addlc",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000100, OPCODE_MASK_H4, addlc, arithmetic_inst },
-+  {"rsublc",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x0C000100, OPCODE_MASK_H4, rsublc, arithmetic_inst },
-+  {"addlk",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x10000100, OPCODE_MASK_H4, addlk, arithmetic_inst },
-+  {"rsublk",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000100, OPCODE_MASK_H4, rsublk, arithmetic_inst },
-+  {"addlkc",  INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x18000100, OPCODE_MASK_H4, addlkc, arithmetic_inst },
-+  {"rsublkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x1C000100, OPCODE_MASK_H4, rsublkc, arithmetic_inst },
-+  {"cmpl",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst },
-+  {"cmplu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst },
-+  {"addli",   INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"rsubli",  INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"addlic",  INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"rsublic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"addlik",  INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"rsublik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"addlikc", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"rsublikc",INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },  /* Identical to 32-bit */
-+  {"mull",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000100, OPCODE_MASK_H4, mull, mult_inst },
-+  {"bslll",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000500, OPCODE_MASK_H3, bslll, barrel_shift_inst },
-+  {"bslra",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000300, OPCODE_MASK_H3, bslra, barrel_shift_inst },
-+  {"bslrl",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000100, OPCODE_MASK_H3, bslrl, barrel_shift_inst },
-+  {"bsllli",  INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002400, OPCODE_MASK_H3B, bsllli, barrel_shift_inst },
-+  {"bslrai",  INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002200, OPCODE_MASK_H3B, bslrai, barrel_shift_inst },
-+  {"bslrli",  INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002000, OPCODE_MASK_H3B, bslrli, barrel_shift_inst },
-+  {"bslefi",  INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64006000, OPCODE_MASK_H32B, bslefi, barrel_shift_inst },
-+  {"bslifi",  INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6400a000, OPCODE_MASK_H32B, bslifi, barrel_shift_inst },
-+  {"orl",     INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000100, OPCODE_MASK_H4, orl, logical_inst },
-+  {"andl",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000100, OPCODE_MASK_H4, andl, logical_inst },
-+  {"xorl",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000100, OPCODE_MASK_H4, xorl, logical_inst },
-+  {"andnl",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000100, OPCODE_MASK_H4, andnl, logical_inst },
-+  {"pcmplbf", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000500, OPCODE_MASK_H4, pcmplbf, logical_inst },
-+  {"pcmpleq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000500, OPCODE_MASK_H4, pcmpleq, logical_inst },
-+  {"pcmplne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000500, OPCODE_MASK_H4, pcmplne, logical_inst },
-+  {"srla",    INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000101, OPCODE_MASK_H34, srla, logical_inst },
-+  {"srlc",    INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000121, OPCODE_MASK_H34, srlc, logical_inst },
-+  {"srll",    INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000141, OPCODE_MASK_H34, srll, logical_inst },
-+  {"sextl8",  INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000160, OPCODE_MASK_H34, sextl8, logical_inst },
-+  {"sextl16", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000161, OPCODE_MASK_H34, sextl16, logical_inst },
-+  {"sextl32", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000162, OPCODE_MASK_H34, sextl32, logical_inst },
-+  {"brea",    INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98010000, OPCODE_MASK_H124, brea, branch_inst },
-+  {"bread",   INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98110000, OPCODE_MASK_H124, bread, branch_inst },
-+  {"breald",  INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98150000, OPCODE_MASK_H24, breald, branch_inst },
-+  {"beaeq",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000000, OPCODE_MASK_H14, beaeq, branch_inst },
-+  {"bealeq",  INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000100, OPCODE_MASK_H14, bealeq, branch_inst },
-+  {"beaeqd",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000000, OPCODE_MASK_H14, beaeqd, branch_inst },
-+  {"bealeqd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000100, OPCODE_MASK_H14, bealeqd, branch_inst },
-+  {"beane",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200000, OPCODE_MASK_H14, beane, branch_inst },
-+  {"bealne",  INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200100, OPCODE_MASK_H14, bealne, branch_inst },
-+  {"beaned",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200000, OPCODE_MASK_H14, beaned, branch_inst },
-+  {"bealned", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200100, OPCODE_MASK_H14, bealned, branch_inst },
-+  {"bealt",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400000, OPCODE_MASK_H14, bealt, branch_inst },
-+  {"beallt",  INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400100, OPCODE_MASK_H14, beallt, branch_inst },
-+  {"bealtd",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400000, OPCODE_MASK_H14, bealtd, branch_inst },
-+  {"bealltd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400100, OPCODE_MASK_H14, bealltd, branch_inst },
-+  {"beale",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600000, OPCODE_MASK_H14, beale, branch_inst },
-+  {"bealle",  INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600100, OPCODE_MASK_H14, bealle, branch_inst },
-+  {"bealed",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600000, OPCODE_MASK_H14, bealed, branch_inst },
-+  {"bealled", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600100, OPCODE_MASK_H14, bealled, branch_inst },
-+  {"beagt",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800000, OPCODE_MASK_H14, beagt, branch_inst },
-+  {"bealgt",  INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800100, OPCODE_MASK_H14, bealgt, branch_inst },
-+  {"beagtd",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800000, OPCODE_MASK_H14, beagtd, branch_inst },
-+  {"bealgtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800100, OPCODE_MASK_H14, bealgtd, branch_inst },
-+  {"beage",   INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00000, OPCODE_MASK_H14, beage, branch_inst },
-+  {"bealge",  INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00100, OPCODE_MASK_H14, bealge, branch_inst },
-+  {"beaged",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00000, OPCODE_MASK_H14, beaged, branch_inst },
-+  {"bealged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00100, OPCODE_MASK_H14, bealged, branch_inst },
-+  {"orli",    INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, invalid_inst, logical_inst },      /* Identical to 32-bit */
-+  {"andli",   INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, invalid_inst, logical_inst },      /* Identical to 32-bit */
-+  {"xorli",   INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, invalid_inst, logical_inst },      /* Identical to 32-bit */
-+  {"andnli",  INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, invalid_inst, logical_inst },      /* Identical to 32-bit */
-+  {"imml",    INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst },
-+  {"breai",   INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst },
-+  {"breaid",  INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst },
-+  {"brealid", INST_TYPE_RD_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8150000, OPCODE_MASK_H2, brealid, branch_inst },
-+  {"beaeqi",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, beaeqi, branch_inst },
-+  {"bealeqi", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaeqi */
-+  {"beaeqid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, beaeqid, branch_inst },
-+  {"bealeqid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, invalid_inst, branch_inst },    /* Identical to beaeqid */
-+  {"beanei",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, beanei, branch_inst },
-+  {"bealnei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beanei */
-+  {"beaneid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, beaneid, branch_inst },
-+  {"bealneid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, invalid_inst, branch_inst },    /* Identical to beaneid */
-+  {"bealti",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, bealti, branch_inst },
-+  {"beallti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealti */
-+  {"bealtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, bealtid, branch_inst },
-+  {"bealltid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, invalid_inst, branch_inst },    /* Identical to bealtid */
-+  {"bealei",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, bealei, branch_inst },
-+  {"beallei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealei */
-+  {"bealeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, bealeid, branch_inst },
-+  {"bealleid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, invalid_inst, branch_inst },    /* Identical to bealeid */
-+  {"beagti",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, beagti, branch_inst },
-+  {"bealgti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagti */
-+  {"beagtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, beagtid, branch_inst },
-+  {"bealgtid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, invalid_inst, branch_inst },    /* Identical to beagtid */
-+  {"beagei",  INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, beagei, branch_inst },
-+  {"bealgei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagei */
-+  {"beageid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, beageid, branch_inst },
-+  {"bealgeid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, invalid_inst, branch_inst },    /* Identical to beageid */
-+  {"ll",      INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000100, OPCODE_MASK_H4, ll, memory_load_inst },
-+  {"llr",     INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000300, OPCODE_MASK_H4, llr, memory_load_inst },
-+  {"sl",      INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000100, OPCODE_MASK_H4, sl, memory_store_inst },
-+  {"slr",     INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000300, OPCODE_MASK_H4, slr, memory_store_inst },
-+  {"lli",     INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xEC000000, OPCODE_MASK_H, invalid_inst, memory_load_inst },  /* Identical to 32-bit */
-+  {"sli",     INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xFC000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */
-+  {"lla",     INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* lla translates to addlik */
-+  {"dadd",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst },
-+  {"drsub",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst },
-+  {"dmul",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000500, OPCODE_MASK_H4, dmul, arithmetic_inst },
-+  {"ddiv",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000580, OPCODE_MASK_H4, ddiv, arithmetic_inst },
-+  {"dcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000610, OPCODE_MASK_H4, dcmp_lt, arithmetic_inst },
-+  {"dcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000620, OPCODE_MASK_H4, dcmp_eq, arithmetic_inst },
-+  {"dcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000630, OPCODE_MASK_H4, dcmp_le, arithmetic_inst },
-+  {"dcmp.gt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000640, OPCODE_MASK_H4, dcmp_gt, arithmetic_inst },
-+  {"dcmp.ne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000650, OPCODE_MASK_H4, dcmp_ne, arithmetic_inst },
-+  {"dcmp.ge", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000660, OPCODE_MASK_H4, dcmp_ge, arithmetic_inst },
-+  {"dcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000600, OPCODE_MASK_H4, dcmp_un, arithmetic_inst },
-+  {"dbl",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000680, OPCODE_MASK_H4, dbl,   arithmetic_inst },
-+  {"dlong",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000700, OPCODE_MASK_H4, dlong, arithmetic_inst },
-+  {"dsqrt",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000780, OPCODE_MASK_H4, dsqrt, arithmetic_inst },
-+
-   {"", 0, 0, 0, 0, 0, 0, 0, 0},
- };
- 
-@@ -445,8 +576,17 @@ char pvr_register_prefix[] = "rpvr";
- #define MIN_IMM5  ((int) 0x00000000)
- #define MAX_IMM5  ((int) 0x0000001f)
- 
-+#define MIN_IMM6  ((int) 0x00000000)
-+#define MAX_IMM6  ((int) 0x0000003f)
-+
- #define MIN_IMM_WIDTH  ((int) 0x00000001)
- #define MAX_IMM_WIDTH  ((int) 0x00000020)
- 
-+#define MIN_IMM6_WIDTH  ((int) 0x00000001)
-+#define MAX_IMM6_WIDTH  ((int) 0x00000040)
-+
-+#define MIN_IMML  ((long) 0xffffff8000000000L)
-+#define MAX_IMML  ((long) 0x0000007fffffffffL)
-+
- #endif /* MICROBLAZE_OPC */
- 
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index aa3401610d9..b242ea73c7b 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
-@@ -25,6 +25,7 @@
- 
- enum microblaze_instr
- {
-+  /* 32-bit instructions */
-   add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu,
-   addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul,
-   mulh, mulhu, mulhsu,swapb,swaph,
-@@ -39,8 +40,8 @@ enum microblaze_instr
-   imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
-   brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
-   bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
--  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
--  sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
-+  sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli,
-+  sbi, shi, swi, sli, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
-   fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
-   /* 'fsqrt' is a glibc:math.h symbol.  */
-   fint, microblaze_fsqrt,
-@@ -59,6 +60,18 @@ enum microblaze_instr
-   aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd,
-   eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd,
-   eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd,
-+
-+  /* 64-bit instructions */
-+  addl, rsubl, addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull,
-+  bslll, bslra, bslrl, bsllli, bslrai, bslrli, bslefi, bslifi, orl, andl, xorl,
-+  andnl, pcmplbf, pcmpleq, pcmplne, srla, srlc, srll, sextl8, sextl16, sextl32,
-+  brea, bread, breald, beaeq, bealeq, beaeqd, bealeqd, beane, bealne, beaned,
-+  bealned, bealt, beallt, bealtd, bealltd, beale, bealle, bealed, bealled, beagt,
-+  bealgt, beagtd, bealgtd, beage, bealge, beaged, bealged, breai, breaid, brealid,
-+  beaeqi, beaeqid, beanei, beaneid, bealti, bealtid, bealei, bealeid, beagti,
-+  beagtid, beagei, beageid, imml, ll, llr, sl, slr,
-+  dadd, drsub, dmul, ddiv, dcmp_lt, dcmp_eq, dcmp_le, dcmp_gt, dcmp_ne, dcmp_ge,
-+  dcmp_un, dbl, dlong, dsqrt,
-   invalid_inst
- };
- 
-@@ -136,15 +149,18 @@ enum microblaze_instr_type
- #define RA_MASK 0x001F0000
- #define RB_MASK 0x0000F800
- #define IMM_MASK 0x0000FFFF
-+#define IMML_MASK 0x00FFFFFF
- 
--/* Imm mask for barrel shifts.  */
-+/* Imm masks for barrel shifts.  */
- #define IMM5_MASK 0x0000001F
-+#define IMM6_MASK 0x0000003F
- 
- /* Imm mask for mbar.  */
- #define IMM5_MBAR_MASK 0x03E00000
- 
--/* Imm mask for extract/insert width. */
-+/* Imm masks for extract/insert width. */
- #define IMM5_WIDTH_MASK 0x000007C0
-+#define IMM6_WIDTH_MASK 0x00000FC0
- 
- /* FSL imm mask for get, put instructions.  */
- #define  RFSL_MASK 0x000000F
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
deleted file mode 100644
index 762e7823..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 667611ec2dfb22bf13d5c6af65ea62e9c13a68de Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 11 Sep 2018 13:48:33 +0530
-Subject: [PATCH 13/34] [Patch,Microblaze] : negl instruction is overriding
- rsubl,fixed it by changing the instruction order...
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- opcodes/microblaze-opc.h | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index ab90240d88a..5e45df995de 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -275,9 +275,7 @@ const struct op_code_struct
-   {"la",    INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* la translates to addik.  */
-   {"tuqula",INST_TYPE_RD, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3000002A, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* tuqula rd translates to addik rd, r0, 42.  */
-   {"not",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA800FFFF, OPCODE_MASK_H34, invalid_inst, logical_inst }, /* not translates to xori rd,ra,-1.  */
--  {"neg",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0.  */
-   {"rtb",   INST_TYPE_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000004, OPCODE_MASK_H1, invalid_inst, return_inst }, /* rtb translates to rts rd, 4.  */
--  {"sub",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra.  */
-   {"lmi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst },
-   {"smi",   INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst },
-   {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst },
-@@ -555,6 +553,8 @@ const struct op_code_struct
-   {"dbl",     INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000680, OPCODE_MASK_H4, dbl,   arithmetic_inst },
-   {"dlong",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000700, OPCODE_MASK_H4, dlong, arithmetic_inst },
-   {"dsqrt",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000780, OPCODE_MASK_H4, dsqrt, arithmetic_inst },
-+  {"neg",   INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0.  */
-+  {"sub",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra.  */
- 
-   {"", 0, 0, 0, 0, 0, 0, 0, 0},
- };
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Added-relocations-for-MB-X.patch
deleted file mode 100644
index 12e33a85..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Added-relocations-for-MB-X.patch
+++ /dev/null
@@ -1,353 +0,0 @@
-From 4e94c1683a806ac46f3a0d54bfe8f7247d5f0cbd Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Tue, 11 Sep 2018 17:30:17 +0530
-Subject: [PATCH 14/34] Added relocations for MB-X
-
-Conflicts:
-        bfd/bfd-in2.h
-        gas/config/tc-microblaze.c
-
-Conflicts:
-        gas/config/tc-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/bfd-in2.h              |  9 +++-
- bfd/libbfd.h               |  4 +-
- bfd/reloc.c                | 26 ++++++-----
- gas/config/tc-microblaze.c | 90 ++++++++++++++++----------------------
- 4 files changed, 61 insertions(+), 68 deletions(-)
-
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 6cf701abf10..14e228c9c0e 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5387,13 +5387,18 @@ done here - only used for relaxing  */
- /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  No relocation is
- done here - only used for relaxing  */
--  BFD_RELOC_MICROBLAZE_64_NONE,
-+  BFD_RELOC_MICROBLAZE_64_PCREL,
- 
--/* This is a 64 bit reloc that stores the 32 bit pc relative
-+/* This is a 64 bit reloc that stores the 32 bit relative
-  *  +value in two words (with an imml instruction).  No relocation is
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64,
- 
-+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+ *  +value in two words (with an imm instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_64_NONE,
-+
- /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction).  The relocation is
- PC-relative GOT offset  */
-diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index e74c051e781..20086ba608b 100644
---- a/bfd/libbfd.h
-+++ b/bfd/libbfd.h
-@@ -2991,14 +2991,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
-   "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
-   "BFD_RELOC_MICROBLAZE_32_NONE",
-   "BFD_RELOC_MICROBLAZE_64_NONE",
--  "BFD_RELOC_MICROBLAZE_64",
-   "BFD_RELOC_MICROBLAZE_64_GOTPC",
--  "BFD_RELOC_MICROBLAZE_64_GPC",
-   "BFD_RELOC_MICROBLAZE_64_GOT",
-   "BFD_RELOC_MICROBLAZE_64_PLT",
-   "BFD_RELOC_MICROBLAZE_64_GOTOFF",
-   "BFD_RELOC_MICROBLAZE_32_GOTOFF",
-   "BFD_RELOC_MICROBLAZE_COPY",
-+  "BFD_RELOC_MICROBLAZE_64",
-+  "BFD_RELOC_MICROBLAZE_64_PCREL",
-   "BFD_RELOC_MICROBLAZE_64_TLS",
-   "BFD_RELOC_MICROBLAZE_64_TLSGD",
-   "BFD_RELOC_MICROBLAZE_64_TLSLD",
-diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 0f99df91299..6165ff3adf1 100644
---- a/bfd/reloc.c
-+++ b/bfd/reloc.c
-@@ -6875,24 +6875,12 @@ ENUMDOC
-   done here - only used for relaxing
- ENUM
-   BFD_RELOC_MICROBLAZE_64_NONE
--ENUMDOC
--  This is a 32 bit reloc that stores the 32 bit pc relative
--  value in two words (with an imml instruction).  No relocation is
--  done here - only used for relaxing
--ENUM
--  BFD_RELOC_MICROBLAZE_64
- ENUMDOC
-   This is a 64 bit reloc that stores the 32 bit pc relative
-   value in two words (with an imm instruction).  No relocation is
-   done here - only used for relaxing
- ENUM
-   BFD_RELOC_MICROBLAZE_64_GOTPC
--ENUMDOC
--  This is a 64 bit reloc that stores the 32 bit pc relative
--  value in two words (with an imml instruction).  No relocation is
--  done here - only used for relaxing
--ENUM
--  BFD_RELOC_MICROBLAZE_64_GPC
- ENUMDOC
-   This is a 64 bit reloc that stores the 32 bit pc relative
-   value in two words (with an imm instruction).  The relocation is
-@@ -6978,6 +6966,20 @@ ENUMDOC
-   value in two words (with an imm instruction).  The relocation is
-   relative offset from start of TEXT.
- 
-+  This is a 64 bit reloc that stores 64-bit thread pointer relative offset
-+  to two words (uses imml instruction).
-+ENUM
-+BFD_RELOC_MICROBLAZE_64,
-+ENUMDOC
-+ This is a 64 bit reloc that stores the 64 bit pc relative
-+ value in two words (with an imml instruction).  No relocation is
-+ done here - only used for relaxing
-+ENUM
-+BFD_RELOC_MICROBLAZE_64_PCREL,
-+ENUMDOC
-+ This is a 32 bit reloc that stores the 32 bit pc relative
-+ value in two words (with an imml instruction).  No relocation is
-+ done here - only used for relaxing
- ENUM
-   BFD_RELOC_AARCH64_RELOC_START
- ENUMDOC
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index a6f12dda54a..9d4dbc12ab3 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -95,6 +95,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
- #define TEXT_OFFSET         17
- #define TEXT_PC_OFFSET       18
- #define DEFINED_64_OFFSET   19
-+#define DEFINED_64_PC_OFFSET 20 
- 
- /* Initialize the relax table.  */
- const relax_typeS md_relax_table[] =
-@@ -119,7 +120,8 @@ const relax_typeS md_relax_table[] =
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },  /* 17: TEXT_OFFSET.  */
-   { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 },   /* 18: TEXT_PC_OFFSET.  */
- //  { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }   /* 16: TLSTPREL_OFFSET.  */
--  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }   /* 17: DEFINED_64_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 },   /* 19: DEFINED_64_OFFSET.  */
-+  { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 }   /* 20: DEFINED_64_PC_OFFSET.  */
- };
- 
- static htab_t  opcode_hash_control;    /* Opcode mnemonics.  */
-@@ -1184,33 +1186,6 @@ md_assemble (char * str)
-               inst |= (immed << IMM_LOW) & IMM_MASK;
-             }
-        }
--#if 0 //revisit
--      else if (streq (name, "lli") || streq (name, "sli"))
--       {
--          temp = immed & 0xFFFFFFFFFFFF8000;
--          if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
--           {
--              /* Needs an immediate inst.  */
--              opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
--              if (opcode1 == NULL)
--                {
--                  as_bad (_("unknown opcode \"%s\""), "imml");
--                  return;
--                }
--
--              inst1 = opcode1->bit_sequence;
--             inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
--              output[0] = INST_BYTE0 (inst1);
--              output[1] = INST_BYTE1 (inst1);
--              output[2] = INST_BYTE2 (inst1);
--              output[3] = INST_BYTE3 (inst1);
--              output = frag_more (isize);
--           }
--         inst |= (reg1 << RD_LOW) & RD_MASK;
--         inst |= (reg2 << RA_LOW) & RA_MASK;
--         inst |= (immed << IMM_LOW) & IMM_MASK;
--        }
--#endif
-       else
-        {
-           temp = immed & 0xFFFF8000;
-@@ -1970,8 +1945,8 @@ md_assemble (char * str)
- 
-       if (exp.X_op != O_constant)
-        {
--         char *opc = NULL;
--         //char *opc = str_microblaze_64;
-+         //char *opc = NULL;
-+         char *opc = str_microblaze_64;
-          relax_substateT subtype;
- 
-          if (exp.X_md != 0)
-@@ -2230,13 +2205,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
-       fragP->fr_fix += INST_WORD_SIZE * 2;
-       fragP->fr_var = 0;
-       break;
-+    case DEFINED_64_PC_OFFSET:
-+      fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol,
-+                fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_PCREL);
-+      fragP->fr_fix += INST_WORD_SIZE * 2;
-+      fragP->fr_var = 0;
-+      break;
-     case DEFINED_64_OFFSET:
-       if (fragP->fr_symbol == GOT_symbol)
-         fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol,
--                fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GPC);
-+                fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64_GPC);
-       else
-         fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol,
--                fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64);
-+                fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64);
-       fragP->fr_fix += INST_WORD_SIZE * 2;
-       fragP->fr_var = 0;
-       break;
-@@ -2246,7 +2227,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
-                 fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GOTPC);
-       else
-         fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
--                fragP->fr_offset, true, BFD_RELOC_64);
-+                fragP->fr_offset, false, BFD_RELOC_64);
-       fragP->fr_fix += INST_WORD_SIZE * 2;
-       fragP->fr_var = 0;
-       break;
-@@ -2464,14 +2445,17 @@ md_apply_fix (fixS *   fixP,
-            }
-        }
-       break;
-+
-     case BFD_RELOC_64_PCREL:
-     case BFD_RELOC_64:
-     case BFD_RELOC_MICROBLAZE_64_TEXTREL:
-     case BFD_RELOC_MICROBLAZE_64:
-+    case BFD_RELOC_MICROBLAZE_64_PCREL:
-       /* Add an imm instruction.  First save the current instruction.  */
-       for (i = 0; i < INST_WORD_SIZE; i++)
-        buf[i + INST_WORD_SIZE] = buf[i];
--      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
-+            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-         {
-           /* Generate the imm instruction.  */
-           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-@@ -2484,6 +2468,10 @@ md_apply_fix (fixS *   fixP,
-            inst1 = opcode1->bit_sequence;
-            if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-             inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+           if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+             fixP->fx_r_type = BFD_RELOC_64; 
-+           if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-+             fixP->fx_r_type = BFD_RELOC_64_PCREL; 
-          }
-       else
-         {
-@@ -2494,7 +2482,7 @@ md_apply_fix (fixS *   fixP,
-              as_bad (_("unknown opcode \"%s\""), "imm");
-              return;
-            }
--     
-+
-           inst1 = opcode1->bit_sequence;
-           if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-            inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
-@@ -2542,7 +2530,7 @@ md_apply_fix (fixS *   fixP,
-         opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
-       if (opcode1 == NULL)
-        {
--         if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC)
-+          if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC)
-            as_bad (_("unknown opcode \"%s\""), "imml");
-           else
-            as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -2569,8 +2557,6 @@ md_apply_fix (fixS *   fixP,
-         moves code around due to relaxing.  */
-       if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
--      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
--           fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
-       else if (fixP->fx_r_type == BFD_RELOC_32)
-        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-       else
-@@ -2621,33 +2607,24 @@ md_estimate_size_before_relax (fragS * fragP,
-             if(streq (fragP->fr_opcode, str_microblaze_64)) 
-              {
-                /* Used as an absolute value.  */
--              fragP->fr_subtype = DEFINED_64_OFFSET;
-+              fragP->fr_subtype = DEFINED_64_PC_OFFSET;
-                /* Variable part does not change.  */
--              fragP->fr_var = INST_WORD_SIZE;
-+              fragP->fr_var = INST_WORD_SIZE*2;
-             }
-           else
-             {
-                fragP->fr_subtype = DEFINED_PC_OFFSET;
--              /* Don't know now whether we need an imm instruction.  */
-+               /* Don't know now whether we need an imm instruction.  */
-                fragP->fr_var = INST_WORD_SIZE;
-             }
-           }  
-           else
-             {
-                fragP->fr_subtype = DEFINED_PC_OFFSET;
--              /* Don't know now whether we need an imm instruction.  */
-+               /* Don't know now whether we need an imm instruction.  */
-                fragP->fr_var = INST_WORD_SIZE;
-             }
-         }
--    #if 0
--      else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
--               !S_IS_WEAK (fragP->fr_symbol))
--        {
--          fragP->fr_subtype = DEFINED_PC_OFFSET;
--          /* Don't know now whether we need an imm instruction.  */
--          fragP->fr_var = INST_WORD_SIZE;
--        }
--#endif
-       else if (S_IS_DEFINED (fragP->fr_symbol)
-               && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
-         {
-@@ -2677,6 +2654,13 @@ md_estimate_size_before_relax (fragS * fragP,
-              /* Variable part does not change.  */
-              fragP->fr_var = INST_WORD_SIZE*2;
-            }
-+         else if (streq (fragP->fr_opcode, str_microblaze_64))
-+           {
-+              /* Used as an absolute value.  */
-+              fragP->fr_subtype = DEFINED_64_OFFSET;
-+              /* Variable part does not change.  */
-+              fragP->fr_var = INST_WORD_SIZE;
-+            }
-          else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor))
-            {
-               /* It is accessed using the small data read only anchor.  */
-@@ -2751,6 +2735,7 @@ md_estimate_size_before_relax (fragS * fragP,
-     case TLSTPREL_OFFSET:
-     case TLSDTPREL_OFFSET:
-     case DEFINED_64_OFFSET:
-+    case DEFINED_64_PC_OFFSET:
-       fragP->fr_var = INST_WORD_SIZE*2;
-       break;
-     case DEFINED_RO_SEGMENT:
-@@ -2804,7 +2789,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
-   else
-     {
-       /* The case where we are going to resolve things... */
--      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+      if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-         return  fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
-       else
-         return  fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2839,6 +2824,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
-     case BFD_RELOC_MICROBLAZE_64_GOTPC:
-     case BFD_RELOC_MICROBLAZE_64_GPC:
-     case BFD_RELOC_MICROBLAZE_64:
-+    case BFD_RELOC_MICROBLAZE_64_PCREL:
-     case BFD_RELOC_MICROBLAZE_64_GOT:
-     case BFD_RELOC_MICROBLAZE_64_PLT:
-     case BFD_RELOC_MICROBLAZE_64_GOTOFF:
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0015-Fixed-MB-x-relocation-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0015-Fixed-MB-x-relocation-issues.patch
deleted file mode 100644
index 91f37443..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0015-Fixed-MB-x-relocation-issues.patch
+++ /dev/null
@@ -1,365 +0,0 @@
-From da36307dff05dff1eebd44aec56f9bdc196ad632 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Fri, 28 Sep 2018 12:04:55 +0530
-Subject: [PATCH 15/34] -Fixed MB-x relocation issues -Added imml for required
- MB-x instructions
-
-Conflicts:
-        bfd/elf64-microblaze.c
-        gas/config/tc-microblaze.c
-
-Conflicts:
-        gas/config/tc-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/elf64-microblaze.c     |  48 ++++++++++--
- gas/config/tc-microblaze.c | 155 ++++++++++++++++++++++++++-----------
- gas/tc.h                   |   2 +-
- 3 files changed, 152 insertions(+), 53 deletions(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 0faa8de73c8..951bb36506d 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -1552,6 +1552,14 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                          bfd_put_16 (input_bfd, relocation & 0xffff,
-                                      contents + offset + endian);
- 
-+                        unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                        if (insn == 0xb2000000 || insn == 0xb2ffffff)
-+                          {
-+                            insn &= ~0x00ffffff;
-+                            insn |= (relocation >> 16) & 0xffffff;
-+                            bfd_put_32 (input_bfd, insn,
-+                                    contents + offset + endian);
-+                          }
-                        else
-                          {
-                            bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-@@ -1659,6 +1667,14 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                             bfd_put_16 (input_bfd, relocation & 0xffff,
-                                         contents + offset + endian);
-                          }
-+                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                        if (insn == 0xb2000000 || insn == 0xb2ffffff)
-+                          {
-+                            insn &= ~0x00ffffff;
-+                            insn |= (relocation >> 16) & 0xffffff;
-+                            bfd_put_32 (input_bfd, insn,
-+                                    contents + offset + endian);
-+                          }
-                        else
-                          {
-                            bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-@@ -1769,9 +1785,19 @@ static void
- microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
- {
-     unsigned long instr = bfd_get_32 (abfd, bfd_addr);
--    instr &= ~0x0000ffff;
--    instr |= (val & 0x0000ffff);
--    bfd_put_32 (abfd, instr, bfd_addr);
-+
-+    if (instr == 0xb2000000 || instr == 0xb2ffffff)
-+      {
-+        instr &= ~0x00ffffff;
-+        instr |= (val & 0xffffff);
-+        bfd_put_32 (abfd, instr, bfd_addr);
-+      }
-+    else
-+      {
-+        instr &= ~0x0000ffff;
-+        instr |= (val & 0x0000ffff);
-+        bfd_put_32 (abfd, instr, bfd_addr);
-+      }
- }
- 
- /* Read-modify-write into the bfd, an immediate value into appropriate fields of
-@@ -1783,10 +1809,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
-     unsigned long instr_lo;
- 
-     instr_hi = bfd_get_32 (abfd, bfd_addr);
--    instr_hi &= ~0x0000ffff;
--    instr_hi |= ((val >> 16) & 0x0000ffff);
--    bfd_put_32 (abfd, instr_hi, bfd_addr);
--
-+    if (instr_hi == 0xb2000000 || instr_hi == 0xb2ffffff)
-+      {
-+        instr_hi &= ~0x00ffffff;
-+        instr_hi |= (val >> 16) & 0xffffff;
-+        bfd_put_32 (abfd, instr_hi,bfd_addr);
-+      }
-+    else
-+      {
-+        instr_hi &= ~0x0000ffff;
-+        instr_hi |= ((val >> 16) & 0x0000ffff);
-+        bfd_put_32 (abfd, instr_hi, bfd_addr);
-+      }
-     instr_lo = bfd_get_32 (abfd, bfd_addr + INST_WORD_SIZE);
-     instr_lo &= ~0x0000ffff;
-     instr_lo |= (val & 0x0000ffff);
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 9d4dbc12ab3..a0e97231a41 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
-    Integer arg to pass to the function.  */
- /* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
-    and then in the read.c table.  */
--const pseudo_typeS md_pseudo_table[] =
-+pseudo_typeS md_pseudo_table[] =
- {
-   {"lcomm", microblaze_s_lcomm, 1},
-   {"data", microblaze_s_data, 0},
-@@ -401,7 +401,7 @@ const pseudo_typeS md_pseudo_table[] =
-   {"data32", cons, 4},     /* Same as word.  */
-   {"ent", s_func, 0}, /* Treat ent as function entry point.  */
-   {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
--  {"gpword", s_rva, 8}, /* gpword label => store resolved label address in data section.  */
-+  {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section.  */
-   {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section.  */
-   {"weakext", microblaze_s_weakext, 0},
-   {"rodata", microblaze_s_rdata, 0},
-@@ -996,7 +996,7 @@ md_assemble (char * str)
-   unsigned reg2;
-   unsigned reg3;
-   unsigned isize;
--  unsigned int immed = 0, immed2 = 0, temp;
-+  unsigned long immed = 0, immed2 = 0, temp;
-   expressionS exp;
-   char name[20];
-   long immedl;
-@@ -1118,8 +1118,9 @@ md_assemble (char * str)
-            as_fatal (_("lmi pseudo instruction should not use a label in imm field"));
-          else if (streq (name, "smi"))
-            as_fatal (_("smi pseudo instruction should not use a label in imm field"));
--
--         if (reg2 == REG_ROSDP)
-+          if(streq (name, "lli") || streq (name, "sli"))
-+            opc = str_microblaze_64;
-+         else if (reg2 == REG_ROSDP)
-            opc = str_microblaze_ro_anchor;
-          else if (reg2 == REG_RWSDP)
-            opc = str_microblaze_rw_anchor;
-@@ -1186,33 +1187,57 @@ md_assemble (char * str)
-               inst |= (immed << IMM_LOW) & IMM_MASK;
-             }
-        }
--      else
--       {
--          temp = immed & 0xFFFF8000;
--          if ((temp != 0) && (temp != 0xFFFF8000))
--           {
-+      else if (streq (name, "lli") || streq (name, "sli"))
-+        {
-+          temp = immed & 0xFFFFFF8000;
-+          if (temp != 0 && temp != 0xFFFFFF8000)
-+            {
-               /* Needs an immediate inst.  */
-              opcode1
-                = (struct op_code_struct *) str_hash_find (opcode_hash_control,
--                                                          "imm");
-+                                                          "imml");
-               if (opcode1 == NULL)
-                 {
--                  as_bad (_("unknown opcode \"%s\""), "imm");
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-                   return;
-                 }
--
-               inst1 = opcode1->bit_sequence;
--              inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
-+             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-               output[0] = INST_BYTE0 (inst1);
-               output[1] = INST_BYTE1 (inst1);
-               output[2] = INST_BYTE2 (inst1);
-               output[3] = INST_BYTE3 (inst1);
-               output = frag_more (isize);
--           }
--         inst |= (reg1 << RD_LOW) & RD_MASK;
--         inst |= (reg2 << RA_LOW) & RA_MASK;
--         inst |= (immed << IMM_LOW) & IMM_MASK;
--       }
-+            }
-+          inst |= (reg1 << RD_LOW) & RD_MASK;
-+          inst |= (reg2 << RA_LOW) & RA_MASK;
-+          inst |= (immed << IMM_LOW) & IMM_MASK;
-+         }
-+       else 
-+        {
-+           temp = immed & 0xFFFF8000;
-+           if ((temp != 0) && (temp != 0xFFFF8000))
-+            {
-+               /* Needs an immediate inst.  */
-+               opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
-+               if (opcode1 == NULL)
-+                 {
-+                   as_bad (_("unknown opcode \"%s\""), "imm");
-+                   return;
-+                 }
-+
-+               inst1 = opcode1->bit_sequence;
-+               inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
-+               output[0] = INST_BYTE0 (inst1);
-+               output[1] = INST_BYTE1 (inst1);
-+               output[2] = INST_BYTE2 (inst1);
-+               output[3] = INST_BYTE3 (inst1);
-+               output = frag_more (isize);
-+            }
-+          inst |= (reg1 << RD_LOW) & RD_MASK;
-+          inst |= (reg2 << RA_LOW) & RA_MASK;
-+          inst |= (immed << IMM_LOW) & IMM_MASK;
-+        }
-       break;
- 
-     case INST_TYPE_RD_R1_IMMS:
-@@ -1842,12 +1867,20 @@ md_assemble (char * str)
-     case INST_TYPE_IMM:
-       if (streq (name, "imm"))
-         as_fatal (_("An IMM instruction should not be present in the .s file"));
--
--      op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
-+      if (microblaze_arch_size == 64)
-+        op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+      else
-+        op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
- 
-       if (exp.X_op != O_constant)
-        {
--          char *opc = NULL;
-+         char *opc;
-+          if (microblaze_arch_size == 64 && (streq (name, "breai") || 
-+                streq (name, "breaid") || 
-+                streq (name, "brai") || streq (name, "braid")))
-+            opc = str_microblaze_64;
-+         else
-+            opc = NULL;
-           relax_substateT subtype;
- 
-          if (exp.X_md != 0)
-@@ -1870,29 +1903,53 @@ md_assemble (char * str)
-           immed = exp.X_add_number;
-         }
- 
--
--      temp = immed & 0xFFFF8000;
--      if ((temp != 0) && (temp != 0xFFFF8000))
--       {
--          /* Needs an immediate inst.  */
--          opcode1
--           = (struct op_code_struct *) str_hash_find (opcode_hash_control,
--                                                      "imm");
--          if (opcode1 == NULL)
--            {
--              as_bad (_("unknown opcode \"%s\""), "imm");
--              return;
-+      if (microblaze_arch_size == 64 && (streq (name, "breai") || 
-+            streq (name, "breaid") || 
-+           streq (name, "brai") || streq (name, "braid")))
-+        {
-+          temp = immed & 0xFFFFFF8000;
-+          if (temp != 0)
-+           {
-+              /* Needs an immediate inst.  */
-+              opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+              inst1 = opcode1->bit_sequence;
-+              inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-             }
-+          inst |= (immed << IMM_LOW) & IMM_MASK;
-+       }
-+      else
-+       {
-+          temp = immed & 0xFFFF8000;
-+          if ((temp != 0) && (temp != 0xFFFF8000))
-+           {
-+              /* Needs an immediate inst.  */
-+              opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
-+              if (opcode1 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imm");
-+                  return;
-+                }
- 
--          inst1 = opcode1->bit_sequence;
--          inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
--          output[0] = INST_BYTE0 (inst1);
--          output[1] = INST_BYTE1 (inst1);
--          output[2] = INST_BYTE2 (inst1);
--          output[3] = INST_BYTE3 (inst1);
--          output = frag_more (isize);
--        }
--      inst |= (immed << IMM_LOW) & IMM_MASK;
-+              inst1 = opcode1->bit_sequence;
-+              inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+            }
-+          inst |= (immed << IMM_LOW) & IMM_MASK;
-+       }
-       break;
- 
-     case INST_TYPE_NONE:
-@@ -2467,7 +2524,7 @@ md_apply_fix (fixS *   fixP,
- 
-            inst1 = opcode1->bit_sequence;
-            if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
--            inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+            inst1 |= ((val & 0xFFFFFF0000L) >> 16) & IMML_MASK;
-            if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-              fixP->fx_r_type = BFD_RELOC_64; 
-            if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-@@ -2636,7 +2693,14 @@ md_estimate_size_before_relax (fragS * fragP,
-         }
-       else
-        {
--         fragP->fr_subtype = UNDEFINED_PC_OFFSET;
-+         if (fragP->fr_opcode != NULL) {
-+           if (streq (fragP->fr_opcode, str_microblaze_64)) 
-+              fragP->fr_subtype = DEFINED_64_PC_OFFSET;
-+           else
-+             fragP->fr_subtype = UNDEFINED_PC_OFFSET;
-+           }
-+         else
-+           fragP->fr_subtype = UNDEFINED_PC_OFFSET;
-          fragP->fr_var = INST_WORD_SIZE*2;
-        }
-       break;
-@@ -2913,6 +2977,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
-     case OPTION_M64:
-       //if (arg != NULL && strcmp (arg, "64") == 0)
-       microblaze_arch_size = 64;
-+      md_pseudo_table[7].poc_val = 8;
-       break;
-     default:
-       return 0;
-diff --git a/gas/tc.h b/gas/tc.h
-index 4a740f9bdd9..bb9a935a353 100644
---- a/gas/tc.h
-+++ b/gas/tc.h
-@@ -22,7 +22,7 @@
- /* In theory (mine, at least!) the machine dependent part of the assembler
-    should only have to include one file.  This one.  -- JF */
- 
--extern const pseudo_typeS md_pseudo_table[];
-+extern pseudo_typeS md_pseudo_table[];
- 
- const char * md_atof (int, char *, int *);
- int    md_parse_option (int, const char *);
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0016-Fixing-the-branch-related-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0016-Fixing-the-branch-related-issues.patch
deleted file mode 100644
index df6c3d90..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0016-Fixing-the-branch-related-issues.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 3a46bc21f52c7b5ccbd408eeecd7145b856f6b1d Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Sun, 30 Sep 2018 17:06:58 +0530
-Subject: [PATCH 16/34] Fixing the branch related issues
-
-Conflicts:
-        bfd/elf64-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/elf64-microblaze.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 951bb36506d..6d698383404 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2559,6 +2559,9 @@ microblaze_elf_check_relocs (bfd * abfd,
-          while (h->root.type == bfd_link_hash_indirect
-                 || h->root.type == bfd_link_hash_warning)
-            h = (struct elf_link_hash_entry *) h->root.u.i.link;
-+         /* PR15323, ref flags aren't set for references in the same
-+            object.  */
-+         h->root.non_ir_ref_regular = 1;
-        }
- 
-       switch (r_type)
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-address-computation-issues-with-64bit-address.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-address-computation-issues-with-64bit-address.patch
deleted file mode 100644
index b986fba6..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0017-Fixed-address-computation-issues-with-64bit-address.patch
+++ /dev/null
@@ -1,231 +0,0 @@
-From a6003437722a8f04c1e31435eb7f9101c50cc292 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Tue, 9 Oct 2018 10:14:22 +0530
-Subject: [PATCH 17/34] - Fixed address computation issues with 64bit address -
- Fixed imml dissassamble issue
-
-Conflicts:
-        gas/config/tc-microblaze.c
-        opcodes/microblaze-dis.c
-
-Conflicts:
-        bfd/elf64-microblaze.c
-
-Conflicts:
-        bfd/elf64-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/bfd-in2.h              |  5 +++
- bfd/elf64-microblaze.c     | 12 +++----
- gas/config/tc-microblaze.c | 74 +++++++++++++++++++++++++++++++++-----
- opcodes/microblaze-dis.c   |  2 +-
- 4 files changed, 78 insertions(+), 15 deletions(-)
-
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 14e228c9c0e..d4b5006902c 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5394,6 +5394,11 @@ done here - only used for relaxing  */
-  *   +done here - only used for relaxing  */
-     BFD_RELOC_MICROBLAZE_64,
- 
-+/* This is a 64 bit reloc that stores the 32 bit relative
-+ *  +value in two words (with an imml instruction).  No relocation is
-+ *   +done here - only used for relaxing  */
-+    BFD_RELOC_MICROBLAZE_EA64,
-+
- /* This is a 64 bit reloc that stores the 32 bit pc relative
-  *  +value in two words (with an imm instruction).  No relocation is
-  *   +done here - only used for relaxing  */
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 6d698383404..f16b544b1fc 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -118,14 +118,14 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
-           0,                   /* Rightshift.  */
-           4,                   /* Size (0 = byte, 1 = short, 2 = long).  */
-           64,                  /* Bitsize.  */
--          true,                /* PC_relative.  */
-+          false,               /* PC_relative.  */
-           0,                   /* Bitpos.  */
-           complain_overflow_dont, /* Complain on overflow.  */
-           bfd_elf_generic_reloc,/* Special Function.  */
-           "R_MICROBLAZE_IMML_64",      /* Name.  */
-           false,               /* Partial Inplace.  */
-           0,                   /* Source Mask.  */
--          0x0000ffff,          /* Dest Mask.  */
-+          0xffffffffffffff,            /* Dest Mask.  */
-           false),              /* PC relative offset?  */
- 
-    /* A 64 bit relocation.  Table entry not really used.  */
-@@ -613,9 +613,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
-     case BFD_RELOC_32:
-       microblaze_reloc = R_MICROBLAZE_32;
-       break;
--      /* RVA is treated the same as 32 */
-+      /* RVA is treated the same as 64 */
-     case BFD_RELOC_RVA:
--      microblaze_reloc = R_MICROBLAZE_32;
-+      microblaze_reloc = R_MICROBLAZE_IMML_64;
-       break;
-     case BFD_RELOC_32_PCREL:
-       microblaze_reloc = R_MICROBLAZE_32_PCREL;
-@@ -647,7 +647,7 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
-     case BFD_RELOC_VTABLE_ENTRY:
-       microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY;
-       break;
--    case BFD_RELOC_MICROBLAZE_64:
-+    case BFD_RELOC_MICROBLAZE_EA64:
-       microblaze_reloc = R_MICROBLAZE_IMML_64;
-       break;
-     case BFD_RELOC_MICROBLAZE_64_GOTPC:
-@@ -2050,7 +2050,7 @@ microblaze_elf_relax_section (bfd *abfd,
-                efix = calc_fixup (target_address, 0, sec);
- 
-             /* Validate the in-band val.  */
--            val = bfd_get_32 (abfd, contents + irel->r_offset);
-+            val = bfd_get_64 (abfd, contents + irel->r_offset);
-             if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
-                fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
-             }
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index a0e97231a41..d3de049e9c0 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -402,7 +402,6 @@ pseudo_typeS md_pseudo_table[] =
-   {"ent", s_func, 0}, /* Treat ent as function entry point.  */
-   {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
-   {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section.  */
--  {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section.  */
-   {"weakext", microblaze_s_weakext, 0},
-   {"rodata", microblaze_s_rdata, 0},
-   {"sdata2", microblaze_s_rdata, 1},
-@@ -2483,18 +2482,74 @@ md_apply_fix (fixS *   fixP,
-     case BFD_RELOC_RVA:
-     case BFD_RELOC_32_PCREL:
-     case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
-+      /* Don't do anything if the symbol is not defined.  */
-+      if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-+       {
-+         if ((fixP->fx_r_type == BFD_RELOC_RVA) && (microblaze_arch_size == 64))
-+            {
-+             if (target_big_endian)
-+               {
-+                 buf[0] |= ((val >> 56) & 0xff);
-+                 buf[1] |= ((val >> 48) & 0xff);
-+                 buf[2] |= ((val >> 40) & 0xff);
-+                 buf[3] |= ((val >> 32) & 0xff);
-+                 buf[4] |= ((val >> 24) & 0xff);
-+                 buf[5] |= ((val >> 16) & 0xff);
-+                 buf[6] |= ((val >> 8) & 0xff);
-+                 buf[7] |= (val & 0xff);
-+               }
-+             else
-+               {
-+                 buf[7] |= ((val >> 56) & 0xff);
-+                 buf[6] |= ((val >> 48) & 0xff);
-+                 buf[5] |= ((val >> 40) & 0xff);
-+                 buf[4] |= ((val >> 32) & 0xff);
-+                 buf[3] |= ((val >> 24) & 0xff);
-+                 buf[2] |= ((val >> 16) & 0xff);
-+                 buf[1] |= ((val >> 8) & 0xff);
-+                 buf[0] |= (val & 0xff);
-+               }
-+           }
-+         else {
-+           if (target_big_endian)
-+             {
-+               buf[0] |= ((val >> 24) & 0xff);
-+               buf[1] |= ((val >> 16) & 0xff);
-+               buf[2] |= ((val >> 8) & 0xff);
-+               buf[3] |= (val & 0xff);
-+             }
-+           else
-+             {
-+               buf[3] |= ((val >> 24) & 0xff);
-+               buf[2] |= ((val >> 16) & 0xff);
-+               buf[1] |= ((val >> 8) & 0xff);
-+               buf[0] |= (val & 0xff);
-+             }
-+         }
-+       }
-+      break;
-+    
-+    case BFD_RELOC_MICROBLAZE_EA64:
-       /* Don't do anything if the symbol is not defined.  */
-       if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-        {
-          if (target_big_endian)
-            {
--             buf[0] |= ((val >> 24) & 0xff);
--             buf[1] |= ((val >> 16) & 0xff);
--             buf[2] |= ((val >> 8) & 0xff);
--             buf[3] |= (val & 0xff);
-+             buf[0] |= ((val >> 56) & 0xff);
-+             buf[1] |= ((val >> 48) & 0xff);
-+             buf[2] |= ((val >> 40) & 0xff);
-+             buf[3] |= ((val >> 32) & 0xff);
-+             buf[4] |= ((val >> 24) & 0xff);
-+             buf[5] |= ((val >> 16) & 0xff);
-+             buf[6] |= ((val >> 8) & 0xff);
-+             buf[7] |= (val & 0xff);
-            }
-          else
-            {
-+             buf[7] |= ((val >> 56) & 0xff);
-+             buf[6] |= ((val >> 48) & 0xff);
-+             buf[5] |= ((val >> 40) & 0xff);
-+             buf[4] |= ((val >> 32) & 0xff);
-              buf[3] |= ((val >> 24) & 0xff);
-              buf[2] |= ((val >> 16) & 0xff);
-              buf[1] |= ((val >> 8) & 0xff);
-@@ -2616,6 +2671,8 @@ md_apply_fix (fixS *   fixP,
-        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
-       else if (fixP->fx_r_type == BFD_RELOC_32)
-        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-+      else if(fixP->fx_r_type == BFD_RELOC_MICROBLAZE_EA64)
-+        fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64;
-       else
-        fixP->fx_r_type = BFD_RELOC_NONE;
-       fixP->fx_addsy = section_symbol (absolute_section);
-@@ -2887,6 +2944,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
-     case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
-     case BFD_RELOC_MICROBLAZE_64_GOTPC:
-     case BFD_RELOC_MICROBLAZE_64_GPC:
-+    case BFD_RELOC_MICROBLAZE_EA64:
-     case BFD_RELOC_MICROBLAZE_64:
-     case BFD_RELOC_MICROBLAZE_64_PCREL:
-     case BFD_RELOC_MICROBLAZE_64_GOT:
-@@ -3032,10 +3090,10 @@ cons_fix_new_microblaze (fragS * frag,
-           r = BFD_RELOC_32;
-           break;
-         case 8:
--          if (microblaze_arch_size == 64)
-+          /*if (microblaze_arch_size == 64)
-             r = BFD_RELOC_32;
--          else
--            r = BFD_RELOC_64;
-+          else*/
-+            r = BFD_RELOC_MICROBLAZE_EA64;
-           break;
-         default:
-           as_bad (_("unsupported BFD relocation size %u"), size);
-diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 921adce04ea..d837ebb38e2 100644
---- a/opcodes/microblaze-dis.c
-+++ b/opcodes/microblaze-dis.c
-@@ -77,7 +77,7 @@ static char *
- get_field_imml (struct string_buf *buf, long instr)
- {
-   char *p = strbuf (buf);
--  sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
-+  sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
-   return p;
- }
- 
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch
deleted file mode 100644
index 19ebc0b0..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch
+++ /dev/null
@@ -1,171 +0,0 @@
-From 6209a572f4ec70608564fa7aa0270d640aa421f0 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 2 Nov 2021 17:28:24 +0530
-Subject: [PATCH 18/34] [Patch,MicroBlaze : Adding new relocation to support
- 64bit rodata.
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/elf64-microblaze.c     | 11 +++++++--
- gas/config/tc-microblaze.c | 49 ++++++++++++++++++++++++++++++++++----
- 2 files changed, 54 insertions(+), 6 deletions(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index f16b544b1fc..355e9131987 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -1529,6 +1529,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-            case (int) R_MICROBLAZE_64_PCREL :
-            case (int) R_MICROBLAZE_64:
-            case (int) R_MICROBLAZE_32:
-+           case (int) R_MICROBLAZE_IMML_64:
-              {
-                /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
-                   from removed linkonce sections, or sections discarded by
-@@ -1538,6 +1539,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                    relocation += addend;
-                    if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
-                      bfd_put_32 (input_bfd, relocation, contents + offset);
-+                   else if (r_type == R_MICROBLAZE_IMML_64)
-+                     bfd_put_64 (input_bfd, relocation, contents + offset);
-                    else
-                      {
-                        if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -1626,7 +1629,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                      }
-                    else
-                      {
--                       if (r_type == R_MICROBLAZE_32)
-+                       if (r_type == R_MICROBLAZE_32 || r_type == R_MICROBLAZE_IMML_64)
-                          {
-                            outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
-                            outrel.r_addend = relocation + addend;
-@@ -1652,6 +1655,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                    relocation += addend;
-                    if (r_type == R_MICROBLAZE_32)
-                      bfd_put_32 (input_bfd, relocation, contents + offset);
-+                   else if (r_type == R_MICROBLAZE_IMML_64)
-+                     bfd_put_64 (input_bfd, relocation, contents + offset + endian);
-                    else
-                      {
-                        if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -2166,7 +2171,8 @@ microblaze_elf_relax_section (bfd *abfd,
-                   microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
-                                                      irelscan->r_addend);
-               }
--              if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-+              if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32 
-+                  || ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64)
-                 {
-                  isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
- 
-@@ -2633,6 +2639,7 @@ microblaze_elf_check_relocs (bfd * abfd,
-         case R_MICROBLAZE_64:
-         case R_MICROBLAZE_64_PCREL:
-         case R_MICROBLAZE_32:
-+        case R_MICROBLAZE_IMML_64:
-           {
-             if (h != NULL && !bfd_link_pic (info))
-              {
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index d3de049e9c0..76ce516d8aa 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -1119,6 +1119,13 @@ md_assemble (char * str)
-            as_fatal (_("smi pseudo instruction should not use a label in imm field"));
-           if(streq (name, "lli") || streq (name, "sli"))
-             opc = str_microblaze_64;
-+          else if ((microblaze_arch_size == 64) && ((streq (name, "lbui")
-+                       || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi")
-+                       || streq (name, "shi") || streq (name, "swi"))))
-+           {
-+              opc = str_microblaze_64;
-+             subtype = opcode->inst_offset_type;
-+           }
-          else if (reg2 == REG_ROSDP)
-            opc = str_microblaze_ro_anchor;
-          else if (reg2 == REG_RWSDP)
-@@ -1186,7 +1193,10 @@ md_assemble (char * str)
-               inst |= (immed << IMM_LOW) & IMM_MASK;
-             }
-        }
--      else if (streq (name, "lli") || streq (name, "sli"))
-+      else if (streq (name, "lli") || streq (name, "sli") || ((microblaze_arch_size == 64)
-+               && ((streq (name, "lbui")) || streq (name, "lhui")
-+               || streq (name, "lwi") || streq (name, "sbi")
-+                || streq (name, "shi") || streq (name, "swi"))))
-         {
-           temp = immed & 0xFFFFFF8000;
-           if (temp != 0 && temp != 0xFFFFFF8000)
-@@ -1802,6 +1812,11 @@ md_assemble (char * str)
- 
-          if (exp.X_md != 0)
-            subtype = get_imm_otype(exp.X_md);
-+          else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
-+            {
-+              opc = str_microblaze_64;
-+             subtype = opcode->inst_offset_type;
-+           }
-          else
-            subtype = opcode->inst_offset_type;
- 
-@@ -1819,6 +1834,31 @@ md_assemble (char * str)
-           output = frag_more (isize);
-           immed = exp.X_add_number;
-         }
-+      if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
-+        {
-+          temp = immed & 0xFFFFFF8000;
-+          if (temp != 0 && temp != 0xFFFFFF8000)
-+            {
-+              /* Needs an immediate inst.  */
-+              opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+              inst1 = opcode1->bit_sequence;
-+             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+            }
-+         inst |= (reg1 << RD_LOW) & RD_MASK;
-+          inst |= (immed << IMM_LOW) & IMM_MASK;
-+         }
-+       else 
-+        {
- 
-       temp = immed & 0xFFFF8000;
-       if ((temp != 0) && (temp != 0xFFFF8000))
-@@ -1844,6 +1884,7 @@ md_assemble (char * str)
- 
-       inst |= (reg1 << RD_LOW) & RD_MASK;
-       inst |= (immed << IMM_LOW) & IMM_MASK;
-+        }
-       break;
- 
-     case INST_TYPE_R2:
-@@ -3090,10 +3131,10 @@ cons_fix_new_microblaze (fragS * frag,
-           r = BFD_RELOC_32;
-           break;
-         case 8:
--          /*if (microblaze_arch_size == 64)
--            r = BFD_RELOC_32;
--          else*/
-+          if (microblaze_arch_size == 64)
-             r = BFD_RELOC_MICROBLAZE_EA64;
-+          else
-+            r = BFD_RELOC_64;
-           break;
-         default:
-           as_bad (_("unsupported BFD relocation size %u"), size);
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0019-fixing-the-.bss-relocation-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0019-fixing-the-.bss-relocation-issue.patch
deleted file mode 100644
index 69aaa651..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0019-fixing-the-.bss-relocation-issue.patch
+++ /dev/null
@@ -1,117 +0,0 @@
-From 35e89c09636e2ce2f5eafcf62941d15ece79a172 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Wed, 24 Oct 2018 12:34:37 +0530
-Subject: [PATCH 19/34] fixing the .bss relocation issue
-
-Conflicts:
-        bfd/elf64-microblaze.c
-
-Conflicts:
-        bfd/elf64-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/elf64-microblaze.c | 41 +++++++++++++++++++++++++++++------------
- 1 file changed, 29 insertions(+), 12 deletions(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 355e9131987..eb7f9138884 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -1555,14 +1555,14 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                          bfd_put_16 (input_bfd, relocation & 0xffff,
-                                      contents + offset + endian);
- 
--                        unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                        if (insn == 0xb2000000 || insn == 0xb2ffffff)
--                          {
--                            insn &= ~0x00ffffff;
--                            insn |= (relocation >> 16) & 0xffffff;
--                            bfd_put_32 (input_bfd, insn,
--                                    contents + offset + endian);
--                          }
-+                       unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+                       if ((insn & 0xff000000) == 0xb2000000)
-+                         {
-+                           insn &= ~0x00ffffff;
-+                           insn |= (relocation >> 16) & 0xffffff;
-+                           bfd_put_32 (input_bfd, insn,
-+                                   contents + offset + endian);
-+                         }
-                        else
-                          {
-                            bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-@@ -1673,7 +1673,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                                         contents + offset + endian);
-                          }
-                        unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
--                        if (insn == 0xb2000000 || insn == 0xb2ffffff)
-+                       if ((insn & 0xff000000) == 0xb2000000)
-                           {
-                             insn &= ~0x00ffffff;
-                             insn |= (relocation >> 16) & 0xffffff;
-@@ -1791,7 +1791,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
- {
-     unsigned long instr = bfd_get_32 (abfd, bfd_addr);
- 
--    if (instr == 0xb2000000 || instr == 0xb2ffffff)
-+    if ((instr & 0xff000000) == 0xb2000000)
-       {
-         instr &= ~0x00ffffff;
-         instr |= (val & 0xffffff);
-@@ -1814,7 +1814,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
-     unsigned long instr_lo;
- 
-     instr_hi = bfd_get_32 (abfd, bfd_addr);
--    if (instr_hi == 0xb2000000 || instr_hi == 0xb2ffffff)
-+    if ((instr_hi & 0xff000000) == 0xb2000000)
-       {
-         instr_hi &= ~0x00ffffff;
-         instr_hi |= (val >> 16) & 0xffffff;
-@@ -2294,6 +2294,8 @@ microblaze_elf_relax_section (bfd *abfd,
-                  if (isym->st_shndx == shndx
-                      && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION))
-                    {
-+                     bfd_vma immediate;
-+
-                      if (ocontents == NULL)
-                        {
-                          if (elf_section_data (o)->this_hdr.contents != NULL)
-@@ -2316,8 +2318,20 @@ microblaze_elf_relax_section (bfd *abfd,
-                              elf_section_data (o)->this_hdr.contents = ocontents;
-                            }
-                        }
-+              unsigned long instr_hi =  bfd_get_32 (abfd, ocontents
-+                                                + irelscan->r_offset);
-+              unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
-+                                                + irelscan->r_offset
-+                                                + INST_WORD_SIZE);
-+              if ((instr_hi & 0xff000000) == 0xb2000000)
-+                immediate = (instr_hi & 0x00ffffff) << 24;
-+             else
-+                immediate = (instr_hi & 0x0000ffff) << 16;
-+              immediate |= (instr_lo & 0x0000ffff);
-                      offset = calc_fixup (irelscan->r_addend, 0, sec);
-+                     immediate -= offset;
-                      irelscan->r_addend -= offset;
-+                         
-                    }
-                }
-              else if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_PCREL)
-@@ -2357,7 +2371,10 @@ microblaze_elf_relax_section (bfd *abfd,
-           unsigned long instr_lo =  bfd_get_32 (abfd, ocontents
-                                                 + irelscan->r_offset
-                                                 + INST_WORD_SIZE);
--          immediate = (instr_hi & 0x0000ffff) << 16;
-+          if ((instr_hi & 0xff000000) == 0xb2000000)
-+            immediate = (instr_hi & 0x00ffffff) << 24;
-+         else
-+            immediate = (instr_hi & 0x0000ffff) << 16;
-           immediate |= (instr_lo & 0x0000ffff);
-                      target_address = immediate;
-                      offset = calc_fixup (target_address, 0, sec);
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
deleted file mode 100644
index ff1702cf..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 6c6490ed5a5c5c00d1b18a1f446280689bb572d1 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Wed, 28 Nov 2018 14:00:29 +0530
-Subject: [PATCH 20/34] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
- It was adjusting only lower 16bits.
-
-Conflicts:
-        bfd/elf64-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/elf32-microblaze.c | 4 ++--
- bfd/elf64-microblaze.c | 4 ++--
- 2 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index f20adb6fd73..88ac730582b 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -2060,8 +2060,8 @@ microblaze_elf_relax_section (bfd *abfd,
-                sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
-                efix = calc_fixup (target_address, 0, sec);
-                irel->r_addend -= (efix - sfix);
--    microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset
--                                      + INST_WORD_SIZE, irel->r_addend);
-+    microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
-+                                       irel->r_addend);
-              }
-              break;
-            }
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index eb7f9138884..03fe9eba53a 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2098,8 +2098,8 @@ microblaze_elf_relax_section (bfd *abfd,
-                sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
-                efix = calc_fixup (target_address, 0, sec);
-                irel->r_addend -= (efix - sfix);
--    microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset
--                                      + INST_WORD_SIZE, irel->r_addend);
-+    microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
-+                                       irel->r_addend);
-              }
-              break;
-            }
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Revert-ld-Remove-unused-expression-state.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Revert-ld-Remove-unused-expression-state.patch
deleted file mode 100644
index 3d877b69..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Revert-ld-Remove-unused-expression-state.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 6238123cdc680941f3b3a253cca5be06d5c81492 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 27 Feb 2019 15:12:32 +0530
-Subject: [PATCH 21/34] Revert "ld: Remove unused expression state" --defsym
- symbol=expression Create a global symbol in the output file, containing the
- absolute address given by expression.
-
-This reverts commit 65f14869fd3fbee8ed4c4ca49de8aaa86dbc66cb.
-
-Conflicts:
-        ld/ChangeLog
-
-Conflicts:
-        ld/ldexp.c
-        ld/ldexp.h
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- ld/ldexp.c | 8 +++++---
- ld/ldexp.h | 1 +
- 2 files changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/ld/ldexp.c b/ld/ldexp.c
-index d4d8706968d..b7f4361129f 100644
---- a/ld/ldexp.c
-+++ b/ld/ldexp.c
-@@ -1380,6 +1380,7 @@ static etree_type *
- exp_assop (const char *dst,
-           etree_type *src,
-           enum node_tree_enum class,
-+          bool defsym,
-           bool hidden)
- {
-   etree_type *n;
-@@ -1391,6 +1392,7 @@ exp_assop (const char *dst,
-   n->assign.type.node_class = class;
-   n->assign.src = src;
-   n->assign.dst = dst;
-+  n->assign.defsym = defsym;
-   n->assign.hidden = hidden;
-   return n;
- }
-@@ -1400,7 +1402,7 @@ exp_assop (const char *dst,
- etree_type *
- exp_assign (const char *dst, etree_type *src, bool hidden)
- {
--  return exp_assop (dst, src, etree_assign, hidden);
-+  return exp_assop (dst, src, etree_assign, false, hidden);
- }
- 
- /* Handle --defsym command-line option.  */
-@@ -1408,7 +1410,7 @@ exp_assign (const char *dst, etree_type *src, bool hidden)
- etree_type *
- exp_defsym (const char *dst, etree_type *src)
- {
--  return exp_assop (dst, src, etree_assign, false);
-+  return exp_assop (dst, src, etree_assign, true, false);
- }
- 
- /* Handle PROVIDE.  */
-@@ -1416,7 +1418,7 @@ exp_defsym (const char *dst, etree_type *src)
- etree_type *
- exp_provide (const char *dst, etree_type *src, bool hidden)
- {
--  return exp_assop (dst, src, etree_provide, hidden);
-+  return exp_assop (dst, src, etree_provide, false, hidden);
- }
- 
- /* Handle ASSERT.  */
-diff --git a/ld/ldexp.h b/ld/ldexp.h
-index ed6fb8be715..e838b736306 100644
---- a/ld/ldexp.h
-+++ b/ld/ldexp.h
-@@ -66,6 +66,7 @@ typedef union etree_union {
-     node_type type;
-     const char *dst;
-     union etree_union *src;
-+    bool defsym;
-     bool hidden;
-   } assign;
-   struct {
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-long-long-long-mingw-toolchain-issue.patch
deleted file mode 100644
index 073aa49c..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 24269bd086efcd37f702b92fd25dfe45faa7dfb6 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Thu, 29 Nov 2018 17:59:25 +0530
-Subject: [PATCH 22/34] fixing the long & long long mingw toolchain issue
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- gas/config/tc-microblaze.c | 10 +++++-----
- opcodes/microblaze-opc.h   |  4 ++--
- 2 files changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 76ce516d8aa..a1fb6ccbd44 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -783,7 +783,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
- }
- 
-  static char *
--parse_imml (char * s, expressionS * e, long min, long max)
-+parse_imml (char * s, expressionS * e, long long min, long long max)
- {
-   char *new_pointer;
-   char *atp;
-@@ -834,11 +834,11 @@ parse_imml (char * s, expressionS * e, long min, long max)
-     ; /* An error message has already been emitted.  */
-   else if ((e->X_op != O_constant && e->X_op != O_symbol) )
-     as_fatal (_("operand must be a constant or a label"));
--  else if ((e->X_op == O_constant) && ((long) e->X_add_number < min
--                                      || (long) e->X_add_number > max))
-+  else if ((e->X_op == O_constant) && ((long long) e->X_add_number < min
-+                                      || (long long) e->X_add_number > max))
-     {
--      as_fatal (_("operand must be absolute in range %ld..%ld, not %ld"),
--                min, max, (long) e->X_add_number);
-+      as_fatal (_("operand must be absolute in range %lld..%lld, not %lld"),
-+                min, max, (long long) e->X_add_number);
-     }
- 
-   if (atp)
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 5e45df995de..6b25d12dace 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr";
- #define MIN_IMM6_WIDTH  ((int) 0x00000001)
- #define MAX_IMM6_WIDTH  ((int) 0x00000040)
- 
--#define MIN_IMML  ((long) 0xffffff8000000000L)
--#define MAX_IMML  ((long) 0x0000007fffffffffL)
-+#define MIN_IMML  ((long long) 0xffffff8000000000L)
-+#define MAX_IMML  ((long long) 0x0000007fffffffffL)
- 
- #endif /* MICROBLAZE_OPC */
- 
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0023-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Added-support-to-new-arithmetic-single-register-inst.patch
deleted file mode 100644
index 74b0f42a..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0023-Added-support-to-new-arithmetic-single-register-inst.patch
+++ /dev/null
@@ -1,373 +0,0 @@
-From 3c197b12c4b680a230e8350ecd9a523be804fe3c Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Fri, 23 Aug 2019 16:18:43 +0530
-Subject: [PATCH 23/34] Added support to new arithmetic single register
- instructions
-
-Conflicts:
-        opcodes/microblaze-dis.c
-
-Conflicts:
-        gas/config/tc-microblaze.c
-        opcodes/microblaze-dis.c
-
-Conflicts:
-        gas/config/tc-microblaze.c
-signed-off-by:Nagaraju <nmekala@xilinx.com>
-              Mahesh <mbodapat@xilinx.com>
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++-
- opcodes/microblaze-dis.c   |  11 +++
- opcodes/microblaze-opc.h   |  43 ++++++++++-
- opcodes/microblaze-opcm.h  |   5 +-
- 4 files changed, 200 insertions(+), 6 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index a1fb6ccbd44..27544b60ea3 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -423,12 +423,33 @@ void
- md_begin (void)
- {
-   const struct op_code_struct * opcode;
-+  const char *prev_name = "";
- 
-   opcode_hash_control = str_htab_create ();
- 
-   /* Insert unique names into hash table.  */
--  for (opcode = microblaze_opcodes; opcode->name; opcode ++)
--    str_hash_insert (opcode_hash_control, opcode->name, opcode, 0);
-+  for (opcode = (struct microblaze_opcodes *)microblaze_opcodes; opcode->name; opcode ++)
-+    {
-+      if (strcmp (prev_name, opcode->name))
-+       {
-+         prev_name = (char *) opcode->name;
-+          str_hash_insert (opcode_hash_control, opcode->name, opcode, 0);
-+        }
-+    }
-+}
-+
-+static int
-+is_reg (char * s)
-+{
-+  int is_reg = 0; 
-+  /* Strip leading whitespace.  */
-+  while (ISSPACE (* s))
-+    ++ s;
-+  if (TOLOWER (s[0]) == 'r')
-+    {
-+        is_reg =1;
-+    }
-+  return is_reg;
- }
- 
- /* Try to parse a reg name.  */
-@@ -986,6 +1007,7 @@ md_assemble (char * str)
- {
-   char * op_start;
-   char * op_end;
-+  char * temp_op_end;
-   struct op_code_struct * opcode, *opcode1;
-   char * output = NULL;
-   int nlen = 0;
-@@ -996,9 +1018,10 @@ md_assemble (char * str)
-   unsigned reg3;
-   unsigned isize;
-   unsigned long immed = 0, immed2 = 0, temp;
--  expressionS exp;
-+  expressionS exp,exp1;
-   char name[20];
-   long immedl;
-+  int reg=0;
- 
-   /* Drop leading whitespace.  */
-   while (ISSPACE (* str))
-@@ -1029,7 +1052,78 @@ md_assemble (char * str)
-       as_bad (_("unknown opcode \"%s\""), name);
-       return;
-     }
--
-+   
-+  if ((microblaze_arch_size == 64) && (streq (name, "addli") || streq (name, "addlic") ||
-+        streq (name, "addlik") || streq (name, "addlikc") || streq (name, "rsubli") 
-+       || streq (name, "rsublic") || streq (name, "rsublik") || streq (name, "rsublikc") 
-+       || streq (name, "andli") || streq (name, "andnli") || streq (name, "orli") 
-+       || streq (name, "xorli")))
-+    {
-+      temp_op_end = op_end;
-+      if (strcmp (temp_op_end, ""))
-+        temp_op_end = parse_reg (temp_op_end + 1, &reg1);  /* Get rd.  */
-+      if (strcmp (temp_op_end, ""))
-+        reg  = is_reg (temp_op_end + 1);
-+      if (reg) 
-+       {
-+          
-+         opcode->inst_type=INST_TYPE_RD_R1_IMML;
-+          opcode->inst_offset_type = OPCODE_MASK_H;
-+          if (streq (name, "addli"))
-+           opcode->bit_sequence = ADDLI_MASK;
-+          else if (streq (name, "addlic"))
-+           opcode->bit_sequence = ADDLIC_MASK;
-+          else if (streq (name, "addlik"))
-+           opcode->bit_sequence = ADDLIK_MASK;
-+          else if (streq (name, "addlikc"))
-+           opcode->bit_sequence = ADDLIKC_MASK;
-+          else if (streq (name, "rsubli"))
-+           opcode->bit_sequence = RSUBLI_MASK;
-+          else if (streq (name, "rsublic"))
-+           opcode->bit_sequence = RSUBLIC_MASK;
-+          else if (streq (name, "rsublik"))
-+           opcode->bit_sequence = RSUBLIK_MASK;
-+          else if (streq (name, "rsublikc"))
-+           opcode->bit_sequence = RSUBLIKC_MASK;
-+          else if (streq (name, "andli"))
-+           opcode->bit_sequence = ANDLI_MASK;
-+          else if (streq (name, "andnli"))
-+           opcode->bit_sequence = ANDLNI_MASK;
-+          else if (streq (name, "orli"))
-+           opcode->bit_sequence = ORLI_MASK;
-+          else if (streq (name, "xorli"))
-+           opcode->bit_sequence = XORLI_MASK;
-+       }
-+      else
-+        {
-+         opcode->inst_type=INST_TYPE_RD_IMML;
-+          opcode->inst_offset_type = OPCODE_MASK_LIMM;
-+          if (streq (name, "addli"))
-+           opcode->bit_sequence = ADDLI_ONE_REG_MASK;
-+          else if (streq (name, "addlic"))
-+           opcode->bit_sequence = ADDLIC_ONE_REG_MASK;
-+          else if (streq (name, "addlik"))
-+           opcode->bit_sequence = ADDLIK_ONE_REG_MASK;
-+          else if (streq (name, "addlikc"))
-+           opcode->bit_sequence = ADDLIKC_ONE_REG_MASK;
-+          else if (streq (name, "rsubli"))
-+           opcode->bit_sequence = RSUBLI_ONE_REG_MASK;
-+          else if (streq (name, "rsublic"))
-+           opcode->bit_sequence = RSUBLIC_ONE_REG_MASK;
-+          else if (streq (name, "rsublik"))
-+           opcode->bit_sequence = RSUBLIK_ONE_REG_MASK;
-+          else if (streq (name, "rsublikc"))
-+           opcode->bit_sequence = RSUBLIKC_ONE_REG_MASK;
-+          else if (streq (name, "andli"))
-+           opcode->bit_sequence = ANDLI_ONE_REG_MASK;
-+          else if (streq (name, "andnli"))
-+           opcode->bit_sequence = ANDLNI_ONE_REG_MASK;
-+          else if (streq (name, "orli"))
-+           opcode->bit_sequence = ORLI_ONE_REG_MASK;
-+          else if (streq (name, "xorli"))
-+           opcode->bit_sequence = XORLI_ONE_REG_MASK;
-+        }
-+    }
-   inst = opcode->bit_sequence;
-   isize = 4;
- 
-@@ -1486,6 +1580,51 @@ md_assemble (char * str)
-       inst |= (immed << IMM_LOW) & IMM15_MASK;
-       break;
- 
-+    case INST_TYPE_RD_IMML:
-+      if (strcmp (op_end, ""))
-+        op_end = parse_reg (op_end + 1, &reg1);  /* Get rd.  */
-+      else
-+        {
-+          as_fatal (_("Error in statement syntax"));
-+          reg1 = 0;
-+        }
-+
-+      if (strcmp (op_end, ""))
-+        op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+      else
-+        as_fatal (_("Error in statement syntax"));
-+
-+      /* Check for spl registers. */
-+      if (check_spl_reg (&reg1))
-+        as_fatal (_("Cannot use special register with this instruction"));
-+      if (exp.X_op != O_constant)
-+       {
-+          char *opc = NULL;
-+          relax_substateT subtype;
-+
-+          if (exp.X_md != 0)
-+            subtype = get_imm_otype(exp.X_md);
-+          else
-+            subtype = opcode->inst_offset_type;
-+
-+          output = frag_var (rs_machine_dependent,
-+                             isize * 2, 
-+                             isize * 2,
-+                             subtype,   
-+                             exp.X_add_symbol,
-+                             exp.X_add_number,
-+                             (char *) opc);
-+          immedl = 0L;
-+       }               
-+      else
-+        {
-+          output = frag_more (isize);
-+          immed = exp.X_add_number;
-+        }
-+      inst |= (reg1 << RD_LOW) & RD_MASK;
-+      inst |= (immed << IMM_LOW) & IMM16_MASK;
-+      break;
-+       
-     case INST_TYPE_R1_RFSL:
-       if (strcmp (op_end, ""))
-         op_end = parse_reg (op_end + 1, &reg1);  /* Get r1.  */
-diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index d837ebb38e2..b5a78dcfe09 100644
---- a/opcodes/microblaze-dis.c
-+++ b/opcodes/microblaze-dis.c
-@@ -130,6 +130,14 @@ get_field_imm15 (struct string_buf *buf, long instr)
-   return p;
- }
- 
-+get_field_imm16 (struct string_buf *buf, long instr)
-+{
-+  char *p = strbuf (buf);
-+
-+  sprintf (p, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW));
-+  return p;
-+}
-+
- static char *
- get_field_special (struct string_buf *buf, long instr,
-                   const struct op_code_struct *op)
-@@ -457,6 +465,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-          /* For mbar 16 or sleep insn.  */
-        case INST_TYPE_NONE:
-          break;
-+       case INST_TYPE_RD_IMML:
-+         print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
-+          break;
-         /* For bit field insns.  */
-        case INST_TYPE_RD_R1_IMMW_IMMS:
-           print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst));
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 6b25d12dace..82da7f1179a 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -69,6 +69,7 @@
- #define INST_TYPE_RD_R1_IMMW_IMMS  21
- 
- #define INST_TYPE_NONE 25
-+#define INST_TYPE_RD_IMML 26
- 
- 
- 
-@@ -84,6 +85,7 @@
- #define IMMVAL_MASK_MFS 0x0000
- 
- #define OPCODE_MASK_H   0xFC000000  /* High 6 bits only.  */
-+#define OPCODE_MASK_LIMM 0xFC1F0000 /* High 6 bits and 12-16 bits */
- #define OPCODE_MASK_H1  0xFFE00000  /* High 11 bits.  */
- #define OPCODE_MASK_H2  0xFC1F0000  /* High 6 and bits 20-16.  */
- #define OPCODE_MASK_H12 0xFFFF0000  /* High 16.  */
-@@ -106,6 +108,33 @@
- #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26.  */
- #define OPCODE_MASK_H8  0xFF000000  /* High 8 bits only.  */
- 
-+/*Defines to identify 64-bit single reg instructions */
-+#define ADDLI_ONE_REG_MASK 0x68000000
-+#define ADDLIC_ONE_REG_MASK 0x68020000
-+#define ADDLIK_ONE_REG_MASK 0x68040000
-+#define ADDLIKC_ONE_REG_MASK 0x68060000
-+#define RSUBLI_ONE_REG_MASK 0x68010000
-+#define RSUBLIC_ONE_REG_MASK 0x68030000
-+#define RSUBLIK_ONE_REG_MASK 0x68050000
-+#define RSUBLIKC_ONE_REG_MASK 0x68070000
-+#define ORLI_ONE_REG_MASK 0x68100000
-+#define ANDLI_ONE_REG_MASK 0x68110000
-+#define XORLI_ONE_REG_MASK 0x68120000
-+#define ANDLNI_ONE_REG_MASK 0x68130000
-+#define ADDLI_MASK 0x20000000
-+#define ADDLIC_MASK 0x28000000
-+#define ADDLIK_MASK 0x30000000
-+#define ADDLIKC_MASK 0x38000000
-+#define RSUBLI_MASK 0x24000000
-+#define RSUBLIC_MASK 0x2C000000
-+#define RSUBLIK_MASK 0x34000000
-+#define RSUBLIKC_MASK 0x3C000000
-+#define ANDLI_MASK 0xA4000000
-+#define ANDLNI_MASK 0xAC000000
-+#define ORLI_MASK 0xA0000000
-+#define XORLI_MASK 0xA8000000
-+
-+
- /* New Mask for msrset, msrclr insns.  */
- #define OPCODE_MASK_H23N  0xFC1F8000 /* High 6 and bits 11 - 16.  */
- /* Mask for mbar insn.  */
-@@ -114,7 +143,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
- 
--#define MAX_OPCODES 412
-+#define MAX_OPCODES 424
- 
- const struct op_code_struct
- {
-@@ -444,13 +473,21 @@ const struct op_code_struct
-   {"cmpl",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst },
-   {"cmplu",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst },
-   {"addli",   INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"addli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68000000, OPCODE_MASK_LIMM, addli, arithmetic_inst },
-   {"rsubli",  INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"rsubli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68010000, OPCODE_MASK_LIMM, rsubli, arithmetic_inst },
-   {"addlic",  INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"addlic", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68020000, OPCODE_MASK_LIMM, addlic, arithmetic_inst },
-   {"rsublic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+    {"rsublic", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68030000, OPCODE_MASK_LIMM, rsublic, arithmetic_inst },
-   {"addlik",  INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"addlik", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68040000, OPCODE_MASK_LIMM, addlik, arithmetic_inst },
-   {"rsublik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"rsublik", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68050000, OPCODE_MASK_LIMM, rsublik, arithmetic_inst },
-   {"addlikc", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },   /* Identical to 32-bit */
-+  {"addlikc", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68060000, OPCODE_MASK_LIMM, addlikc, arithmetic_inst },
-   {"rsublikc",INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst },  /* Identical to 32-bit */
-+  {"rsublikc", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68070000, OPCODE_MASK_LIMM, rsublikc, arithmetic_inst },
-   {"mull",    INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000100, OPCODE_MASK_H4, mull, mult_inst },
-   {"bslll",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000500, OPCODE_MASK_H3, bslll, barrel_shift_inst },
-   {"bslra",   INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000300, OPCODE_MASK_H3, bslra, barrel_shift_inst },
-@@ -501,9 +538,13 @@ const struct op_code_struct
-   {"beaged",  INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00000, OPCODE_MASK_H14, beaged, branch_inst },
-   {"bealged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00100, OPCODE_MASK_H14, bealged, branch_inst },
-   {"orli",    INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, invalid_inst, logical_inst },      /* Identical to 32-bit */
-+  {"orli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68100000, OPCODE_MASK_LIMM, orli, arithmetic_inst },
-   {"andli",   INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, invalid_inst, logical_inst },      /* Identical to 32-bit */
-+  {"andli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68110000, OPCODE_MASK_LIMM, andli, arithmetic_inst },
-   {"xorli",   INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, invalid_inst, logical_inst },      /* Identical to 32-bit */
-+  {"xorli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68120000, OPCODE_MASK_LIMM, xorli, arithmetic_inst },
-   {"andnli",  INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, invalid_inst, logical_inst },      /* Identical to 32-bit */
-+  {"andnli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68130000, OPCODE_MASK_LIMM, andnli, arithmetic_inst },
-   {"imml",    INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst },
-   {"breai",   INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst },
-   {"breaid",  INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst },
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index b242ea73c7b..5c44a5ff0ac 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
-@@ -62,7 +62,9 @@ enum microblaze_instr
-   eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd,
- 
-   /* 64-bit instructions */
--  addl, rsubl, addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull,
-+  addl, addli, addlic, addlik, addlikc, rsubl, rsubli, rsublic, rsublik, rsublikc,
-+  addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull,
-+  andli, andnli, orli, xorli,
-   bslll, bslra, bslrl, bsllli, bslrai, bslrli, bslefi, bslifi, orl, andl, xorl,
-   andnl, pcmplbf, pcmpleq, pcmplne, srla, srlc, srll, sextl8, sextl16, sextl32,
-   brea, bread, breald, beaeq, bealeq, beaeqd, bealeqd, beane, bealne, beaned,
-@@ -167,5 +169,6 @@ enum microblaze_instr_type
- 
- /* Imm mask for msrset, msrclr instructions.  */
- #define  IMM15_MASK 0x00007FFF
-+#define IMM16_MASK 0x0000FFFF
- 
- #endif /* MICROBLAZE-OPCM */
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
deleted file mode 100644
index 2ce165bc..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
+++ /dev/null
@@ -1,549 +0,0 @@
-From ec5bfe546213b2cb7fe2a51f9f9571597b2c5aa9 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 26 Aug 2019 15:29:42 +0530
-Subject: [PATCH 24/34] [Patch,MicroBlaze] : double imml generation for 64 bit
- values.
-
-Conflicts:
-        gas/config/tc-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- gas/config/tc-microblaze.c | 321 ++++++++++++++++++++++++++++++-------
- opcodes/microblaze-opc.h   |   4 +-
- 2 files changed, 262 insertions(+), 63 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 27544b60ea3..4c455ff02b8 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -1008,7 +1008,7 @@ md_assemble (char * str)
-   char * op_start;
-   char * op_end;
-   char * temp_op_end;
--  struct op_code_struct * opcode, *opcode1;
-+  struct op_code_struct * opcode, *opcode1, *opcode2;
-   char * output = NULL;
-   int nlen = 0;
-   int i;
-@@ -1192,7 +1192,12 @@ md_assemble (char * str)
-           reg2 = 0;
-         }
-       if (strcmp (op_end, ""))
-+        {
-+        if(microblaze_arch_size == 64)
-+        op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+       else
-        op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
-+       }
-       else
-        as_fatal (_("Error in statement syntax"));
- 
-@@ -1292,26 +1297,51 @@ md_assemble (char * str)
-                || streq (name, "lwi") || streq (name, "sbi")
-                 || streq (name, "shi") || streq (name, "swi"))))
-         {
--          temp = immed & 0xFFFFFF8000;
--          if (temp != 0 && temp != 0xFFFFFF8000)
-+          temp = ((long long)immed) & 0xFFFFFFFFFFFF8000;
-+          if (temp != 0 && temp != 0xFFFFFFFFFFFF8000)
-             {
-               /* Needs an immediate inst.  */
--             opcode1
--               = (struct op_code_struct *) str_hash_find (opcode_hash_control,
--                                                          "imml");
--              if (opcode1 == NULL)
-+          if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887)
-+            {
-+             opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+             if (opcode1 == NULL)
-                 {
-                   as_bad (_("unknown opcode \"%s\""), "imml");
-                   return;
-                 }
-               inst1 = opcode1->bit_sequence;
--             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-               output[0] = INST_BYTE0 (inst1);
-               output[1] = INST_BYTE1 (inst1);
-               output[2] = INST_BYTE2 (inst1);
-               output[3] = INST_BYTE3 (inst1);
-               output = frag_more (isize);
-             }
-+         else 
-+           {
-+           opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL || opcode2 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+              inst1 = opcode2->bit_sequence;
-+              inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+              inst1 = opcode1->bit_sequence;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+            }
-+         }
-           inst |= (reg1 << RD_LOW) & RD_MASK;
-           inst |= (reg2 << RA_LOW) & RA_MASK;
-           inst |= (immed << IMM_LOW) & IMM_MASK;
-@@ -1328,8 +1358,7 @@ md_assemble (char * str)
-                    as_bad (_("unknown opcode \"%s\""), "imm");
-                    return;
-                  }
--
--               inst1 = opcode1->bit_sequence;
-+              inst1 = opcode1->bit_sequence;
-                inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
-                output[0] = INST_BYTE0 (inst1);
-                output[1] = INST_BYTE1 (inst1);
-@@ -1570,7 +1599,7 @@ md_assemble (char * str)
-         as_fatal (_("Cannot use special register with this instruction"));
- 
-       if (exp.X_op != O_constant)
--        as_fatal (_("Symbol used as immediate value for msrset/msrclr instructions"));
-+        as_fatal (_("Symbol used as immediate value for arithmetic long instructions"));
-       else
-        {
-           output = frag_more (isize);
-@@ -1904,6 +1933,7 @@ md_assemble (char * str)
-       temp = immed & 0xFFFF8000;
-       if ((temp != 0) && (temp != 0xFFFF8000))
-        {
-+
-           /* Needs an immediate inst.  */
-          opcode1
-            = (struct op_code_struct *) str_hash_find (opcode_hash_control,
-@@ -1936,7 +1966,12 @@ md_assemble (char * str)
-           reg1 = 0;
-         }
-       if (strcmp (op_end, ""))
-+      {
-+        if(microblaze_arch_size == 64)
-+        op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+        else
-         op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
-+      }
-       else
-         as_fatal (_("Error in statement syntax"));
- 
-@@ -1975,30 +2010,55 @@ md_assemble (char * str)
-         }
-       if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
-         {
--          temp = immed & 0xFFFFFF8000;
--          if (temp != 0 && temp != 0xFFFFFF8000)
-+          temp = ((long long)immed) & 0xFFFFFFFFFFFF8000;
-+          if (temp != 0 && temp != 0xFFFFFFFFFFFF8000)
-             {
-               /* Needs an immediate inst.  */
--              opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887)
-+           {
-+            opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-               if (opcode1 == NULL)
-                 {
-                   as_bad (_("unknown opcode \"%s\""), "imml");
-                   return;
-                 }
-               inst1 = opcode1->bit_sequence;
--             inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-               output[0] = INST_BYTE0 (inst1);
-               output[1] = INST_BYTE1 (inst1);
-               output[2] = INST_BYTE2 (inst1);
-               output[3] = INST_BYTE3 (inst1);
-               output = frag_more (isize);
-             }
-+          else {
-+           opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL || opcode2 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+              inst1 = opcode2->bit_sequence;
-+              inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+              inst1 = opcode1->bit_sequence;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+          }
-+         }
-          inst |= (reg1 << RD_LOW) & RD_MASK;
-           inst |= (immed << IMM_LOW) & IMM_MASK;
-          }
-        else 
-         {
--
-       temp = immed & 0xFFFF8000;
-       if ((temp != 0) && (temp != 0xFFFF8000))
-        {
-@@ -2086,24 +2146,50 @@ md_assemble (char * str)
-             streq (name, "breaid") || 
-            streq (name, "brai") || streq (name, "braid")))
-         {
--          temp = immed & 0xFFFFFF8000;
-+          temp = immed & 0xFFFFFFFFFFFF8000;
-           if (temp != 0)
-            {
-               /* Needs an immediate inst.  */
--              opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+         if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887)
-+          {
-+            opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-               if (opcode1 == NULL)
-                 {
-                   as_bad (_("unknown opcode \"%s\""), "imml");
-                   return;
-                 }
-               inst1 = opcode1->bit_sequence;
--              inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-               output[0] = INST_BYTE0 (inst1);
-               output[1] = INST_BYTE1 (inst1);
-               output[2] = INST_BYTE2 (inst1);
-               output[3] = INST_BYTE3 (inst1);
-               output = frag_more (isize);
-             }
-+           else {
-+           opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL || opcode2 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+              inst1 = opcode2->bit_sequence;
-+              inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+              inst1 = opcode1->bit_sequence;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+            }
-+            }
-           inst |= (immed << IMM_LOW) & IMM_MASK;
-        }
-       else
-@@ -2203,21 +2289,45 @@ md_assemble (char * str)
-        {
-          output = frag_more (isize);
-          immedl = exp.X_add_number;
--
--         opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
--         if (opcode1 == NULL)
--           {
--             as_bad (_("unknown opcode \"%s\""), "imml");
--             return;
--           }
--
--         inst1 = opcode1->bit_sequence;
--         inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
--         output[0] = INST_BYTE0 (inst1);
--         output[1] = INST_BYTE1 (inst1);
--         output[2] = INST_BYTE2 (inst1);
--         output[3] = INST_BYTE3 (inst1);
--         output = frag_more (isize);
-+         if (((long long)immedl) > (long long)-549755813888 && ((long long)immedl) < (long long)549755813887)
-+            {
-+             opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+             if (opcode1 == NULL)
-+             {
-+              as_bad (_("unknown opcode \"%s\""), "imml");
-+              return;
-+             }
-+          inst1 = opcode1->bit_sequence;
-+          inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+          output[0] = INST_BYTE0 (inst1);
-+          output[1] = INST_BYTE1 (inst1);
-+          output[2] = INST_BYTE2 (inst1);
-+          output[3] = INST_BYTE3 (inst1);
-+          output = frag_more (isize);
-+        }
-+           else {
-+           opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+       if (opcode2 == NULL || opcode1 == NULL)
-+            {
-+              as_bad (_("unknown opcode \"%s\""), "imml");
-+              return;
-+            }
-+          inst1 = opcode2->bit_sequence;
-+          inst1 |= ((immedl & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
-+          output[0] = INST_BYTE0 (inst1);
-+          output[1] = INST_BYTE1 (inst1);
-+          output[2] = INST_BYTE2 (inst1);
-+          output[3] = INST_BYTE3 (inst1);
-+          output = frag_more (isize);
-+          inst1 = opcode1->bit_sequence;
-+          inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+          output[0] = INST_BYTE0 (inst1);
-+          output[1] = INST_BYTE1 (inst1);
-+          output[2] = INST_BYTE2 (inst1);
-+          output[3] = INST_BYTE3 (inst1);
-+          output = frag_more (isize);
-+        }
-         }
- 
-       inst |= (reg1 << RD_LOW) & RD_MASK;
-@@ -2266,21 +2376,46 @@ md_assemble (char * str)
-        {
-           output = frag_more (isize);
-           immedl = exp.X_add_number;
--         opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
--         if (opcode1 == NULL)
--           {
--             as_bad (_("unknown opcode \"%s\""), "imml");
--             return;
--           }
--
-+          if (((long long)immedl) > (long long)-549755813888 && ((long long)immedl) < (long long)549755813887)
-+             {
-+            opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           if (opcode1 == NULL)
-+            {
-+              as_bad (_("unknown opcode \"%s\""), "imml");
-+              return;
-+            }
-+          inst1 = opcode1->bit_sequence;
-+          inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+          output[0] = INST_BYTE0 (inst1);
-+          output[1] = INST_BYTE1 (inst1);
-+          output[2] = INST_BYTE2 (inst1);
-+          output[3] = INST_BYTE3 (inst1);
-+          output = frag_more (isize);
-+          }
-+           else {
-+           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+       if (opcode2 == NULL || opcode1 == NULL)
-+            {
-+              as_bad (_("unknown opcode \"%s\""), "imml");
-+              return;
-+            }
-+          inst1 = opcode2->bit_sequence;
-+          inst1 |= ((immedl & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
-+          output[0] = INST_BYTE0 (inst1);
-+          output[1] = INST_BYTE1 (inst1);
-+          output[2] = INST_BYTE2 (inst1);
-+          output[3] = INST_BYTE3 (inst1);
-+          output = frag_more (isize);
-           inst1 = opcode1->bit_sequence;
--         inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
-+          inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-           output[0] = INST_BYTE0 (inst1);
-           output[1] = INST_BYTE1 (inst1);
-           output[2] = INST_BYTE2 (inst1);
-           output[3] = INST_BYTE3 (inst1);
-           output = frag_more (isize);
-         }
-+        }
- 
-       inst |= (reg1 << RA_LOW) & RA_MASK;
-       inst |= (immedl << IMM_LOW) & IMM_MASK;
-@@ -2560,8 +2695,8 @@ md_apply_fix (fixS *   fixP,
-   /* Note: use offsetT because it is signed, valueT is unsigned.  */
-   offsetT      val  = (offsetT) * valp;
-   int          i;
--  struct op_code_struct * opcode1;
--  unsigned long inst1;
-+  struct op_code_struct * opcode1, * opcode2;
-+  unsigned long inst1,inst2;
- 
-   symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>");
- 
-@@ -2743,30 +2878,75 @@ md_apply_fix (fixS *   fixP,
-     case BFD_RELOC_MICROBLAZE_64_TEXTREL:
-     case BFD_RELOC_MICROBLAZE_64:
-     case BFD_RELOC_MICROBLAZE_64_PCREL:
--      /* Add an imm instruction.  First save the current instruction.  */
--      for (i = 0; i < INST_WORD_SIZE; i++)
--       buf[i + INST_WORD_SIZE] = buf[i];
-       if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
-             || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-         {
-           /* Generate the imm instruction.  */
--          opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
-+          {
-+        /* Add an imm instruction.  First save the current instruction.  */
-+        for (i = 0; i < INST_WORD_SIZE; i++)
-+        buf[i + INST_WORD_SIZE] = buf[i];
-+        opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-           if (opcode1 == NULL)
--           {
--             as_bad (_("unknown opcode \"%s\""), "imml");
--             return;
--           }
-+            {
-+              as_bad (_("unknown opcode \"%s\""), "imml");
-+              return;
-+            }
- 
-            inst1 = opcode1->bit_sequence;
-            if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
--            inst1 |= ((val & 0xFFFFFF0000L) >> 16) & IMML_MASK;
-+             inst1 |= ((val & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-            if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
--             fixP->fx_r_type = BFD_RELOC_64; 
-+             fixP->fx_r_type = BFD_RELOC_64;
-            if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
--             fixP->fx_r_type = BFD_RELOC_64_PCREL; 
-+             fixP->fx_r_type = BFD_RELOC_64_PCREL;
-+      buf[0] = INST_BYTE0 (inst1);
-+      buf[1] = INST_BYTE1 (inst1);
-+      buf[2] = INST_BYTE2 (inst1);
-+      buf[3] = INST_BYTE3 (inst1);
-+        }
-+           else {
-+      /* Add an imm instruction.  First save the current instruction.  */
-+        for (i = 0; i < INST_WORD_SIZE; i++)
-+        buf[i + INST_WORD_SIZE + 4] = buf[i];
-+
-+           opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+          if (opcode1 == NULL || opcode2 ==NULL)
-+              {
-+             as_bad (_("unknown opcode \"%s\""), "imml");
-+              return;
-+             }
-+           inst1 = opcode2->bit_sequence;
-+           if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-+             inst1 |= ((val & 0x000000FFFFFF0000L) >> 40) & IMML_MASK;
-+           if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+             fixP->fx_r_type = BFD_RELOC_64;
-+           if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-+             fixP->fx_r_type = BFD_RELOC_64_PCREL;
-+           inst2 = opcode1->bit_sequence;
-+           if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-+             inst1 |= ((val & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+           if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+             fixP->fx_r_type = BFD_RELOC_64;
-+           if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-+             fixP->fx_r_type = BFD_RELOC_64_PCREL;
-+       buf[0] = INST_BYTE0 (inst1);
-+       buf[1] = INST_BYTE1 (inst1);
-+       buf[2] = INST_BYTE2 (inst1);
-+       buf[3] = INST_BYTE3 (inst1);
-+       buf[4] = INST_BYTE0 (inst2);
-+       buf[5] = INST_BYTE1 (inst2);
-+       buf[6] = INST_BYTE2 (inst2);
-+       buf[7] = INST_BYTE3 (inst2);
-+           }
-          }
-       else
-         {
-+      /* Add an imm instruction.  First save the current instruction.  */
-+        for (i = 0; i < INST_WORD_SIZE; i++)
-+        buf[i + INST_WORD_SIZE] = buf[i];
-           /* Generate the imm instruction.  */
-           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
-           if (opcode1 == NULL)
-@@ -2778,12 +2958,11 @@ md_apply_fix (fixS *   fixP,
-           inst1 = opcode1->bit_sequence;
-           if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-            inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
--         }
-       buf[0] = INST_BYTE0 (inst1);
-       buf[1] = INST_BYTE1 (inst1);
-       buf[2] = INST_BYTE2 (inst1);
-       buf[3] = INST_BYTE3 (inst1);
--
-+         }
-       /* Add the value only if the symbol is defined.  */
-       if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
-        {
-@@ -2816,21 +2995,41 @@ md_apply_fix (fixS *   fixP,
-       for (i = 0; i < INST_WORD_SIZE; i++)
-        buf[i + INST_WORD_SIZE] = buf[i];
-       /* Generate the imm instruction.  */
--      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC)
--        opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+      if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) {
-+           if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
-+           {
-+           for (i = 0; i < INST_WORD_SIZE; i++)
-+           buf[i + INST_WORD_SIZE] = buf[i];
-+           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+          }
-+           else {
-+       for (i = 0; i < INST_WORD_SIZE; i++)
-+        buf[i + INST_WORD_SIZE + 4] = buf[i]; 
-+           opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+      inst2 = opcode2->bit_sequence;
-+
-+      /* We can fixup call to a defined non-global address
-+ *          within the same section only.  */
-+      buf[4] = INST_BYTE0 (inst2);
-+      buf[5] = INST_BYTE1 (inst2);
-+      buf[6] = INST_BYTE2 (inst2);
-+      buf[7] = INST_BYTE3 (inst2);
-+           }
-+       }
-       else
-         opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm");
-       if (opcode1 == NULL)
-        {
-+      for (i = 0; i < INST_WORD_SIZE; i++)
-+        buf[i + INST_WORD_SIZE] = buf[i];
-           if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC)
-            as_bad (_("unknown opcode \"%s\""), "imml");
-           else
-            as_bad (_("unknown opcode \"%s\""), "imm");
-          return;
-        }
--
-       inst1 = opcode1->bit_sequence;
--
-       /* We can fixup call to a defined non-global address
-         within the same section only.  */
-       buf[0] = INST_BYTE0 (inst1);
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 82da7f1179a..e65f4b58233 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr";
- #define MIN_IMM6_WIDTH  ((int) 0x00000001)
- #define MAX_IMM6_WIDTH  ((int) 0x00000040)
- 
--#define MIN_IMML  ((long long) 0xffffff8000000000L)
--#define MAX_IMML  ((long long) 0x0000007fffffffffL)
-+#define MIN_IMML  ((long long) -9223372036854775808)
-+#define MAX_IMML  ((long long) 9223372036854775807)
- 
- #endif /* MICROBLAZE_OPC */
- 
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
deleted file mode 100644
index c4ece2fe..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 0ba14f999b266406e7e86fc0e7311ebb275e7b97 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 3 Nov 2021 12:13:32 +0530
-Subject: [PATCH 25/34] Fixed bug in generation of IMML instruction for the
-
-new MB-64 instructions with single register.
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- gas/config/tc-microblaze.c | 50 +++++++++++++++++++++++++++++++++++---
- 1 file changed, 47 insertions(+), 3 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 4c455ff02b8..bccaafe296c 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -1643,12 +1643,56 @@ md_assemble (char * str)
-                              exp.X_add_symbol,
-                              exp.X_add_number,
-                              (char *) opc);
--          immedl = 0L;
-+          immed = 0L;
-        }               
-       else
-         {
-           output = frag_more (isize);
-           immed = exp.X_add_number;
-+          temp = ((long long)immed) & 0xFFFFFFFFFFFF8000;
-+          if (temp != 0 && temp != 0xFFFFFFFFFFFF8000 && temp != 0x8000)
-+            {
-+              /* Needs an immediate inst.  */
-+           if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887)
-+           {
-+            opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+              inst1 = opcode1->bit_sequence;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+            }
-+          else {
-+           opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+           opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
-+              if (opcode1 == NULL || opcode2 == NULL)
-+                {
-+                  as_bad (_("unknown opcode \"%s\""), "imml");
-+                  return;
-+                }
-+              inst1 = opcode2->bit_sequence;
-+              inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+              inst1 = opcode1->bit_sequence;
-+              inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+              output[0] = INST_BYTE0 (inst1);
-+              output[1] = INST_BYTE1 (inst1);
-+              output[2] = INST_BYTE2 (inst1);
-+              output[3] = INST_BYTE3 (inst1);
-+              output = frag_more (isize);
-+          }
-+         }
-         }
-       inst |= (reg1 << RD_LOW) & RD_MASK;
-       inst |= (immed << IMM_LOW) & IMM16_MASK;
-@@ -2146,8 +2190,8 @@ md_assemble (char * str)
-             streq (name, "breaid") || 
-            streq (name, "brai") || streq (name, "braid")))
-         {
--          temp = immed & 0xFFFFFFFFFFFF8000;
--          if (temp != 0)
-+          temp = ((long long)immed) & 0xFFFFFFFFFFFF8000;
-+          if (temp != 0 && temp != 0xFFFFFFFFFFFF8000 && temp != 0x8000)
-            {
-               /* Needs an immediate inst.  */
-          if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887)
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
deleted file mode 100644
index c17019d1..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 6e92cc2429ec37ced6cc70596ad7c6217d25e806 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 16 Apr 2020 18:08:58 +0530
-Subject: [PATCH 26/34]  [Patch,MicroBlaze m64] : This patch will remove imml 0
- and imml -1 instructions when the offset is less than 16 bit for Type A
- branch EA instructions.
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- gas/config/tc-microblaze.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index bccaafe296c..85509011f8c 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2158,9 +2158,7 @@ md_assemble (char * str)
-       if (exp.X_op != O_constant)
-        {
-          char *opc;
--          if (microblaze_arch_size == 64 && (streq (name, "breai") || 
--                streq (name, "breaid") || 
--                streq (name, "brai") || streq (name, "braid")))
-+          if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
-             opc = str_microblaze_64;
-          else
-             opc = NULL;
-@@ -2923,7 +2921,7 @@ md_apply_fix (fixS *   fixP,
-     case BFD_RELOC_MICROBLAZE_64:
-     case BFD_RELOC_MICROBLAZE_64_PCREL:
-       if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
--            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-+            || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64))
-         {
-           /* Generate the imm instruction.  */
-            if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
deleted file mode 100644
index 9bddd54b..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 7f4c17e26065d8194a2512f2982c245afa0e7e40 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 17 Jun 2020 21:20:26 +0530
-Subject: [PATCH 27/34] [Patch,MicroBlaze] : improper address mapping of
- PROVIDE directive symbols[DTOR_END] are causing runtime loops and we don't
- need to override PROVIDE symbols if symbols are defined in libraries and
- linker so I am disabling override for PROVIDE symbols.
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- ld/ldlang.c | 12 +++++++++---
- 1 file changed, 9 insertions(+), 3 deletions(-)
-
-diff --git a/ld/ldlang.c b/ld/ldlang.c
-index f12c09633a7..4a71abc7cbc 100644
---- a/ld/ldlang.c
-+++ b/ld/ldlang.c
-@@ -3692,10 +3692,16 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode)
-            plugin_insert = NULL;
- #endif
-          break;
-+         /* This is from a --defsym on the command line.  */
-        case lang_assignment_statement_enum:
--         if (s->assignment_statement.exp->type.node_class != etree_assert)
--           exp_fold_tree_no_dot (s->assignment_statement.exp);
--         break;
-+          if (s->assignment_statement.exp->type.node_class != etree_assert)
-+          {
-+          if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide))
-+          ;
-+          else
-+          exp_fold_tree_no_dot (s->assignment_statement.exp);
-+          }
-+          break;
-        default:
-          break;
-        }
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch
deleted file mode 100644
index eba1a4ef..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-microblaze-Changing-the-long-to-long-long-as-i.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 3e308d91912ade69f914383fd9c13f934da37be4 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilinx.com>
-Date: Tue, 20 Apr 2021 21:22:06 +0530
-Subject: [PATCH 28/34] [Patch, microblaze]:Changing the long to long long as
- in Windows long is 32-bit but we need the variable to be 64-bit
-
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
-
-Conflicts:
-        gas/config/tc-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- gas/config/tc-microblaze.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 85509011f8c..31677446114 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -1017,7 +1017,7 @@ md_assemble (char * str)
-   unsigned reg2;
-   unsigned reg3;
-   unsigned isize;
--  unsigned long immed = 0, immed2 = 0, temp;
-+  unsigned long long immed = 0, immed2 = 0, temp;
-   expressionS exp,exp1;
-   char name[20];
-   long immedl;
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0029-gas-revert-moving-of-md_pseudo_table-from-const.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0029-gas-revert-moving-of-md_pseudo_table-from-const.patch
deleted file mode 100644
index 1e42dc60..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0029-gas-revert-moving-of-md_pseudo_table-from-const.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 24d43f5ce8746c653de7de3fad46915755ba789d Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 8 Nov 2021 21:57:13 +0530
-Subject: [PATCH 29/34] gas: revert moving of md_pseudo_table from const
-
-The base system expect md_pseudo_table to be constant, Changing the
-definition will break other architectures when compiled with a
-unified source code.
-
-Patch reverts the change away from const, and implements a newer
-dynamic handler that passes the correct argument value based on word
-size.
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
----
- gas/config/tc-microblaze.c | 16 +++++++++++++---
- gas/tc.h                   |  2 +-
- 2 files changed, 14 insertions(+), 4 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 31677446114..6b398ab5605 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -385,6 +385,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
-   demand_empty_rest_of_line ();
- }
- 
-+/* Handle the .gpword pseudo-op, Pass to s_rva */
-+
-+static void
-+microblaze_s_gpword (int ignore ATTRIBUTE_UNUSED)
-+{
-+  int size = 4;
-+  if (microblaze_arch_size == 64)
-+    size = 8;
-+  s_rva(size);
-+}
-+
- /* This table describes all the machine specific pseudo-ops the assembler
-    has to support.  The fields are:
-    Pseudo-op name without dot
-@@ -392,7 +403,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
-    Integer arg to pass to the function.  */
- /* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
-    and then in the read.c table.  */
--pseudo_typeS md_pseudo_table[] =
-+const pseudo_typeS md_pseudo_table[] =
- {
-   {"lcomm", microblaze_s_lcomm, 1},
-   {"data", microblaze_s_data, 0},
-@@ -401,7 +412,7 @@ pseudo_typeS md_pseudo_table[] =
-   {"data32", cons, 4},     /* Same as word.  */
-   {"ent", s_func, 0}, /* Treat ent as function entry point.  */
-   {"end", microblaze_s_func, 1}, /* Treat end as function end point.  */
--  {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section.  */
-+  {"gpword", microblaze_s_gpword, 0}, /* gpword label => store resolved label address in data section.  */
-   {"weakext", microblaze_s_weakext, 0},
-   {"rodata", microblaze_s_rdata, 0},
-   {"sdata2", microblaze_s_rdata, 1},
-@@ -3456,7 +3467,6 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
-     case OPTION_M64:
-       //if (arg != NULL && strcmp (arg, "64") == 0)
-       microblaze_arch_size = 64;
--      md_pseudo_table[7].poc_val = 8;
-       break;
-     default:
-       return 0;
-diff --git a/gas/tc.h b/gas/tc.h
-index bb9a935a353..4a740f9bdd9 100644
---- a/gas/tc.h
-+++ b/gas/tc.h
-@@ -22,7 +22,7 @@
- /* In theory (mine, at least!) the machine dependent part of the assembler
-    should only have to include one file.  This one.  -- JF */
- 
--extern pseudo_typeS md_pseudo_table[];
-+extern const pseudo_typeS md_pseudo_table[];
- 
- const char * md_atof (int, char *, int *);
- int    md_parse_option (int, const char *);
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0030-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch
deleted file mode 100644
index 450f65f7..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0030-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 62107ba949fe70e5ae0573147d82cbb52bd1fc08 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 8 Nov 2021 22:01:23 +0530
-Subject: [PATCH 30/34] ld/emulparams/elf64microblaze: Fix emulation generation
-
-Compilation fails when building ld-new with:
-
-ldemul.o:(.data.rel+0x820): undefined reference to `ld_elf64microblazeel_emulation'
-ldemul.o:(.data.rel+0x828): undefined reference to `ld_elf64microblaze_emulation'
-
-The error appears to be that the elf64 files were referencing the elf32 emulation.
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
----
- ld/emulparams/elf64microblaze.sh   | 2 +-
- ld/emulparams/elf64microblazeel.sh | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh
-index 9c7b0eb7080..7b4c7c411bd 100644
---- a/ld/emulparams/elf64microblaze.sh
-+++ b/ld/emulparams/elf64microblaze.sh
-@@ -19,5 +19,5 @@ NOP=0x80000000
- #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
- #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
- 
--TEMPLATE_NAME=elf32
-+TEMPLATE_NAME=elf
- #GENERATE_SHLIB_SCRIPT=yes
-diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh
-index 9c7b0eb7080..7b4c7c411bd 100644
---- a/ld/emulparams/elf64microblazeel.sh
-+++ b/ld/emulparams/elf64microblazeel.sh
-@@ -19,5 +19,5 @@ NOP=0x80000000
- #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
- #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
- 
--TEMPLATE_NAME=elf32
-+TEMPLATE_NAME=elf
- #GENERATE_SHLIB_SCRIPT=yes
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-Patch-MicroBlaze-Invalid-data-offsets-pointer-after-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0031-Patch-MicroBlaze-Invalid-data-offsets-pointer-after-.patch
deleted file mode 100644
index 2a16e274..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0031-Patch-MicroBlaze-Invalid-data-offsets-pointer-after-.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From 7bddfaf3ad574aa738ab903f63a345ebde134f9e Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 24 Jan 2022 16:04:07 +0530
-Subject: [PATCH 31/34] [Patch,MicroBlaze] : Invalid data offsets (pointer)
- after relaxation. Proposed patch from community member (dednev@rambler.ru)
- against 2021.1 [CR-1115232]
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/elf32-microblaze.c | 18 ++++++++++++++++++
- bfd/elf64-microblaze.c | 17 +++++++++++++++++
- 2 files changed, 35 insertions(+)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 88ac730582b..588367ebcbb 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -2095,6 +2095,9 @@ microblaze_elf_relax_section (bfd *abfd,
-                 {
-                   unsigned int val;
- 
-+                 if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                   continue;
-+
-                   isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
- 
-                   /* hax: We only do the following fixup for debug location lists.  */
-@@ -2136,6 +2139,9 @@ microblaze_elf_relax_section (bfd *abfd,
-               }
-               if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-                 {
-+                 if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                   continue;
-+
-                  isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
- 
-                   /* Look at the reloc only if the value has been resolved.  */
-@@ -2168,6 +2174,9 @@ microblaze_elf_relax_section (bfd *abfd,
-                    }
-                  else if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_SYM_OP_SYM)
-                    {
-+                     if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                       continue;
-+
-                      isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
- 
-                      /* Look at the reloc only if the value has been resolved.  */
-@@ -2205,6 +2214,9 @@ microblaze_elf_relax_section (bfd *abfd,
-                       || (ELF32_R_TYPE (irelscan->r_info)
-                                   == (int) R_MICROBLAZE_TEXTREL_32_LO))
-                {
-+                 if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                   continue;
-+
-                  isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
- 
-                  /* Look at the reloc only if the value has been resolved.  */
-@@ -2251,6 +2263,9 @@ microblaze_elf_relax_section (bfd *abfd,
-                  || (ELF32_R_TYPE (irelscan->r_info)
-                              == (int) R_MICROBLAZE_TEXTREL_64))
-                {
-+                 if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                   continue;
-+
-                  isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
- 
-                  /* Look at the reloc only if the value has been resolved.  */
-@@ -2285,6 +2300,9 @@ microblaze_elf_relax_section (bfd *abfd,
-                }
-              else if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_PCREL)
-                {
-+                 if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                   continue;
-+
-                  isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
- 
-                  /* Look at the reloc only if the value has been resolved.  */
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 03fe9eba53a..76aec43ec7a 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2132,6 +2132,8 @@ microblaze_elf_relax_section (bfd *abfd,
-               if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
-                 {
-                   unsigned int val;
-+                 if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                   continue;
- 
-                   isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
- 
-@@ -2174,6 +2176,9 @@ microblaze_elf_relax_section (bfd *abfd,
-               if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32 
-                   || ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64)
-                 {
-+                 if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                   continue;
-+
-                  isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
- 
-                   /* Look at the reloc only if the value has been resolved.  */
-@@ -2206,6 +2211,9 @@ microblaze_elf_relax_section (bfd *abfd,
-                     }
-                  else if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_SYM_OP_SYM)
-                    {
-+                      if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                        continue;
-+
-                      isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
- 
-                      /* Look at the reloc only if the value has been resolved.  */
-@@ -2243,6 +2251,9 @@ microblaze_elf_relax_section (bfd *abfd,
-                       || (ELF32_R_TYPE (irelscan->r_info)
-                                   == (int) R_MICROBLAZE_TEXTREL_32_LO))
-                {
-+                  if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                    continue;
-+
-                  isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
- 
-                  /* Look at the reloc only if the value has been resolved.  */
-@@ -2288,6 +2299,9 @@ microblaze_elf_relax_section (bfd *abfd,
-              if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64
-           || (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_TEXTREL_64))
-                {
-+                  if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                    continue;
-+
-                  isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
- 
-                  /* Look at the reloc only if the value has been resolved.  */
-@@ -2336,6 +2350,9 @@ microblaze_elf_relax_section (bfd *abfd,
-                }
-              else if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_PCREL)
-                {
-+                  if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info)
-+                    continue;
-+
-                  isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
- 
-                  /* Look at the reloc only if the value has been resolved.  */
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-Patch-MicroBlaze-Double-free-with-ld-no-keep-memory.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0032-Patch-MicroBlaze-Double-free-with-ld-no-keep-memory.patch
deleted file mode 100644
index 58c3d784..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0032-Patch-MicroBlaze-Double-free-with-ld-no-keep-memory.patch
+++ /dev/null
@@ -1,199 +0,0 @@
-From 70268d8d38851d06bd66f9c7cc85865f2f3c0e48 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 24 Jan 2022 16:59:19 +0530
-Subject: [PATCH 32/34] [Patch,MicroBlaze] : Double free with ld
- --no-keep-memory. Proposed patches from the community member
- (dednev@rambler.ru) for 2021.1. [CR-1115233]
-
-Conflicts:
-        bfd/elf32-microblaze.c
-        bfd/elf64-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/elf32-microblaze.c | 40 ++++++++++++++++++++++------------------
- bfd/elf64-microblaze.c | 38 ++++++++++++++++++++------------------
- 2 files changed, 42 insertions(+), 36 deletions(-)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 588367ebcbb..28589db662f 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1800,10 +1800,8 @@ microblaze_elf_relax_section (bfd *abfd,
- {
-   Elf_Internal_Shdr *symtab_hdr;
-   Elf_Internal_Rela *internal_relocs;
--  Elf_Internal_Rela *free_relocs = NULL;
-   Elf_Internal_Rela *irel, *irelend;
-   bfd_byte *contents = NULL;
--  bfd_byte *free_contents = NULL;
-   int rel_count;
-   unsigned int shndx;
-   size_t i, sym_index;
-@@ -1847,8 +1845,6 @@ microblaze_elf_relax_section (bfd *abfd,
-   internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
-   if (internal_relocs == NULL)
-     goto error_return;
--  if (! link_info->keep_memory)
--    free_relocs = internal_relocs;
- 
-   sdata->relax_count = 0;
-   sdata->relax = (struct relax_table *) bfd_malloc ((sec->reloc_count + 1)
-@@ -1876,7 +1872,6 @@ microblaze_elf_relax_section (bfd *abfd,
-              contents = (bfd_byte *) bfd_malloc (sec->size);
-              if (contents == NULL)
-                goto error_return;
--             free_contents = contents;
- 
-              if (!bfd_get_section_contents (abfd, sec, contents,
-                                             (file_ptr) 0, sec->size))
-@@ -2396,25 +2391,26 @@ microblaze_elf_relax_section (bfd *abfd,
-        }
- 
-       elf_section_data (sec)->relocs = internal_relocs;
--      free_relocs = NULL;
- 
-       elf_section_data (sec)->this_hdr.contents = contents;
--      free_contents = NULL;
- 
-       symtab_hdr->contents = (bfd_byte *) isymbuf;
-     }
- 
--  free (free_relocs);
--  free_relocs = NULL;
-+  if (internal_relocs != NULL
-+      && elf_section_data (sec)->relocs != internal_relocs)
-+    free (internal_relocs);
- 
--  if (free_contents != NULL)
--    {
--      if (!link_info->keep_memory)
--       free (free_contents);
-+  if (contents != NULL
-+      && elf_section_data (sec)->this_hdr.contents != contents)
-+   {
-+      if (! link_info->keep_memory)
-+       free (contents);
-       else
--       /* Cache the section contents for elf_link_input_bfd.  */
--       elf_section_data (sec)->this_hdr.contents = contents;
--      free_contents = NULL;
-+       {
-+         /* Cache the section contents for elf_link_input_bfd.  */
-+         elf_section_data (sec)->this_hdr.contents = contents;
-+       }
-     }
- 
-   if (sdata->relax_count == 0)
-@@ -2428,8 +2424,16 @@ microblaze_elf_relax_section (bfd *abfd,
-   return true;
- 
-  error_return:
--  free (free_relocs);
--  free (free_contents);
-+ 
-+  if (isymbuf != NULL
-+      && symtab_hdr->contents != (unsigned char *) isymbuf)
-+    free (isymbuf);
-+  if (internal_relocs != NULL
-+      && elf_section_data (sec)->relocs != internal_relocs)
-+    free (internal_relocs);
-+  if (contents != NULL
-+      && elf_section_data (sec)->this_hdr.contents != contents)
-+    free (contents);
-   free (sdata->relax);
-   sdata->relax = NULL;
-   sdata->relax_count = 0;
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 76aec43ec7a..77872cef1ab 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -1840,10 +1840,8 @@ microblaze_elf_relax_section (bfd *abfd,
- {
-   Elf_Internal_Shdr *symtab_hdr;
-   Elf_Internal_Rela *internal_relocs;
--  Elf_Internal_Rela *free_relocs = NULL;
-   Elf_Internal_Rela *irel, *irelend;
-   bfd_byte *contents = NULL;
--  bfd_byte *free_contents = NULL;
-   int rel_count;
-   unsigned int shndx;
-   size_t i, sym_index;
-@@ -1887,8 +1885,6 @@ microblaze_elf_relax_section (bfd *abfd,
-   internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
-   if (internal_relocs == NULL)
-     goto error_return;
--  if (! link_info->keep_memory)
--    free_relocs = internal_relocs;
- 
-   sdata->relax_count = 0;
-   sdata->relax = (struct relax_table *) bfd_malloc ((sec->reloc_count + 1)
-@@ -1916,8 +1912,6 @@ microblaze_elf_relax_section (bfd *abfd,
-              contents = (bfd_byte *) bfd_malloc (sec->size);
-              if (contents == NULL)
-                goto error_return;
--             free_contents = contents;
--
-              if (!bfd_get_section_contents (abfd, sec, contents,
-                                             (file_ptr) 0, sec->size))
-                goto error_return;
-@@ -2449,25 +2443,26 @@ microblaze_elf_relax_section (bfd *abfd,
-        }
- 
-       elf_section_data (sec)->relocs = internal_relocs;
--      free_relocs = NULL;
- 
-       elf_section_data (sec)->this_hdr.contents = contents;
--      free_contents = NULL;
- 
-       symtab_hdr->contents = (bfd_byte *) isymbuf;
-     }
- 
--  free (free_relocs);
--  free_relocs = NULL;
-+  if (internal_relocs != NULL
-+      && elf_section_data (sec)->relocs != internal_relocs)
-+    free (internal_relocs);
- 
--  if (free_contents != NULL)
-+  if (contents != NULL
-+      && elf_section_data (sec)->this_hdr.contents != contents)
-     {
--      if (!link_info->keep_memory)
--       free (free_contents);
-+      if (! link_info->keep_memory)
-+       free (contents);
-       else
--       /* Cache the section contents for elf_link_input_bfd.  */
--       elf_section_data (sec)->this_hdr.contents = contents;
--      free_contents = NULL;
-+       {
-+         /* Cache the section contents for elf_link_input_bfd.  */
-+         elf_section_data (sec)->this_hdr.contents = contents;
-+       }
-     }
- 
-   if (sdata->relax_count == 0)
-@@ -2481,8 +2476,15 @@ microblaze_elf_relax_section (bfd *abfd,
-   return true;
- 
-  error_return:
--  free (free_relocs);
--  free (free_contents);
-+  if (isymbuf != NULL
-+      && symtab_hdr->contents != (unsigned char *) isymbuf)
-+    free (isymbuf);
-+  if (internal_relocs != NULL
-+      && elf_section_data (sec)->relocs != internal_relocs)
-+    free (internal_relocs);
-+  if (contents != NULL
-+      && elf_section_data (sec)->this_hdr.contents != contents)
-+    free (contents);
-   free (sdata->relax);
-   sdata->relax = NULL;
-   sdata->relax_count = 0;
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Patch-MB-MB-binutils-Upstream-port-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Patch-MB-MB-binutils-Upstream-port-issues.patch
deleted file mode 100644
index f91fcbc6..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Patch-MB-MB-binutils-Upstream-port-issues.patch
+++ /dev/null
@@ -1,540 +0,0 @@
-From 5b79b9fe7da091664680b86e3b09bc4b926e2e61 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Sun, 28 Nov 2021 17:17:15 +0530
-Subject: [PATCH 33/34] [Patch,MB]: MB binutils Upstream port issues.
-
-It's resolving the seg faults with ADDLIK
-Conflicts:
-        bfd/elf64-microblaze.c
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- bfd/elf64-microblaze.c     | 248 ++++++++++++++++++++++++++++---------
- gas/config/tc-microblaze.c |   2 +-
- opcodes/microblaze-dis.c   |  12 +-
- opcodes/microblaze-opc.h   |   2 +-
- 4 files changed, 197 insertions(+), 67 deletions(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 77872cef1ab..119d266f95a 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -807,12 +807,35 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
-   return _bfd_elf_is_local_label_name (abfd, name);
- }
- 
-+/* The microblaze linker (like many others) needs to keep track of
-+   the number of relocs that it decides to copy as dynamic relocs in
-+   check_relocs for each symbol. This is so that it can later discard
-+   them if they are found to be unnecessary.  We store the information
-+   in a field extending the regular ELF linker hash table.  */
-+
-+struct elf64_mb_dyn_relocs
-+{
-+  struct elf64_mb_dyn_relocs *next;
-+
-+  /* The input section of the reloc.  */
-+  asection *sec;
-+
-+  /* Total number of relocs copied for the input section.  */
-+  bfd_size_type count;
-+
-+  /* Number of pc-relative relocs copied for the input section.  */
-+  bfd_size_type pc_count;
-+};
-+
- /* ELF linker hash entry.  */
- 
- struct elf64_mb_link_hash_entry
- {
-   struct elf_link_hash_entry elf;
- 
-+  /* Track dynamic relocs copied for this symbol.  */
-+  struct elf64_mb_dyn_relocs *dyn_relocs;
-+
-   /* TLS Reference Types for the symbol; Updated by check_relocs */
- #define TLS_GD     1  /* GD reloc. */
- #define TLS_LD     2  /* LD reloc. */
-@@ -836,6 +859,18 @@ struct elf64_mb_link_hash_table
- {
-   struct elf_link_hash_table elf;
- 
-+  /* Short-cuts to get to dynamic linker sections.  */
-+  asection *sgot;
-+  asection *sgotplt;
-+  asection *srelgot;
-+  asection *splt;
-+  asection *srelplt;
-+  asection *sdynbss;
-+  asection *srelbss;
-+
-+  /* Small local sym to section mapping cache.  */
-+  struct sym_cache sym_sec;
-+
-   /* TLS Local Dynamic GOT Entry */
-   union {
-     bfd_signed_vma refcount;
-@@ -1376,8 +1411,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                /* Need to generate relocs ? */
-                if ((bfd_link_pic (info) || indx != 0)
-                    && (h == NULL
--                   || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
--                       && !resolved_to_zero)
-+                   || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
-                    || h->root.type != bfd_link_hash_undefweak))
-                  need_relocs = true;
- 
-@@ -1564,13 +1598,11 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                                    contents + offset + endian);
-                          }
-                        else
--                         {
--                           bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
--                                   contents + offset + endian);
--                           bfd_put_16 (input_bfd, relocation & 0xffff,
--                                   contents + offset + endian + INST_WORD_SIZE);
-+                         bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-+                                     contents + offset + endian);
-+                       bfd_put_16 (input_bfd, relocation & 0xffff,
-+                                   contents + offset + endian + INST_WORD_SIZE);
-                      }
--                   }
-                    break;
-                  }
- 
-@@ -1660,9 +1692,16 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                    else
-                      {
-                        if (r_type == R_MICROBLAZE_64_PCREL)
-+                       {       
-+                       if (!input_section->output_section->vma &&
-+                                !input_section->output_offset && !offset)      
-+                             relocation -= (input_section->output_section->vma
-+                                            + input_section->output_offset
-+                                            + offset);
-+                           else
-                          relocation -= (input_section->output_section->vma
--                                        + input_section->output_offset
--                                        + offset + INST_WORD_SIZE);
-+                                        + input_section->output_offset + offset + INST_WORD_SIZE);
-+                       }
-                        else if (r_type == R_MICROBLAZE_TEXTREL_64
-                                 || r_type == R_MICROBLAZE_TEXTREL_32_LO)
-                          relocation -= input_section->output_section->vma;
-@@ -1681,14 +1720,11 @@ microblaze_elf_relocate_section (bfd *output_bfd,
-                                     contents + offset + endian);
-                           }
-                        else
--                         {
--                           bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
--                                       contents + offset + endian);
--                           bfd_put_16 (input_bfd, relocation & 0xffff,
--                                       contents + offset + endian
--                                       + INST_WORD_SIZE);
--                         }
--                   }
-+                         bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
-+                                     contents + offset + endian);
-+                       bfd_put_16 (input_bfd, relocation & 0xffff,
-+                                   contents + offset + endian + INST_WORD_SIZE);
-+                     }
-                    break;
-                  }
-              }
-@@ -1759,6 +1795,21 @@ microblaze_elf_relocate_section (bfd *output_bfd,
- 
-   return ret;
- }
-+
-+/* Merge backend specific data from an object file to the output
-+   object file when linking.
-+
-+   Note: We only use this hook to catch endian mismatches.  */
-+static bool
-+microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
-+{
-+  /* Check if we have the same endianess.  */
-+  if (! _bfd_generic_verify_endian_match (ibfd, obfd))
-+    return false;
-+
-+  return true;
-+}
-+
- 
- /* Calculate fixup value for reference.  */
- 
-@@ -2512,6 +2563,17 @@ microblaze_elf_gc_mark_hook (asection *sec,
-   return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
- }
- 
-+/* Update the got entry reference counts for the section being removed.  */
-+
-+static bool
-+microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
-+                             struct bfd_link_info * info ATTRIBUTE_UNUSED,
-+                             asection * sec ATTRIBUTE_UNUSED,
-+                             const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
-+{
-+  return true;
-+}
-+
- /* PIC support.  */
- 
- #define PLT_ENTRY_SIZE 16
-@@ -2718,14 +2780,14 @@ microblaze_elf_check_relocs (bfd * abfd,
-                         && (! info->symbolic
-                             || h->root.type == bfd_link_hash_defweak
-                             || !h->def_regular))))
--               || (!bfd_link_pic (info)
--                   && (sec->flags & SEC_ALLOC) != 0
--                   && h != NULL
--                   && (h->root.type == bfd_link_hash_defweak
--                       || !h->def_regular)))
--             {
--               struct elf_dyn_relocs *p;
--               struct elf_dyn_relocs **head;
-+                || (!bfd_link_pic (info)
-+                    && (sec->flags & SEC_ALLOC) != 0
-+                    && h != NULL
-+                    && (h->root.type == bfd_link_hash_defweak
-+                        || !h->def_regular)))
-+              {
-+                struct elf64_mb_dyn_relocs *p;
-+                struct elf64_mb_dyn_relocs **head;
- 
-                 /* When creating a shared object, we must copy these
-                    relocs into the output file.  We create a reloc
-@@ -2769,14 +2831,14 @@ microblaze_elf_check_relocs (bfd * abfd,
-                      return false;
- 
-                    vpp = &elf_section_data (s)->local_dynrel;
--                   head = (struct elf_dyn_relocs **) vpp;
-+                   head = (struct elf64_mb_dyn_relocs **) vpp;
-                  }
- 
-                p = *head;
-                if (p == NULL || p->sec != sec)
-                  {
-                    size_t amt = sizeof *p;
--                   p = ((struct elf_dyn_relocs *)
-+                   p = ((struct elf64_mb_dyn_relocs *)
-                         bfd_alloc (htab->elf.dynobj, amt));
-                    if (p == NULL)
-                      return false;
-@@ -2799,6 +2861,34 @@ microblaze_elf_check_relocs (bfd * abfd,
-   return true;
- }
- 
-+static bool
-+microblaze_elf_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
-+{
-+  struct elf64_mb_link_hash_table *htab;
-+
-+  htab = elf64_mb_hash_table (info);
-+  if (htab == NULL)
-+    return false;
-+
-+  if (!htab->sgot && !_bfd_elf_create_got_section (dynobj, info))
-+    return false;
-+
-+  if (!_bfd_elf_create_dynamic_sections (dynobj, info))
-+    return false;
-+
-+  htab->splt = bfd_get_linker_section (dynobj, ".plt");
-+  htab->srelplt = bfd_get_linker_section (dynobj, ".rela.plt");
-+  htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
-+  if (!bfd_link_pic (info))
-+    htab->srelbss = bfd_get_linker_section (dynobj, ".rela.bss");
-+
-+  if (!htab->splt || !htab->srelplt || !htab->sdynbss
-+      || (!bfd_link_pic (info) && !htab->srelbss))
-+    abort ();
-+
-+  return true;
-+}
-+
- /* Copy the extra info we tack onto an elf_link_hash_entry.  */
- 
- static void
-@@ -2811,6 +2901,40 @@ microblaze_elf_copy_indirect_symbol (struct bfd_link_info *info,
-   edir = (struct elf64_mb_link_hash_entry *) dir;
-   eind = (struct elf64_mb_link_hash_entry *) ind;
- 
-+  if (eind->dyn_relocs != NULL)
-+    {
-+      if (edir->dyn_relocs != NULL)
-+       {
-+         struct elf64_mb_dyn_relocs **pp;
-+         struct elf64_mb_dyn_relocs *p;
-+
-+         if (ind->root.type == bfd_link_hash_indirect)
-+           abort ();
-+
-+         /* Add reloc counts against the weak sym to the strong sym
-+            list.  Merge any entries against the same section.  */
-+         for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
-+           {
-+             struct elf64_mb_dyn_relocs *q;
-+
-+             for (q = edir->dyn_relocs; q != NULL; q = q->next)
-+               if (q->sec == p->sec)
-+                 {
-+                   q->pc_count += p->pc_count;
-+                   q->count += p->count;
-+                   *pp = p->next;
-+                   break;
-+                 }
-+             if (q == NULL)
-+               pp = &p->next;
-+           }
-+         *pp = edir->dyn_relocs;
-+       }
-+
-+      edir->dyn_relocs = eind->dyn_relocs;
-+      eind->dyn_relocs = NULL;
-+    }
-+
-   edir->tls_mask |= eind->tls_mask;
- 
-   _bfd_elf_link_hash_copy_indirect (info, dir, ind);
-@@ -2821,8 +2945,12 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
-                                      struct elf_link_hash_entry *h)
- {
-   struct elf64_mb_link_hash_table *htab;
-+  struct elf64_mb_link_hash_entry * eh;
-+  struct elf64_mb_dyn_relocs *p;
-+  asection *sdynbss;
-   asection *s, *srel;
-   unsigned int power_of_two;
-+  bfd *dynobj;
- 
-   htab = elf64_mb_hash_table (info);
-   if (htab == NULL)
-@@ -2892,9 +3020,17 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
-       return true;
-     }
- 
--  /* If we don't find any dynamic relocs in read-only sections, then
-+  eh = (struct elf64_mb_link_hash_entry *) h;
-+  for (p = eh->dyn_relocs; p != NULL; p = p->next)
-+    {
-+      s = p->sec->output_section;
-+      if (s != NULL && (s->flags & SEC_READONLY) != 0)
-+       break;
-+    }
-+
-+  /* If we didn't find any dynamic relocs in read-only sections, then
-      we'll be keeping the dynamic relocs and avoiding the copy reloc.  */
--  if (!_bfd_elf_readonly_dynrelocs (h))
-+  if (p == NULL)
-     {
-       h->non_got_ref = 0;
-       return true;
-@@ -2913,19 +3049,11 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
-   /* We must generate a R_MICROBLAZE_COPY reloc to tell the dynamic linker
-      to copy the initial value out of the dynamic object and into the
-      runtime process image.  */
--  if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
--    {
--      s = htab->elf.sdynrelro;
--      srel = htab->elf.sreldynrelro;
--    }
--  else
--    {
--      s = htab->elf.sdynbss;
--      srel = htab->elf.srelbss;
--    }
-+  dynobj = elf_hash_table (info)->dynobj;
-+  BFD_ASSERT (dynobj != NULL);
-   if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
-     {
--      srel->size += sizeof (Elf64_External_Rela);
-+      htab->srelbss->size += sizeof (Elf64_External_Rela);
-       h->needs_copy = 1;
-     }
- 
-@@ -2935,11 +3063,12 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
-   if (power_of_two > 3)
-     power_of_two = 3;
- 
-+  sdynbss = htab->sdynbss;
-   /* Apply the required alignment.  */
--  s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
--  if (power_of_two > s->alignment_power)
-+  sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two));
-+  if (power_of_two > sdynbss->alignment_power)
-     {
--      if (!bfd_set_section_alignment (s, power_of_two))
-+      if (! bfd_set_section_alignment (sdynbss, power_of_two))
-        return false;
-     }
- 
-@@ -2961,7 +3090,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
-   struct bfd_link_info *info;
-   struct elf64_mb_link_hash_table *htab;
-   struct elf64_mb_link_hash_entry *eh;
--  struct elf_dyn_relocs *p;
-+  struct elf64_mb_dyn_relocs *p;
- 
-   if (h->root.type == bfd_link_hash_indirect)
-     return true;
-@@ -3013,7 +3142,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
-          htab->elf.sgotplt->size += 4;
- 
-          /* We also need to make an entry in the .rel.plt section.  */
--         htab->elf.srelplt->size += sizeof (Elf32_External_Rela);
-+         htab->elf.srelplt->size += sizeof (Elf64_External_Rela);
-        }
-       else
-         {
-@@ -3079,7 +3208,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
-   else
-     h->got.offset = (bfd_vma) -1;
- 
--  if (h->dyn_relocs == NULL)
-+  if (eh->dyn_relocs == NULL)
-     return true;
- 
-   /* In the shared -Bsymbolic case, discard space allocated for
-@@ -3094,9 +3223,9 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
-          && (h->forced_local
-              || info->symbolic))
-        {
--         struct elf_dyn_relocs **pp;
-+         struct elf64_mb_dyn_relocs **pp;
- 
--         for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
-+         for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
-            {
-              p->count -= p->pc_count;
-              p->pc_count = 0;
-@@ -3188,7 +3317,7 @@ microblaze_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
-        {
-          struct elf_dyn_relocs *p;
- 
--         for (p = ((struct elf_dyn_relocs *)
-+         for (p = ((struct elf64_mb_dyn_relocs *)
-                    elf_section_data (s)->local_dynrel);
-               p != NULL;
-               p = p->next)
-@@ -3666,13 +3795,14 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
- #define bfd_elf64_new_section_hook             microblaze_elf_new_section_hook
- #define elf_backend_relocate_section           microblaze_elf_relocate_section
- #define bfd_elf64_bfd_relax_section             microblaze_elf_relax_section
--#define bfd_elf64_bfd_merge_private_bfd_data    _bfd_generic_verify_endian_match
-+#define bfd_elf64_bfd_merge_private_bfd_data    microblaze_elf_merge_private_bfd_data
- #define bfd_elf64_bfd_reloc_name_lookup                microblaze_elf_reloc_name_lookup
- 
- #define elf_backend_gc_mark_hook               microblaze_elf_gc_mark_hook
--#define elf_backend_check_relocs               microblaze_elf_check_relocs
--#define elf_backend_copy_indirect_symbol       microblaze_elf_copy_indirect_symbol
--#define bfd_elf64_bfd_link_hash_table_create   microblaze_elf_link_hash_table_create
-+#define elf_backend_gc_sweep_hook              microblaze_elf_gc_sweep_hook
-+#define elf_backend_check_relocs                microblaze_elf_check_relocs
-+#define elf_backend_copy_indirect_symbol        microblaze_elf_copy_indirect_symbol
-+#define bfd_elf64_bfd_link_hash_table_create    microblaze_elf_link_hash_table_create
- #define elf_backend_can_gc_sections            1
- #define elf_backend_can_refcount               1
- #define elf_backend_want_got_plt               1
-@@ -3682,11 +3812,11 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
- #define elf_backend_rela_normal                        1
- #define elf_backend_dtrel_excludes_plt         1
- 
--#define elf_backend_adjust_dynamic_symbol      microblaze_elf_adjust_dynamic_symbol
--#define elf_backend_create_dynamic_sections    _bfd_elf_create_dynamic_sections
--#define elf_backend_finish_dynamic_sections    microblaze_elf_finish_dynamic_sections
--#define elf_backend_finish_dynamic_symbol      microblaze_elf_finish_dynamic_symbol
--#define elf_backend_size_dynamic_sections      microblaze_elf_size_dynamic_sections
-+#define elf_backend_adjust_dynamic_symbol       microblaze_elf_adjust_dynamic_symbol
-+#define elf_backend_create_dynamic_sections     microblaze_elf_create_dynamic_sections
-+#define elf_backend_finish_dynamic_sections     microblaze_elf_finish_dynamic_sections
-+#define elf_backend_finish_dynamic_symbol       microblaze_elf_finish_dynamic_symbol
-+#define elf_backend_size_dynamic_sections       microblaze_elf_size_dynamic_sections
- #define elf_backend_add_symbol_hook            microblaze_elf_add_symbol_hook
- 
- #include "elf64-target.h"
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 6b398ab5605..c4a3817bf19 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -433,7 +433,7 @@ const pseudo_typeS md_pseudo_table[] =
- void
- md_begin (void)
- {
--  const struct op_code_struct * opcode;
-+  struct op_code_struct * opcode;
-   const char *prev_name = "";
- 
-   opcode_hash_control = str_htab_create ();
-diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index b5a78dcfe09..b76a5935a34 100644
---- a/opcodes/microblaze-dis.c
-+++ b/opcodes/microblaze-dis.c
-@@ -140,7 +140,7 @@ get_field_imm16 (struct string_buf *buf, long instr)
- 
- static char *
- get_field_special (struct string_buf *buf, long instr,
--                  const struct op_code_struct *op)
-+                  struct op_code_struct *op)
- {
-   char *p = strbuf (buf);
-   char *spr;
-@@ -213,11 +213,11 @@ get_field_special (struct string_buf *buf, long instr,
- static unsigned long
- read_insn_microblaze (bfd_vma memaddr,
-                      struct disassemble_info *info,
--                     const struct op_code_struct **opr)
-+                     struct op_code_struct **opr)
- {
-   unsigned char       ibytes[4];
-   int                 status;
--  const struct op_code_struct *op;
-+  struct op_code_struct *op;
-   unsigned long inst;
- 
-   status = info->read_memory_func (memaddr, ibytes, 4, info);
-@@ -253,7 +253,7 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
-   fprintf_ftype print_func = info->fprintf_func;
-   void *stream = info->stream;
-   unsigned long inst, prev_inst;
--  const struct op_code_struct *op, *pop;
-+  struct op_code_struct *op, *pop;
-   int immval = 0;
-   bool immfound = false;
-   static bfd_vma prev_insn_addr = -1;  /* Init the prev insn addr.  */
-@@ -497,7 +497,7 @@ get_insn_microblaze (long inst,
-                     enum microblaze_instr_type *insn_type,
-                     short *delay_slots)
- {
--  const struct op_code_struct *op;
-+  struct op_code_struct *op;
-   *isunsignedimm = false;
- 
-   /* Just a linear search of the table.  */
-@@ -539,7 +539,7 @@ microblaze_get_target_address (long inst, bool immfound, int immval,
-                               bool *targetvalid,
-                               bool *unconditionalbranch)
- {
--  const struct op_code_struct *op;
-+  struct op_code_struct *op;
-   long targetaddr = 0;
- 
-   *unconditionalbranch = false;
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index e65f4b58233..4a415495113 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -145,7 +145,7 @@
- 
- #define MAX_OPCODES 424
- 
--const struct op_code_struct
-+struct op_code_struct
- {
-   const char * name;
-   short inst_type;            /* Registers and immediate values involved.  */
--- 
-2.37.1 (Apple Git-137.1)
-
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Patch-MicroBlaze-By-default-the-linker-will-generate.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0034-Patch-MicroBlaze-By-default-the-linker-will-generate.patch
deleted file mode 100644
index 4483a89e..00000000
--- a/meta-microblaze/recipes-devtools/binutils/binutils/0034-Patch-MicroBlaze-By-default-the-linker-will-generate.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 9e0ee97de976d840819e2fa27d0baa7a6aa8e7d4 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Fri, 28 Oct 2022 13:57:48 +0530
-Subject: [PATCH 34/34] By default the linker will generate warnings if it is
- creating an executable stack or a segment with all three of read, write and
- execute permissions. These settings are not appropriate for all targets
-
-Upstream-Status: Pending
-
-Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-
----
- ld/configure.tgt | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/ld/configure.tgt b/ld/configure.tgt
-index e3fd0c2452b..6d6db66b99b 100644
---- a/ld/configure.tgt
-+++ b/ld/configure.tgt
-@@ -55,6 +55,7 @@ if test "${ac_default_ld_warn_rwx_segments}" = unset; then
-     cris-*-* | crisv32-*-* | \
-     hppa*-*-* | \
-     mips*-*-* | \
-+    microblaze*-*-* | \
-     sparc*-*-* | \
-     v850*-*-*)
-       ac_default_ld_warn_rwx_segments=0
--- 
-2.17.1
-