summaryrefslogtreecommitdiffstats
path: root/conf/machine/boards/common
diff options
context:
space:
mode:
authorNathan Rossi <nathan.rossi@xilinx.com>2014-04-04 15:38:45 +1000
committerNathan Rossi <nathan.rossi@xilinx.com>2014-04-04 15:38:45 +1000
commite4e3a69341531350964d51b9d6b44578ed8f9c69 (patch)
tree91dca1d673221c4b5ce27d96270814715eb0ad0b /conf/machine/boards/common
parentba55c84cd0bd5df3f6a55c3b5b4604f46a41d8d5 (diff)
downloadmeta-xilinx-e4e3a69341531350964d51b9d6b44578ed8f9c69.tar.gz
zynq-7-base.dtsi: Update base dts for zynq
* Add missing clocking properties to various devices * Add additional compatible strings for various devices * Fix up some missing interrupt information * Update the slcr node Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Diffstat (limited to 'conf/machine/boards/common')
-rw-r--r--conf/machine/boards/common/zynq-7-base.dtsi82
1 files changed, 48 insertions, 34 deletions
diff --git a/conf/machine/boards/common/zynq-7-base.dtsi b/conf/machine/boards/common/zynq-7-base.dtsi
index 0e49a125..d79f23e4 100644
--- a/conf/machine/boards/common/zynq-7-base.dtsi
+++ b/conf/machine/boards/common/zynq-7-base.dtsi
@@ -62,6 +62,8 @@
62 #size-cells = <0>; 62 #size-cells = <0>;
63 ps7_cortexa9_0: cpu@0 { 63 ps7_cortexa9_0: cpu@0 {
64 bus-handle = <&ps7_axi_interconnect_0>; 64 bus-handle = <&ps7_axi_interconnect_0>;
65 clock-latency = <1000>;
66 clocks = <&clkc 3>;
65 compatible = "arm,cortex-a9"; 67 compatible = "arm,cortex-a9";
66 d-cache-line-size = <0x20>; 68 d-cache-line-size = <0x20>;
67 d-cache-size = <0x8000>; 69 d-cache-size = <0x8000>;
@@ -69,10 +71,12 @@
69 i-cache-line-size = <0x20>; 71 i-cache-line-size = <0x20>;
70 i-cache-size = <0x8000>; 72 i-cache-size = <0x8000>;
71 interrupt-handle = <&ps7_scugic_0>; 73 interrupt-handle = <&ps7_scugic_0>;
74 operating-points = <666667 1000000 333334 1000000 222223 1000000>;
72 reg = <0x0>; 75 reg = <0x0>;
73 } ; 76 } ;
74 ps7_cortexa9_1: cpu@1 { 77 ps7_cortexa9_1: cpu@1 {
75 bus-handle = <&ps7_axi_interconnect_0>; 78 bus-handle = <&ps7_axi_interconnect_0>;
79 clocks = <&clkc 3>;
76 compatible = "arm,cortex-a9"; 80 compatible = "arm,cortex-a9";
77 d-cache-line-size = <0x20>; 81 d-cache-line-size = <0x20>;
78 d-cache-size = <0x8000>; 82 d-cache-size = <0x8000>;
@@ -127,6 +131,7 @@
127 cache-level = <2>; 131 cache-level = <2>;
128 reg = <0xf8f02000 0x1000>; 132 reg = <0xf8f02000 0x1000>;
129 interrupt-parent = <&ps7_scugic_0>; 133 interrupt-parent = <&ps7_scugic_0>;
134 interrupts = <0 2 4>;
130 arm,data-latency = <3 2 2>; 135 arm,data-latency = <3 2 2>;
131 arm,tag-latency = <2 2 2>; 136 arm,tag-latency = <2 2 2>;
132 } ; 137 } ;
@@ -142,39 +147,46 @@
142 reg = <0xfffc0000 0x40000>; 147 reg = <0xfffc0000 0x40000>;
143 } ; 148 } ;
144 ps7_slcr_0: ps7-slcr@f8000000 { 149 ps7_slcr_0: ps7-slcr@f8000000 {
145 compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr"; 150 #address-cells = <1>;
151 #size-cells = <1>;
152 compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr", "syscon";
153 ranges ;
146 reg = <0xf8000000 0x1000>; 154 reg = <0xf8000000 0x1000>;
147 clocks { 155 clkc: clkc@100 {
148 #address-cells = <1>; 156 #clock-cells = <1>;
149 #size-cells = <0>; 157 clock-output-names = "armpll", "ddrpll", "iopll",
150 clkc: clkc { 158 "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
151 #clock-cells = <1>; 159 "ddr2x", "ddr3x", "dci",
152 clock-output-names = "armpll", "ddrpll", "iopll", 160 "lqspi", "smc", "pcap",
153 "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", 161 "gem0", "gem1",
154 "ddr2x", "ddr3x", "dci", 162 "fclk0", "fclk1", "fclk2", "fclk3",
155 "lqspi", "smc", "pcap", 163 "can0", "can1",
156 "gem0", "gem1", 164 "sdio0", "sdio1",
157 "fclk0", "fclk1", "fclk2", "fclk3", 165 "uart0", "uart1",
158 "can0", "can1", 166 "spi0", "spi1",
159 "sdio0", "sdio1", 167 "dma",
160 "uart0", "uart1", 168 "usb0_aper", "usb1_aper",
161 "spi0", "spi1", 169 "gem0_aper", "gem1_aper",
162 "dma", 170 "sdio0_aper", "sdio1_aper",
163 "usb0_aper", "usb1_aper", 171 "spi0_aper", "spi1_aper",
164 "gem0_aper", "gem1_aper", 172 "can0_aper", "can1_aper",
165 "sdio0_aper", "sdio1_aper", 173 "i2c0_aper", "i2c1_aper",
166 "spi0_aper", "spi1_aper", 174 "uart0_aper", "uart1_aper",
167 "can0_aper", "can1_aper", 175 "gpio_aper", "lqspi_aper", "smc_aper", "swdt",
168 "i2c0_aper", "i2c1_aper", 176 "dbg_trc", "dbg_apb";
169 "uart0_aper", "uart1_aper", 177 compatible = "xlnx,ps7-clkc";
170 "gpio_aper", "lqspi_aper", "smc_aper", "swdt", 178 fclk-enable = <0xf>;
171 "dbg_trc", "dbg_apb"; 179 ps-clk-frequency = <33333333>;
172 compatible = "xlnx,ps7-clkc"; 180 reg = <0x100 0x100>;
173 fclk-enable = <0xf>;
174 ps-clk-frequency = <33333333>;
175 } ;
176 } ; 181 } ;
177 } ; 182 } ;
183 ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
184 clocks = <&clkc 4>;
185 compatible = "xlnx,ps7-globaltimer-1.00.a", "arm,cortex-a9-global-timer";
186 interrupt-parent = <&ps7_scugic_0>;
187 interrupts = <1 11 0x301>;
188 reg = <0xf8f00200 0x100>;
189 } ;
178 ps7_scutimer_0: ps7-scutimer@f8f00600 { 190 ps7_scutimer_0: ps7-scutimer@f8f00600 {
179 clocks = <&clkc 4>; 191 clocks = <&clkc 4>;
180 compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer"; 192 compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
@@ -310,6 +322,8 @@
310 #size-cells = <0>; 322 #size-cells = <0>;
311 } ; 323 } ;
312 ps7_qspi_linear_0: ps7-qspi-linear@fc000000 { 324 ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
325 clock-names = "ref_clk", "aper_clk";
326 clocks = <&clkc 10>, <&clkc 43>;
313 compatible = "xlnx,ps7-qspi-linear-1.00.a"; 327 compatible = "xlnx,ps7-qspi-linear-1.00.a";
314 reg = <0xfc000000 0x1000000>; 328 reg = <0xfc000000 0x1000000>;
315 } ; 329 } ;
@@ -345,7 +359,7 @@
345 clock-names = "ref_clk", "aper_clk"; 359 clock-names = "ref_clk", "aper_clk";
346 clocks = <&clkc 21>, <&clkc 32>; 360 clocks = <&clkc 21>, <&clkc 32>;
347 clock-frequency = <50000000>; 361 clock-frequency = <50000000>;
348 compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci"; 362 compatible = "xlnx,ps7-sdio-1.00.a", "arasan,sdhci", "arasan,sdhci-8.9a", "generic-sdhci";
349 interrupt-parent = <&ps7_scugic_0>; 363 interrupt-parent = <&ps7_scugic_0>;
350 interrupts = <0 24 4>; 364 interrupts = <0 24 4>;
351 reg = <0xe0100000 0x1000>; 365 reg = <0xe0100000 0x1000>;
@@ -357,7 +371,7 @@
357 clock-names = "ref_clk", "aper_clk"; 371 clock-names = "ref_clk", "aper_clk";
358 clocks = <&clkc 22>, <&clkc 33>; 372 clocks = <&clkc 22>, <&clkc 33>;
359 clock-frequency = <50000000>; 373 clock-frequency = <50000000>;
360 compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci"; 374 compatible = "xlnx,ps7-sdio-1.00.a", "arasan,sdhci", "arasan,sdhci-8.9a", "generic-sdhci";
361 interrupt-parent = <&ps7_scugic_0>; 375 interrupt-parent = <&ps7_scugic_0>;
362 interrupts = <0 47 4>; 376 interrupts = <0 47 4>;
363 reg = <0xe0101000 0x1000>; 377 reg = <0xe0101000 0x1000>;
@@ -450,7 +464,7 @@
450 464
451 ps7_usb_0: ps7-usb@e0002000 { 465 ps7_usb_0: ps7-usb@e0002000 {
452 clocks = <&clkc 28>; 466 clocks = <&clkc 28>;
453 compatible = "xlnx,ps7-usb-1.00.a"; 467 compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
454 reg = <0xe0002000 0x1000>; 468 reg = <0xe0002000 0x1000>;
455 interrupt-parent = <&ps7_scugic_0>; 469 interrupt-parent = <&ps7_scugic_0>;
456 interrupts = <0 21 4>; 470 interrupts = <0 21 4>;
@@ -460,7 +474,7 @@
460 } ; 474 } ;
461 ps7_usb_1: ps7-usb@e0003000 { 475 ps7_usb_1: ps7-usb@e0003000 {
462 clocks = <&clkc 29>; 476 clocks = <&clkc 29>;
463 compatible = "xlnx,ps7-usb-1.00.a"; 477 compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
464 reg = <0xe0003000 0x1000>; 478 reg = <0xe0003000 0x1000>;
465 interrupt-parent = <&ps7_scugic_0>; 479 interrupt-parent = <&ps7_scugic_0>;
466 interrupts = <0 44 4>; 480 interrupts = <0 44 4>;
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2026-04-22 19:30:54 +0000