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authorNathan Rossi <nathan.rossi@xilinx.com>2014-03-12 18:25:17 +1000
committerNathan Rossi <nathan.rossi@xilinx.com>2014-03-13 11:12:24 +1000
commitcfe6c39abbefc4dcf21b76ee481956318b805e32 (patch)
treed56e686e5669c2be504bccd5033388a803c3b4e9 /conf/machine/boards/common
parent939fb3d0a8de3f4f25cec5f9d4878463f14d8c1a (diff)
downloadmeta-xilinx-cfe6c39abbefc4dcf21b76ee481956318b805e32.tar.gz
boards/common/zynq-7-mainline-gem.dtsi: Added include
* This include is for setting up the zynq-7-base.dtsi to be compatible with linux-yocto and mainline drivers. Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Diffstat (limited to 'conf/machine/boards/common')
-rw-r--r--conf/machine/boards/common/zynq-7-mainline-gem.dtsi29
1 files changed, 29 insertions, 0 deletions
diff --git a/conf/machine/boards/common/zynq-7-mainline-gem.dtsi b/conf/machine/boards/common/zynq-7-mainline-gem.dtsi
new file mode 100644
index 00000000..e3a331c5
--- /dev/null
+++ b/conf/machine/boards/common/zynq-7-mainline-gem.dtsi
@@ -0,0 +1,29 @@
1/*
2 * Zynq 7 Device Tree - Linux Mainline GEM
3 *
4 * This dtsi file will configure the ps7_ethernet_* nodes to be compatible with
5 * the upstream Cadence GEM driver (macb).
6 *
7 * To use this dtsi, include it after the base include. e.g.
8 * ...
9 * /include/ "zynq-7-base.dtsi"
10 * /include/ "zynq-7-mainline-gem.dtsi"
11 * / {
12 * ...
13 */
14/ {
15 ps7_axi_interconnect_0: amba@0 {
16 ps7_ethernet_0: ps7-ethernet@e000b000 {
17 clock-names = "pclk", "hclk", "tx_clk";
18 clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
19 compatible = "cdns,gem";
20 reg = <0xe000b000 0x4000>;
21 } ;
22 ps7_ethernet_1: ps7-ethernet@e000c000 {
23 clock-names = "pclk", "hclk", "tx_clk";
24 clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
25 compatible = "cdns,gem";
26 reg = <0xe000c000 0x4000>;
27 } ;
28 } ;
29} ;