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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-22 12:51:24 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-22 15:57:14 +0530 |
| commit | f5611000dc098e51c0c488bc48aea999b9edf1b7 (patch) | |
| tree | 9fef9797e43e2c804965ad345fee4d6738f1c085 | |
| parent | e72a81faa5d8970e34891cf7703bfadd8a916c61 (diff) | |
| download | meta-xilinx-f5611000dc098e51c0c488bc48aea999b9edf1b7.tar.gz | |
embeddedsw : Updated SRCREV for 2023.2_7391
sw_services:xilnvm:Fixed MISRA-C Rule 12.2 violation
sw_services:xilnvm:Fixed MISRA-C Rule 8.3 violation
sw_services:xilnvm:Fixed MISRA-C Rule 8.7 violation
sw_services:xilnvm: Fixed MISRA-C Rule 2.5 violation
reupdated emacps changelog
sw_services: xilnvm: Fix review comments
updated for changelog avbuf and other components
sw_services: xilloader: Move KAT & hash calculation out of PLM_OCP macro
trngpsv: Fix MISRA-C violation 2.5
trngpsv: Fix MISRA-C violations 8.13
trngpsv: Fix MISRA-C violations 12.1
trngpsv: Fix MISRA-C violations 10.1
sw_services:xilfpga: Fixed source code-format issues
sw_services:xilfpga: Fix MISRA-C violations for Rule 10.3
v_hdmitxss1: updated defines for tx pre and post cursor
v_hdmirxss1: updated define for pre and post cursor
Updated for cframe and other components
sw_services:xilsecure:zynqmp:Fixed MISRA-C Rule 15.6 violation
sw_services:xilsecure:zynqmp: Fixed MISRA-C Rule 17.8 violation
sw_services:xilsecure:zynqmp: Fixed MISRA-C Rule 7.2
sw_services:xilsecure:zynqmp: Fixed MISRA_C Rule 11.9
xilsecure:zynqmp: Fixed MISRA-C violations
lib: sw_apps: Match title and description for OpenAMP and Libmetal apps
xilsecure: Added Check for All Zero Exponent Case
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| -rw-r--r-- | meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 1bc01b55..4074543e 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | |||
| @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" | |||
| 8 | BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" | 8 | BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" |
| 9 | 9 | ||
| 10 | ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" | 10 | ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" |
| 11 | ESW_REV[2023.2] = "e7178d2069036c83173116c2ecd44e8487cc30bc" | 11 | ESW_REV[2023.2] = "a27988ee36e7402ee991778aae462bf27ae70295" |
| 12 | SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" | 12 | SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" |
| 13 | 13 | ||
| 14 | EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" | 14 | EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" |