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authorManjukumar Matha <manjukumar.harthikote-matha@xilinx.com>2016-05-12 17:31:25 -0700
committerNathan Rossi <nathan@nathanrossi.com>2016-05-13 17:14:00 +1000
commitb2611676337b4b38902f57a801eabd3eb4982bdc (patch)
tree861aa14cceb33fb5308dee1e00cdfb1e82b01414
parentf7f2b7175ad460acf17d52499768fa5c6f5d42a4 (diff)
downloadmeta-xilinx-b2611676337b4b38902f57a801eabd3eb4982bdc.tar.gz
kc705-trd-microblazeel: Remove kc705-trd files
Remove old kc705-trd reference Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Diffstat
-rw-r--r--conf/machine/kc705-trd-microblazeel.conf29
-rw-r--r--recipes-bsp/device-tree/files/kc705/kc705-trd-microblazeel.dts527
-rw-r--r--recipes-bsp/reference-design/kc705-trd_2013.1.bb42
-rw-r--r--recipes-bsp/u-boot/u-boot-xlnx/microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch656
-rw-r--r--recipes-kernel/linux/config/xilinx-machine/bsp/kc705-trd-microblazeel/kc705-trd-microblazeel.cfg14
-rw-r--r--recipes-kernel/linux/config/xilinx-machine/bsp/kc705-trd-microblazeel/kc705-trd-microblazeel.scc4
6 files changed, 0 insertions, 1272 deletions
diff --git a/conf/machine/kc705-trd-microblazeel.conf b/conf/machine/kc705-trd-microblazeel.conf
deleted file mode 100644
index 645ed328..00000000
--- a/conf/machine/kc705-trd-microblazeel.conf
+++ /dev/null
@@ -1,29 +0,0 @@
1#@TYPE: Machine
2#@NAME: kc705-trd-microblazeel
3#@DESCRIPTION: Machine support for Xilinx KC705 Embedded Kit TRD.
4#
5# Note: this TRD contains the 'Xylon logiSDHC' additional IP core, this is not
6# supported by this BSP.
7#
8# For details on the TRD and Evaluation board:
9# http://www.xilinx.com/products/boards-and-kits/DK-K7-EMBD-G.htm
10# For documentation and design files for the TRD:
11# http://www.xilinx.com/support/index.html/content/xilinx/en/supportNav/boards_and_kits/kintex-7_boards_and_kits/kintex-7_fpga_embedded_kit.html
12#
13
14require conf/machine/include/tune-microblaze.inc
15require conf/machine/include/machine-xilinx-default.inc
16require conf/machine/include/machine-xilinx-board.inc
17
18TUNE_FEATURES_tune-microblaze += "v8.50 little-endian barrel-shift pattern-compare reorder multiply-low"
19
20MACHINE_FEATURES = ""
21
22USE_VT = ""
23SERIAL_CONSOLE = "115200 ttyS0"
24
25MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree"
26MACHINE_DEVICETREE = "kc705/kc705-trd-microblazeel.dts"
27
28EXTRA_IMAGEDEPENDS += "virtual/bitstream"
29
diff --git a/recipes-bsp/device-tree/files/kc705/kc705-trd-microblazeel.dts b/recipes-bsp/device-tree/files/kc705/kc705-trd-microblazeel.dts
deleted file mode 100644
index 7faf61dc..00000000
--- a/recipes-bsp/device-tree/files/kc705/kc705-trd-microblazeel.dts
+++ /dev/null
@@ -1,527 +0,0 @@
1/dts-v1/;
2/ {
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "xlnx,microblaze";
6 model = "Xilinx-KC705-TRD";
7 ddr3_sdram: memory@80000000 {
8 device_type = "memory";
9 reg = < 0x80000000 0x40000000 >;
10 } ;
11 aliases {
12 ethernet0 = &soft_ethernet_mac;
13 serial0 = &rs232_uart_1;
14 } ;
15 chosen {
16 bootargs = "";
17 stdout-path = "serial0:115200";
18 } ;
19 cpus {
20 #address-cells = <1>;
21 #cpus = <0x1>;
22 #size-cells = <0>;
23 microblaze_0: cpu@0 {
24 bus-handle = <&axi_mm_mb>, <&axi4_0>, <&axi4lite_0>;
25 clock-frequency = <150000000>;
26 clocks = <&clk_cpu>;
27 compatible = "xlnx,microblaze-8.50.a";
28 d-cache-baseaddr = <0x80000000>;
29 d-cache-highaddr = <0xffffffff>;
30 d-cache-line-size = <0x20>;
31 d-cache-size = <0x2000>;
32 device_type = "cpu";
33 i-cache-baseaddr = <0x80000000>;
34 i-cache-highaddr = <0xffffffff>;
35 i-cache-line-size = <0x20>;
36 i-cache-size = <0x2000>;
37 model = "microblaze,8.50.a";
38 reg = <0>;
39 timebase-frequency = <150000000>;
40 xlnx,addr-tag-bits = <0x12>;
41 xlnx,allow-dcache-wr = <0x1>;
42 xlnx,allow-icache-wr = <0x1>;
43 xlnx,area-optimized = <0x0>;
44 xlnx,avoid-primitives = <0x0>;
45 xlnx,base-vectors = <0x0>;
46 xlnx,branch-target-cache-size = <0x0>;
47 xlnx,cache-byte-size = <0x2000>;
48 xlnx,d-axi = <0x1>;
49 xlnx,d-lmb = <0x1>;
50 xlnx,d-plb = <0x0>;
51 xlnx,data-size = <0x20>;
52 xlnx,dcache-addr-tag = <0x12>;
53 xlnx,dcache-always-used = <0x1>;
54 xlnx,dcache-byte-size = <0x2000>;
55 xlnx,dcache-data-width = <0x0>;
56 xlnx,dcache-force-tag-lutram = <0x1>;
57 xlnx,dcache-interface = <0x0>;
58 xlnx,dcache-line-len = <0x8>;
59 xlnx,dcache-use-fsl = <0x0>;
60 xlnx,dcache-use-writeback = <0x0>;
61 xlnx,dcache-victims = <0x0>;
62 xlnx,debug-enabled = <0x1>;
63 xlnx,div-zero-exception = <0x0>;
64 xlnx,dynamic-bus-sizing = <0x1>;
65 xlnx,ecc-use-ce-exception = <0x0>;
66 xlnx,edge-is-positive = <0x1>;
67 xlnx,endianness = <0x1>;
68 xlnx,family = "kintex7";
69 xlnx,fault-tolerant = <0x0>;
70 xlnx,fpu-exception = <0x0>;
71 xlnx,freq = <0x8f0d180>;
72 xlnx,fsl-data-size = <0x20>;
73 xlnx,fsl-exception = <0x0>;
74 xlnx,fsl-links = <0x0>;
75 xlnx,i-axi = <0x0>;
76 xlnx,i-lmb = <0x1>;
77 xlnx,i-plb = <0x0>;
78 xlnx,icache-always-used = <0x1>;
79 xlnx,icache-data-width = <0x0>;
80 xlnx,icache-force-tag-lutram = <0x1>;
81 xlnx,icache-interface = <0x0>;
82 xlnx,icache-line-len = <0x8>;
83 xlnx,icache-streams = <0x0>;
84 xlnx,icache-use-fsl = <0x0>;
85 xlnx,icache-victims = <0x0>;
86 xlnx,ill-opcode-exception = <0x1>;
87 xlnx,instance = "microblaze_0";
88 xlnx,interconnect = <0x2>;
89 xlnx,interrupt-is-edge = <0x0>;
90 xlnx,lockstep-slave = <0x0>;
91 xlnx,mmu-dtlb-size = <0x2>;
92 xlnx,mmu-itlb-size = <0x2>;
93 xlnx,mmu-privileged-instr = <0x0>;
94 xlnx,mmu-tlb-access = <0x3>;
95 xlnx,mmu-zones = <0x2>;
96 xlnx,number-of-pc-brk = <0x1>;
97 xlnx,number-of-rd-addr-brk = <0x0>;
98 xlnx,number-of-wr-addr-brk = <0x0>;
99 xlnx,opcode-0x0-illegal = <0x1>;
100 xlnx,optimization = <0x0>;
101 xlnx,pc-width = <0x20>;
102 xlnx,pvr = <0x2>;
103 xlnx,pvr-user1 = <0x0>;
104 xlnx,pvr-user2 = <0x0>;
105 xlnx,reset-msr = <0x0>;
106 xlnx,sco = <0x0>;
107 xlnx,stream-interconnect = <0x0>;
108 xlnx,unaligned-exceptions = <0x1>;
109 xlnx,use-barrel = <0x1>;
110 xlnx,use-branch-target-cache = <0x0>;
111 xlnx,use-dcache = <0x1>;
112 xlnx,use-div = <0x0>;
113 xlnx,use-ext-brk = <0x1>;
114 xlnx,use-ext-nm-brk = <0x1>;
115 xlnx,use-extended-fsl-instr = <0x0>;
116 xlnx,use-fpu = <0x0>;
117 xlnx,use-hw-mul = <0x1>;
118 xlnx,use-icache = <0x1>;
119 xlnx,use-interrupt = <0x1>;
120 xlnx,use-mmu = <0x3>;
121 xlnx,use-msr-instr = <0x1>;
122 xlnx,use-pcmp-instr = <0x1>;
123 xlnx,use-reorder-instr = <0x1>;
124 xlnx,use-stack-protection = <0x0>;
125 } ;
126 } ;
127 clocks {
128 #address-cells = <1>;
129 #size-cells = <0>;
130 clk_bus: bus {
131 #clock-cells = <0>;
132 clock-frequency = <100000000>;
133 clock-output-names = "bus";
134 compatible = "fixed-clock";
135 reg = <1>;
136 } ;
137 clk_cpu: cpu {
138 #clock-cells = <0>;
139 clock-frequency = <150000000>;
140 clock-output-names = "cpu";
141 compatible = "fixed-clock";
142 reg = <0>;
143 } ;
144 } ;
145 axi4lite_0: axi@2 {
146 #address-cells = <1>;
147 #size-cells = <1>;
148 compatible = "xlnx,axi-interconnect-1.06.a", "simple-bus";
149 ranges ;
150 axi_dma_ethernet: axi-dma@50000000 {
151 axistream-connected = <&soft_ethernet_mac>;
152 axistream-control-connected = <&soft_ethernet_mac>;
153 compatible = "xlnx,axi-dma-6.03.a", "xlnx,axi-dma-1.00.a";
154 interrupt-parent = <&interrupt_cntlr>;
155 interrupts = < 0 2 1 2 >;
156 reg = < 0x50000000 0x10000 >;
157 xlnx,dlytmr-resolution = <0x4e2>;
158 xlnx,enable-multi-channel = <0x0>;
159 xlnx,family = "kintex7";
160 xlnx,generic = <0x0>;
161 xlnx,include-mm2s = <0x1>;
162 xlnx,include-mm2s-dre = <0x1>;
163 xlnx,include-mm2s-sf = <0x1>;
164 xlnx,include-s2mm = <0x1>;
165 xlnx,include-s2mm-dre = <0x1>;
166 xlnx,include-s2mm-sf = <0x1>;
167 xlnx,include-sg = <0x1>;
168 xlnx,instance = "AXI_DMA_Ethernet";
169 xlnx,mm2s-burst-size = <0x10>;
170 xlnx,num-mm2s-channels = <0x1>;
171 xlnx,num-s2mm-channels = <0x1>;
172 xlnx,prmry-is-aclk-async = <0x1>;
173 xlnx,s2mm-burst-size = <0x10>;
174 xlnx,sg-include-desc-queue = <0x1>;
175 xlnx,sg-include-stscntrl-strm = <0x1>;
176 xlnx,sg-length-width = <0x10>;
177 xlnx,sg-use-stsapp-length = <0x1>;
178 } ;
179 axi_xadc_0: axi-xadc@40d00000 {
180 clocks = <&clk_bus>;
181 compatible = "xlnx,axi-xadc-1.00.a";
182 interrupt-parent = <&interrupt_cntlr>;
183 interrupts = < 7 2 >;
184 reg = < 0x40d00000 0x10000 >;
185 xlnx,family = "kintex7";
186 xlnx,has-temp-bus = <0x1>;
187 xlnx,include-intr = <0x1>;
188 xlnx,instance = "axi_xadc_0";
189 xlnx,sim-monitor-file = "Sysmon_Design.txt";
190 } ;
191 debug_module: serial@40200000 {
192 compatible = "xlnx,mdm-2.10.a", "xlnx,xps-uartlite-1.00.a";
193 reg = < 0x40200000 0x10000 >;
194 xlnx,family = "kintex7";
195 xlnx,interconnect = <0x2>;
196 xlnx,jtag-chain = <0x2>;
197 xlnx,mb-dbg-ports = <0x1>;
198 xlnx,use-bscan = <0x0>;
199 xlnx,use-uart = <0x1>;
200 } ;
201 dip_switches_4bits: gpio@40700000 {
202 #gpio-cells = <2>;
203 compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
204 gpio-controller ;
205 reg = < 0x40700000 0x10000 >;
206 xlnx,all-inputs = <0x1>;
207 xlnx,all-inputs-2 = <0x0>;
208 xlnx,dout-default = <0x0>;
209 xlnx,dout-default-2 = <0x0>;
210 xlnx,family = "kintex7";
211 xlnx,gpio-width = <0x4>;
212 xlnx,gpio2-width = <0x20>;
213 xlnx,instance = "DIP_Switches_4Bits";
214 xlnx,interrupt-present = <0x1>;
215 xlnx,is-dual = <0x0>;
216 xlnx,tri-default = <0xffffffff>;
217 xlnx,tri-default-2 = <0xffffffff>;
218 } ;
219 dual_timer_counter: system-timer@40300000 {
220 clock-frequency = <100000000>;
221 clocks = <&clk_bus>;
222 compatible = "xlnx,axi-timer-1.03.a", "xlnx,xps-timer-1.00.a";
223 interrupt-parent = <&interrupt_cntlr>;
224 interrupts = < 3 2 >;
225 reg = < 0x40300000 0x10000 >;
226 xlnx,count-width = <0x20>;
227 xlnx,family = "kintex7";
228 xlnx,gen0-assert = <0x1>;
229 xlnx,gen1-assert = <0x1>;
230 xlnx,instance = "Dual_Timer_Counter";
231 xlnx,one-timer-only = <0x0>;
232 xlnx,trig0-assert = <0x1>;
233 xlnx,trig1-assert = <0x1>;
234 } ;
235 iic_eeprom: i2c@40a00000 {
236 compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a";
237 interrupt-parent = <&interrupt_cntlr>;
238 interrupts = < 4 2 >;
239 reg = < 0x40a00000 0x10000 >;
240 xlnx,family = "kintex7";
241 xlnx,gpo-width = <0x1>;
242 xlnx,iic-freq = <0x186a0>;
243 xlnx,instance = "IIC_EEPROM";
244 xlnx,scl-inertial-delay = <0x0>;
245 xlnx,sda-inertial-delay = <0x0>;
246 xlnx,sda-level = <0x1>;
247 xlnx,ten-bit-adr = <0x0>;
248 } ;
249 interrupt_cntlr: interrupt-controller@40100000 {
250 #interrupt-cells = <0x2>;
251 compatible = "xlnx,axi-intc-1.03.a", "xlnx,xps-intc-1.00.a";
252 interrupt-controller ;
253 reg = < 0x40100000 0x10000 >;
254 xlnx,kind-of-intr = <0x0>;
255 xlnx,num-intr-inputs = <0x8>;
256 } ;
257 lcd_gpio: gpio@40800000 {
258 #gpio-cells = <2>;
259 compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
260 gpio-controller ;
261 reg = < 0x40800000 0x10000 >;
262 xlnx,all-inputs = <0x0>;
263 xlnx,all-inputs-2 = <0x0>;
264 xlnx,dout-default = <0x0>;
265 xlnx,dout-default-2 = <0x0>;
266 xlnx,family = "kintex7";
267 xlnx,gpio-width = <0x7>;
268 xlnx,gpio2-width = <0x20>;
269 xlnx,instance = "LCD_GPIO";
270 xlnx,interrupt-present = <0x0>;
271 xlnx,is-dual = <0x0>;
272 xlnx,tri-default = <0xffffffff>;
273 xlnx,tri-default-2 = <0xffffffff>;
274 } ;
275 leds_8bits: gpio@40600000 {
276 #gpio-cells = <2>;
277 compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
278 gpio-controller ;
279 reg = < 0x40600000 0x10000 >;
280 xlnx,all-inputs = <0x0>;
281 xlnx,all-inputs-2 = <0x0>;
282 xlnx,dout-default = <0x0>;
283 xlnx,dout-default-2 = <0x0>;
284 xlnx,family = "kintex7";
285 xlnx,gpio-width = <0x8>;
286 xlnx,gpio2-width = <0x20>;
287 xlnx,instance = "LEDs_8Bits";
288 xlnx,interrupt-present = <0x1>;
289 xlnx,is-dual = <0x0>;
290 xlnx,tri-default = <0xffffffff>;
291 xlnx,tri-default-2 = <0xffffffff>;
292 } ;
293 logisdhc_0: logisdhc@40b00000 {
294 compatible = "xlnx,logisdhc-1.06.c";
295 interrupt-parent = <&interrupt_cntlr>;
296 interrupts = < 6 2 >;
297 reg = < 0x40b00000 0x10000 >;
298 xlnx,byte-per-pixel = <0x4>;
299 xlnx,convert-endianess = <0x0>;
300 xlnx,dma-type = <0x1>;
301 xlnx,family = "kintex7";
302 xlnx,ip-license-type = <0x1>;
303 xlnx,ip-major-revision = <0x1>;
304 xlnx,ip-minor-revision = <0x6>;
305 xlnx,ip-patch-level = <0x2>;
306 xlnx,mem-burst = <0x4>;
307 xlnx,mem-data-bus-width = <0x20>;
308 xlnx,mem-interface = <0x1>;
309 xlnx,regs-interface = <0x2>;
310 xlnx,row-stride = <0x400>;
311 xlnx,sd-base-clock-freq = <0x64>;
312 xlnx,use-dma = <0x0>;
313 } ;
314 primary_flash: flash@48000000 {
315 #address-cells = <1>;
316 #size-cells = <1>;
317 bank-width = <2>;
318 compatible = "xlnx,axi-emc-1.03.b", "cfi-flash";
319 reg = < 0x48000000 0x8000000 >;
320 xlnx,axi-clk-period-ps = <0x2710>;
321 xlnx,family = "kintex7";
322 xlnx,include-datawidth-matching-0 = <0x1>;
323 xlnx,include-datawidth-matching-1 = <0x0>;
324 xlnx,include-datawidth-matching-2 = <0x0>;
325 xlnx,include-datawidth-matching-3 = <0x0>;
326 xlnx,include-negedge-ioregs = <0x0>;
327 xlnx,instance = "Linear_Flash";
328 xlnx,lflash-period-ps = <0x4e20>;
329 xlnx,linear-flash-sync-burst = <0x0>;
330 xlnx,max-mem-width = <0x10>;
331 xlnx,mem0-type = <0x2>;
332 xlnx,mem0-width = <0x10>;
333 xlnx,mem1-type = <0x0>;
334 xlnx,mem1-width = <0x20>;
335 xlnx,mem2-type = <0x0>;
336 xlnx,mem2-width = <0x20>;
337 xlnx,mem3-type = <0x0>;
338 xlnx,mem3-width = <0x20>;
339 xlnx,num-banks-mem = <0x1>;
340 xlnx,parity-type-mem-0 = <0x0>;
341 xlnx,parity-type-mem-1 = <0x0>;
342 xlnx,parity-type-mem-2 = <0x0>;
343 xlnx,parity-type-mem-3 = <0x0>;
344 xlnx,s-axi-en-reg = <0x0>;
345 xlnx,s-axi-mem-addr-width = <0x20>;
346 xlnx,s-axi-mem-data-width = <0x20>;
347 xlnx,s-axi-mem-id-width = <0x1>;
348 xlnx,s-axi-mem-protocol = "AXI4LITE";
349 xlnx,s-axi-reg-addr-width = <0x5>;
350 xlnx,s-axi-reg-data-width = <0x20>;
351 xlnx,s-axi-reg-protocol = "axi4";
352 xlnx,synch-pipedelay-0 = <0x2>;
353 xlnx,synch-pipedelay-1 = <0x2>;
354 xlnx,synch-pipedelay-2 = <0x2>;
355 xlnx,synch-pipedelay-3 = <0x2>;
356 xlnx,tavdv-ps-mem-0 = <0x1fbd0>;
357 xlnx,tavdv-ps-mem-1 = <0x3a98>;
358 xlnx,tavdv-ps-mem-2 = <0x3a98>;
359 xlnx,tavdv-ps-mem-3 = <0x3a98>;
360 xlnx,tcedv-ps-mem-0 = <0x1fbd0>;
361 xlnx,tcedv-ps-mem-1 = <0x3a98>;
362 xlnx,tcedv-ps-mem-2 = <0x3a98>;
363 xlnx,tcedv-ps-mem-3 = <0x3a98>;
364 xlnx,thzce-ps-mem-0 = <0x88b8>;
365 xlnx,thzce-ps-mem-1 = <0x1b58>;
366 xlnx,thzce-ps-mem-2 = <0x1b58>;
367 xlnx,thzce-ps-mem-3 = <0x1b58>;
368 xlnx,thzoe-ps-mem-0 = <0x1b58>;
369 xlnx,thzoe-ps-mem-1 = <0x1b58>;
370 xlnx,thzoe-ps-mem-2 = <0x1b58>;
371 xlnx,thzoe-ps-mem-3 = <0x1b58>;
372 xlnx,tlzwe-ps-mem-0 = <0x88b8>;
373 xlnx,tlzwe-ps-mem-1 = <0x0>;
374 xlnx,tlzwe-ps-mem-2 = <0x0>;
375 xlnx,tlzwe-ps-mem-3 = <0x0>;
376 xlnx,tpacc-ps-flash-0 = <0x61a8>;
377 xlnx,tpacc-ps-flash-1 = <0x61a8>;
378 xlnx,tpacc-ps-flash-2 = <0x61a8>;
379 xlnx,tpacc-ps-flash-3 = <0x61a8>;
380 xlnx,twc-ps-mem-0 = <0x11170>;
381 xlnx,twc-ps-mem-1 = <0x3a98>;
382 xlnx,twc-ps-mem-2 = <0x3a98>;
383 xlnx,twc-ps-mem-3 = <0x3a98>;
384 xlnx,twp-ps-mem-0 = <0x11170>;
385 xlnx,twp-ps-mem-1 = <0x2ee0>;
386 xlnx,twp-ps-mem-2 = <0x2ee0>;
387 xlnx,twp-ps-mem-3 = <0x2ee0>;
388 xlnx,twph-ps-mem-0 = <0x2ee0>;
389 xlnx,twph-ps-mem-1 = <0x2ee0>;
390 xlnx,twph-ps-mem-2 = <0x2ee0>;
391 xlnx,twph-ps-mem-3 = <0x2ee0>;
392 xlnx,wr-rec-time-mem-0 = <0x186a0>;
393 xlnx,wr-rec-time-mem-1 = <0x186a0>;
394 xlnx,wr-rec-time-mem-2 = <0x186a0>;
395 xlnx,wr-rec-time-mem-3 = <0x186a0>;
396 partition@0x00000000 {
397 label = "fpga";
398 reg = <0x00000000 0x00200000>;
399 };
400 partition@0x00200000 {
401 label = "boot";
402 reg = <0x00200000 0x00040000>;
403 };
404 partition@0x00240000 {
405 label = "bootenv";
406 reg = <0x00240000 0x00020000>;
407 };
408 partition@0x00260000 {
409 label = "image";
410 reg = <0x00260000 0x00c00000>;
411 };
412 partition@0x00e60000 {
413 label = "spare";
414 reg = <0x00e60000 0x00000000>;
415 };
416 } ;
417 push_buttons_5bits: gpio@40500000 {
418 #gpio-cells = <2>;
419 compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
420 gpio-controller ;
421 reg = < 0x40500000 0x10000 >;
422 xlnx,all-inputs = <0x1>;
423 xlnx,all-inputs-2 = <0x0>;
424 xlnx,dout-default = <0x0>;
425 xlnx,dout-default-2 = <0x0>;
426 xlnx,family = "kintex7";
427 xlnx,gpio-width = <0x5>;
428 xlnx,gpio2-width = <0x20>;
429 xlnx,instance = "Push_Buttons_5Bits";
430 xlnx,interrupt-present = <0x1>;
431 xlnx,is-dual = <0x0>;
432 xlnx,tri-default = <0xffffffff>;
433 xlnx,tri-default-2 = <0xffffffff>;
434 } ;
435 rotary_gpio: gpio@40900000 {
436 #gpio-cells = <2>;
437 compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
438 gpio-controller ;
439 reg = < 0x40900000 0x10000 >;
440 xlnx,all-inputs = <0x1>;
441 xlnx,all-inputs-2 = <0x0>;
442 xlnx,dout-default = <0x0>;
443 xlnx,dout-default-2 = <0x0>;
444 xlnx,family = "kintex7";
445 xlnx,gpio-width = <0x3>;
446 xlnx,gpio2-width = <0x20>;
447 xlnx,instance = "ROTARY_GPIO";
448 xlnx,interrupt-present = <0x0>;
449 xlnx,is-dual = <0x0>;
450 xlnx,tri-default = <0xffffffff>;
451 xlnx,tri-default-2 = <0xffffffff>;
452 } ;
453 rs232_uart_1: serial@40400000 {
454 clock-frequency = <100000000>;
455 clocks = <&clk_bus>;
456 compatible = "xlnx,axi-uart16550-1.01.a", "xlnx,xps-uart16550-2.00.a", "ns16550a";
457 current-speed = <115200>;
458 device_type = "serial";
459 interrupt-parent = <&interrupt_cntlr>;
460 interrupts = < 5 2 >;
461 reg = < 0x40400000 0x10000 >;
462 reg-offset = <0x1000>;
463 reg-shift = <2>;
464 xlnx,external-xin-clk-hz = <0x17d7840>;
465 xlnx,family = "kintex7";
466 xlnx,has-external-rclk = <0x0>;
467 xlnx,has-external-xin = <0x0>;
468 xlnx,instance = "RS232_Uart_1";
469 xlnx,is-a-16550 = <0x1>;
470 xlnx,use-modem-ports = <0x0>;
471 xlnx,use-user-ports = <0x0>;
472 } ;
473 soft_ethernet_mac: axi-ethernet@50100000 {
474 axistream-connected = <&axi_dma_ethernet>;
475 axistream-control-connected = <&axi_dma_ethernet>;
476 clock-frequency = <100000000>;
477 clocks = <&clk_bus>;
478 compatible = "xlnx,axi-ethernet-3.01.a", "xlnx,axi-ethernet-1.00.a";
479 device_type = "network";
480 interrupt-parent = <&interrupt_cntlr>;
481 interrupts = < 2 2 >;
482 local-mac-address = [ 00 0a 35 00 d9 4e ];
483 phy-mode = "gmii";
484 phy-handle = <&phy0>;
485 reg = < 0x50100000 0x40000 >;
486 xlnx,avb = <0x0>;
487 xlnx,halfdup = <0x0>;
488 xlnx,include-io = <0x1>;
489 xlnx,mcast-extend = <0x0>;
490 xlnx,phy-type = <0x1>;
491 xlnx,phyaddr = <0x1>;
492 xlnx,rxcsum = <0x0>;
493 xlnx,rxmem = <0x1000>;
494 xlnx,rxvlan-strp = <0x0>;
495 xlnx,rxvlan-tag = <0x0>;
496 xlnx,rxvlan-tran = <0x0>;
497 xlnx,stats = <0x0>;
498 xlnx,txcsum = <0x0>;
499 xlnx,txmem = <0x1000>;
500 xlnx,txvlan-strp = <0x0>;
501 xlnx,txvlan-tag = <0x0>;
502 xlnx,txvlan-tran = <0x0>;
503 xlnx,type = <0x1>;
504 mdio {
505 #address-cells = <1>;
506 #size-cells = <0>;
507 phy0: phy@7 {
508 compatible = "marvell,88e1111";
509 device_type = "ethernet-phy";
510 reg = <7>;
511 } ;
512 } ;
513 } ;
514 } ;
515 axi_mm_mb: axi@1 {
516 #address-cells = <1>;
517 #size-cells = <1>;
518 compatible = "xlnx,axi-interconnect-1.06.a", "simple-bus";
519 ranges ;
520 axi4_0: axi@0 {
521 #address-cells = <1>;
522 #size-cells = <1>;
523 compatible = "xlnx,axi-interconnect-1.06.a", "simple-bus";
524 ranges = < 0x80000000 0x80000000 0x40000000 >;
525 } ;
526 } ;
527} ;
diff --git a/recipes-bsp/reference-design/kc705-trd_2013.1.bb b/recipes-bsp/reference-design/kc705-trd_2013.1.bb
deleted file mode 100644
index 9384a9cc..00000000
--- a/recipes-bsp/reference-design/kc705-trd_2013.1.bb
+++ /dev/null
@@ -1,42 +0,0 @@
1SUMMARY = "KC705 Targeted Reference Design"
2DESCRIPTION = "Contains the Reference Design Files and pre-built bitstream."
3HOMEPAGE = "http://www.xilinx.com"
4SECTION = "bsp"
5
6LICENSE = "Proprietary"
7LIC_FILES_CHKSUM = "file://readme.txt;md5=3460f0b771d39ff306837a28cd1d2532"
8
9COMPATIBLE_MACHINE = "kc705-trd-microblazeel"
10
11SRC_URI = "http://www.xilinx.com/support/documentation/boards_and_kits/k7_emb/2013_1/k7-embedded-trd-rdf0283.zip"
12SRC_URI[md5sum] = "226cac219b1307cd465caa411d76d657"
13SRC_URI[sha256sum] = "82096948c2c74a16f4d6c5a43d9e6d76eab73e322ace56d30f9c84a9be43edbe"
14
15S = "${WORKDIR}/k7-embedded-trd-rdf0283"
16
17PROVIDES = "virtual/bitstream"
18
19FILES_${PN} += "/boot/download.bit"
20
21INHIBIT_DEFAULT_DEPS = "1"
22PACKAGE_ARCH = "${MACHINE_ARCH}"
23
24# Copy the bitstream into the boot directory
25do_install() {
26 install -d ${D}/boot
27 install ${S}/KC705_Embedded_Kit/KC705_System/ready_for_download/download.bit ${D}/boot/download.bit
28}
29
30do_compile() {
31 :
32}
33
34do_deploy () {
35 install -d ${DEPLOY_DIR_IMAGE}
36 if [ -e ${D}/boot/download.bit ]; then
37 install ${D}/boot/download.bit ${DEPLOY_DIR_IMAGE}/download.bit
38 fi
39}
40
41addtask deploy before do_build after do_install
42
diff --git a/recipes-bsp/u-boot/u-boot-xlnx/microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch b/recipes-bsp/u-boot/u-boot-xlnx/microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch
deleted file mode 100644
index 47601e7d..00000000
--- a/recipes-bsp/u-boot/u-boot-xlnx/microblaze-kc705-trd-Convert-microblaze-generic-to-k.patch
+++ /dev/null
@@ -1,656 +0,0 @@
1From 36651e266a840e0767e8f1b6d0ff4944f96cbdcf Mon Sep 17 00:00:00 2001
2From: Nathan Rossi <nathan@nathanrossi.com>
3Date: Thu, 31 Mar 2016 18:15:02 +1000
4Subject: [PATCH] microblaze: kc705-trd: Convert microblaze-generic to
5 kc705-trd
6
7Change the microblaze-generic board to match the kc705-trd. This patch
8is not intended for upstream and serves as an intermediate solution
9until OF support in upstream u-boot allows for easy support for custom
10microblaze boards.
11
12Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
13Upstream-Status: Not-Upstreamable [meta-xilinx/kc705 specific]
14---
15 arch/microblaze/dts/microblaze-generic.dts | 520 ++++++++++++++++++++++++++
16 board/xilinx/microblaze-generic/config.mk | 23 +-
17 board/xilinx/microblaze-generic/xparameters.h | 16 +-
18 configs/microblaze-generic_defconfig | 5 +-
19 include/configs/microblaze-generic.h | 4 +-
20 5 files changed, 540 insertions(+), 28 deletions(-)
21
22diff --git a/arch/microblaze/dts/microblaze-generic.dts b/arch/microblaze/dts/microblaze-generic.dts
23index 2033309..7faf61d 100644
24--- a/arch/microblaze/dts/microblaze-generic.dts
25+++ b/arch/microblaze/dts/microblaze-generic.dts
26@@ -2,6 +2,526 @@
27 / {
28 #address-cells = <1>;
29 #size-cells = <1>;
30+ compatible = "xlnx,microblaze";
31+ model = "Xilinx-KC705-TRD";
32+ ddr3_sdram: memory@80000000 {
33+ device_type = "memory";
34+ reg = < 0x80000000 0x40000000 >;
35+ } ;
36 aliases {
37+ ethernet0 = &soft_ethernet_mac;
38+ serial0 = &rs232_uart_1;
39+ } ;
40+ chosen {
41+ bootargs = "";
42+ stdout-path = "serial0:115200";
43+ } ;
44+ cpus {
45+ #address-cells = <1>;
46+ #cpus = <0x1>;
47+ #size-cells = <0>;
48+ microblaze_0: cpu@0 {
49+ bus-handle = <&axi_mm_mb>, <&axi4_0>, <&axi4lite_0>;
50+ clock-frequency = <150000000>;
51+ clocks = <&clk_cpu>;
52+ compatible = "xlnx,microblaze-8.50.a";
53+ d-cache-baseaddr = <0x80000000>;
54+ d-cache-highaddr = <0xffffffff>;
55+ d-cache-line-size = <0x20>;
56+ d-cache-size = <0x2000>;
57+ device_type = "cpu";
58+ i-cache-baseaddr = <0x80000000>;
59+ i-cache-highaddr = <0xffffffff>;
60+ i-cache-line-size = <0x20>;
61+ i-cache-size = <0x2000>;
62+ model = "microblaze,8.50.a";
63+ reg = <0>;
64+ timebase-frequency = <150000000>;
65+ xlnx,addr-tag-bits = <0x12>;
66+ xlnx,allow-dcache-wr = <0x1>;
67+ xlnx,allow-icache-wr = <0x1>;
68+ xlnx,area-optimized = <0x0>;
69+ xlnx,avoid-primitives = <0x0>;
70+ xlnx,base-vectors = <0x0>;
71+ xlnx,branch-target-cache-size = <0x0>;
72+ xlnx,cache-byte-size = <0x2000>;
73+ xlnx,d-axi = <0x1>;
74+ xlnx,d-lmb = <0x1>;
75+ xlnx,d-plb = <0x0>;
76+ xlnx,data-size = <0x20>;
77+ xlnx,dcache-addr-tag = <0x12>;
78+ xlnx,dcache-always-used = <0x1>;
79+ xlnx,dcache-byte-size = <0x2000>;
80+ xlnx,dcache-data-width = <0x0>;
81+ xlnx,dcache-force-tag-lutram = <0x1>;
82+ xlnx,dcache-interface = <0x0>;
83+ xlnx,dcache-line-len = <0x8>;
84+ xlnx,dcache-use-fsl = <0x0>;
85+ xlnx,dcache-use-writeback = <0x0>;
86+ xlnx,dcache-victims = <0x0>;
87+ xlnx,debug-enabled = <0x1>;
88+ xlnx,div-zero-exception = <0x0>;
89+ xlnx,dynamic-bus-sizing = <0x1>;
90+ xlnx,ecc-use-ce-exception = <0x0>;
91+ xlnx,edge-is-positive = <0x1>;
92+ xlnx,endianness = <0x1>;
93+ xlnx,family = "kintex7";
94+ xlnx,fault-tolerant = <0x0>;
95+ xlnx,fpu-exception = <0x0>;
96+ xlnx,freq = <0x8f0d180>;
97+ xlnx,fsl-data-size = <0x20>;
98+ xlnx,fsl-exception = <0x0>;
99+ xlnx,fsl-links = <0x0>;
100+ xlnx,i-axi = <0x0>;
101+ xlnx,i-lmb = <0x1>;
102+ xlnx,i-plb = <0x0>;
103+ xlnx,icache-always-used = <0x1>;
104+ xlnx,icache-data-width = <0x0>;
105+ xlnx,icache-force-tag-lutram = <0x1>;
106+ xlnx,icache-interface = <0x0>;
107+ xlnx,icache-line-len = <0x8>;
108+ xlnx,icache-streams = <0x0>;
109+ xlnx,icache-use-fsl = <0x0>;
110+ xlnx,icache-victims = <0x0>;
111+ xlnx,ill-opcode-exception = <0x1>;
112+ xlnx,instance = "microblaze_0";
113+ xlnx,interconnect = <0x2>;
114+ xlnx,interrupt-is-edge = <0x0>;
115+ xlnx,lockstep-slave = <0x0>;
116+ xlnx,mmu-dtlb-size = <0x2>;
117+ xlnx,mmu-itlb-size = <0x2>;
118+ xlnx,mmu-privileged-instr = <0x0>;
119+ xlnx,mmu-tlb-access = <0x3>;
120+ xlnx,mmu-zones = <0x2>;
121+ xlnx,number-of-pc-brk = <0x1>;
122+ xlnx,number-of-rd-addr-brk = <0x0>;
123+ xlnx,number-of-wr-addr-brk = <0x0>;
124+ xlnx,opcode-0x0-illegal = <0x1>;
125+ xlnx,optimization = <0x0>;
126+ xlnx,pc-width = <0x20>;
127+ xlnx,pvr = <0x2>;
128+ xlnx,pvr-user1 = <0x0>;
129+ xlnx,pvr-user2 = <0x0>;
130+ xlnx,reset-msr = <0x0>;
131+ xlnx,sco = <0x0>;
132+ xlnx,stream-interconnect = <0x0>;
133+ xlnx,unaligned-exceptions = <0x1>;
134+ xlnx,use-barrel = <0x1>;
135+ xlnx,use-branch-target-cache = <0x0>;
136+ xlnx,use-dcache = <0x1>;
137+ xlnx,use-div = <0x0>;
138+ xlnx,use-ext-brk = <0x1>;
139+ xlnx,use-ext-nm-brk = <0x1>;
140+ xlnx,use-extended-fsl-instr = <0x0>;
141+ xlnx,use-fpu = <0x0>;
142+ xlnx,use-hw-mul = <0x1>;
143+ xlnx,use-icache = <0x1>;
144+ xlnx,use-interrupt = <0x1>;
145+ xlnx,use-mmu = <0x3>;
146+ xlnx,use-msr-instr = <0x1>;
147+ xlnx,use-pcmp-instr = <0x1>;
148+ xlnx,use-reorder-instr = <0x1>;
149+ xlnx,use-stack-protection = <0x0>;
150+ } ;
151+ } ;
152+ clocks {
153+ #address-cells = <1>;
154+ #size-cells = <0>;
155+ clk_bus: bus {
156+ #clock-cells = <0>;
157+ clock-frequency = <100000000>;
158+ clock-output-names = "bus";
159+ compatible = "fixed-clock";
160+ reg = <1>;
161+ } ;
162+ clk_cpu: cpu {
163+ #clock-cells = <0>;
164+ clock-frequency = <150000000>;
165+ clock-output-names = "cpu";
166+ compatible = "fixed-clock";
167+ reg = <0>;
168+ } ;
169+ } ;
170+ axi4lite_0: axi@2 {
171+ #address-cells = <1>;
172+ #size-cells = <1>;
173+ compatible = "xlnx,axi-interconnect-1.06.a", "simple-bus";
174+ ranges ;
175+ axi_dma_ethernet: axi-dma@50000000 {
176+ axistream-connected = <&soft_ethernet_mac>;
177+ axistream-control-connected = <&soft_ethernet_mac>;
178+ compatible = "xlnx,axi-dma-6.03.a", "xlnx,axi-dma-1.00.a";
179+ interrupt-parent = <&interrupt_cntlr>;
180+ interrupts = < 0 2 1 2 >;
181+ reg = < 0x50000000 0x10000 >;
182+ xlnx,dlytmr-resolution = <0x4e2>;
183+ xlnx,enable-multi-channel = <0x0>;
184+ xlnx,family = "kintex7";
185+ xlnx,generic = <0x0>;
186+ xlnx,include-mm2s = <0x1>;
187+ xlnx,include-mm2s-dre = <0x1>;
188+ xlnx,include-mm2s-sf = <0x1>;
189+ xlnx,include-s2mm = <0x1>;
190+ xlnx,include-s2mm-dre = <0x1>;
191+ xlnx,include-s2mm-sf = <0x1>;
192+ xlnx,include-sg = <0x1>;
193+ xlnx,instance = "AXI_DMA_Ethernet";
194+ xlnx,mm2s-burst-size = <0x10>;
195+ xlnx,num-mm2s-channels = <0x1>;
196+ xlnx,num-s2mm-channels = <0x1>;
197+ xlnx,prmry-is-aclk-async = <0x1>;
198+ xlnx,s2mm-burst-size = <0x10>;
199+ xlnx,sg-include-desc-queue = <0x1>;
200+ xlnx,sg-include-stscntrl-strm = <0x1>;
201+ xlnx,sg-length-width = <0x10>;
202+ xlnx,sg-use-stsapp-length = <0x1>;
203+ } ;
204+ axi_xadc_0: axi-xadc@40d00000 {
205+ clocks = <&clk_bus>;
206+ compatible = "xlnx,axi-xadc-1.00.a";
207+ interrupt-parent = <&interrupt_cntlr>;
208+ interrupts = < 7 2 >;
209+ reg = < 0x40d00000 0x10000 >;
210+ xlnx,family = "kintex7";
211+ xlnx,has-temp-bus = <0x1>;
212+ xlnx,include-intr = <0x1>;
213+ xlnx,instance = "axi_xadc_0";
214+ xlnx,sim-monitor-file = "Sysmon_Design.txt";
215+ } ;
216+ debug_module: serial@40200000 {
217+ compatible = "xlnx,mdm-2.10.a", "xlnx,xps-uartlite-1.00.a";
218+ reg = < 0x40200000 0x10000 >;
219+ xlnx,family = "kintex7";
220+ xlnx,interconnect = <0x2>;
221+ xlnx,jtag-chain = <0x2>;
222+ xlnx,mb-dbg-ports = <0x1>;
223+ xlnx,use-bscan = <0x0>;
224+ xlnx,use-uart = <0x1>;
225+ } ;
226+ dip_switches_4bits: gpio@40700000 {
227+ #gpio-cells = <2>;
228+ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
229+ gpio-controller ;
230+ reg = < 0x40700000 0x10000 >;
231+ xlnx,all-inputs = <0x1>;
232+ xlnx,all-inputs-2 = <0x0>;
233+ xlnx,dout-default = <0x0>;
234+ xlnx,dout-default-2 = <0x0>;
235+ xlnx,family = "kintex7";
236+ xlnx,gpio-width = <0x4>;
237+ xlnx,gpio2-width = <0x20>;
238+ xlnx,instance = "DIP_Switches_4Bits";
239+ xlnx,interrupt-present = <0x1>;
240+ xlnx,is-dual = <0x0>;
241+ xlnx,tri-default = <0xffffffff>;
242+ xlnx,tri-default-2 = <0xffffffff>;
243+ } ;
244+ dual_timer_counter: system-timer@40300000 {
245+ clock-frequency = <100000000>;
246+ clocks = <&clk_bus>;
247+ compatible = "xlnx,axi-timer-1.03.a", "xlnx,xps-timer-1.00.a";
248+ interrupt-parent = <&interrupt_cntlr>;
249+ interrupts = < 3 2 >;
250+ reg = < 0x40300000 0x10000 >;
251+ xlnx,count-width = <0x20>;
252+ xlnx,family = "kintex7";
253+ xlnx,gen0-assert = <0x1>;
254+ xlnx,gen1-assert = <0x1>;
255+ xlnx,instance = "Dual_Timer_Counter";
256+ xlnx,one-timer-only = <0x0>;
257+ xlnx,trig0-assert = <0x1>;
258+ xlnx,trig1-assert = <0x1>;
259+ } ;
260+ iic_eeprom: i2c@40a00000 {
261+ compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a";
262+ interrupt-parent = <&interrupt_cntlr>;
263+ interrupts = < 4 2 >;
264+ reg = < 0x40a00000 0x10000 >;
265+ xlnx,family = "kintex7";
266+ xlnx,gpo-width = <0x1>;
267+ xlnx,iic-freq = <0x186a0>;
268+ xlnx,instance = "IIC_EEPROM";
269+ xlnx,scl-inertial-delay = <0x0>;
270+ xlnx,sda-inertial-delay = <0x0>;
271+ xlnx,sda-level = <0x1>;
272+ xlnx,ten-bit-adr = <0x0>;
273+ } ;
274+ interrupt_cntlr: interrupt-controller@40100000 {
275+ #interrupt-cells = <0x2>;
276+ compatible = "xlnx,axi-intc-1.03.a", "xlnx,xps-intc-1.00.a";
277+ interrupt-controller ;
278+ reg = < 0x40100000 0x10000 >;
279+ xlnx,kind-of-intr = <0x0>;
280+ xlnx,num-intr-inputs = <0x8>;
281+ } ;
282+ lcd_gpio: gpio@40800000 {
283+ #gpio-cells = <2>;
284+ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
285+ gpio-controller ;
286+ reg = < 0x40800000 0x10000 >;
287+ xlnx,all-inputs = <0x0>;
288+ xlnx,all-inputs-2 = <0x0>;
289+ xlnx,dout-default = <0x0>;
290+ xlnx,dout-default-2 = <0x0>;
291+ xlnx,family = "kintex7";
292+ xlnx,gpio-width = <0x7>;
293+ xlnx,gpio2-width = <0x20>;
294+ xlnx,instance = "LCD_GPIO";
295+ xlnx,interrupt-present = <0x0>;
296+ xlnx,is-dual = <0x0>;
297+ xlnx,tri-default = <0xffffffff>;
298+ xlnx,tri-default-2 = <0xffffffff>;
299+ } ;
300+ leds_8bits: gpio@40600000 {
301+ #gpio-cells = <2>;
302+ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
303+ gpio-controller ;
304+ reg = < 0x40600000 0x10000 >;
305+ xlnx,all-inputs = <0x0>;
306+ xlnx,all-inputs-2 = <0x0>;
307+ xlnx,dout-default = <0x0>;
308+ xlnx,dout-default-2 = <0x0>;
309+ xlnx,family = "kintex7";
310+ xlnx,gpio-width = <0x8>;
311+ xlnx,gpio2-width = <0x20>;
312+ xlnx,instance = "LEDs_8Bits";
313+ xlnx,interrupt-present = <0x1>;
314+ xlnx,is-dual = <0x0>;
315+ xlnx,tri-default = <0xffffffff>;
316+ xlnx,tri-default-2 = <0xffffffff>;
317+ } ;
318+ logisdhc_0: logisdhc@40b00000 {
319+ compatible = "xlnx,logisdhc-1.06.c";
320+ interrupt-parent = <&interrupt_cntlr>;
321+ interrupts = < 6 2 >;
322+ reg = < 0x40b00000 0x10000 >;
323+ xlnx,byte-per-pixel = <0x4>;
324+ xlnx,convert-endianess = <0x0>;
325+ xlnx,dma-type = <0x1>;
326+ xlnx,family = "kintex7";
327+ xlnx,ip-license-type = <0x1>;
328+ xlnx,ip-major-revision = <0x1>;
329+ xlnx,ip-minor-revision = <0x6>;
330+ xlnx,ip-patch-level = <0x2>;
331+ xlnx,mem-burst = <0x4>;
332+ xlnx,mem-data-bus-width = <0x20>;
333+ xlnx,mem-interface = <0x1>;
334+ xlnx,regs-interface = <0x2>;
335+ xlnx,row-stride = <0x400>;
336+ xlnx,sd-base-clock-freq = <0x64>;
337+ xlnx,use-dma = <0x0>;
338+ } ;
339+ primary_flash: flash@48000000 {
340+ #address-cells = <1>;
341+ #size-cells = <1>;
342+ bank-width = <2>;
343+ compatible = "xlnx,axi-emc-1.03.b", "cfi-flash";
344+ reg = < 0x48000000 0x8000000 >;
345+ xlnx,axi-clk-period-ps = <0x2710>;
346+ xlnx,family = "kintex7";
347+ xlnx,include-datawidth-matching-0 = <0x1>;
348+ xlnx,include-datawidth-matching-1 = <0x0>;
349+ xlnx,include-datawidth-matching-2 = <0x0>;
350+ xlnx,include-datawidth-matching-3 = <0x0>;
351+ xlnx,include-negedge-ioregs = <0x0>;
352+ xlnx,instance = "Linear_Flash";
353+ xlnx,lflash-period-ps = <0x4e20>;
354+ xlnx,linear-flash-sync-burst = <0x0>;
355+ xlnx,max-mem-width = <0x10>;
356+ xlnx,mem0-type = <0x2>;
357+ xlnx,mem0-width = <0x10>;
358+ xlnx,mem1-type = <0x0>;
359+ xlnx,mem1-width = <0x20>;
360+ xlnx,mem2-type = <0x0>;
361+ xlnx,mem2-width = <0x20>;
362+ xlnx,mem3-type = <0x0>;
363+ xlnx,mem3-width = <0x20>;
364+ xlnx,num-banks-mem = <0x1>;
365+ xlnx,parity-type-mem-0 = <0x0>;
366+ xlnx,parity-type-mem-1 = <0x0>;
367+ xlnx,parity-type-mem-2 = <0x0>;
368+ xlnx,parity-type-mem-3 = <0x0>;
369+ xlnx,s-axi-en-reg = <0x0>;
370+ xlnx,s-axi-mem-addr-width = <0x20>;
371+ xlnx,s-axi-mem-data-width = <0x20>;
372+ xlnx,s-axi-mem-id-width = <0x1>;
373+ xlnx,s-axi-mem-protocol = "AXI4LITE";
374+ xlnx,s-axi-reg-addr-width = <0x5>;
375+ xlnx,s-axi-reg-data-width = <0x20>;
376+ xlnx,s-axi-reg-protocol = "axi4";
377+ xlnx,synch-pipedelay-0 = <0x2>;
378+ xlnx,synch-pipedelay-1 = <0x2>;
379+ xlnx,synch-pipedelay-2 = <0x2>;
380+ xlnx,synch-pipedelay-3 = <0x2>;
381+ xlnx,tavdv-ps-mem-0 = <0x1fbd0>;
382+ xlnx,tavdv-ps-mem-1 = <0x3a98>;
383+ xlnx,tavdv-ps-mem-2 = <0x3a98>;
384+ xlnx,tavdv-ps-mem-3 = <0x3a98>;
385+ xlnx,tcedv-ps-mem-0 = <0x1fbd0>;
386+ xlnx,tcedv-ps-mem-1 = <0x3a98>;
387+ xlnx,tcedv-ps-mem-2 = <0x3a98>;
388+ xlnx,tcedv-ps-mem-3 = <0x3a98>;
389+ xlnx,thzce-ps-mem-0 = <0x88b8>;
390+ xlnx,thzce-ps-mem-1 = <0x1b58>;
391+ xlnx,thzce-ps-mem-2 = <0x1b58>;
392+ xlnx,thzce-ps-mem-3 = <0x1b58>;
393+ xlnx,thzoe-ps-mem-0 = <0x1b58>;
394+ xlnx,thzoe-ps-mem-1 = <0x1b58>;
395+ xlnx,thzoe-ps-mem-2 = <0x1b58>;
396+ xlnx,thzoe-ps-mem-3 = <0x1b58>;
397+ xlnx,tlzwe-ps-mem-0 = <0x88b8>;
398+ xlnx,tlzwe-ps-mem-1 = <0x0>;
399+ xlnx,tlzwe-ps-mem-2 = <0x0>;
400+ xlnx,tlzwe-ps-mem-3 = <0x0>;
401+ xlnx,tpacc-ps-flash-0 = <0x61a8>;
402+ xlnx,tpacc-ps-flash-1 = <0x61a8>;
403+ xlnx,tpacc-ps-flash-2 = <0x61a8>;
404+ xlnx,tpacc-ps-flash-3 = <0x61a8>;
405+ xlnx,twc-ps-mem-0 = <0x11170>;
406+ xlnx,twc-ps-mem-1 = <0x3a98>;
407+ xlnx,twc-ps-mem-2 = <0x3a98>;
408+ xlnx,twc-ps-mem-3 = <0x3a98>;
409+ xlnx,twp-ps-mem-0 = <0x11170>;
410+ xlnx,twp-ps-mem-1 = <0x2ee0>;
411+ xlnx,twp-ps-mem-2 = <0x2ee0>;
412+ xlnx,twp-ps-mem-3 = <0x2ee0>;
413+ xlnx,twph-ps-mem-0 = <0x2ee0>;
414+ xlnx,twph-ps-mem-1 = <0x2ee0>;
415+ xlnx,twph-ps-mem-2 = <0x2ee0>;
416+ xlnx,twph-ps-mem-3 = <0x2ee0>;
417+ xlnx,wr-rec-time-mem-0 = <0x186a0>;
418+ xlnx,wr-rec-time-mem-1 = <0x186a0>;
419+ xlnx,wr-rec-time-mem-2 = <0x186a0>;
420+ xlnx,wr-rec-time-mem-3 = <0x186a0>;
421+ partition@0x00000000 {
422+ label = "fpga";
423+ reg = <0x00000000 0x00200000>;
424+ };
425+ partition@0x00200000 {
426+ label = "boot";
427+ reg = <0x00200000 0x00040000>;
428+ };
429+ partition@0x00240000 {
430+ label = "bootenv";
431+ reg = <0x00240000 0x00020000>;
432+ };
433+ partition@0x00260000 {
434+ label = "image";
435+ reg = <0x00260000 0x00c00000>;
436+ };
437+ partition@0x00e60000 {
438+ label = "spare";
439+ reg = <0x00e60000 0x00000000>;
440+ };
441+ } ;
442+ push_buttons_5bits: gpio@40500000 {
443+ #gpio-cells = <2>;
444+ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
445+ gpio-controller ;
446+ reg = < 0x40500000 0x10000 >;
447+ xlnx,all-inputs = <0x1>;
448+ xlnx,all-inputs-2 = <0x0>;
449+ xlnx,dout-default = <0x0>;
450+ xlnx,dout-default-2 = <0x0>;
451+ xlnx,family = "kintex7";
452+ xlnx,gpio-width = <0x5>;
453+ xlnx,gpio2-width = <0x20>;
454+ xlnx,instance = "Push_Buttons_5Bits";
455+ xlnx,interrupt-present = <0x1>;
456+ xlnx,is-dual = <0x0>;
457+ xlnx,tri-default = <0xffffffff>;
458+ xlnx,tri-default-2 = <0xffffffff>;
459+ } ;
460+ rotary_gpio: gpio@40900000 {
461+ #gpio-cells = <2>;
462+ compatible = "xlnx,axi-gpio-1.01.b", "xlnx,xps-gpio-1.00.a";
463+ gpio-controller ;
464+ reg = < 0x40900000 0x10000 >;
465+ xlnx,all-inputs = <0x1>;
466+ xlnx,all-inputs-2 = <0x0>;
467+ xlnx,dout-default = <0x0>;
468+ xlnx,dout-default-2 = <0x0>;
469+ xlnx,family = "kintex7";
470+ xlnx,gpio-width = <0x3>;
471+ xlnx,gpio2-width = <0x20>;
472+ xlnx,instance = "ROTARY_GPIO";
473+ xlnx,interrupt-present = <0x0>;
474+ xlnx,is-dual = <0x0>;
475+ xlnx,tri-default = <0xffffffff>;
476+ xlnx,tri-default-2 = <0xffffffff>;
477+ } ;
478+ rs232_uart_1: serial@40400000 {
479+ clock-frequency = <100000000>;
480+ clocks = <&clk_bus>;
481+ compatible = "xlnx,axi-uart16550-1.01.a", "xlnx,xps-uart16550-2.00.a", "ns16550a";
482+ current-speed = <115200>;
483+ device_type = "serial";
484+ interrupt-parent = <&interrupt_cntlr>;
485+ interrupts = < 5 2 >;
486+ reg = < 0x40400000 0x10000 >;
487+ reg-offset = <0x1000>;
488+ reg-shift = <2>;
489+ xlnx,external-xin-clk-hz = <0x17d7840>;
490+ xlnx,family = "kintex7";
491+ xlnx,has-external-rclk = <0x0>;
492+ xlnx,has-external-xin = <0x0>;
493+ xlnx,instance = "RS232_Uart_1";
494+ xlnx,is-a-16550 = <0x1>;
495+ xlnx,use-modem-ports = <0x0>;
496+ xlnx,use-user-ports = <0x0>;
497+ } ;
498+ soft_ethernet_mac: axi-ethernet@50100000 {
499+ axistream-connected = <&axi_dma_ethernet>;
500+ axistream-control-connected = <&axi_dma_ethernet>;
501+ clock-frequency = <100000000>;
502+ clocks = <&clk_bus>;
503+ compatible = "xlnx,axi-ethernet-3.01.a", "xlnx,axi-ethernet-1.00.a";
504+ device_type = "network";
505+ interrupt-parent = <&interrupt_cntlr>;
506+ interrupts = < 2 2 >;
507+ local-mac-address = [ 00 0a 35 00 d9 4e ];
508+ phy-mode = "gmii";
509+ phy-handle = <&phy0>;
510+ reg = < 0x50100000 0x40000 >;
511+ xlnx,avb = <0x0>;
512+ xlnx,halfdup = <0x0>;
513+ xlnx,include-io = <0x1>;
514+ xlnx,mcast-extend = <0x0>;
515+ xlnx,phy-type = <0x1>;
516+ xlnx,phyaddr = <0x1>;
517+ xlnx,rxcsum = <0x0>;
518+ xlnx,rxmem = <0x1000>;
519+ xlnx,rxvlan-strp = <0x0>;
520+ xlnx,rxvlan-tag = <0x0>;
521+ xlnx,rxvlan-tran = <0x0>;
522+ xlnx,stats = <0x0>;
523+ xlnx,txcsum = <0x0>;
524+ xlnx,txmem = <0x1000>;
525+ xlnx,txvlan-strp = <0x0>;
526+ xlnx,txvlan-tag = <0x0>;
527+ xlnx,txvlan-tran = <0x0>;
528+ xlnx,type = <0x1>;
529+ mdio {
530+ #address-cells = <1>;
531+ #size-cells = <0>;
532+ phy0: phy@7 {
533+ compatible = "marvell,88e1111";
534+ device_type = "ethernet-phy";
535+ reg = <7>;
536+ } ;
537+ } ;
538+ } ;
539+ } ;
540+ axi_mm_mb: axi@1 {
541+ #address-cells = <1>;
542+ #size-cells = <1>;
543+ compatible = "xlnx,axi-interconnect-1.06.a", "simple-bus";
544+ ranges ;
545+ axi4_0: axi@0 {
546+ #address-cells = <1>;
547+ #size-cells = <1>;
548+ compatible = "xlnx,axi-interconnect-1.06.a", "simple-bus";
549+ ranges = < 0x80000000 0x80000000 0x40000000 >;
550+ } ;
551 } ;
552 } ;
553diff --git a/board/xilinx/microblaze-generic/config.mk b/board/xilinx/microblaze-generic/config.mk
554index 36bdd96..25e97de 100644
555--- a/board/xilinx/microblaze-generic/config.mk
556+++ b/board/xilinx/microblaze-generic/config.mk
557@@ -1,18 +1,11 @@
558-#
559-# (C) Copyright 2007 Michal Simek
560-#
561-# Michal SIMEK <monstr@monstr.eu>
562-#
563 # SPDX-License-Identifier: GPL-2.0+
564-#
565-# CAUTION: This file is a faked configuration !!!
566-# There is no real target for the microblaze-generic
567-# configuration. You have to replace this file with
568-# the generated file from your Xilinx design flow.
569-#
570
571-CONFIG_SYS_TEXT_BASE = 0x29000000
572+CONFIG_SYS_TEXT_BASE = 0xbfc00000
573
574-PLATFORM_CPPFLAGS += -mno-xl-soft-mul
575-PLATFORM_CPPFLAGS += -mno-xl-soft-div
576-PLATFORM_CPPFLAGS += -mxl-barrel-shift
577+PLATFORM_CCPFLAGS += -mlittle-endian
578+PLATFORM_CCPFLAGS += -mcpu=v8.50.a
579+PLATFORM_CCPFLAGS += -mxl-barrel-shift
580+PLATFORM_CCPFLAGS += -mno-xl-soft-mul
581+PLATFORM_CCPFLAGS += -mxl-soft-div
582+PLATFORM_CCPFLAGS += -mxl-pattern-compare
583+PLATFORM_CCPFLAGS += -mxl-reorder
584diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h
585index dc5645b..80b1ce3 100644
586--- a/board/xilinx/microblaze-generic/xparameters.h
587+++ b/board/xilinx/microblaze-generic/xparameters.h
588@@ -15,15 +15,11 @@
589
590 /* Microblaze is microblaze_0 */
591 #define XILINX_USE_MSR_INSTR 1
592-#define XILINX_FSL_NUMBER 3
593-
594-/* GPIO is LEDs_4Bit*/
595-#define XILINX_GPIO_BASEADDR 0x40000000
596+#define XILINX_FSL_NUMBER 0
597+#define XILINX_USE_ICACHE 1
598+#define XILINX_USE_DCACHE 1
599+#define XILINX_DCACHE_BYTE_SIZE 8192
600
601 /* Flash Memory is FLASH_2Mx32 */
602-#define XILINX_FLASH_START 0x2c000000
603-#define XILINX_FLASH_SIZE 0x00800000
604-
605-/* Watchdog IP is wxi_timebase_wdt_0 */
606-#define XILINX_WATCHDOG_BASEADDR 0x50000000
607-#define XILINX_WATCHDOG_IRQ 1
608+#define XILINX_FLASH_START 0x48000000
609+#define XILINX_FLASH_SIZE 0x08000000
610diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
611index 21a7261..5f17daf 100644
612--- a/configs/microblaze-generic_defconfig
613+++ b/configs/microblaze-generic_defconfig
614@@ -7,8 +7,8 @@ CONFIG_SPL=y
615 CONFIG_FIT=y
616 CONFIG_FIT_VERBOSE=y
617 CONFIG_HUSH_PARSER=y
618-CONFIG_SYS_PROMPT="U-Boot-mONStR> "
619-CONFIG_CMD_GPIO=y
620+CONFIG_SYS_PROMPT="U-Boot> "
621+# CONFIG_CMD_GPIO is not set
622 # CONFIG_CMD_SETEXPR is not set
623 CONFIG_CMD_TFTPPUT=y
624 CONFIG_CMD_DHCP=y
625@@ -19,5 +19,6 @@ CONFIG_NETCONSOLE=y
626 CONFIG_DM_ETH=y
627 CONFIG_XILINX_AXIEMAC=y
628 CONFIG_XILINX_EMACLITE=y
629+CONFIG_NET_RANDOM_ETHADDR=y
630 CONFIG_SYS_NS16550=y
631 CONFIG_XILINX_UARTLITE=y
632diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
633index b424782..eb56f12 100644
634--- a/include/configs/microblaze-generic.h
635+++ b/include/configs/microblaze-generic.h
636@@ -91,7 +91,7 @@
637 /* max number of memory banks */
638 # define CONFIG_SYS_MAX_FLASH_BANKS 1
639 /* max number of sectors on one chip */
640-# define CONFIG_SYS_MAX_FLASH_SECT 512
641+# define CONFIG_SYS_MAX_FLASH_SECT 2048
642 /* hardware flash protection */
643 # define CONFIG_SYS_FLASH_PROTECTION
644 /* use buffered writes (20x faster) */
645@@ -161,6 +161,8 @@
646 #define XILINX_DCACHE_BYTE_SIZE 32768
647 #endif
648
649+#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
650+
651 /*
652 * BOOTP options
653 */
654--
6552.7.0
656
diff --git a/recipes-kernel/linux/config/xilinx-machine/bsp/kc705-trd-microblazeel/kc705-trd-microblazeel.cfg b/recipes-kernel/linux/config/xilinx-machine/bsp/kc705-trd-microblazeel/kc705-trd-microblazeel.cfg
deleted file mode 100644
index 3b2bf972..00000000
--- a/recipes-kernel/linux/config/xilinx-machine/bsp/kc705-trd-microblazeel/kc705-trd-microblazeel.cfg
+++ /dev/null
@@ -1,14 +0,0 @@
1CONFIG_XILINX_MICROBLAZE0_FAMILY="kintex7"
2
3# CPU ISA Config
4CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
5CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
6CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
7CONFIG_XILINX_MICROBLAZE0_USE_DIV=0
8CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
9CONFIG_XILINX_MICROBLAZE0_USE_FPU=0
10CONFIG_XILINX_MICROBLAZE0_HW_VER="8.50.a"
11
12# Memory Base Address
13CONFIG_KERNEL_BASE_ADDR=0x80000000
14
diff --git a/recipes-kernel/linux/config/xilinx-machine/bsp/kc705-trd-microblazeel/kc705-trd-microblazeel.scc b/recipes-kernel/linux/config/xilinx-machine/bsp/kc705-trd-microblazeel/kc705-trd-microblazeel.scc
deleted file mode 100644
index 4daa3cd7..00000000
--- a/recipes-kernel/linux/config/xilinx-machine/bsp/kc705-trd-microblazeel/kc705-trd-microblazeel.scc
+++ /dev/null
@@ -1,4 +0,0 @@
1define KFEATURE_DESCRIPTION "Kernel Config for kc705-trd-microblazeel specific setup"
2define KFEATURE_COMPATIBILITY board
3
4kconf hardware kc705-trd-microblazeel.cfg
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2026-04-22 06:15:39 +0000