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<title>linux/meta-xilinx.git/meta-xilinx-core/classes, branch nanbield</title>
<subtitle>Mirror of git.yoctoproject.org/meta-xilinx.git</subtitle>
<id>https://git.enea.com/cgit/linux/meta-xilinx.git/atom?h=nanbield</id>
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<updated>2023-10-23T14:56:37+00:00</updated>
<entry>
<title>Merge remote-tracking branch 'origin/rel-v2023.2' into nanbield</title>
<updated>2023-10-23T14:56:37+00:00</updated>
<author>
<name>Mark Hatle</name>
<email>mark.hatle@amd.com</email>
</author>
<published>2023-10-23T14:51:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-xilinx.git/commit/?id=eb42c7caeac33f42096673522e650441f05ca8da'/>
<id>urn:sha1:eb42c7caeac33f42096673522e650441f05ca8da</id>
<content type='text'>
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>dfx_user_dts: Add support for bin and dts use case</title>
<updated>2023-08-17T14:55:43+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2023-08-14T14:59:23+00:00</published>
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<id>urn:sha1:89daaf083b4d4f3e6e5875545dd2387d2e05b468</id>
<content type='text'>
1. Add support for bin and single dts use case.
2. Skip reciep when both .bit and .bin files are used in SRC_URI.
3. Fix regular expression logic to handle .dts and .dtsi file search.
   For example if the file name is user-dts.dtsi then dts search count
   was set to one which results in build failures.
4. Skip devicetree do_compile task if input file is dtbo in SRC_URI for
   ZynqMP and Zynq-7000.
5. Using bootgen tool "-o" option user can specify output file name.
   Hence fix logic for .bin install as .bin file name doesn't have to be
   &lt;filename&gt;.bit.bin always.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>image-types-xilinx-qemu.bbclass: Sync with rootfs naming of poky</title>
<updated>2023-07-19T21:21:56+00:00</updated>
<author>
<name>Mark Hatle</name>
<email>mark.hatle@amd.com</email>
</author>
<published>2023-07-19T21:21:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-xilinx.git/commit/?id=91510de43d0777d99d6414c0467ec02dd247a3e5'/>
<id>urn:sha1:91510de43d0777d99d6414c0467ec02dd247a3e5</id>
<content type='text'>
In addition to the name change, poky examples include direct reference
to the IMGDEPLOYDIR.  Add this to ensure we're working off the correct
files.

Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>dfx_user_dts: Add support for single dts input</title>
<updated>2023-07-12T20:00:55+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2023-07-11T21:39:16+00:00</published>
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<id>urn:sha1:e51efc5983dcc119296f8e55cd5737a733e3f459</id>
<content type='text'>
Add support for single dts and multiple dtsi use case.

Also check for valid combination of dtsi and dts files in SRC_URI and
following file combinations are not supported use case.

1. More than one '.dtsi' and zero '.dts' file.
2. More than one '.dts' and zero or more than one '.dtsi' file.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>fpgamanager_custom: Add deprecation warnings</title>
<updated>2023-07-07T14:41:02+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2023-07-06T06:31:09+00:00</published>
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<id>urn:sha1:ba455084dadb5d681b5b4fff67195645b061fc20</id>
<content type='text'>
fpgamanager_custom bbclass will be deprecated in upcoming release.
Users should start using dfx_user_dts bbclass for below firmware app.

1. Zynq-7000 iand ZynqMP full bitstream firmware app.
2. ZynqMP or Versal DFx Static firmware app.
3. ZynqMP or Versal DFx Partial firmware app.
4. Versal CSoC DFx Partial firmware app.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>dfx_user_dts: Rename fpgamanager_custom to dfx_user_dts bbclass</title>
<updated>2023-07-07T14:41:02+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2023-07-06T06:31:08+00:00</published>
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<id>urn:sha1:6fa2417366707790e81f61470c52d0482b446351</id>
<content type='text'>
Currently fpgamanager bbclass name doesn't fit for all design use cases
nd soc architecture. Since dfx manager tools is used for loading and
unloading .bit or .pdi and dt overlay for both flat and dfx design, So
it makes more appropriate to rename fpgamanager_custom.bbclass to
dfx_user_dts.bbclass.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>fpgamanager_custom: Rename bootgen generated bit bin file</title>
<updated>2023-03-17T16:45:20+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2023-03-17T00:03:15+00:00</published>
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<id>urn:sha1:99736a9c7e612ab4a1466d9231da05641250e268</id>
<content type='text'>
In case of Zynq-7000, using both "-process_bitstream bin" and "-o"
in bootgen flag to convert bit file to bin format, "-o" option will
not be effective and generated output file name is
${S}+${BIT_PATH}/&lt;bit_file_name&gt;.bit.bin file which causes build errors.

Hence we need to rename this file from &lt;bit_file_name&gt;.bit.bin to
${PN}.bit.bin which matches the firmware name in dtbo and move
${PN}.bit.bin to ${B} directory.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
(cherry picked from commit c9a98fe32be99654cae69dab524a744d898bf7a9)
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>fpgamanager_custom: Rename bootgen generated bit bin file</title>
<updated>2023-03-17T15:55:25+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2023-03-17T00:03:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-xilinx.git/commit/?id=c9a98fe32be99654cae69dab524a744d898bf7a9'/>
<id>urn:sha1:c9a98fe32be99654cae69dab524a744d898bf7a9</id>
<content type='text'>
In case of Zynq-7000, using both "-process_bitstream bin" and "-o"
in bootgen flag to convert bit file to bin format, "-o" option will
not be effective and generated output file name is
${S}+${BIT_PATH}/&lt;bit_file_name&gt;.bit.bin file which causes build errors.

Hence we need to rename this file from &lt;bit_file_name&gt;.bit.bin to
${PN}.bit.bin which matches the firmware name in dtbo and move
${PN}.bit.bin to ${B} directory.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>fpgamanager_custom: Fix logic for deploying shell json file</title>
<updated>2023-03-16T13:51:16+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2023-03-15T22:43:56+00:00</published>
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<id>urn:sha1:5de0247f61090c433c160b2fc38ccd8fd71c250a</id>
<content type='text'>
fpgamanager_custom bbclass allowed only accel.json file as user input
from firmware recipes, if user want to use flat or DFx static design
using shell.json, then shell.json is not deployed in
rootfs/${nonarch_base_libdir}/firmware/xilinx/${PN} directory.

Fix the logic to deploy shell.json (flat or DFx Static) or
accel.json (DFx RP) for flat, DFx Static and DFx RP use cases.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>fpgamanager_custom: Fix logic for deploying shell json file</title>
<updated>2023-03-15T23:50:31+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2023-03-15T22:43:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-xilinx.git/commit/?id=493e7f063aac00e643b0fff9cbe8b3489400d85c'/>
<id>urn:sha1:493e7f063aac00e643b0fff9cbe8b3489400d85c</id>
<content type='text'>
fpgamanager_custom bbclass allowed only accel.json file as user input
from firmware recipes, if user want to use flat or DFx static design
using shell.json, then shell.json is not deployed in
rootfs/${nonarch_base_libdir}/firmware/xilinx/${PN} directory.

Fix the logic to deploy shell.json (flat or DFx Static) or
accel.json (DFx RP) for flat, DFx Static and DFx RP use cases.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
(cherry picked from commit 6d3f12d1feee8b90f3dc72a05266fb3614788ced)
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
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