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<title>linux/meta-xilinx.git/meta-xilinx-core/classes-recipe, branch master</title>
<subtitle>Mirror of git.yoctoproject.org/meta-xilinx.git</subtitle>
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<updated>2024-11-21T20:47:51+00:00</updated>
<entry>
<title>various: Fix variable usage</title>
<updated>2024-11-21T20:47:51+00:00</updated>
<author>
<name>Mark Hatle</name>
<email>mark.hatle@amd.com</email>
</author>
<published>2024-11-21T20:47:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-xilinx.git/commit/?id=ab07add28ff4c8acf68157de49ff29f59238e4e0'/>
<id>urn:sha1:ab07add28ff4c8acf68157de49ff29f59238e4e0</id>
<content type='text'>
Remove most direct references to WORKDIR.

S = "${WORKDIR}" is no longer allowed, adjust this to refer to UNPACKDIR

${WORKDIR}/package is also incorrect, adjust to ${PKGD}.

Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>dfx_user_dts: Fix copying fw files if input is absolute path</title>
<updated>2024-10-04T15:02:47+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2024-10-03T04:17:27+00:00</published>
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<id>urn:sha1:3a6d1b61b5dde1a7dc658d730b7d0e8bd4d82da8</id>
<content type='text'>
FW files are not copied to ${nonarch_base_libdir}/firmware/xilinx/${PN}/
if SRC_URI is absolute file path, So fix logic to copy the files to
${nonarch_base_libdir}/firmware/xilinx/${PN} directory.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>imgrcry: Rework image-recover recipe</title>
<updated>2024-09-20T17:58:18+00:00</updated>
<author>
<name>John Toomey</name>
<email>john.toomey@amd.com</email>
</author>
<published>2024-09-17T15:22:44+00:00</published>
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<id>urn:sha1:2dc460b3637309e4ef2938d6a4e104ff4692008b</id>
<content type='text'>
Rework the image recover recipe to match image selector. imgrcry is now
the top level recipe which will pull in the required version of
image-recovery depending on build flow.

This change also updates the output file name in a number of places and
fixes an issue in image selector.

Signed-off-by: John Toomey &lt;john.toomey@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>amd_spi_iamge: Fix image-selector manifest file name</title>
<updated>2024-08-27T16:23:38+00:00</updated>
<author>
<name>John Toomey</name>
<email>john.toomey@amd.com</email>
</author>
<published>2024-08-23T15:27:00+00:00</published>
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<id>urn:sha1:3fccf01f9871938f5c44e44c5733dccd5deed3ca</id>
<content type='text'>
Signed-off-by: John Toomey &lt;john.toomey@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>qemuboot-xilinx: Add QB_SD_DRIVE_INDEX variable</title>
<updated>2024-08-02T13:44:25+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2024-08-01T16:34:57+00:00</published>
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<id>urn:sha1:c711b5fb6376ebd2ba0b0550c6d14ad5e767850c</id>
<content type='text'>
SD drive index value was fixed in bbclass for SD0 and SD1 device.
With this if user is booting QEMU with eMMC0(secondary boot mode) or
eMMC1 device then QEMU doesn't boot. Hence add QB_SD_DRIVE_INDEX
variable where user can set the drive index to SD/eMMC device as
shown below.

SoC                         Device                      Drive Index
-------------------------------------------------------------------
Zynq-7000, ZynqMP, Versal   SD0                         0
ZynqMP, Versal              SD1                         1
ZynqMP, Versal              eMMC0(secondary boot only)  2
ZynqMP, Versal              eMMC1                       3

Also do not set drive index based on boot mode some boards may have
primary boot mode as QSPI/OSPI which use QSPI/OSPI bin file for mtd
and secondary boot mode as SD/eMMC.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>Tweaks to enable version string format change</title>
<updated>2024-06-17T19:29:56+00:00</updated>
<author>
<name>John Toomey</name>
<email>john.toomey@amd.com</email>
</author>
<published>2024-06-13T14:59:13+00:00</published>
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<id>urn:sha1:edfc78b87a871821eaa265d2836032452671ed86</id>
<content type='text'>
Minor updates to the amd_spi_image bbclass and bootbin version files to
support updated version strin format for Kria, SC and emb-plus

Also fix an issue with IMAGE_NAME_SUFFIX being set to ".rootfs" by
default

Signed-off-by: John Toomey &lt;john.toomey@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>qemuboot-xilinx.bbclass: Rename QB_DEVICE_MODE to QB_BOOT_MODE</title>
<updated>2024-06-05T20:49:39+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2024-06-05T03:20:01+00:00</published>
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<id>urn:sha1:8f0b405bd866712f89e888ccc05a70aafa00dfb1</id>
<content type='text'>
Rename QB_DEVICE_MODE to QB_BOOT_MODE to align with TRM boot mode
table.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>various: Remove SOC_VARIANT, split versal and versal-net, add machine_features</title>
<updated>2024-06-04T23:00:14+00:00</updated>
<author>
<name>Mark Hatle</name>
<email>mark.hatle@amd.com</email>
</author>
<published>2024-06-04T22:51:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-xilinx.git/commit/?id=195e1fa9fb13b21bc41af4e0747d4646caeb65e5'/>
<id>urn:sha1:195e1fa9fb13b21bc41af4e0747d4646caeb65e5</id>
<content type='text'>
SOC_VARIANT has been remove, we are now only using the YP standard SOC_FAMILY
configuration.  The defined families are: zynq, zynqmp, versal and versal-net.

Our decision of breaking up versal-net from versal, is based on the SoC CPU
changes from cortexa72/r5 to cortexa78/r52, thus we're treating it as a
different SoC family.

In order to capture the individual capabilities that we used to handle via
SOC_VARIANT, we have defined the following features (some may have been
previously defined):
 - mali400 (zynqmp eg and ev)
 - vcu (zynqmp ev)
 - rfsoc (zynqmp dr RF capabiltiies)
 - aie - (versal ai &amp; premium)
 - vdu - (versal ai)

SOC_VARIANT_ARCH and SOC_FAMILY_ARCH are now obsolete and replaced by
MACHINE_ARCH.  This is based on the guideline that any recipes that use
MACHINE_FEATURES should be MACHINE_ARCH specific.

Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>qemuboot-xilinx: Add QB_DEVICE_MODE option</title>
<updated>2024-05-23T00:12:19+00:00</updated>
<author>
<name>John Toomey</name>
<email>john.toomey@amd.com</email>
</author>
<published>2024-05-22T10:37:18+00:00</published>
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<id>urn:sha1:3c1563f38c27d736da1de69c1a2c6826f65c08f5</id>
<content type='text'>
Add QB_DEVICE_MODE variable to allow setting of QEMU boot mode - the
default value is unchanged but can be modified per machine

Signed-off-by: John Toomey &lt;john.toomey@amd.com&gt;

Add zynqmp boot-mode reference

Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
<entry>
<title>dfx_user_dts.bbclass: Make bit or bin or pdi as required input</title>
<updated>2024-04-04T20:20:05+00:00</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@amd.com</email>
</author>
<published>2024-04-03T19:56:33+00:00</published>
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<id>urn:sha1:c09d6fbc6f6eb486498d81aa1f191b4be4767d7a</id>
<content type='text'>
1. Make bit or bin or pdi as required input for firmware recipes. If bit
   or bin or pdi of respective soc_family is not included then raise
   bitbake parse skip recipe errors.
2. Check for absolute dtbo/bin/bit path if any of these files exits
   in SRC_URI.
3. Skip recipe if both dtbo and dts/dtsi found in SRC_URI.
4. Fix logic to convert from bit to bin for zynqmp or zynq soc family.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@amd.com&gt;
Signed-off-by: Mark Hatle &lt;mark.hatle@amd.com&gt;
</content>
</entry>
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