<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/meta-ti.git/conf/machine/j7-hs-evm-k3r5.conf, branch master</title>
<subtitle>Mirror of git.yoctoproject.org/meta-ti.git</subtitle>
<id>https://git.enea.com/cgit/linux/meta-ti.git/atom?h=master</id>
<link rel='self' href='https://git.enea.com/cgit/linux/meta-ti.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/'/>
<updated>2022-02-22T18:01:38+00:00</updated>
<entry>
<title>meta-ti: create a sub-layer meta-ti-bsp from existing content</title>
<updated>2022-02-22T18:01:38+00:00</updated>
<author>
<name>Denys Dmytriyenko</name>
<email>denys@konsulko.com</email>
</author>
<published>2022-02-22T04:13:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=20f3191aeb592dd889eeaf96a31526297de95306'/>
<id>urn:sha1:20f3191aeb592dd889eeaf96a31526297de95306</id>
<content type='text'>
Extra sub-layers will be created next and relevant content moved across them.

Signed-off-by: Denys Dmytriyenko &lt;denys@konsulko.com&gt;
Signed-off-by: Ryan Eatmon &lt;reatmon@ti.com&gt;
</content>
</entry>
<entry>
<title>conf, recipes-bsp: support building for K3 R5F cores via multiconfig</title>
<updated>2020-05-05T05:22:25+00:00</updated>
<author>
<name>Denys Dmytriyenko</name>
<email>denys@ti.com</email>
</author>
<published>2020-05-05T02:41:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=f814840465358a6b5429ad20165742ac6e6e6a29'/>
<id>urn:sha1:f814840465358a6b5429ad20165742ac6e6e6a29</id>
<content type='text'>
K3 Multicore SoC architecture defines different functional domains, each
containing specific processing cores and peripherals. Early boot is normally
handled by running bootloader and loading SYSFW on MCU Cortex-R5F core:
https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tree/board/ti/am65x/README
https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tree/board/ti/j721e/README

This change adds support for building bootloader and SYSFW ITB image for
K3 Cortex-R5F cores via multiconfig.

Signed-off-by: Denys Dmytriyenko &lt;denys@ti.com&gt;
</content>
</entry>
</feed>
