<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/meta-ti.git, branch 11.01.13</title>
<subtitle>Mirror of git.yoctoproject.org/meta-ti.git</subtitle>
<id>https://git.enea.com/cgit/linux/meta-ti.git/atom?h=11.01.13</id>
<link rel='self' href='https://git.enea.com/cgit/linux/meta-ti.git/atom?h=11.01.13'/>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/'/>
<updated>2025-09-11T16:48:40+00:00</updated>
<entry>
<title>CI/CD Auto-Merger: cicd.scarthgap.202509111148</title>
<updated>2025-09-11T16:48:40+00:00</updated>
<author>
<name>LCPD Automation Script</name>
<email>lcpdbld@list.ti.com</email>
</author>
<published>2025-09-11T16:48:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=0e2876e2ea7c28ddff5bc0052bdbc83dd07b7c98'/>
<id>urn:sha1:0e2876e2ea7c28ddff5bc0052bdbc83dd07b7c98</id>
<content type='text'>
Updated the value(s) for:
  ti-linux-fw: TI_LINUX_FW_SRCREV
  atf: SRCREV_tfa:am62lxx
  u-boot-ti-staging_2025.01: SRCREV
  k3conf: SRCREV
  linux-ti-staging-rt_6.12: SRCREV_ARM32
  linux-ti-staging_6.12: SRCREV

Changelogs:
  ti-linux-fw: https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/log/?qt=range&amp;q=fb492164151831b90e961dd37fccc57a8fdc1257..bb242f4eee42835066d83345e4d64bc02307f855
  u-boot-ti-staging_2025.01: https://git.ti.com/cgit/ti-u-boot/ti-u-boot/log/?qt=range&amp;q=252b02299cf637f96be9c735a86ed5aad328e00c..3c06cd621447331aeab0bbb2e5c063a2b1d79d1b
  k3conf: https://git.ti.com/cgit/k3conf/k3conf/log/?qt=range&amp;q=3de294db4f2cd75404f358768f4be8f8fa3132d7..6dd352f234ef19c5cb92c924101e1eab29d2939a
  linux-ti-staging-rt_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=c0845caeb62fc6ea82d85a65f52efcfebb9b2c75..4235794ce373baf55d9ff5cf920b1d44b7e31455
  linux-ti-staging_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=26482216a39c9653ea319cd1d6e609b8d1f0fc12..af3896fca24b7945db015d2ac411ef50e93a11c9

Signed-off-by: LCPD Automation Script &lt;lcpdbld@list.ti.com&gt;
</content>
</entry>
<entry>
<title>CI/CD Auto-Merger: cicd.scarthgap.202508281316</title>
<updated>2025-08-28T18:16:26+00:00</updated>
<author>
<name>LCPD Automation Script</name>
<email>lcpdbld@list.ti.com</email>
</author>
<published>2025-08-28T18:16:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=11a60314cf00695f0131b6d955667d502a93165a'/>
<id>urn:sha1:11a60314cf00695f0131b6d955667d502a93165a</id>
<content type='text'>
Updated the value(s) for:
  ti-linux-fw: TI_LINUX_FW_SRCREV
  u-boot-ti-staging_2025.01: SRCREV
  k3conf: SRCREV
  linux-ti-staging-rt_6.12: SRCREV_ARM32
  linux-ti-staging_6.12: SRCREV

Changelogs:
  ti-linux-fw: https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/log/?qt=range&amp;q=33b0116556a8a57e8e456a99e45e8736db7652f3..fb492164151831b90e961dd37fccc57a8fdc1257
  u-boot-ti-staging_2025.01: https://git.ti.com/cgit/ti-u-boot/ti-u-boot/log/?qt=range&amp;q=f3f8c664b3001e40cbdf46687732b2c37e1b6b33..252b02299cf637f96be9c735a86ed5aad328e00c
  k3conf: https://git.ti.com/cgit/k3conf/k3conf/log/?qt=range&amp;q=4e8df1a41a1437b61562836e9478e8069d1a071c..3de294db4f2cd75404f358768f4be8f8fa3132d7
  linux-ti-staging-rt_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=9085e19579dfb5074d05000dcca3b9b7d8afb106..c0845caeb62fc6ea82d85a65f52efcfebb9b2c75
  linux-ti-staging_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=10c7960f9cf6c5e3ed0c8865596e07540bf9ba1b..26482216a39c9653ea319cd1d6e609b8d1f0fc12

Signed-off-by: LCPD Automation Script &lt;lcpdbld@list.ti.com&gt;
</content>
</entry>
<entry>
<title>conf: machine: Include merged device trees in the list of generated dtbs</title>
<updated>2025-08-27T00:02:09+00:00</updated>
<author>
<name>Telukula Jeevan Kumar Sahu</name>
<email>j-sahu@ti.com</email>
</author>
<published>2025-08-25T06:34:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=a0a480a189a1e2d7818abeeb2bfcec2fd442d878'/>
<id>urn:sha1:a0a480a189a1e2d7818abeeb2bfcec2fd442d878</id>
<content type='text'>
Add support for dtbs that are generated by merging multiple .dtb and .dtbo
files in the /boot directory of the root filesystem.These merged device trees
are defined in ti-linux-kernel Makefile[1]. Include them using the
KERNEL_DEVICETREE_DTBMERGE variable.

[1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/Makefile?h=ti-linux-6.12.y

Signed-off-by: Telukula Jeevan Kumar Sahu &lt;j-sahu@ti.com&gt;
Signed-off-by: Ryan Eatmon &lt;reatmon@ti.com&gt;
</content>
</entry>
<entry>
<title>meta-ti-bsp: conf: drop BL32_BASE override for am62lxx-evm</title>
<updated>2025-08-25T20:02:51+00:00</updated>
<author>
<name>Bryan Brattlof</name>
<email>bb@ti.com</email>
</author>
<published>2025-08-22T14:32:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=eb8b398f6571511336cb8644c547a28d3941ebfa'/>
<id>urn:sha1:eb8b398f6571511336cb8644c547a28d3941ebfa</id>
<content type='text'>
The BL32_BASE address is properly set in TF-A to jump to OP-TEE's
entrypoint for the am62lxx SoC family, so we can safily drop this.

Signed-off-by: Bryan Brattlof &lt;bb@ti.com&gt;
Signed-off-by: Ryan Eatmon &lt;reatmon@ti.com&gt;
</content>
</entry>
<entry>
<title>ti-bsp: recipes-multimedia: Add udev rules for VPU and JPEG encoder symlinks</title>
<updated>2025-08-25T13:40:53+00:00</updated>
<author>
<name>Thorsten Lannynd</name>
<email>t-lannynd@ti.com</email>
</author>
<published>2025-08-21T15:41:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=813a58e1caf6119e763d1924ff7ff1f910f17357'/>
<id>urn:sha1:813a58e1caf6119e763d1924ff7ff1f910f17357</id>
<content type='text'>
This patch introduces udev rules to ensure consistent device naming for
VPU decoders, encoders, and the JPEG encoder. These rules are essential
for enabling hardware-accelerated video decoding in Chromium using the
V4L2 Stateful decoder.

The following udev rules are added:
- Map vpu and vpu0 to /dev/video-dec0 and /dev/video-enc0.
- Map vpu1 to /dev/video-dec1 and /dev/video-enc1.
- Map the JPEG encoder to /dev/jpeg-enc0.

These changes ensure proper operation of the VPU and JPEG encoder,
especially when other video devices are connected, avoiding mismatches.

Signed-off-by: Thorsten Lannynd &lt;t-lannynd@ti.com&gt;
Signed-off-by: Ryan Eatmon &lt;reatmon@ti.com&gt;
</content>
</entry>
<entry>
<title>CI/CD Auto-Merger: cicd.scarthgap.202508220021</title>
<updated>2025-08-22T05:21:13+00:00</updated>
<author>
<name>LCPD Automation Script</name>
<email>lcpdbld@list.ti.com</email>
</author>
<published>2025-08-22T05:21:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=2e648fa3fdf859e4376d20a3cbed4f4545c9f937'/>
<id>urn:sha1:2e648fa3fdf859e4376d20a3cbed4f4545c9f937</id>
<content type='text'>
Updated the value(s) for:
  u-boot-ti-staging_2025.01: SRCREV
  linux-ti-staging-rt_6.12: PV_ARM32,SRCREV_ARM32
  linux-ti-staging_6.12: PV,SRCREV

Changelogs:
  u-boot-ti-staging_2025.01: https://git.ti.com/cgit/ti-u-boot/ti-u-boot/log/?qt=range&amp;q=935b381a868777ce757ae732543b219b7ffba226..f3f8c664b3001e40cbdf46687732b2c37e1b6b33
  linux-ti-staging-rt_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=95eefa7f7f59e2fe2929d2edbc0e21793b9d79c6..9085e19579dfb5074d05000dcca3b9b7d8afb106
  linux-ti-staging_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=47b05100094a1b6ba8b1cba913a17ed73a47f581..10c7960f9cf6c5e3ed0c8865596e07540bf9ba1b

Signed-off-by: LCPD Automation Script &lt;lcpdbld@list.ti.com&gt;
</content>
</entry>
<entry>
<title>ti-ipc-examples-linux: Add missing SUMMARY</title>
<updated>2025-08-22T00:48:45+00:00</updated>
<author>
<name>Ryan Eatmon</name>
<email>reatmon@ti.com</email>
</author>
<published>2025-08-21T16:52:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=fbd924cfb1bcf051003eab9c7b0ebade3b6a2014'/>
<id>urn:sha1:fbd924cfb1bcf051003eab9c7b0ebade3b6a2014</id>
<content type='text'>
The PRC script missed this.  All recipes need a SUMMARY.

Signed-off-by: Ryan Eatmon &lt;reatmon@ti.com&gt;
</content>
</entry>
<entry>
<title>CI/CD Auto-Merger: cicd.scarthgap.202508211416</title>
<updated>2025-08-21T19:16:37+00:00</updated>
<author>
<name>LCPD Automation Script</name>
<email>lcpdbld@list.ti.com</email>
</author>
<published>2025-08-21T19:16:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=fec8c905258c33129f8f9da5499e289ff95207d3'/>
<id>urn:sha1:fec8c905258c33129f8f9da5499e289ff95207d3</id>
<content type='text'>
Updated the value(s) for:
  ti-linux-fw: TI_LINUX_FW_SRCREV
  atf: SRCREV_tfa:am62lxx
  u-boot-ti-staging_2025.01: SRCREV
  linux-ti-staging-rt_6.12: SRCREV_ARM32
  linux-ti-staging_6.12: SRCREV

Changelogs:
  ti-linux-fw: https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/log/?qt=range&amp;q=6506f9e1e5d8d62e9dd70123fae04bd07b90bcd5..33b0116556a8a57e8e456a99e45e8736db7652f3
  u-boot-ti-staging_2025.01: https://git.ti.com/cgit/ti-u-boot/ti-u-boot/log/?qt=range&amp;q=556593b8d5f39ad77327d2e7aa190d3faae5a350..935b381a868777ce757ae732543b219b7ffba226
  linux-ti-staging-rt_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=6246158ffbe4dfc005258a52780956f8baf04574..95eefa7f7f59e2fe2929d2edbc0e21793b9d79c6
  linux-ti-staging_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=fe4718a972cfcac11933e98f5a3986e084a7c43f..47b05100094a1b6ba8b1cba913a17ed73a47f581

Signed-off-by: LCPD Automation Script &lt;lcpdbld@list.ti.com&gt;
</content>
</entry>
<entry>
<title>CI/CD Auto-Merger: cicd.scarthgap.202508201111</title>
<updated>2025-08-20T16:11:41+00:00</updated>
<author>
<name>LCPD Automation Script</name>
<email>lcpdbld@list.ti.com</email>
</author>
<published>2025-08-20T16:11:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=76f78bab9b6cd7d28bf28411783acfce0d746aca'/>
<id>urn:sha1:76f78bab9b6cd7d28bf28411783acfce0d746aca</id>
<content type='text'>
Updated the value(s) for:
  ti-linux-fw: TI_LINUX_FW_SRCREV
  atf: SRCREV_tfa:am62lxx
  u-boot-ti-staging_2025.01: SRCREV
  linux-ti-staging-rt_6.12: PV_ARM32,SRCREV_ARM32
  linux-ti-staging_6.12: PV,SRCREV

Changelogs:
  ti-linux-fw: https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/log/?qt=range&amp;q=e89a348f4618a26812fb353a04ed9532ef890a2f..6506f9e1e5d8d62e9dd70123fae04bd07b90bcd5
  u-boot-ti-staging_2025.01: https://git.ti.com/cgit/ti-u-boot/ti-u-boot/log/?qt=range&amp;q=c5737097b4859362aa22260c5a1f2becd62af65c..556593b8d5f39ad77327d2e7aa190d3faae5a350
  linux-ti-staging-rt_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=90225824e8382c00e9628168922838a0702443eb..6246158ffbe4dfc005258a52780956f8baf04574
  linux-ti-staging_6.12: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/log/?qt=range&amp;q=adbec2562ad14236717dc1c9dc3020c94ba27f7d..fe4718a972cfcac11933e98f5a3986e084a7c43f

Signed-off-by: LCPD Automation Script &lt;lcpdbld@list.ti.com&gt;
</content>
</entry>
<entry>
<title>conf: machine: add optee-os into am62lxx-evm builds</title>
<updated>2025-08-19T21:00:22+00:00</updated>
<author>
<name>Bryan Brattlof</name>
<email>bb@ti.com</email>
</author>
<published>2025-08-19T20:55:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-ti.git/commit/?id=0a02cd559a07af33a8111a1f5777b14862a52227'/>
<id>urn:sha1:0a02cd559a07af33a8111a1f5777b14862a52227</id>
<content type='text'>
Newer silicon revision of the AM62L family are capable of reliably
booting with OP-TEE integrated in the bootflow with all bootmedia.
However to support as many DDR densities as possible we cannot use the
default 0x9e78000 location as with other K3 devices.

So add OP-TEE back into the default build but modify the BL32 base
address for TF-A so it will jump to the correct location.

Signed-off-by: Bryan Brattlof &lt;bb@ti.com&gt;
Signed-off-by: Ryan Eatmon &lt;reatmon@ti.com&gt;
</content>
</entry>
</feed>
