2011-01-19  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	Backport from FSF mainline

	2011-01-18  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

        * config/arm/cortex-a9.md (cortex-a9-neon.md): Actually
        include.
        (cortex_a9_dp): Handle neon types correctly.

=== modified file 'gcc/config/arm/cortex-a9.md'
Index: gcc-4_5-branch/gcc/config/arm/cortex-a9.md
===================================================================
--- gcc-4_5-branch.orig/gcc/config/arm/cortex-a9.md
+++ gcc-4_5-branch/gcc/config/arm/cortex-a9.md
@@ -79,10 +79,11 @@ cortex_a9_p1_e2 + cortex_a9_p0_e1 + cort
 ;; which can go down E2 without any problem.
 (define_insn_reservation "cortex_a9_dp" 2
   (and (eq_attr "tune" "cortexa9")
-       (ior (eq_attr "type" "alu")
-	    (ior (and (eq_attr "type" "alu_shift_reg, alu_shift")
-		 (eq_attr "insn" "mov"))
-		 (eq_attr "neon_type" "none"))))
+         (ior (and (eq_attr "type" "alu")
+                        (eq_attr "neon_type" "none"))
+	      (and (and (eq_attr "type" "alu_shift_reg, alu_shift")
+			(eq_attr "insn" "mov"))
+                 (eq_attr "neon_type" "none"))))
   "cortex_a9_p0_default|cortex_a9_p1_default")
 
 ;; An instruction using the shifter will go down E1.
@@ -263,3 +264,6 @@ cortex_a9_store3_4, cortex_a9_store1_2, 
   (and (eq_attr "tune" "cortexa9")
        (eq_attr "type" "fdivd"))
   "ca9fp_ds1 + ca9_issue_vfp_neon, nothing*24")
+
+;; Include Neon pipeline description
+(include "cortex-a9-neon.md")
