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<title>linux/meta-intel.git/meta-sys940x/conf/layer.conf, branch jethro</title>
<subtitle>[no description]</subtitle>
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<updated>2014-03-27T03:41:49+00:00</updated>
<entry>
<title>Remove chiefriver, sys940x &amp; n450 BSPs</title>
<updated>2014-03-27T03:41:49+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-03-12T19:12:32+00:00</published>
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<id>urn:sha1:8d79fb4e0cec07fe05ca440578414eaa6be80a3a</id>
<content type='text'>
Configuration for the chiefriver, sys940x, sys940x-noemgd, n450 BSPs are
deleted. The consolidated BSPs viz intel-corei7-64 and intel-core2-32
support these boards.

As part of the usual retirement process, a heads-up email was sent to the
meta-intel mailing list requesting any feedback regarding retirement of
these BSPs. The community did not had any concerning feedback to
reconsider the retirement decision.

The MAINTAINERS file and the layer version of the meta-intel layer are
updated to reflect removal of the BSPs.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
CC: Darren Hart &lt;dvhart@linux.intel.com&gt;
Reviewed-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>layer.conf: Use .= for adding to BBPATH and += to BBFILES</title>
<updated>2013-01-07T17:59:05+00:00</updated>
<author>
<name>Khem Raj</name>
<email>raj.khem@gmail.com</email>
</author>
<published>2013-01-04T03:50:30+00:00</published>
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<id>urn:sha1:227d8fa72c2ffbccee4c21ffb32841129a550729</id>
<content type='text'>
Fixes parsing errors which is appearing after this commit to
meta-openembedded

http://cgit.openembedded.org/meta-openembedded/commit/?id=3c21a46020bd0816579648f684c41dbd6333583e

This triggers
exception NameError: name 'base_contains' is not defined
without this change

Avoid the immediate expansion operator (:=) which caused base_contains
added in the previous commit to fail to expand at the time the
meta-intel layer configs are parsed and replace it with one of the
append operators (.= or +=) that allows for delayed variable expansion.

Signed-off-by: Khem Raj &lt;raj.khem@gmail.com&gt;
Acked-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel: add LAYERDEPENDS for layers needing the meta-intel common layer</title>
<updated>2012-02-24T20:52:01+00:00</updated>
<author>
<name>Paul Eggleton</name>
<email>paul.eggleton@linux.intel.com</email>
</author>
<published>2012-02-24T09:23:56+00:00</published>
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<id>urn:sha1:df18b721f86f0737c0f302e49b27ea232c70e683</id>
<content type='text'>
These layers all contain machine configuration that depends on having
the meta-intel common layer enabled as well, so use LAYERDEPENDS in the
layer configuration for each one to make this explicit.

Signed-off-by: Paul Eggleton &lt;paul.eggleton@linux.intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel: Add Inforce SYS940x BSP</title>
<updated>2012-02-03T17:25:17+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2012-01-23T23:46:07+00:00</published>
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<id>urn:sha1:6aad7407464ec9cc807916b71068fdae323bfcd1</id>
<content type='text'>
The Inforce SYS940x-ECX Developer-Ready Reference Platform features:
o Intel Atom E6xx (0.6-1.6 GHz)
o Up to 1GB on-board DDR2
o Intel Platform Controller Hub EG20T
o VGA,LVDS
o HD Audio
o SD Card
o Dual SATA
o Mini-PCIe

http://www.inforcecomputing.com/SYS940X_ECX.html

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
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