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<title>linux/meta-intel.git/meta-sugarbay/conf, branch master</title>
<subtitle>[no description]</subtitle>
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<updated>2015-08-28T21:25:29+00:00</updated>
<entry>
<title>Remove older platform specific BSPs</title>
<updated>2015-08-28T21:25:29+00:00</updated>
<author>
<name>Saul Wold</name>
<email>sgw@linux.intel.com</email>
</author>
<published>2015-08-25T23:39:01+00:00</published>
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<id>urn:sha1:4172351baa285b83eb54d54368fe2f037c48159b</id>
<content type='text'>
The intel-core* BSPs supercede these older BSPs therefore it's time
to remove these older platform specific bsps.

Bump LAYERVERSION to 3 to allow the Autobuilder to know that these
BSPs have been removed.

Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-sugarbay: use gstreamer-vaapi-1.0 directly instead of gst-va-intel</title>
<updated>2015-02-27T18:11:59+00:00</updated>
<author>
<name>Ross Burton</name>
<email>ross.burton@intel.com</email>
</author>
<published>2015-02-27T18:00:38+00:00</published>
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<id>urn:sha1:af466bd94db3da0580f6b99d994fbb2635d4b970</id>
<content type='text'>
No need for a layer of indirection when that layer only has one option.
Previously with EMGD there was a choice, but not anymore.

Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Prefer linux-yocto 3.19 for all Intel common architecture BSPs</title>
<updated>2015-02-20T21:32:33+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2015-02-20T21:18:09+00:00</published>
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<id>urn:sha1:21dd5b97465e70b56c20710db32edb6042fc412b</id>
<content type='text'>
Update all the BSPs using the Intel common architecture that preferred
3.17 to prefer 3.19, now built by the intel-core* common BSPs.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>sugarbay: Add intel-ucode to MACHINE_FEATURES</title>
<updated>2014-10-21T19:41:01+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-10-02T18:04:44+00:00</published>
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<id>urn:sha1:5ef9be96e7d37c5a6fd0db76b3630706ef186a41</id>
<content type='text'>
Enable the Intel microcode feature for this BSP.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Acked-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-sugarbay: Add wifi machine feature to sugarbay.conf</title>
<updated>2014-10-02T03:55:56+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-10-01T02:09:13+00:00</published>
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<id>urn:sha1:8e5fe6c0f5cf710e1a46c5f203e52f069874768a</id>
<content type='text'>
The Huron River platform targeted by this BSP has wifi capability.
The common kernel used by the BSP has already enabled wifi drivers.

Enable the user space wifi tools, which give functional wifi
networking to the Huron River platform.

Fixes Bug:
[YOCTO #6342]

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-sugarbay: Use the v3.17 kernel by default</title>
<updated>2014-09-30T15:02:29+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-09-23T18:14:14+00:00</published>
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<id>urn:sha1:9f815ab761e6b524625e4180397233eeb728f84e</id>
<content type='text'>
The linux-yocto_3.17 recipe is available for this BSP.  Make it the
default kernel for this BSP.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel BSPs: include meta-intel.inc</title>
<updated>2014-09-04T13:44:26+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-06-18T19:00:59+00:00</published>
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<id>urn:sha1:a32802715354303eb06503039518555f7aa21535</id>
<content type='text'>
To get common intel BSP configurations such as user land microcode loading
support, each Intel BSP configuration needs to include the meta-intel.inc
file. With the exception of few, many of the meta-intel BSP configuration
files already include the meta-intel.inc file. With this commit now, all
the remaining BSPs from the meta-intel layer also include the meta-intel.inc
file.

  The Intel platforms BSPs hosted outside of the meta-intel layer, such as
minnow, need to include the meta-intel.inc file to get the common features
from the meta-intel layer.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Reviewed-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>sugarbay: change the default kernel to v3.14</title>
<updated>2014-04-04T13:59:43+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-04-02T00:40:15+00:00</published>
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<id>urn:sha1:2839beb8ddfcf24163c7e01d842f289acdf07fee</id>
<content type='text'>
Use the latest linux-yocto kernel for the sugarbay BSP.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
</content>
</entry>
<entry>
<title>Use intel-common-pkgarch for non-emgd BSPs</title>
<updated>2014-03-12T21:51:00+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2014-03-12T17:30:54+00:00</published>
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<id>urn:sha1:50fa9bb12cb3b5e8b36041caaf5517f3eea8fde0</id>
<content type='text'>
Enable the intel-common pkgarch and machine override mechanism for most
non-emgd BSPs. The Queensbay platforms show issues on the 3.10 kernel,
and the NUC is experiencing some boot issues with the common kernel, so
skip those for now.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>sugarbay: Use the corei7 tune</title>
<updated>2014-01-28T00:56:14+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2014-01-22T05:18:44+00:00</published>
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<id>urn:sha1:9ca21ad7239c3e04ef36a9949b86275f25806a96</id>
<content type='text'>
Sandy Bridge based CPUs benefit from the new corei7 tune file.
Update the XSERVER_* variables to use the new naming.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Cc: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
</content>
</entry>
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