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<title>linux/meta-intel.git/meta-n450/conf/machine, branch jethro</title>
<subtitle>[no description]</subtitle>
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<updated>2014-03-27T03:41:49+00:00</updated>
<entry>
<title>Remove chiefriver, sys940x &amp; n450 BSPs</title>
<updated>2014-03-27T03:41:49+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-03-12T19:12:32+00:00</published>
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<id>urn:sha1:8d79fb4e0cec07fe05ca440578414eaa6be80a3a</id>
<content type='text'>
Configuration for the chiefriver, sys940x, sys940x-noemgd, n450 BSPs are
deleted. The consolidated BSPs viz intel-corei7-64 and intel-core2-32
support these boards.

As part of the usual retirement process, a heads-up email was sent to the
meta-intel mailing list requesting any feedback regarding retirement of
these BSPs. The community did not had any concerning feedback to
reconsider the retirement decision.

The MAINTAINERS file and the layer version of the meta-intel layer are
updated to reflect removal of the BSPs.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
CC: Darren Hart &lt;dvhart@linux.intel.com&gt;
Reviewed-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Use intel-common-pkgarch for non-emgd BSPs</title>
<updated>2014-03-12T21:51:00+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2014-03-12T17:30:54+00:00</published>
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<id>urn:sha1:50fa9bb12cb3b5e8b36041caaf5517f3eea8fde0</id>
<content type='text'>
Enable the intel-common pkgarch and machine override mechanism for most
non-emgd BSPs. The Queensbay platforms show issues on the 3.10 kernel,
and the NUC is experiencing some boot issues with the common kernel, so
skip those for now.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>n450: Use core2-32 tuning</title>
<updated>2014-01-28T00:56:13+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2014-01-22T05:01:23+00:00</published>
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<id>urn:sha1:420ce9fc4db964ca642b6ed804ee620a3f76d926</id>
<content type='text'>
The E4xx (Pine View) Atom CPUs are supported by the core2 tune file.
Update the XSERVER_* variables to use the new naming.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>n450: Update to linux-yocto_3.8 (3.8.4)</title>
<updated>2013-04-03T00:02:02+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2013-04-02T23:54:27+00:00</published>
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<id>urn:sha1:87958c5ef40166b6c71cc8c14fb0cfd3601c8dd7</id>
<content type='text'>
Update n450 to use the latest available linux-yoct recipe, 3.8.4.
Build and boot tested.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>n450: Add WEBTITLE and boilerplate README</title>
<updated>2012-10-31T15:40:15+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2012-10-29T18:48:06+00:00</published>
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<id>urn:sha1:43b2e9c34363ade4241a60f699b47179929c6fb6</id>
<content type='text'>
The WEBTITLE will be used to publish the BSP on the Yocto Project website.
Add a boilerplate README including the Yocto Project compliance
information for the 1.3 release.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>n450: Update to linux-yocto 3.2</title>
<updated>2012-05-07T19:39:19+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2012-05-01T00:12:49+00:00</published>
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<id>urn:sha1:d719c0acf0a7fe010f23be11cd19676186bea784</id>
<content type='text'>
Update the PREFERRED_VERSION to 3.2.
Drop cfg/smp.scc as this is now included in common-pc.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel: replace "include" with "require"</title>
<updated>2012-02-24T20:51:38+00:00</updated>
<author>
<name>Paul Eggleton</name>
<email>paul.eggleton@linux.intel.com</email>
</author>
<published>2012-02-24T08:50:53+00:00</published>
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<id>urn:sha1:f89c24addde4f5d4a634a7be6a33bee91c1f1bc4</id>
<content type='text'>
We want a failure to occur if the files specified in these statements
can't be found (e.g. when there is a misconfiguration), so use require
instead of include.

Signed-off-by: Paul Eggleton &lt;paul.eggleton@linux.intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>n450-audio: drop this machine specific recipe in favour of alsa-state</title>
<updated>2012-01-17T19:35:19+00:00</updated>
<author>
<name>Joshua Lock</name>
<email>josh@linux.intel.com</email>
</author>
<published>2012-01-10T16:49:31+00:00</published>
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<id>urn:sha1:4f1ca13b5a39f27bd41c0c7d9f2b163c3f9e8718</id>
<content type='text'>
Signed-off-by: Joshua Lock &lt;josh@linux.intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>n450: drop ROOTLESS_X as it breaks X</title>
<updated>2011-12-09T20:47:03+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2011-12-09T20:47:03+00:00</published>
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<id>urn:sha1:3cb35ba444dcc9d1a477c307593dd2387cd53b18</id>
<content type='text'>
Fixes [YOCTO #1797]

Building with ROOTLESS_X results in X failing start with
the following error:

i915 0000:00:02.0: VGA-1: EDID block 0 invalid.
(EE) AIGLX error: dlopen of /usr/lib/dri/i915_dri.so failed
(/usr/lib/dri/i915_dri)
(EE) AIGLX: reverting to software rendering
(EE) AIGLX error: dlopen of /usr/lib/dri/swrast_dri.so failed
(/usr/lib/dri/swrast)
(EE) GLX: could not load software renderer

The n450 BSP is the only BSP in meta-intel using ROOTLESS_X. Dropping
it restores functionality and brings it inline with the rest of the BSPs.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Have n450.conf use the common ia32-base .inc file and remove the</title>
<updated>2011-11-21T15:30:00+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2011-11-16T04:55:01+00:00</published>
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<id>urn:sha1:6f65f6e44b48adc43c299c0d5927eadcfea748f4</id>
<content type='text'>
open-coded machine settings.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
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