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<title>linux/meta-intel.git/meta-crownbay, branch master</title>
<subtitle>[no description]</subtitle>
<id>https://git.enea.com/cgit/linux/meta-intel.git/atom?h=master</id>
<link rel='self' href='https://git.enea.com/cgit/linux/meta-intel.git/atom?h=master'/>
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<updated>2015-08-28T21:25:29+00:00</updated>
<entry>
<title>Remove older platform specific BSPs</title>
<updated>2015-08-28T21:25:29+00:00</updated>
<author>
<name>Saul Wold</name>
<email>sgw@linux.intel.com</email>
</author>
<published>2015-08-25T23:39:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=4172351baa285b83eb54d54368fe2f037c48159b'/>
<id>urn:sha1:4172351baa285b83eb54d54368fe2f037c48159b</id>
<content type='text'>
The intel-core* BSPs supercede these older BSPs therefore it's time
to remove these older platform specific bsps.

Bump LAYERVERSION to 3 to allow the Autobuilder to know that these
BSPs have been removed.

Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>MAINTAINERS: Update Maintainer to show Saul replaces Nitin</title>
<updated>2015-03-13T21:54:08+00:00</updated>
<author>
<name>Saul Wold</name>
<email>sgw@linux.intel.com</email>
</author>
<published>2015-03-02T15:43:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=e80db2307aeb055c93a22f64dbfc09cc9d2297fc'/>
<id>urn:sha1:e80db2307aeb055c93a22f64dbfc09cc9d2297fc</id>
<content type='text'>
Saul will be the point of contact for core Intel BSPs

Signed-off-by: Saul Wold &lt;sgw@linux.intel.com&gt;
Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-crownbay: remove kernel 3.10 bbappend</title>
<updated>2015-02-20T21:32:33+00:00</updated>
<author>
<name>Ross Burton</name>
<email>ross.burton@intel.com</email>
</author>
<published>2015-02-20T20:17:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=da02d5f1af99eb36ecd07133e7beb03597b3be94'/>
<id>urn:sha1:da02d5f1af99eb36ecd07133e7beb03597b3be94</id>
<content type='text'>
Kernel 3.10 has been removed from oe-core so remove our bbappend.

Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Prefer linux-yocto 3.19 for all Intel common architecture BSPs</title>
<updated>2015-02-20T21:32:33+00:00</updated>
<author>
<name>Darren Hart</name>
<email>dvhart@linux.intel.com</email>
</author>
<published>2015-02-20T21:18:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=21dd5b97465e70b56c20710db32edb6042fc412b'/>
<id>urn:sha1:21dd5b97465e70b56c20710db32edb6042fc412b</id>
<content type='text'>
Update all the BSPs using the Intel common architecture that preferred
3.17 to prefer 3.19, now built by the intel-core* common BSPs.

Signed-off-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>crownbay-noemgd: Add intel-ucode to MACHINE_FEATURES</title>
<updated>2014-10-21T19:40:20+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-09-17T20:44:55+00:00</published>
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<id>urn:sha1:fe1f149d5e919c732dc6ccdc37826f04f50fbd65</id>
<content type='text'>
Enable the Intel microcode feature for this BSP.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Acked-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-crownbay: Update linux-yocto_3.10 SRCREVs to v3.10.55</title>
<updated>2014-10-21T17:09:29+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-10-16T22:12:36+00:00</published>
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<id>urn:sha1:73e5b7f0d62865ff9a1dd8e8a178851f1c097b03</id>
<content type='text'>
Use the latest HEADs of the git branches from the linux-yocto v3.10
kernel repository.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>crownbay-noemgd: Disable the gma500_gfx module</title>
<updated>2014-10-13T15:02:07+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-10-09T21:44:42+00:00</published>
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<id>urn:sha1:911f7f8b73d7f3f4d36e35a070c524be3e4df3a1</id>
<content type='text'>
The gmx500 graphics driver does not work on this BSP, but it takes the
ownership of the graphics hardware at boot time, blocking other
drivers from using the graphics hardware.

Fix the issue by blacklisting the gma500_gfx kernel module in the kmod
configuration, so that it doesn't get loaded at boot time.

Fixes Bug:
[YOCTO #6807]

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-crownbay: Use the v3.17 kernel by default for crownbay-noemgd</title>
<updated>2014-09-30T15:01:03+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-09-23T18:10:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=2b3f72202a26ec8fae76bb1929ca3f7438873ad0'/>
<id>urn:sha1:2b3f72202a26ec8fae76bb1929ca3f7438873ad0</id>
<content type='text'>
The linux-yocto_3.17 recipe is available for this BSP.  Make it the
default kernel for this BSP.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Remove crownbay machine support</title>
<updated>2014-09-17T01:12:01+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-09-04T22:21:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=5f67993caf7eb3423c965259fedaa91e0734cdd0'/>
<id>urn:sha1:5f67993caf7eb3423c965259fedaa91e0734cdd0</id>
<content type='text'>
The crownbay machine has been retired with this commit. This does not affect
the crownbay-noemgd machine and it is supported as usual.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel BSPs: include meta-intel.inc</title>
<updated>2014-09-04T13:44:26+00:00</updated>
<author>
<name>Nitin A Kamble</name>
<email>nitin.a.kamble@intel.com</email>
</author>
<published>2014-06-18T19:00:59+00:00</published>
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<id>urn:sha1:a32802715354303eb06503039518555f7aa21535</id>
<content type='text'>
To get common intel BSP configurations such as user land microcode loading
support, each Intel BSP configuration needs to include the meta-intel.inc
file. With the exception of few, many of the meta-intel BSP configuration
files already include the meta-intel.inc file. With this commit now, all
the remaining BSPs from the meta-intel layer also include the meta-intel.inc
file.

  The Intel platforms BSPs hosted outside of the meta-intel layer, such as
minnow, need to include the meta-intel.inc file to get the common features
from the meta-intel layer.

Signed-off-by: Nitin A Kamble &lt;nitin.a.kamble@intel.com&gt;
Reviewed-by: Darren Hart &lt;dvhart@linux.intel.com&gt;
Signed-off-by: Tom Zanussi &lt;tom.zanussi@linux.intel.com&gt;
</content>
</entry>
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