<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/meta-intel.git/meta-chiefriver, branch 1.3_M5</title>
<subtitle>[no description]</subtitle>
<id>https://git.enea.com/cgit/linux/meta-intel.git/atom?h=1.3_M5</id>
<link rel='self' href='https://git.enea.com/cgit/linux/meta-intel.git/atom?h=1.3_M5'/>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/'/>
<updated>2012-09-15T20:02:17+00:00</updated>
<entry>
<title>meta-intel: make video acceleration choice dependent on LICENSE_FLAGS</title>
<updated>2012-09-15T20:02:17+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-09-14T19:07:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=2231d3800e94e39a6cc77473c6654cb221e7e55b'/>
<id>urn:sha1:2231d3800e94e39a6cc77473c6654cb221e7e55b</id>
<content type='text'>
The gst-ffmpeg recipe in oe-core had LICENSE_FLAGS added to make it
"commercial", so to avoid build errors the BSPs that use it (via the
gst-va-intel VA_FEATURE) should only include it if the user has added
"commercial" to LICENSE_FLAGS_WHITELIST when building.

This adds a conditional to detect that, along with a NOTE in the
README to explain the need for the flag.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel: remove task-core-tools-profile.bbappend</title>
<updated>2012-09-04T14:40:25+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-09-04T14:40:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=6e74be58a9b03a774ab21ac72bca9b9d56a622d4'/>
<id>urn:sha1:6e74be58a9b03a774ab21ac72bca9b9d56a622d4</id>
<content type='text'>
The functionality previously added by these bbappends was already
handled in task-core-tools-profile.bb (now
packagegroup-core-tools-profile.bb), so remove these.

SYSTEMTAP = "systemtap"
SYSTEMTAP_mips = ""

LTTNGUST = "lttng-ust"
LTTNGUST_mips = ""

RDEPENDS_${PN} = "\
    ${PROFILETOOLS} \
    ${LTTNGUST} \
    ${SYSTEMTAP} \
    ${VALGRIND} \

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel: use va-impl-intel MACHINE_FEATURE</title>
<updated>2012-08-30T21:28:19+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-07-19T19:46:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=2a7a46cad31df8c8c7559d2d55c905ac23a56b65'/>
<id>urn:sha1:2a7a46cad31df8c8c7559d2d55c905ac23a56b65</id>
<content type='text'>
Explicitly specify the va-impl-intel MACHINE_FEATURE, and update the
mixvideo uses with the feature rename.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-chiefriver: switch to linux-yocto-3.4 kernel</title>
<updated>2012-07-18T03:07:15+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-07-18T03:07:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=5d0c08cd8bb3f3ce8d23b4ae8b844bba15278049'/>
<id>urn:sha1:5d0c08cd8bb3f3ce8d23b4ae8b844bba15278049</id>
<content type='text'>
Switch chiefriver to the 3.4 kernel and update kernel SRCREVs.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>chiefriver: update kernel SRCREVs</title>
<updated>2012-07-10T20:34:04+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-07-10T20:32:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=cad140b804c0be4c049d785e7ec93811944bcf3b'/>
<id>urn:sha1:cad140b804c0be4c049d785e7ec93811944bcf3b</id>
<content type='text'>
To pick up most recent changes, including the matching kernel changes
for the perf-scripting/perf-tui features.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel: update some kernel SRCREVs</title>
<updated>2012-05-30T19:22:52+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-05-29T20:55:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=ceab55d2d68a15e76146f1a85d1dc0b108bb97c5'/>
<id>urn:sha1:ceab55d2d68a15e76146f1a85d1dc0b108bb97c5</id>
<content type='text'>
Update linux-yocto_3.2 kernel SRCREVS for crownbay, emenlow,
fishriver, jasperforest, sugarbay, and chiefriver.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-chiefriver: use the mei kernel feature</title>
<updated>2012-05-30T19:22:51+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-05-09T16:11:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=d5ebd785cbc37fd164d38a9f7eae1e8698dc080e'/>
<id>urn:sha1:d5ebd785cbc37fd164d38a9f7eae1e8698dc080e</id>
<content type='text'>
Add AMT/mei support as a kernel feature here instead of in the
linux-yocto metadata - mei support is currently a feature in staging,
and not everyone might want a tainted kernel.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-chiefriver: use lms</title>
<updated>2012-05-30T19:22:51+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-05-03T14:45:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=ea62a88d0e226953c29e9e46c0da19aa369e4e62'/>
<id>urn:sha1:ea62a88d0e226953c29e9e46c0da19aa369e4e62</id>
<content type='text'>
Chiefriver needs lms support for AMT, add it.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-chiefriver: use gst-va-intel and va-intel</title>
<updated>2012-05-30T19:22:51+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-05-19T02:04:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=020de1e5bbee5624f79156ed181aec3f492840e4'/>
<id>urn:sha1:020de1e5bbee5624f79156ed181aec3f492840e4</id>
<content type='text'>
Have chiefriver use gst-va-intel and va-intel so we can easily test
and make use of the video acceleration capabilities of this machine.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-chiefriver: new layer for Chief River (Ivy Bridge/Panther Point) systems</title>
<updated>2012-05-30T19:22:51+00:00</updated>
<author>
<name>Tom Zanussi</name>
<email>tom.zanussi@intel.com</email>
</author>
<published>2012-05-18T03:17:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=37dee2e3ea78746be32057074ead9f9de5124670'/>
<id>urn:sha1:37dee2e3ea78746be32057074ead9f9de5124670</id>
<content type='text'>
This layer provides support for Ivy Bridge + Panther Point Intel systems.

Signed-off-by: Tom Zanussi &lt;tom.zanussi@intel.com&gt;
</content>
</entry>
</feed>
