<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/meta-intel.git/conf/machine/include, branch 2.8_M3</title>
<subtitle>[no description]</subtitle>
<id>https://git.enea.com/cgit/linux/meta-intel.git/atom?h=2.8_M3</id>
<link rel='self' href='https://git.enea.com/cgit/linux/meta-intel.git/atom?h=2.8_M3'/>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/'/>
<updated>2019-09-11T10:36:13+00:00</updated>
<entry>
<title>meta-intel.inc: Remove LSB support config</title>
<updated>2019-09-11T10:36:13+00:00</updated>
<author>
<name>Naveen Saini</name>
<email>naveen.kumar.saini@intel.com</email>
</author>
<published>2019-09-11T06:03:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=42eb1f0d3a1993699da21b45095b46ba3f8ee7a8'/>
<id>urn:sha1:42eb1f0d3a1993699da21b45095b46ba3f8ee7a8</id>
<content type='text'>
LSB support has been removed from OE-core:

https://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?id=bac4bc9aa6a1f2fcf2ce9644925615185cc8e847
https://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?id=66dba027289d7dd20df4bae9ae4307ae3a225216

Signed-off-by: Naveen Saini &lt;naveen.kumar.saini@intel.com&gt;
Signed-off-by: Anuj Mittal &lt;anuj.mittal@intel.com&gt;
</content>
</entry>
<entry>
<title>tune-skylake.inc: Improve handling the newly introduced skylake tune.</title>
<updated>2019-08-29T03:34:35+00:00</updated>
<author>
<name>Alejandro Enedino Hernandez Samaniego</name>
<email>aehs29@gmail.com</email>
</author>
<published>2019-08-27T17:34:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=0bc64c2ad39fbf2bcd4673c817f5f52a5b9be4be'/>
<id>urn:sha1:0bc64c2ad39fbf2bcd4673c817f5f52a5b9be4be</id>
<content type='text'>
The skylake tune introduced on 04510bfa

Currently disables qemu-usermode by default, due to the lack
of support from QEMU to several of the Intel instruction set
extensions introduced within the few latest generations of
CPU architectures (e.g. QEMU does not support avx2)

While there is a good reason to perform the removal of qemu-usermode
from MACHINE_FEATURES, there are several components within the
build system that rely on it for proper compilation and behavior,
for example anything that uses gobject data introspection or even
the components like the chromium web browser require to run a QEMU
for the target architecture to build successfully.

There is no reason why we can't have those components built without
sacrificing the cpu (most) optimizations.

The process I followed on meta-chromebook to enable an optimized build
and whats being upstreamed by this patch is that by doing some
reverse engineering, I was able to figure out which instruction
set extensions are not compatible with QEMU Skylake-Client, by
performing a bit gcc magic from inside QEMU (target) to get the
available optimizations for the native architecture (which is
actually our target in this case).

These are all (not surprisingly) the avx2 extensions, listed as
follows:
-mno-avx
-mno-avx2
-mno-avx512f
-mno-avx512er
-mno-avx512cd
-mno-avx512pf
-mno-avx512dq
-mno-avx512bw
-mno-avx512vl
-mno-avx512ifma
-mno-avx512vbmi
-mno-avx512vbmi2
-mno-avx512vnni
-mno-avx512bitalg

Specifically disabling these manually (for now), allows us to build an
optimized system for the skylake/skylake based architectures (e.g. KabyLake)
while keeping the capability of using qemu-usermode, as a side note GCC
does show more unavailable optimization tunes, (hence why there might be
some warnings), but getting rid of these specifically seems enough to make
it run happily in qemu-usermode.

Basically the MACHINE_FEATURES variable is able to dictate how we will tune
the build for our device, if qemu-usermode is present, TUNE_CCARGS will
expand as follows:

TUNE_CCARGS=" -m64 -march=skylake  -mtune=skylake  -mno-avx -mno-avx2
-mno-avx512f -mno-avx512er -mno-avx512cd -mno-avx512pf -mno-avx512dq
-mno-avx512bw -mno-avx512vl -mno-avx512ifma -mno-avx512vbmi -mno-avx512vbmi2
-mno-avx512vnni -mno-avx512bitalg  -mfpmath=sse"

Whats this means is that the build will be tuned for skylake architectures,
enabling all possible extensions, (MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, POPCNT, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI, BMI2, F16C, RDSEED,
ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC and XSAVES) minus the ones QEMU is unable
to run, which will result in an illegal instruction error, notice the tune is
kept as skylake.

Whilst, if qemu-usermode is not found on MACHINE_FEATURES, TUNE_CCARGS will
expand to:
TUNE_CCARGS=" -m64 -march=skylake -mtune=generic -mavx2 -mfpmath=sse"

Which is exactly what its set to with the current tune, so this patch should
be harmless, and only extend current functionality, we will still keep
qemu-usermode disabled by default (hence enabling avx2) but the user would
have the capability to decide how the skylake tune will be handled.

As the GCC manual states, we should really try to avoid using mtune=generic
when possible, and this patch allows us to do so [1].

This patch also addresses a problem on which the current skylake tune includes
tune-core2.inc instead of tune-corei7.inc to get the list of AVAILTUNES
and PACKAGE_EXTRA_ARCHS.

Right now, AVAILTUNES are set as follows:
AVAILTUNES=" x86 x86-64 x86-64-x32 i586 i686 core2-32 core2-64 core2-64-x32
skylake-64"

Where the proper set should be (after this patch):
AVAILTUNES=" x86 x86-64 x86-64-x32 i586 i686 core2-32 core2-64 core2-64-x32
corei7-32 corei7-64 corei7-64-x32 skylake-64"

When (if), QEMU gains support for the AVX2 instruction set extensions these
can be easily removed to provide full support for qemu-usermode.

[1] https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/x86-Options.html

Signed-off-by: Alejandro Enedino Hernandez Samaniego &lt;aehs29@gmail.com&gt;
Signed-off-by: Anuj Mittal &lt;anuj.mittal@intel.com&gt;
</content>
</entry>
<entry>
<title>conf: add new machine intel-skylake-64</title>
<updated>2019-08-21T04:30:01+00:00</updated>
<author>
<name>Naveen Saini</name>
<email>naveen.kumar.saini@intel.com</email>
</author>
<published>2019-08-21T02:11:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=04510bfabd50bb33da8ccc5075a2c5163605d552'/>
<id>urn:sha1:04510bfabd50bb33da8ccc5075a2c5163605d552</id>
<content type='text'>
Add 64-bit new machine (intel-skylake-64) with -march=skylake
and avx2 instruction-set set up.

We do see a qemu-usermode failure at build time, on setup of
avx2 instruction-set as QEMU does not support AVX instruction
set.

Check this:
https://bugs.launchpad.net/qemu/+bug/1818075

So to bypass this issue disabling qemu-usermode for intel-skylake-64
machine.

Due to above limitation and in order to not affecting existing
machines, this new machine is being proposed to add.

A quick performance comparision between intel-corei7-64 vs intel-skylake-64 machines

Measurements are in time, taken by the benchmark tests. Less is better.

Test/Benchmark			intel-corei7-64		intel-skylake-64

(1) CppPerformanceBenchmarks (Test: Math Library)
				(1st) 5m 15.70s		4m 36.39s
				(2nd) 5m 16.37s		4m 36.51s
				(3rd) 5m 15.54s		4m 37.80s
CppPerformanceBenchmarks is a set of C++ compiler performance benchmarks.

(2) AOBench
				(1st) 0m 35.07s		0m 28.74s
				(2nd) 0m 34.90s		0m 28.72s
				(3rd) 0m 34.85s		0m 28.89s
AOBench is a lightweight ambient occlusion renderer, written in C. The
test profile is using a size of 2048 x 2048.

(3) C-Ray
				(1st) 320 seconds	232 seconds
				(2nd) 320 seconds	232 seconds
				(3rd) 321 seconds	232 seconds
C-Ray, a simple raytracer designed to test the floating-point CPU performance.

For this patch, 'bitbake world' gets successfully built with latest poky master.

Signed-off-by: Naveen Saini &lt;naveen.kumar.saini@intel.com&gt;
Signed-off-by: Anuj Mittal &lt;anuj.mittal@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel.inc: include i915 kernel module and firmware</title>
<updated>2019-08-09T15:26:35+00:00</updated>
<author>
<name>Anuj Mittal</name>
<email>anuj.mittal@intel.com</email>
</author>
<published>2019-08-08T07:21:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=64f8ef709f1ea2e04d9494fc5c82aebb1c94cafc'/>
<id>urn:sha1:64f8ef709f1ea2e04d9494fc5c82aebb1c94cafc</id>
<content type='text'>
We include the firmware as part of initramfs image that is used for
live images. Make sure that we include this module for others as well.

Also include the kernel module for all images instead of relying on
"linux-modules" using MACHINE_EXTRA_RRECOMMENDS. Use
MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS instead to pull in i915 module so it
works for all images based on packagegroup-core-boot.

Fixes [YOCTO #13446]

Signed-off-by: Anuj Mittal &lt;anuj.mittal@intel.com&gt;
</content>
</entry>
<entry>
<title>conf: use zlib-intel by default for target builds</title>
<updated>2019-05-06T04:03:20+00:00</updated>
<author>
<name>Ross Burton</name>
<email>ross.burton@intel.com</email>
</author>
<published>2019-05-03T15:48:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=8c6ee6ea60454f16873e1b5ff5a2ed070f28cf91'/>
<id>urn:sha1:8c6ee6ea60454f16873e1b5ff5a2ed070f28cf91</id>
<content type='text'>
Don't change native or nativesdk so that builds using both
meta-intel and other machines can share native sstate.

Signed-off-by: Ross Burton &lt;ross.burton@intel.com&gt;
Signed-off-by: Anuj Mittal &lt;anuj.mittal@intel.com&gt;
</content>
</entry>
<entry>
<title>conf: set -rt kernel to 4.19</title>
<updated>2019-02-12T02:23:07+00:00</updated>
<author>
<name>Anuj Mittal</name>
<email>anuj.mittal@intel.com</email>
</author>
<published>2019-02-11T05:52:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=29e4db5bf484f18e41bc9123161b1c069e60a128'/>
<id>urn:sha1:29e4db5bf484f18e41bc9123161b1c069e60a128</id>
<content type='text'>
Explicitly set the kernel to be used when building an image with
linux-intel-rt kernel.

Signed-off-by: Anuj Mittal &lt;anuj.mittal@intel.com&gt;
</content>
</entry>
<entry>
<title>conf/machine: set preferred kernel to 4.19</title>
<updated>2018-12-17T07:33:12+00:00</updated>
<author>
<name>Anuj Mittal</name>
<email>anuj.mittal@intel.com</email>
</author>
<published>2018-12-17T05:34:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=d41dc2301b475722201d422b4c56affc3bcad5ec'/>
<id>urn:sha1:d41dc2301b475722201d422b4c56affc3bcad5ec</id>
<content type='text'>
Set preferred kernel to 4.19 for LSB as well.

Signed-off-by: Anuj Mittal &lt;anuj.mittal@intel.com&gt;
</content>
</entry>
<entry>
<title>README: minor edit</title>
<updated>2018-07-27T02:34:20+00:00</updated>
<author>
<name>Anuj Mittal</name>
<email>anuj.mittal@intel.com</email>
</author>
<published>2018-07-26T10:22:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=12acdbe9d83dab15b364d9fab7b56b95a0a47925'/>
<id>urn:sha1:12acdbe9d83dab15b364d9fab7b56b95a0a47925</id>
<content type='text'>
We don't supply binaries anymore. Also, remove some obsolete comments.

Signed-off-by: Anuj Mittal &lt;anuj.mittal@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel.inc: remove unreferenced xserver code</title>
<updated>2018-03-13T23:43:12+00:00</updated>
<author>
<name>Anuj Mittal</name>
<email>anuj.mittal@intel.com</email>
</author>
<published>2018-01-31T23:51:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=2ad24ce8128129df30e8a9a9406154b487599180'/>
<id>urn:sha1:2ad24ce8128129df30e8a9a9406154b487599180</id>
<content type='text'>
OLD_XSERVER_X86_EXT was added to support emgd drivers that needed X server
older than 1.13. We neither support X server older than 1.13 nor the emgd
drivers now.

Signed-off-by: Anuj Mittal &lt;anuj.mittal@intel.com&gt;
Signed-off-by: California Sullivan &lt;california.l.sullivan@intel.com&gt;
</content>
</entry>
<entry>
<title>meta-intel.inc: use linux-intel instead of linux-yocto in -lsb</title>
<updated>2018-01-30T01:36:35+00:00</updated>
<author>
<name>California Sullivan</name>
<email>california.l.sullivan@intel.com</email>
</author>
<published>2018-01-29T22:49:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.enea.com/cgit/linux/meta-intel.git/commit/?id=14ddaa378028c4bffbf71b1374f66d0755c3e6ff'/>
<id>urn:sha1:14ddaa378028c4bffbf71b1374f66d0755c3e6ff</id>
<content type='text'>
Previously the ltsi kernel was 4.4, requiring us to use linux-yocto. It
has since moved to 4.9, allowing us to use linux-intel.

Signed-off-by: California Sullivan &lt;california.l.sullivan@intel.com&gt;
</content>
</entry>
</feed>
