[no description] https://git.enea.com/cgit/linux/meta-intel.git/atom?h=fido 2015-02-24T22:54:02+00:00 2015-02-24T22:54:02+00:00 Nitin A Kamble nitin.a.kamble@intel.com 2015-02-20T21:26:58+00:00 urn:sha1:367fd4758d23318b3adab8021d7bdc8b56e04917 This is handled in oe-core now, remove the redundant code. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Darren Hart <dvhart@linux.intel.com> 2015-02-20T21:32:33+00:00 Darren Hart dvhart@linux.intel.com 2015-02-20T21:21:28+00:00 urn:sha1:cd83c1248d9fdcacc9b171f9657216b92678c5fc LSB images prefer to build with LTSI. Update to 3.14, now that 3.10 has been removed. Signed-off-by: Darren Hart <dvhart@linux.intel.com> 2014-10-21T19:34:20+00:00 Nitin A Kamble nitin.a.kamble@intel.com 2014-09-17T16:45:24+00:00 urn:sha1:c64ade471ab70860604db2ade19ec6cfe9504f50 With this change, Intel microcode support can be enabled or disabled for any BSP by controlling the MACHINE_FEATURES variable. Any BSP from the meta-intel layer can enable Intel microcode loading support by adding the following line in the machine configuration. MACHINE_FEATURES += "intel-ucode" This change keeps the intel-microcode feature disabled by default; it can however be enabled as an "opt-in" feature via the MACHINE_FEATURES variable. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com> 2014-10-21T17:28:13+00:00 Nitin A Kamble nitin.a.kamble@intel.com 2014-10-16T22:17:02+00:00 urn:sha1:c32b5938039830875e931340492cfd7dc6f57a77 v3.10 is now the latest LTSI kernel. Use it for all the poky-lsb images, so that it gets validation in the QA cycles. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com> 2014-09-17T01:12:28+00:00 Nitin A Kamble nitin.a.kamble@intel.com 2014-09-04T22:55:06+00:00 urn:sha1:c939705c186388df1eb68341a207fb2c6ac95f66 As all the EMGD based BSPs have been retired, there is no need for the proprietary EMGD support in the meta-intel layer. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com> 2014-09-04T13:46:42+00:00 Nitin A Kamble nitin.a.kamble@intel.com 2014-06-18T01:10:54+00:00 urn:sha1:50abd223b626fc7508e24b55fc1b22c7b3a66e97 For the BSPs using the meta-intel.inc file enable the early boot-time kernel as well as the user space microcode loading support. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com> 2014-05-09T16:25:26+00:00 Ong Boon Leong boon.leong.ong@intel.com 2014-03-26T09:55:41+00:00 urn:sha1:0462a27791664f702e605dadbb279b2b61883b2c This is to enable ASPEED Technology graphic card that is bundled inside certain Intel customer reference board. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Acked-By: Nitin A Kamble <nitin.a.kamble@intel.com> 2014-01-28T00:56:13+00:00 Darren Hart dvhart@linux.intel.com 2014-01-22T04:52:00+00:00 urn:sha1:2929967d15a3078d1d4cfd71336a5447b5fd77d3 To be consistent with the renaming in oe-core, use X86 instead of IA32 in the XSERVER_X86* variables. Signed-off-by: Darren Hart <dvhart@linux.intel.com> 2012-12-03T17:33:03+00:00 Nitin A Kamble nitin.a.kamble@intel.com 2012-12-01T01:49:35+00:00 urn:sha1:b4141a6404fa7d3445d660860b6bf68acec9f114 BSPs using emgd graphics stack need to use older version of xserver. And these older xserver recipes still use modules which need to be specified in the meta-intel.inc. This is needed in addition to Ross's xorg packaging fixes in oecore. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Tom Zanussi <tom.zanussi@intel.com> 2012-11-29T23:21:16+00:00 Tom Zanussi tom.zanussi@intel.com 2012-11-29T23:21:16+00:00 urn:sha1:b7337857ca740266d2b067e8c89f82e130825a4b XAA has been dropped, so we need to drop the xaa module. Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>