From e43eb830443b70b82a67e90dd785736fac90f16d Mon Sep 17 00:00:00 2001 From: Ernest Van Hoecke Date: Fri, 8 Aug 2025 17:36:32 +0200 Subject: imx-base.inc: Update i.MX95 default Rev to B0 This is necessary to align with NXP BSP LF6.6.52-2.2.1. In imx-oei, the default DDR timings have been updated to B0, and anyone building for A0/A1 is expected to pass the argument DDR_CONFIG with the A1 timings to imx-oei. Therefore, a machine conf for A0/A1 support that also sets the desired timings is always necessary, and we have to drop A0/A1 from imx-base.inc. It is not enough to override IMX_SOC_REV to support A0/A1. Signed-off-by: Ernest Van Hoecke --- conf/machine/include/imx-base.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'conf') diff --git a/conf/machine/include/imx-base.inc b/conf/machine/include/imx-base.inc index 50566bbbc..3b717762c 100644 --- a/conf/machine/include/imx-base.inc +++ b/conf/machine/include/imx-base.inc @@ -185,6 +185,7 @@ IMX_SOC_REV:mx8ulp-generic-bsp ??= \ "${@bb.utils.contains('MACHINE_FEATURES', 'soc-reva0', 'A0', \ 'A2', d)}" IMX_SOC_REV:mx93-generic-bsp ??= "A1" +IMX_SOC_REV:mx95-generic-bsp ??= "B0" IMX_SOC_REV_LOWER = "${@d.getVar('IMX_SOC_REV').lower()}" IMX_SOC_REV_UPPER = "${@d.getVar('IMX_SOC_REV').upper()}" -- cgit v1.2.3-54-g00ecf