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authorOtavio Salvador <otavio@ossystems.com.br>2015-07-23 16:02:25 -0300
committerOtavio Salvador <otavio@ossystems.com.br>2015-07-28 23:26:59 -0300
commit6a868a671472d454b407a165fc31c5f7dfe783c6 (patch)
tree7bd2ab13a04d14215264cc992501970cacfb20ef /recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch
parent62e212fe4812a6c726df4ac8e77d4a77e0e54247 (diff)
downloadmeta-freescale-6a868a671472d454b407a165fc31c5f7dfe783c6.tar.gz
Move meta-fsl-ppc content to layer root
This commit is just a rename of all contents of meta-fsl-ppc subdirectory to this layer's root, merging the contents of common files, subsequent changes are based on top of that. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Diffstat (limited to 'recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch')
-rw-r--r--recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch1427
1 files changed, 1427 insertions, 0 deletions
diff --git a/recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch b/recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch
new file mode 100644
index 000000000..b6db2de25
--- /dev/null
+++ b/recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch
@@ -0,0 +1,1427 @@
1This patch adds PowerPC support in SoftFloat.
2
3Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
4Signed-off-by: Liu Yu <Yu.Liu@freescale.com>
5---
6 SoftFloat-2b/processors/powerpc-GCC.h | 87 ++++
7 SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile | 26 ++
8 SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h | 55 +++
9 .../bits32/powerpc-GCC/softfloat-specialize | 252 ++++++++++++
10 .../softfloat/bits32/powerpc-GCC/softfloat.h | 155 +++++++
11 SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile | 24 ++
12 SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h | 55 +++
13 .../bits64/powerpc-GCC/softfloat-specialize | 422 ++++++++++++++++++++
14 .../softfloat/bits64/powerpc-GCC/softfloat.h | 269 +++++++++++++
15 9 files changed, 1345 insertions(+), 0 deletions(-)
16 create mode 100644 SoftFloat-2b/processors/powerpc-GCC.h
17 create mode 100644 SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile
18 create mode 100644 SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h
19 create mode 100644 SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat-specialize
20 create mode 100644 SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat.h
21 create mode 100644 SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile
22 create mode 100644 SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h
23 create mode 100644 SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat-specialize
24 create mode 100644 SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat.h
25
26diff --git a/SoftFloat-2b/processors/powerpc-GCC.h b/SoftFloat-2b/processors/powerpc-GCC.h
27new file mode 100644
28index 0000000..002a786
29--- /dev/null
30+++ b/SoftFloat-2b/processors/powerpc-GCC.h
31@@ -0,0 +1,87 @@
32+/*
33+ * This file is derived from processors/386-gcc.h,
34+ * the copyright for that material belongs to the original owners.
35+ *
36+ * Additional material and changes where applicable is:
37+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
38+ *
39+ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
40+ * Yu Liu, <yu.liu@freescale.com>
41+ *
42+ * THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
43+ * been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
44+ * RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
45+ * AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
46+ * COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
47+ * EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
48+ * INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
49+ * OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
50+ */
51+
52+/*----------------------------------------------------------------------------
53+| One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined.
54+*----------------------------------------------------------------------------*/
55+#define BIGENDIAN
56+
57+/*----------------------------------------------------------------------------
58+| The macro `BITS64' can be defined to indicate that 64-bit integer types are
59+| supported by the compiler.
60+*----------------------------------------------------------------------------*/
61+#define BITS32
62+
63+/*----------------------------------------------------------------------------
64+| Each of the following `typedef's defines the most convenient type that holds
65+| integers of at least as many bits as specified. For example, `uint8' should
66+| be the most convenient type that can hold unsigned integers of as many as
67+| 8 bits. The `flag' type must be able to hold either a 0 or 1. For most
68+| implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed
69+| to the same as `int'.
70+*----------------------------------------------------------------------------*/
71+typedef int flag;
72+typedef int uint8;
73+typedef int int8;
74+typedef int uint16;
75+typedef int int16;
76+typedef unsigned int uint32;
77+typedef signed int int32;
78+#ifdef BITS64
79+typedef unsigned long long int uint64;
80+typedef signed long long int int64;
81+#endif
82+
83+/*----------------------------------------------------------------------------
84+| Each of the following `typedef's defines a type that holds integers
85+| of _exactly_ the number of bits specified. For instance, for most
86+| implementation of C, `bits16' and `sbits16' should be `typedef'ed to
87+| `unsigned short int' and `signed short int' (or `short int'), respectively.
88+*----------------------------------------------------------------------------*/
89+typedef unsigned char bits8;
90+typedef signed char sbits8;
91+typedef unsigned short int bits16;
92+typedef signed short int sbits16;
93+typedef unsigned int bits32;
94+typedef signed int sbits32;
95+#ifdef BITS64
96+typedef unsigned long long int bits64;
97+typedef signed long long int sbits64;
98+#endif
99+
100+#ifdef BITS64
101+/*----------------------------------------------------------------------------
102+| The `LIT64' macro takes as its argument a textual integer literal and
103+| if necessary ``marks'' the literal as having a 64-bit integer type.
104+| For example, the GNU C Compiler (`gcc') requires that 64-bit literals be
105+| appended with the letters `LL' standing for `long long', which is `gcc's
106+| name for the 64-bit integer type. Some compilers may allow `LIT64' to be
107+| defined as the identity macro: `#define LIT64( a ) a'.
108+*----------------------------------------------------------------------------*/
109+#define LIT64( a ) a##LL
110+#endif
111+
112+/*----------------------------------------------------------------------------
113+| The macro `INLINE' can be used before functions that should be inlined. If
114+| a compiler does not support explicit inlining, this macro should be defined
115+| to be `static'.
116+*----------------------------------------------------------------------------*/
117+#define INLINE extern inline
118+
119diff --git a/SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile
120new file mode 100644
121index 0000000..28f1e33
122--- /dev/null
123+++ b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile
124@@ -0,0 +1,26 @@
125+
126+PROCESSOR_H = ../../../processors/powerpc-GCC.h
127+SOFTFLOAT_MACROS = ../softfloat-macros
128+
129+OBJ = .o
130+EXE =
131+INCLUDES = -I. -I..
132+COMPILE_C = $(COMPILE_PREFIX)gcc -msoft-float -c -o $@ $(INCLUDES) -I- -O2
133+LINK = $(COMPILE_PREFIX)gcc -o $@
134+
135+ALL: softfloat$(OBJ) timesoftfloat$(EXE)
136+
137+milieu.h: $(PROCESSOR_H)
138+ touch milieu.h
139+
140+softfloat$(OBJ): milieu.h softfloat.h softfloat-specialize $(SOFTFLOAT_MACROS) ../softfloat.c
141+ $(COMPILE_C) ../softfloat.c
142+
143+timesoftfloat$(OBJ): milieu.h softfloat.h ../timesoftfloat.c
144+ $(COMPILE_C) ../timesoftfloat.c
145+
146+timesoftfloat$(EXE): softfloat$(OBJ) timesoftfloat$(OBJ)
147+ $(LINK) softfloat$(OBJ) timesoftfloat$(OBJ)
148+
149+clean:
150+ rm -f *.o timesoftfloat$(EXE)
151diff --git a/SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h
152new file mode 100644
153index 0000000..d8b6012
154--- /dev/null
155+++ b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h
156@@ -0,0 +1,55 @@
157+/*
158+ * This file is derived from softfloat/bits32/386-Win32-GCC/milieu.h,
159+ * the copyright for that material belongs to the original owners.
160+ *
161+ * Additional material and changes where applicable is:
162+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
163+ *
164+ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
165+ * Yu Liu, <yu.liu@freescale.com>
166+ */
167+
168+/*============================================================================
169+
170+This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
171+Package, Release 2b.
172+
173+Written by John R. Hauser. This work was made possible in part by the
174+International Computer Science Institute, located at Suite 600, 1947 Center
175+Street, Berkeley, California 94704. Funding was partially provided by the
176+National Science Foundation under grant MIP-9311980. The original version
177+of this code was written as part of a project to build a fixed-point vector
178+processor in collaboration with the University of California at Berkeley,
179+overseen by Profs. Nelson Morgan and John Wawrzynek. More information
180+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
181+arithmetic/SoftFloat.html'.
182+
183+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
184+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
185+RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
186+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
187+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
188+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
189+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
190+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
191+
192+Derivative works are acceptable, even for commercial purposes, so long as
193+(1) the source code for the derivative work includes prominent notice that
194+the work is derivative, and (2) the source code includes prominent notice with
195+these four paragraphs for those parts of this code that are retained.
196+
197+=============================================================================*/
198+
199+/*----------------------------------------------------------------------------
200+| Include common integer types and flags.
201+*----------------------------------------------------------------------------*/
202+#include "../../../processors/powerpc-GCC.h"
203+
204+/*----------------------------------------------------------------------------
205+| Symbolic Boolean literals.
206+*----------------------------------------------------------------------------*/
207+enum {
208+ FALSE = 0,
209+ TRUE = 1
210+};
211+
212diff --git a/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat-specialize b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat-specialize
213new file mode 100644
214index 0000000..fd2caa4
215--- /dev/null
216+++ b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat-specialize
217@@ -0,0 +1,252 @@
218+/*
219+ * This file is derived from softfloat/bits32/386-Win32-GCC/softfloat-specialize,
220+ * the copyright for that material belongs to the original owners.
221+ *
222+ * Additional material and changes where applicable is:
223+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
224+ *
225+ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
226+ * Yu Liu, <yu.liu@freescale.com>
227+ */
228+
229+/*============================================================================
230+
231+This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
232+Arithmetic Package, Release 2b.
233+
234+Written by John R. Hauser. This work was made possible in part by the
235+International Computer Science Institute, located at Suite 600, 1947 Center
236+Street, Berkeley, California 94704. Funding was partially provided by the
237+National Science Foundation under grant MIP-9311980. The original version
238+of this code was written as part of a project to build a fixed-point vector
239+processor in collaboration with the University of California at Berkeley,
240+overseen by Profs. Nelson Morgan and John Wawrzynek. More information
241+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
242+arithmetic/SoftFloat.html'.
243+
244+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
245+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
246+RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
247+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
248+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
249+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
250+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
251+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
252+
253+Derivative works are acceptable, even for commercial purposes, so long as
254+(1) the source code for the derivative work includes prominent notice that
255+the work is derivative, and (2) the source code includes prominent notice with
256+these four paragraphs for those parts of this code that are retained.
257+
258+=============================================================================*/
259+
260+/*----------------------------------------------------------------------------
261+| Underflow tininess-detection mode, statically initialized to default value.
262+| (The declaration in `softfloat.h' must match the `int8' type here.)
263+*----------------------------------------------------------------------------*/
264+int8 float_detect_tininess = float_tininess_after_rounding;
265+
266+/*----------------------------------------------------------------------------
267+| Raises the exceptions specified by `flags'. Floating-point traps can be
268+| defined here if desired. It is currently not possible for such a trap
269+| to substitute a result value. If traps are not implemented, this routine
270+| should be simply `float_exception_flags |= flags;'.
271+*----------------------------------------------------------------------------*/
272+
273+void float_raise( int8 flags )
274+{
275+
276+ float_exception_flags |= flags;
277+
278+}
279+
280+/*----------------------------------------------------------------------------
281+| Internal canonical NaN format.
282+*----------------------------------------------------------------------------*/
283+typedef struct {
284+ flag sign;
285+ bits32 high, low;
286+} commonNaNT;
287+
288+/*----------------------------------------------------------------------------
289+| The pattern for a default generated single-precision NaN.
290+*----------------------------------------------------------------------------*/
291+enum {
292+ float32_default_nan = 0xFFFFFFFF
293+};
294+
295+/*----------------------------------------------------------------------------
296+| Returns 1 if the single-precision floating-point value `a' is a NaN;
297+| otherwise returns 0.
298+*----------------------------------------------------------------------------*/
299+
300+flag float32_is_nan( float32 a )
301+{
302+
303+ return ( 0xFF000000 < (bits32) ( a<<1 ) );
304+
305+}
306+
307+/*----------------------------------------------------------------------------
308+| Returns 1 if the single-precision floating-point value `a' is a signaling
309+| NaN; otherwise returns 0.
310+*----------------------------------------------------------------------------*/
311+
312+flag float32_is_signaling_nan( float32 a )
313+{
314+
315+ return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
316+
317+}
318+
319+/*----------------------------------------------------------------------------
320+| Returns the result of converting the single-precision floating-point NaN
321+| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
322+| exception is raised.
323+*----------------------------------------------------------------------------*/
324+
325+static commonNaNT float32ToCommonNaN( float32 a )
326+{
327+ commonNaNT z;
328+
329+ if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
330+ z.sign = a>>31;
331+ z.low = 0;
332+ z.high = a<<9;
333+ return z;
334+
335+}
336+
337+/*----------------------------------------------------------------------------
338+| Returns the result of converting the canonical NaN `a' to the single-
339+| precision floating-point format.
340+*----------------------------------------------------------------------------*/
341+
342+static float32 commonNaNToFloat32( commonNaNT a )
343+{
344+
345+ return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>9 );
346+
347+}
348+
349+/*----------------------------------------------------------------------------
350+| Takes two single-precision floating-point values `a' and `b', one of which
351+| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
352+| signaling NaN, the invalid exception is raised.
353+*----------------------------------------------------------------------------*/
354+
355+static float32 propagateFloat32NaN( float32 a, float32 b )
356+{
357+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
358+
359+ aIsNaN = float32_is_nan( a );
360+ aIsSignalingNaN = float32_is_signaling_nan( a );
361+ bIsNaN = float32_is_nan( b );
362+ bIsSignalingNaN = float32_is_signaling_nan( b );
363+ a |= 0x00400000;
364+ b |= 0x00400000;
365+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
366+ if ( aIsNaN ) {
367+ return ( aIsSignalingNaN & bIsNaN ) ? b : a;
368+ }
369+ else {
370+ return b;
371+ }
372+
373+}
374+
375+/*----------------------------------------------------------------------------
376+| The pattern for a default generated double-precision NaN. The `high' and
377+| `low' values hold the most- and least-significant bits, respectively.
378+*----------------------------------------------------------------------------*/
379+enum {
380+ float64_default_nan_high = 0xFFFFFFFF,
381+ float64_default_nan_low = 0xFFFFFFFF
382+};
383+
384+/*----------------------------------------------------------------------------
385+| Returns 1 if the double-precision floating-point value `a' is a NaN;
386+| otherwise returns 0.
387+*----------------------------------------------------------------------------*/
388+
389+flag float64_is_nan( float64 a )
390+{
391+
392+ return
393+ ( 0xFFE00000 <= (bits32) ( a.high<<1 ) )
394+ && ( a.low || ( a.high & 0x000FFFFF ) );
395+
396+}
397+
398+/*----------------------------------------------------------------------------
399+| Returns 1 if the double-precision floating-point value `a' is a signaling
400+| NaN; otherwise returns 0.
401+*----------------------------------------------------------------------------*/
402+
403+flag float64_is_signaling_nan( float64 a )
404+{
405+
406+ return
407+ ( ( ( a.high>>19 ) & 0xFFF ) == 0xFFE )
408+ && ( a.low || ( a.high & 0x0007FFFF ) );
409+
410+}
411+
412+/*----------------------------------------------------------------------------
413+| Returns the result of converting the double-precision floating-point NaN
414+| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
415+| exception is raised.
416+*----------------------------------------------------------------------------*/
417+
418+static commonNaNT float64ToCommonNaN( float64 a )
419+{
420+ commonNaNT z;
421+
422+ if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
423+ z.sign = a.high>>31;
424+ shortShift64Left( a.high, a.low, 12, &z.high, &z.low );
425+ return z;
426+
427+}
428+
429+/*----------------------------------------------------------------------------
430+| Returns the result of converting the canonical NaN `a' to the double-
431+| precision floating-point format.
432+*----------------------------------------------------------------------------*/
433+
434+static float64 commonNaNToFloat64( commonNaNT a )
435+{
436+ float64 z;
437+
438+ shift64Right( a.high, a.low, 12, &z.high, &z.low );
439+ z.high |= ( ( (bits32) a.sign )<<31 ) | 0x7FF80000;
440+ return z;
441+
442+}
443+
444+/*----------------------------------------------------------------------------
445+| Takes two double-precision floating-point values `a' and `b', one of which
446+| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
447+| signaling NaN, the invalid exception is raised.
448+*----------------------------------------------------------------------------*/
449+
450+static float64 propagateFloat64NaN( float64 a, float64 b )
451+{
452+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
453+
454+ aIsNaN = float64_is_nan( a );
455+ aIsSignalingNaN = float64_is_signaling_nan( a );
456+ bIsNaN = float64_is_nan( b );
457+ bIsSignalingNaN = float64_is_signaling_nan( b );
458+ a.high |= 0x00080000;
459+ b.high |= 0x00080000;
460+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
461+ if ( aIsNaN ) {
462+ return ( aIsSignalingNaN & bIsNaN ) ? b : a;
463+ }
464+ else {
465+ return b;
466+ }
467+
468+}
469+
470diff --git a/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat.h b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat.h
471new file mode 100644
472index 0000000..0015b8e
473--- /dev/null
474+++ b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat.h
475@@ -0,0 +1,155 @@
476+/*
477+ * This file is derived from softfloat/bits32/386-Win32-GCC/softfloat.h,
478+ * the copyright for that material belongs to the original owners.
479+ *
480+ * Additional material and changes where applicable is:
481+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
482+ *
483+ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
484+ * Yu Liu, <yu.liu@freescale.com>
485+ */
486+
487+/*============================================================================
488+
489+This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
490+Package, Release 2b.
491+
492+Written by John R. Hauser. This work was made possible in part by the
493+International Computer Science Institute, located at Suite 600, 1947 Center
494+Street, Berkeley, California 94704. Funding was partially provided by the
495+National Science Foundation under grant MIP-9311980. The original version
496+of this code was written as part of a project to build a fixed-point vector
497+processor in collaboration with the University of California at Berkeley,
498+overseen by Profs. Nelson Morgan and John Wawrzynek. More information
499+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
500+arithmetic/SoftFloat.html'.
501+
502+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
503+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
504+RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
505+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
506+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
507+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
508+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
509+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
510+
511+Derivative works are acceptable, even for commercial purposes, so long as
512+(1) the source code for the derivative work includes prominent notice that
513+the work is derivative, and (2) the source code includes prominent notice with
514+these four paragraphs for those parts of this code that are retained.
515+
516+=============================================================================*/
517+
518+/*----------------------------------------------------------------------------
519+| Software IEC/IEEE floating-point types.
520+*----------------------------------------------------------------------------*/
521+typedef bits32 float32;
522+typedef struct {
523+ bits32 high, low;
524+} float64;
525+
526+/*----------------------------------------------------------------------------
527+| Software IEC/IEEE floating-point underflow tininess-detection mode.
528+*----------------------------------------------------------------------------*/
529+extern int8 float_detect_tininess;
530+enum {
531+ float_tininess_after_rounding = 0,
532+ float_tininess_before_rounding = 1
533+};
534+
535+/*----------------------------------------------------------------------------
536+| Software IEC/IEEE floating-point rounding mode.
537+*----------------------------------------------------------------------------*/
538+extern int8 float_rounding_mode;
539+enum {
540+ float_round_nearest_even = 0,
541+ float_round_to_zero = 1,
542+ float_round_up = 2,
543+ float_round_down = 3
544+};
545+
546+/*----------------------------------------------------------------------------
547+| Software IEC/IEEE floating-point exception flags.
548+*----------------------------------------------------------------------------*/
549+/*
550+extern int8 float_exception_flags;
551+enum {
552+ float_flag_inexact = 1,
553+ float_flag_underflow = 2,
554+ float_flag_overflow = 4,
555+ float_flag_divbyzero = 8,
556+ float_flag_invalid = 16
557+};
558+*/
559+
560+extern int8 float_exception_flags;
561+enum {
562+ float_flag_inexact = 16,
563+ float_flag_underflow = 2,
564+ float_flag_overflow = 1,
565+ float_flag_divbyzero = 4,
566+ float_flag_invalid = 8
567+};
568+
569+/*----------------------------------------------------------------------------
570+| Routine to raise any or all of the software IEC/IEEE floating-point
571+| exception flags.
572+*----------------------------------------------------------------------------*/
573+void float_raise( int8 );
574+
575+/*----------------------------------------------------------------------------
576+| Software IEC/IEEE integer-to-floating-point conversion routines.
577+*----------------------------------------------------------------------------*/
578+float32 int32_to_float32( int32 );
579+float64 int32_to_float64( int32 );
580+
581+/*----------------------------------------------------------------------------
582+| Software IEC/IEEE single-precision conversion routines.
583+*----------------------------------------------------------------------------*/
584+int32 float32_to_int32( float32 );
585+int32 float32_to_int32_round_to_zero( float32 );
586+float64 float32_to_float64( float32 );
587+
588+/*----------------------------------------------------------------------------
589+| Software IEC/IEEE single-precision operations.
590+*----------------------------------------------------------------------------*/
591+float32 float32_round_to_int( float32 );
592+float32 float32_add( float32, float32 );
593+float32 float32_sub( float32, float32 );
594+float32 float32_mul( float32, float32 );
595+float32 float32_div( float32, float32 );
596+float32 float32_rem( float32, float32 );
597+float32 float32_sqrt( float32 );
598+flag float32_eq( float32, float32 );
599+flag float32_le( float32, float32 );
600+flag float32_lt( float32, float32 );
601+flag float32_eq_signaling( float32, float32 );
602+flag float32_le_quiet( float32, float32 );
603+flag float32_lt_quiet( float32, float32 );
604+flag float32_is_signaling_nan( float32 );
605+
606+/*----------------------------------------------------------------------------
607+| Software IEC/IEEE double-precision conversion routines.
608+*----------------------------------------------------------------------------*/
609+int32 float64_to_int32( float64 );
610+int32 float64_to_int32_round_to_zero( float64 );
611+float32 float64_to_float32( float64 );
612+
613+/*----------------------------------------------------------------------------
614+| Software IEC/IEEE double-precision operations.
615+*----------------------------------------------------------------------------*/
616+float64 float64_round_to_int( float64 );
617+float64 float64_add( float64, float64 );
618+float64 float64_sub( float64, float64 );
619+float64 float64_mul( float64, float64 );
620+float64 float64_div( float64, float64 );
621+float64 float64_rem( float64, float64 );
622+float64 float64_sqrt( float64 );
623+flag float64_eq( float64, float64 );
624+flag float64_le( float64, float64 );
625+flag float64_lt( float64, float64 );
626+flag float64_eq_signaling( float64, float64 );
627+flag float64_le_quiet( float64, float64 );
628+flag float64_lt_quiet( float64, float64 );
629+flag float64_is_signaling_nan( float64 );
630+
631diff --git a/SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile
632new file mode 100644
633index 0000000..a5e2cc7
634--- /dev/null
635+++ b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile
636@@ -0,0 +1,24 @@
637+
638+PROCESSOR_H = ../../../processors/powerpc-GCC.h
639+SOFTFLOAT_MACROS = ../softfloat-macros
640+
641+OBJ = .o
642+EXE =
643+INCLUDES = -I. -I..
644+COMPILE_C = $(COMPILE_PREFIX) -mcpu=8548 -mhard-float -mfloat-gprs=double -o $@ $(INCLUDES) -I- -O2
645+LINK = $(COMPILE_PREFIX) -o $@
646+
647+ALL: softfloat$(OBJ) timesoftfloat$(EXE)
648+
649+milieu.h: $(PROCESSOR_H)
650+ touch milieu.h
651+
652+softfloat$(OBJ): milieu.h softfloat.h softfloat-specialize $(SOFTFLOAT_MACROS) ../softfloat.c
653+ $(COMPILE_C) ../softfloat.c
654+
655+timesoftfloat$(OBJ): milieu.h softfloat.h ../timesoftfloat.c
656+ $(COMPILE_C) ../timesoftfloat.c
657+
658+timesoftfloat$(EXE): softfloat$(OBJ) timesoftfloat$(OBJ)
659+ $(LINK) softfloat$(OBJ) timesoftfloat$(OBJ)
660+
661diff --git a/SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h
662new file mode 100644
663index 0000000..1b66490
664--- /dev/null
665+++ b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h
666@@ -0,0 +1,55 @@
667+/*
668+ * This file is derived from softfloat/bits64/386-Win32-GCC/milieu.h,
669+ * the copyright for that material belongs to the original owners.
670+ *
671+ * Additional material and changes where applicable is:
672+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
673+ *
674+ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
675+ * Yu Liu, <yu.liu@freescale.com>
676+ */
677+
678+/*============================================================================
679+
680+This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
681+Package, Release 2b.
682+
683+Written by John R. Hauser. This work was made possible in part by the
684+International Computer Science Institute, located at Suite 600, 1947 Center
685+Street, Berkeley, California 94704. Funding was partially provided by the
686+National Science Foundation under grant MIP-9311980. The original version
687+of this code was written as part of a project to build a fixed-point vector
688+processor in collaboration with the University of California at Berkeley,
689+overseen by Profs. Nelson Morgan and John Wawrzynek. More information
690+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
691+arithmetic/SoftFloat.html'.
692+
693+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
694+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
695+RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
696+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
697+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
698+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
699+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
700+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
701+
702+Derivative works are acceptable, even for commercial purposes, so long as
703+(1) the source code for the derivative work includes prominent notice that
704+the work is derivative, and (2) the source code includes prominent notice with
705+these four paragraphs for those parts of this code that are retained.
706+
707+=============================================================================*/
708+
709+/*----------------------------------------------------------------------------
710+| Include common integer types and flags.
711+*----------------------------------------------------------------------------*/
712+#include "../../../processors/SPARC-GCC.h"
713+
714+/*----------------------------------------------------------------------------
715+| Symbolic Boolean literals.
716+*----------------------------------------------------------------------------*/
717+enum {
718+ FALSE = 0,
719+ TRUE = 1
720+};
721+
722diff --git a/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat-specialize b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat-specialize
723new file mode 100644
724index 0000000..b1d0bc8
725--- /dev/null
726+++ b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat-specialize
727@@ -0,0 +1,422 @@
728+/*
729+ * This file is derived from softfloat/bits64/386-Win32-GCC/softfloat-specialize,
730+ * the copyright for that material belongs to the original owners.
731+ *
732+ * Additional material and changes where applicable is:
733+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
734+ *
735+ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
736+ * Yu Liu, <yu.liu@freescale.com>
737+ */
738+
739+/*============================================================================
740+
741+This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
742+Arithmetic Package, Release 2b.
743+
744+Written by John R. Hauser. This work was made possible in part by the
745+International Computer Science Institute, located at Suite 600, 1947 Center
746+Street, Berkeley, California 94704. Funding was partially provided by the
747+National Science Foundation under grant MIP-9311980. The original version
748+of this code was written as part of a project to build a fixed-point vector
749+processor in collaboration with the University of California at Berkeley,
750+overseen by Profs. Nelson Morgan and John Wawrzynek. More information
751+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
752+arithmetic/SoftFloat.html'.
753+
754+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
755+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
756+RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
757+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
758+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
759+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
760+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
761+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
762+
763+Derivative works are acceptable, even for commercial purposes, so long as
764+(1) the source code for the derivative work includes prominent notice that
765+the work is derivative, and (2) the source code includes prominent notice with
766+these four paragraphs for those parts of this code that are retained.
767+
768+=============================================================================*/
769+
770+/*----------------------------------------------------------------------------
771+| Underflow tininess-detection mode, statically initialized to default value.
772+| (The declaration in `softfloat.h' must match the `int8' type here.)
773+*----------------------------------------------------------------------------*/
774+int8 float_detect_tininess = float_tininess_before_rounding;
775+
776+/*----------------------------------------------------------------------------
777+| Raises the exceptions specified by `flags'. Floating-point traps can be
778+| defined here if desired. It is currently not possible for such a trap
779+| to substitute a result value. If traps are not implemented, this routine
780+| should be simply `float_exception_flags |= flags;'.
781+*----------------------------------------------------------------------------*/
782+
783+void float_raise( int8 flags )
784+{
785+
786+ float_exception_flags |= flags;
787+
788+}
789+
790+/*----------------------------------------------------------------------------
791+| Internal canonical NaN format.
792+*----------------------------------------------------------------------------*/
793+typedef struct {
794+ flag sign;
795+ bits64 high, low;
796+} commonNaNT;
797+
798+/*----------------------------------------------------------------------------
799+| The pattern for a default generated single-precision NaN.
800+*----------------------------------------------------------------------------*/
801+#define float32_default_nan 0x7FFFFFFF
802+
803+/*----------------------------------------------------------------------------
804+| Returns 1 if the single-precision floating-point value `a' is a NaN;
805+| otherwise returns 0.
806+*----------------------------------------------------------------------------*/
807+
808+flag float32_is_nan( float32 a )
809+{
810+
811+ return ( 0xFF000000 < (bits32) ( a<<1 ) );
812+
813+}
814+
815+/*----------------------------------------------------------------------------
816+| Returns 1 if the single-precision floating-point value `a' is a signaling
817+| NaN; otherwise returns 0.
818+*----------------------------------------------------------------------------*/
819+
820+flag float32_is_signaling_nan( float32 a )
821+{
822+
823+ return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
824+
825+}
826+
827+/*----------------------------------------------------------------------------
828+| Returns the result of converting the single-precision floating-point NaN
829+| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
830+| exception is raised.
831+*----------------------------------------------------------------------------*/
832+
833+static commonNaNT float32ToCommonNaN( float32 a )
834+{
835+ commonNaNT z;
836+
837+ if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
838+ z.sign = a>>31;
839+ z.low = 0;
840+ z.high = ( (bits64) a )<<41;
841+ return z;
842+
843+}
844+
845+/*----------------------------------------------------------------------------
846+| Returns the result of converting the canonical NaN `a' to the single-
847+| precision floating-point format.
848+*----------------------------------------------------------------------------*/
849+
850+static float32 commonNaNToFloat32( commonNaNT a )
851+{
852+
853+ return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );
854+
855+}
856+
857+/*----------------------------------------------------------------------------
858+| Takes two single-precision floating-point values `a' and `b', one of which
859+| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
860+| signaling NaN, the invalid exception is raised.
861+*----------------------------------------------------------------------------*/
862+
863+static float32 propagateFloat32NaN( float32 a, float32 b )
864+{
865+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
866+
867+ aIsNaN = float32_is_nan( a );
868+ aIsSignalingNaN = float32_is_signaling_nan( a );
869+ bIsNaN = float32_is_nan( b );
870+ bIsSignalingNaN = float32_is_signaling_nan( b );
871+ a |= 0x00400000;
872+ b |= 0x00400000;
873+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
874+ return bIsSignalingNaN ? b : aIsSignalingNaN ? a : bIsNaN ? b : a;
875+
876+}
877+
878+/*----------------------------------------------------------------------------
879+| The pattern for a default generated double-precision NaN.
880+*----------------------------------------------------------------------------*/
881+#define float64_default_nan LIT64( 0x7FFFFFFFFFFFFFFF )
882+
883+/*----------------------------------------------------------------------------
884+| Returns 1 if the double-precision floating-point value `a' is a NaN;
885+| otherwise returns 0.
886+*----------------------------------------------------------------------------*/
887+
888+flag float64_is_nan( float64 a )
889+{
890+
891+ return ( LIT64( 0xFFE0000000000000 ) < (bits64) ( a<<1 ) );
892+
893+}
894+
895+/*----------------------------------------------------------------------------
896+| Returns 1 if the double-precision floating-point value `a' is a signaling
897+| NaN; otherwise returns 0.
898+*----------------------------------------------------------------------------*/
899+
900+flag float64_is_signaling_nan( float64 a )
901+{
902+
903+ return
904+ ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
905+ && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
906+
907+}
908+
909+/*----------------------------------------------------------------------------
910+| Returns the result of converting the double-precision floating-point NaN
911+| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
912+| exception is raised.
913+*----------------------------------------------------------------------------*/
914+
915+static commonNaNT float64ToCommonNaN( float64 a )
916+{
917+ commonNaNT z;
918+
919+ if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
920+ z.sign = a>>63;
921+ z.low = 0;
922+ z.high = a<<12;
923+ return z;
924+
925+}
926+
927+/*----------------------------------------------------------------------------
928+| Returns the result of converting the canonical NaN `a' to the double-
929+| precision floating-point format.
930+*----------------------------------------------------------------------------*/
931+
932+static float64 commonNaNToFloat64( commonNaNT a )
933+{
934+
935+ return
936+ ( ( (bits64) a.sign )<<63 )
937+ | LIT64( 0x7FF8000000000000 )
938+ | ( a.high>>12 );
939+
940+}
941+
942+/*----------------------------------------------------------------------------
943+| Takes two double-precision floating-point values `a' and `b', one of which
944+| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
945+| signaling NaN, the invalid exception is raised.
946+*----------------------------------------------------------------------------*/
947+
948+static float64 propagateFloat64NaN( float64 a, float64 b )
949+{
950+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
951+
952+ aIsNaN = float64_is_nan( a );
953+ aIsSignalingNaN = float64_is_signaling_nan( a );
954+ bIsNaN = float64_is_nan( b );
955+ bIsSignalingNaN = float64_is_signaling_nan( b );
956+ a |= LIT64( 0x0008000000000000 );
957+ b |= LIT64( 0x0008000000000000 );
958+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
959+ return bIsSignalingNaN ? b : aIsSignalingNaN ? a : bIsNaN ? b : a;
960+
961+}
962+
963+#ifdef FLOATX80
964+
965+/*----------------------------------------------------------------------------
966+| The pattern for a default generated extended double-precision NaN. The
967+| `high' and `low' values hold the most- and least-significant bits,
968+| respectively.
969+*----------------------------------------------------------------------------*/
970+#define floatx80_default_nan_high 0x7FFF
971+#define floatx80_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
972+
973+/*----------------------------------------------------------------------------
974+| Returns 1 if the extended double-precision floating-point value `a' is a
975+| NaN; otherwise returns 0.
976+*----------------------------------------------------------------------------*/
977+
978+flag floatx80_is_nan( floatx80 a )
979+{
980+
981+ return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 );
982+
983+}
984+
985+/*----------------------------------------------------------------------------
986+| Returns 1 if the extended double-precision floating-point value `a' is a
987+| signaling NaN; otherwise returns 0.
988+*----------------------------------------------------------------------------*/
989+
990+flag floatx80_is_signaling_nan( floatx80 a )
991+{
992+ bits64 aLow;
993+
994+ aLow = a.low & ~ LIT64( 0x4000000000000000 );
995+ return
996+ ( ( a.high & 0x7FFF ) == 0x7FFF )
997+ && (bits64) ( aLow<<1 )
998+ && ( a.low == aLow );
999+
1000+}
1001+
1002+/*----------------------------------------------------------------------------
1003+| Returns the result of converting the extended double-precision floating-
1004+| point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
1005+| invalid exception is raised.
1006+*----------------------------------------------------------------------------*/
1007+
1008+static commonNaNT floatx80ToCommonNaN( floatx80 a )
1009+{
1010+ commonNaNT z;
1011+
1012+ if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
1013+ z.sign = a.high>>15;
1014+ z.low = 0;
1015+ z.high = a.low<<1;
1016+ return z;
1017+
1018+}
1019+
1020+/*----------------------------------------------------------------------------
1021+| Returns the result of converting the canonical NaN `a' to the extended
1022+| double-precision floating-point format.
1023+*----------------------------------------------------------------------------*/
1024+
1025+static floatx80 commonNaNToFloatx80( commonNaNT a )
1026+{
1027+ floatx80 z;
1028+
1029+ z.low = LIT64( 0xC000000000000000 ) | ( a.high>>1 );
1030+ z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF;
1031+ return z;
1032+
1033+}
1034+
1035+/*----------------------------------------------------------------------------
1036+| Takes two extended double-precision floating-point values `a' and `b', one
1037+| of which is a NaN, and returns the appropriate NaN result. If either `a' or
1038+| `b' is a signaling NaN, the invalid exception is raised.
1039+*----------------------------------------------------------------------------*/
1040+
1041+static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b )
1042+{
1043+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
1044+
1045+ aIsNaN = floatx80_is_nan( a );
1046+ aIsSignalingNaN = floatx80_is_signaling_nan( a );
1047+ bIsNaN = floatx80_is_nan( b );
1048+ bIsSignalingNaN = floatx80_is_signaling_nan( b );
1049+ a.low |= LIT64( 0xC000000000000000 );
1050+ b.low |= LIT64( 0xC000000000000000 );
1051+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
1052+ return bIsSignalingNaN ? b : aIsSignalingNaN ? a : bIsNaN ? b : a;
1053+
1054+}
1055+
1056+#endif
1057+
1058+#ifdef FLOAT128
1059+
1060+/*----------------------------------------------------------------------------
1061+| The pattern for a default generated quadruple-precision NaN. The `high' and
1062+| `low' values hold the most- and least-significant bits, respectively.
1063+*----------------------------------------------------------------------------*/
1064+#define float128_default_nan_high LIT64( 0x7FFFFFFFFFFFFFFF )
1065+#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
1066+
1067+/*----------------------------------------------------------------------------
1068+| Returns 1 if the quadruple-precision floating-point value `a' is a NaN;
1069+| otherwise returns 0.
1070+*----------------------------------------------------------------------------*/
1071+
1072+flag float128_is_nan( float128 a )
1073+{
1074+
1075+ return
1076+ ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
1077+ && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
1078+
1079+}
1080+
1081+/*----------------------------------------------------------------------------
1082+| Returns 1 if the quadruple-precision floating-point value `a' is a
1083+| signaling NaN; otherwise returns 0.
1084+*----------------------------------------------------------------------------*/
1085+
1086+flag float128_is_signaling_nan( float128 a )
1087+{
1088+
1089+ return
1090+ ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1091+ && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1092+
1093+}
1094+
1095+/*----------------------------------------------------------------------------
1096+| Returns the result of converting the quadruple-precision floating-point NaN
1097+| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
1098+| exception is raised.
1099+*----------------------------------------------------------------------------*/
1100+
1101+static commonNaNT float128ToCommonNaN( float128 a )
1102+{
1103+ commonNaNT z;
1104+
1105+ if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
1106+ z.sign = a.high>>63;
1107+ shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
1108+ return z;
1109+
1110+}
1111+
1112+/*----------------------------------------------------------------------------
1113+| Returns the result of converting the canonical NaN `a' to the quadruple-
1114+| precision floating-point format.
1115+*----------------------------------------------------------------------------*/
1116+
1117+static float128 commonNaNToFloat128( commonNaNT a )
1118+{
1119+ float128 z;
1120+
1121+ shift128Right( a.high, a.low, 16, &z.high, &z.low );
1122+ z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 );
1123+ return z;
1124+
1125+}
1126+
1127+/*----------------------------------------------------------------------------
1128+| Takes two quadruple-precision floating-point values `a' and `b', one of
1129+| which is a NaN, and returns the appropriate NaN result. If either `a' or
1130+| `b' is a signaling NaN, the invalid exception is raised.
1131+*----------------------------------------------------------------------------*/
1132+
1133+static float128 propagateFloat128NaN( float128 a, float128 b )
1134+{
1135+ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
1136+
1137+ aIsNaN = float128_is_nan( a );
1138+ aIsSignalingNaN = float128_is_signaling_nan( a );
1139+ bIsNaN = float128_is_nan( b );
1140+ bIsSignalingNaN = float128_is_signaling_nan( b );
1141+ a.high |= LIT64( 0x0000800000000000 );
1142+ b.high |= LIT64( 0x0000800000000000 );
1143+ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
1144+ return bIsSignalingNaN ? b : aIsSignalingNaN ? a : bIsNaN ? b : a;
1145+
1146+}
1147+
1148+#endif
1149+
1150diff --git a/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat.h b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat.h
1151new file mode 100644
1152index 0000000..5b7cb1c
1153--- /dev/null
1154+++ b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat.h
1155@@ -0,0 +1,269 @@
1156+/*
1157+ * This file is derived from softfloat/bits64/386-Win32-GCC/softfloat.h,
1158+ * the copyright for that material belongs to the original owners.
1159+ *
1160+ * Additional material and changes where applicable is:
1161+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
1162+ *
1163+ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
1164+ * Yu Liu, <yu.liu@freescale.com>
1165+ */
1166+
1167+/*============================================================================
1168+
1169+This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
1170+Package, Release 2b.
1171+
1172+Written by John R. Hauser. This work was made possible in part by the
1173+International Computer Science Institute, located at Suite 600, 1947 Center
1174+Street, Berkeley, California 94704. Funding was partially provided by the
1175+National Science Foundation under grant MIP-9311980. The original version
1176+of this code was written as part of a project to build a fixed-point vector
1177+processor in collaboration with the University of California at Berkeley,
1178+overseen by Profs. Nelson Morgan and John Wawrzynek. More information
1179+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
1180+arithmetic/SoftFloat.html'.
1181+
1182+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
1183+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
1184+RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
1185+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
1186+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
1187+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
1188+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
1189+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
1190+
1191+Derivative works are acceptable, even for commercial purposes, so long as
1192+(1) the source code for the derivative work includes prominent notice that
1193+the work is derivative, and (2) the source code includes prominent notice with
1194+these four paragraphs for those parts of this code that are retained.
1195+
1196+=============================================================================*/
1197+
1198+/*----------------------------------------------------------------------------
1199+| The macro `FLOATX80' must be defined to enable the extended double-precision
1200+| floating-point format `floatx80'. If this macro is not defined, the
1201+| `floatx80' type will not be defined, and none of the functions that either
1202+| input or output the `floatx80' type will be defined. The same applies to
1203+| the `FLOAT128' macro and the quadruple-precision format `float128'.
1204+*----------------------------------------------------------------------------*/
1205+#define FLOATX80
1206+#define FLOAT128
1207+
1208+/*----------------------------------------------------------------------------
1209+| Software IEC/IEEE floating-point types.
1210+*----------------------------------------------------------------------------*/
1211+typedef unsigned int float32;
1212+typedef unsigned long long float64;
1213+#ifdef FLOATX80
1214+typedef struct {
1215+ unsigned short high;
1216+ unsigned long long low;
1217+} floatx80;
1218+#endif
1219+#ifdef FLOAT128
1220+typedef struct {
1221+ unsigned long long high, low;
1222+} float128;
1223+#endif
1224+
1225+/*----------------------------------------------------------------------------
1226+| Software IEC/IEEE floating-point underflow tininess-detection mode.
1227+*----------------------------------------------------------------------------*/
1228+extern int float_detect_tininess;
1229+enum {
1230+ float_tininess_after_rounding = 0,
1231+ float_tininess_before_rounding = 1
1232+};
1233+
1234+/*----------------------------------------------------------------------------
1235+| Software IEC/IEEE floating-point rounding mode.
1236+*----------------------------------------------------------------------------*/
1237+extern int float_rounding_mode;
1238+enum {
1239+ float_round_nearest_even = 0,
1240+ float_round_to_zero = 1,
1241+ float_round_up = 2,
1242+ float_round_down = 3
1243+};
1244+
1245+/*----------------------------------------------------------------------------
1246+| Software IEC/IEEE floating-point exception flags.
1247+*----------------------------------------------------------------------------*/
1248+extern int float_exception_flags;
1249+enum {
1250+ float_flag_inexact = 1,
1251+ float_flag_divbyzero = 2,
1252+ float_flag_underflow = 4,
1253+ float_flag_overflow = 8,
1254+ float_flag_invalid = 16
1255+};
1256+
1257+/*----------------------------------------------------------------------------
1258+| Routine to raise any or all of the software IEC/IEEE floating-point
1259+| exception flags.
1260+*----------------------------------------------------------------------------*/
1261+void float_raise( int );
1262+
1263+/*----------------------------------------------------------------------------
1264+| Software IEC/IEEE integer-to-floating-point conversion routines.
1265+*----------------------------------------------------------------------------*/
1266+float32 int32_to_float32( int );
1267+float64 int32_to_float64( int );
1268+#ifdef FLOATX80
1269+floatx80 int32_to_floatx80( int );
1270+#endif
1271+#ifdef FLOAT128
1272+float128 int32_to_float128( int );
1273+#endif
1274+float32 int64_to_float32( long long );
1275+float64 int64_to_float64( long long );
1276+#ifdef FLOATX80
1277+floatx80 int64_to_floatx80( long long );
1278+#endif
1279+#ifdef FLOAT128
1280+float128 int64_to_float128( long long );
1281+#endif
1282+
1283+/*----------------------------------------------------------------------------
1284+| Software IEC/IEEE single-precision conversion routines.
1285+*----------------------------------------------------------------------------*/
1286+int float32_to_int32( float32 );
1287+int float32_to_int32_round_to_zero( float32 );
1288+long long float32_to_int64( float32 );
1289+long long float32_to_int64_round_to_zero( float32 );
1290+float64 float32_to_float64( float32 );
1291+#ifdef FLOATX80
1292+floatx80 float32_to_floatx80( float32 );
1293+#endif
1294+#ifdef FLOAT128
1295+float128 float32_to_float128( float32 );
1296+#endif
1297+
1298+/*----------------------------------------------------------------------------
1299+| Software IEC/IEEE single-precision operations.
1300+*----------------------------------------------------------------------------*/
1301+float32 float32_round_to_int( float32 );
1302+float32 float32_add( float32, float32 );
1303+float32 float32_sub( float32, float32 );
1304+float32 float32_mul( float32, float32 );
1305+float32 float32_div( float32, float32 );
1306+float32 float32_rem( float32, float32 );
1307+float32 float32_sqrt( float32 );
1308+int float32_eq( float32, float32 );
1309+int float32_le( float32, float32 );
1310+int float32_lt( float32, float32 );
1311+int float32_eq_signaling( float32, float32 );
1312+int float32_le_quiet( float32, float32 );
1313+int float32_lt_quiet( float32, float32 );
1314+int float32_is_signaling_nan( float32 );
1315+
1316+/*----------------------------------------------------------------------------
1317+| Software IEC/IEEE double-precision conversion routines.
1318+*----------------------------------------------------------------------------*/
1319+int float64_to_int32( float64 );
1320+int float64_to_int32_round_to_zero( float64 );
1321+long long float64_to_int64( float64 );
1322+long long float64_to_int64_round_to_zero( float64 );
1323+float32 float64_to_float32( float64 );
1324+#ifdef FLOATX80
1325+floatx80 float64_to_floatx80( float64 );
1326+#endif
1327+#ifdef FLOAT128
1328+float128 float64_to_float128( float64 );
1329+#endif
1330+
1331+/*----------------------------------------------------------------------------
1332+| Software IEC/IEEE double-precision operations.
1333+*----------------------------------------------------------------------------*/
1334+float64 float64_round_to_int( float64 );
1335+float64 float64_add( float64, float64 );
1336+float64 float64_sub( float64, float64 );
1337+float64 float64_mul( float64, float64 );
1338+float64 float64_div( float64, float64 );
1339+float64 float64_rem( float64, float64 );
1340+float64 float64_sqrt( float64 );
1341+int float64_eq( float64, float64 );
1342+int float64_le( float64, float64 );
1343+int float64_lt( float64, float64 );
1344+int float64_eq_signaling( float64, float64 );
1345+int float64_le_quiet( float64, float64 );
1346+int float64_lt_quiet( float64, float64 );
1347+int float64_is_signaling_nan( float64 );
1348+
1349+#ifdef FLOATX80
1350+
1351+/*----------------------------------------------------------------------------
1352+| Software IEC/IEEE extended double-precision conversion routines.
1353+*----------------------------------------------------------------------------*/
1354+int floatx80_to_int32( floatx80 );
1355+int floatx80_to_int32_round_to_zero( floatx80 );
1356+long long floatx80_to_int64( floatx80 );
1357+long long floatx80_to_int64_round_to_zero( floatx80 );
1358+float32 floatx80_to_float32( floatx80 );
1359+float64 floatx80_to_float64( floatx80 );
1360+#ifdef FLOAT128
1361+float128 floatx80_to_float128( floatx80 );
1362+#endif
1363+
1364+/*----------------------------------------------------------------------------
1365+| Software IEC/IEEE extended double-precision rounding precision. Valid
1366+| values are 32, 64, and 80.
1367+*----------------------------------------------------------------------------*/
1368+extern int floatx80_rounding_precision;
1369+
1370+/*----------------------------------------------------------------------------
1371+| Software IEC/IEEE extended double-precision operations.
1372+*----------------------------------------------------------------------------*/
1373+floatx80 floatx80_round_to_int( floatx80 );
1374+floatx80 floatx80_add( floatx80, floatx80 );
1375+floatx80 floatx80_sub( floatx80, floatx80 );
1376+floatx80 floatx80_mul( floatx80, floatx80 );
1377+floatx80 floatx80_div( floatx80, floatx80 );
1378+floatx80 floatx80_rem( floatx80, floatx80 );
1379+floatx80 floatx80_sqrt( floatx80 );
1380+int floatx80_eq( floatx80, floatx80 );
1381+int floatx80_le( floatx80, floatx80 );
1382+int floatx80_lt( floatx80, floatx80 );
1383+int floatx80_eq_signaling( floatx80, floatx80 );
1384+int floatx80_le_quiet( floatx80, floatx80 );
1385+int floatx80_lt_quiet( floatx80, floatx80 );
1386+int floatx80_is_signaling_nan( floatx80 );
1387+
1388+#endif
1389+
1390+#ifdef FLOAT128
1391+
1392+/*----------------------------------------------------------------------------
1393+| Software IEC/IEEE quadruple-precision conversion routines.
1394+*----------------------------------------------------------------------------*/
1395+int float128_to_int32( float128 );
1396+int float128_to_int32_round_to_zero( float128 );
1397+long long float128_to_int64( float128 );
1398+long long float128_to_int64_round_to_zero( float128 );
1399+float32 float128_to_float32( float128 );
1400+float64 float128_to_float64( float128 );
1401+#ifdef FLOATX80
1402+floatx80 float128_to_floatx80( float128 );
1403+#endif
1404+
1405+/*----------------------------------------------------------------------------
1406+| Software IEC/IEEE quadruple-precision operations.
1407+*----------------------------------------------------------------------------*/
1408+float128 float128_round_to_int( float128 );
1409+float128 float128_add( float128, float128 );
1410+float128 float128_sub( float128, float128 );
1411+float128 float128_mul( float128, float128 );
1412+float128 float128_div( float128, float128 );
1413+float128 float128_rem( float128, float128 );
1414+float128 float128_sqrt( float128 );
1415+int float128_eq( float128, float128 );
1416+int float128_le( float128, float128 );
1417+int float128_lt( float128, float128 );
1418+int float128_eq_signaling( float128, float128 );
1419+int float128_le_quiet( float128, float128 );
1420+int float128_lt_quiet( float128, float128 );
1421+int float128_is_signaling_nan( float128 );
1422+
1423+#endif
1424+
1425--
14261.5.4
1427
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-12-09 18:12:07 +0000