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authorOtavio Salvador <otavio@ossystems.com.br>2014-03-12 22:25:59 -0300
committerOtavio Salvador <otavio@ossystems.com.br>2014-03-14 12:20:50 -0300
commit4000212f2a7206498cf65ed27b177b94d6004ded (patch)
tree57305ef859be6e2cab413dbec05c7d6f8b558aaf
parentb51b09bdbf5d31357bc86403dfdb0e21cbca9d08 (diff)
downloadmeta-freescale-4000212f2a7206498cf65ed27b177b94d6004ded.tar.gz
linux-imx (3.0.35): Drop recipe from base BSP
The 1.6 release cycle is focused in the 3.10.17-1.0.0 BSP and has no compromise in test and maintain the 3.0.35 compatibility. This does not mean the support as a whole will be dropped but no board in meta-fsl-arm BSP ought to use it. Users which need to use Freescale reference designs with 3.0.35 ought to keep using the Dora branch. Change-Id: I65927e26f54a6c2da824212b94d5e8c5f4a8bc07 Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Diffstat
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0001-perf-tools-Fix-getrusage-related-build-failure-on-gl.patch43
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0002-ARM-7668-1-fix-memset-related-crashes-caused-by-rece.patch259
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0003-ARM-7670-1-fix-the-memset-fix.patch87
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0004-ENGR00271136-Fix-build-break-when-CONFIG_CLK_DEBUG-i.patch43
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0005-ENGR00271359-Add-Multi-touch-support.patch98
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0006-Add-support-for-DVI-monitors.patch227
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0007-ARM-mach-mx6-board-mx6q_sabresd-Register-SDHC3-first.patch38
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/ENGR00278350-gpu-viante-4.6.9p13-kernel-part-integra.patch6261
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/drm-vivante-Add-00-sufix-in-returned-bus-Id.patch31
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/epdc-Rename-mxcfb_epdc_kernel.h-to-mxc_epdc.h.patch143
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6dl/defconfig301
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6q/defconfig302
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6s/defconfig267
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6sl/defconfig267
-rw-r--r--meta-fsl-arm/recipes-kernel/linux/linux-imx_3.0.35.bb26
15 files changed, 0 insertions, 8393 deletions
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0001-perf-tools-Fix-getrusage-related-build-failure-on-gl.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0001-perf-tools-Fix-getrusage-related-build-failure-on-gl.patch
deleted file mode 100644
index abc02c976..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0001-perf-tools-Fix-getrusage-related-build-failure-on-gl.patch
+++ /dev/null
@@ -1,43 +0,0 @@
1From 503daf4789dd23e4dc1e16c256de0c163fc2bf87 Mon Sep 17 00:00:00 2001
2From: Markus Trippelsdorf <markus@trippelsdorf.de>
3Date: Wed, 4 Apr 2012 10:45:27 +0200
4Subject: [PATCH] perf tools: Fix getrusage() related build failure on glibc
5 trunk
6MIME-Version: 1.0
7Content-Type: text/plain; charset=UTF-8
8Content-Transfer-Encoding: 8bit
9Organization: O.S. Systems Software LTDA.
10
11On a system running glibc trunk perf doesn't build:
12
13 CC builtin-sched.o
14builtin-sched.c: In function ‘get_cpu_usage_nsec_parent’: builtin-sched.c:399:16: error: storage size of ‘ru’ isn’t known builtin-sched.c:403:2: error: implicit declaration of function ‘getrusage’ [-Werror=implicit-function-declaration]
15 [...]
16
17Fix it by including sys/resource.h.
18
19Upstream-Status: Pending
20
21Signed-off-by: Markus Trippelsdorf <markus@trippelsdorf.de>
22Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
23Link: http://lkml.kernel.org/r/20120404084527.GA294@x4
24Signed-off-by: Ingo Molnar <mingo@kernel.org>
25---
26 tools/perf/builtin-sched.c | 1 +
27 1 file changed, 1 insertion(+)
28
29diff --git a/tools/perf/builtin-sched.c b/tools/perf/builtin-sched.c
30index dcfe887..3632c2f 100644
31--- a/tools/perf/builtin-sched.c
32+++ b/tools/perf/builtin-sched.c
33@@ -14,6 +14,7 @@
34 #include "util/debug.h"
35
36 #include <sys/prctl.h>
37+#include <sys/resource.h>
38
39 #include <semaphore.h>
40 #include <pthread.h>
41--
421.8.4.rc3
43
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0002-ARM-7668-1-fix-memset-related-crashes-caused-by-rece.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0002-ARM-7668-1-fix-memset-related-crashes-caused-by-rece.patch
deleted file mode 100644
index 4c31e7461..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0002-ARM-7668-1-fix-memset-related-crashes-caused-by-rece.patch
+++ /dev/null
@@ -1,259 +0,0 @@
1From 2235b85f1c76d98b5f1e160cbd0a61a84c15e125 Mon Sep 17 00:00:00 2001
2From: Ivan Djelic <ivan.djelic@parrot.com>
3Date: Wed, 6 Mar 2013 20:09:27 +0100
4Subject: [PATCH] ARM: 7668/1: fix memset-related crashes caused by recent GCC
5 (4.7.2) optimizations
6Organization: O.S. Systems Software LTDA.
7
8Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
9assumptions about the implementation of memset and similar functions.
10The current ARM optimized memset code does not return the value of
11its first argument, as is usually expected from standard implementations.
12
13For instance in the following function:
14
15void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
16{
17 memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
18 waiter->magic = waiter;
19 INIT_LIST_HEAD(&waiter->list);
20}
21
22compiled as:
23
24800554d0 <debug_mutex_lock_common>:
25800554d0: e92d4008 push {r3, lr}
26800554d4: e1a00001 mov r0, r1
27800554d8: e3a02010 mov r2, #16 ; 0x10
28800554dc: e3a01011 mov r1, #17 ; 0x11
29800554e0: eb04426e bl 80165ea0 <memset>
30800554e4: e1a03000 mov r3, r0
31800554e8: e583000c str r0, [r3, #12]
32800554ec: e5830000 str r0, [r3]
33800554f0: e5830004 str r0, [r3, #4]
34800554f4: e8bd8008 pop {r3, pc}
35
36GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
37register/memory corruptions.
38
39This patch fixes the return value of the assembly version of memset.
40It adds a 'mov' instruction and merges an additional load+store into
41existing load/store instructions.
42For ease of review, here is a breakdown of the patch into 4 simple steps:
43
44Step 1
45======
46Perform the following substitutions:
47ip -> r8, then
48r0 -> ip,
49and insert 'mov ip, r0' as the first statement of the function.
50At this point, we have a memset() implementation returning the proper result,
51but corrupting r8 on some paths (the ones that were using ip).
52
53Step 2
54======
55Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:
56
57save r8:
58- str lr, [sp, #-4]!
59+ stmfd sp!, {r8, lr}
60
61and restore r8 on both exit paths:
62- ldmeqfd sp!, {pc} @ Now <64 bytes to go.
63+ ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
64(...)
65 tst r2, #16
66 stmneia ip!, {r1, r3, r8, lr}
67- ldr lr, [sp], #4
68+ ldmfd sp!, {r8, lr}
69
70Step 3
71======
72Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:
73
74save r8:
75- stmfd sp!, {r4-r7, lr}
76+ stmfd sp!, {r4-r8, lr}
77
78and restore r8 on both exit paths:
79 bgt 3b
80- ldmeqfd sp!, {r4-r7, pc}
81+ ldmeqfd sp!, {r4-r8, pc}
82(...)
83 tst r2, #16
84 stmneia ip!, {r4-r7}
85- ldmfd sp!, {r4-r7, lr}
86+ ldmfd sp!, {r4-r8, lr}
87
88Step 4
89======
90Rewrite register list "r4-r7, r8" as "r4-r8".
91
92Upstream-Status: Pending
93
94Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
95Reviewed-by: Nicolas Pitre <nico@linaro.org>
96Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
97Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
98(cherry picked from commit 455bd4c430b0c0a361f38e8658a0d6cb469942b5)
99---
100 arch/arm/lib/memset.S | 85 ++++++++++++++++++++++++++-------------------------
101 1 file changed, 44 insertions(+), 41 deletions(-)
102
103diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
104index 650d592..d912e73 100644
105--- a/arch/arm/lib/memset.S
106+++ b/arch/arm/lib/memset.S
107@@ -19,9 +19,9 @@
108 1: subs r2, r2, #4 @ 1 do we have enough
109 blt 5f @ 1 bytes to align with?
110 cmp r3, #2 @ 1
111- strltb r1, [r0], #1 @ 1
112- strleb r1, [r0], #1 @ 1
113- strb r1, [r0], #1 @ 1
114+ strltb r1, [ip], #1 @ 1
115+ strleb r1, [ip], #1 @ 1
116+ strb r1, [ip], #1 @ 1
117 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
118 /*
119 * The pointer is now aligned and the length is adjusted. Try doing the
120@@ -29,10 +29,14 @@
121 */
122
123 ENTRY(memset)
124- ands r3, r0, #3 @ 1 unaligned?
125+/*
126+ * Preserve the contents of r0 for the return value.
127+ */
128+ mov ip, r0
129+ ands r3, ip, #3 @ 1 unaligned?
130 bne 1b @ 1
131 /*
132- * we know that the pointer in r0 is aligned to a word boundary.
133+ * we know that the pointer in ip is aligned to a word boundary.
134 */
135 orr r1, r1, r1, lsl #8
136 orr r1, r1, r1, lsl #16
137@@ -43,29 +47,28 @@ ENTRY(memset)
138 #if ! CALGN(1)+0
139
140 /*
141- * We need an extra register for this loop - save the return address and
142- * use the LR
143+ * We need 2 extra registers for this loop - use r8 and the LR
144 */
145- str lr, [sp, #-4]!
146- mov ip, r1
147+ stmfd sp!, {r8, lr}
148+ mov r8, r1
149 mov lr, r1
150
151 2: subs r2, r2, #64
152- stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
153- stmgeia r0!, {r1, r3, ip, lr}
154- stmgeia r0!, {r1, r3, ip, lr}
155- stmgeia r0!, {r1, r3, ip, lr}
156+ stmgeia ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
157+ stmgeia ip!, {r1, r3, r8, lr}
158+ stmgeia ip!, {r1, r3, r8, lr}
159+ stmgeia ip!, {r1, r3, r8, lr}
160 bgt 2b
161- ldmeqfd sp!, {pc} @ Now <64 bytes to go.
162+ ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
163 /*
164 * No need to correct the count; we're only testing bits from now on
165 */
166 tst r2, #32
167- stmneia r0!, {r1, r3, ip, lr}
168- stmneia r0!, {r1, r3, ip, lr}
169+ stmneia ip!, {r1, r3, r8, lr}
170+ stmneia ip!, {r1, r3, r8, lr}
171 tst r2, #16
172- stmneia r0!, {r1, r3, ip, lr}
173- ldr lr, [sp], #4
174+ stmneia ip!, {r1, r3, r8, lr}
175+ ldmfd sp!, {r8, lr}
176
177 #else
178
179@@ -74,54 +77,54 @@ ENTRY(memset)
180 * whole cache lines at once.
181 */
182
183- stmfd sp!, {r4-r7, lr}
184+ stmfd sp!, {r4-r8, lr}
185 mov r4, r1
186 mov r5, r1
187 mov r6, r1
188 mov r7, r1
189- mov ip, r1
190+ mov r8, r1
191 mov lr, r1
192
193 cmp r2, #96
194- tstgt r0, #31
195+ tstgt ip, #31
196 ble 3f
197
198- and ip, r0, #31
199- rsb ip, ip, #32
200- sub r2, r2, ip
201- movs ip, ip, lsl #(32 - 4)
202- stmcsia r0!, {r4, r5, r6, r7}
203- stmmiia r0!, {r4, r5}
204- tst ip, #(1 << 30)
205- mov ip, r1
206- strne r1, [r0], #4
207+ and r8, ip, #31
208+ rsb r8, r8, #32
209+ sub r2, r2, r8
210+ movs r8, r8, lsl #(32 - 4)
211+ stmcsia ip!, {r4, r5, r6, r7}
212+ stmmiia ip!, {r4, r5}
213+ tst r8, #(1 << 30)
214+ mov r8, r1
215+ strne r1, [ip], #4
216
217 3: subs r2, r2, #64
218- stmgeia r0!, {r1, r3-r7, ip, lr}
219- stmgeia r0!, {r1, r3-r7, ip, lr}
220+ stmgeia ip!, {r1, r3-r8, lr}
221+ stmgeia ip!, {r1, r3-r8, lr}
222 bgt 3b
223- ldmeqfd sp!, {r4-r7, pc}
224+ ldmeqfd sp!, {r4-r8, pc}
225
226 tst r2, #32
227- stmneia r0!, {r1, r3-r7, ip, lr}
228+ stmneia ip!, {r1, r3-r8, lr}
229 tst r2, #16
230- stmneia r0!, {r4-r7}
231- ldmfd sp!, {r4-r7, lr}
232+ stmneia ip!, {r4-r7}
233+ ldmfd sp!, {r4-r8, lr}
234
235 #endif
236
237 4: tst r2, #8
238- stmneia r0!, {r1, r3}
239+ stmneia ip!, {r1, r3}
240 tst r2, #4
241- strne r1, [r0], #4
242+ strne r1, [ip], #4
243 /*
244 * When we get here, we've got less than 4 bytes to zero. We
245 * may have an unaligned pointer as well.
246 */
247 5: tst r2, #2
248- strneb r1, [r0], #1
249- strneb r1, [r0], #1
250+ strneb r1, [ip], #1
251+ strneb r1, [ip], #1
252 tst r2, #1
253- strneb r1, [r0], #1
254+ strneb r1, [ip], #1
255 mov pc, lr
256 ENDPROC(memset)
257--
2581.8.4.rc3
259
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0003-ARM-7670-1-fix-the-memset-fix.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0003-ARM-7670-1-fix-the-memset-fix.patch
deleted file mode 100644
index b8d6f537b..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0003-ARM-7670-1-fix-the-memset-fix.patch
+++ /dev/null
@@ -1,87 +0,0 @@
1From 2ba23fa6c4128febaaf57fe184420a7111caa237 Mon Sep 17 00:00:00 2001
2From: Nicolas Pitre <nicolas.pitre@linaro.org>
3Date: Tue, 12 Mar 2013 13:00:42 +0100
4Subject: [PATCH] ARM: 7670/1: fix the memset fix
5Organization: O.S. Systems Software LTDA.
6
7Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
8recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
9with the memset return value. However the memset itself became broken
10by that patch for misaligned pointers.
11
12This fixes the above by branching over the entry code from the
13misaligned fixup code to avoid reloading the original pointer.
14
15Also, because the function entry alignment is wrong in the Thumb mode
16compilation, that fixup code is moved to the end.
17
18While at it, the entry instructions are slightly reworked to help dual
19issue pipelines.
20
21Upstream-Status: Pending
22
23Signed-off-by: Nicolas Pitre <nico@linaro.org>
24Tested-by: Alexander Holler <holler@ahsoftware.de>
25Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
26(cherry picked from commit 418df63adac56841ef6b0f1fcf435bc64d4ed177)
27---
28 arch/arm/lib/memset.S | 33 +++++++++++++--------------------
29 1 file changed, 13 insertions(+), 20 deletions(-)
30
31diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
32index d912e73..94b0650 100644
33--- a/arch/arm/lib/memset.S
34+++ b/arch/arm/lib/memset.S
35@@ -14,31 +14,15 @@
36
37 .text
38 .align 5
39- .word 0
40-
41-1: subs r2, r2, #4 @ 1 do we have enough
42- blt 5f @ 1 bytes to align with?
43- cmp r3, #2 @ 1
44- strltb r1, [ip], #1 @ 1
45- strleb r1, [ip], #1 @ 1
46- strb r1, [ip], #1 @ 1
47- add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
48-/*
49- * The pointer is now aligned and the length is adjusted. Try doing the
50- * memset again.
51- */
52
53 ENTRY(memset)
54-/*
55- * Preserve the contents of r0 for the return value.
56- */
57- mov ip, r0
58- ands r3, ip, #3 @ 1 unaligned?
59- bne 1b @ 1
60+ ands r3, r0, #3 @ 1 unaligned?
61+ mov ip, r0 @ preserve r0 as return value
62+ bne 6f @ 1
63 /*
64 * we know that the pointer in ip is aligned to a word boundary.
65 */
66- orr r1, r1, r1, lsl #8
67+1: orr r1, r1, r1, lsl #8
68 orr r1, r1, r1, lsl #16
69 mov r3, r1
70 cmp r2, #16
71@@ -127,4 +111,13 @@ ENTRY(memset)
72 tst r2, #1
73 strneb r1, [ip], #1
74 mov pc, lr
75+
76+6: subs r2, r2, #4 @ 1 do we have enough
77+ blt 5b @ 1 bytes to align with?
78+ cmp r3, #2 @ 1
79+ strltb r1, [ip], #1 @ 1
80+ strleb r1, [ip], #1 @ 1
81+ strb r1, [ip], #1 @ 1
82+ add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
83+ b 1b
84 ENDPROC(memset)
85--
861.8.4.rc3
87
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0004-ENGR00271136-Fix-build-break-when-CONFIG_CLK_DEBUG-i.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0004-ENGR00271136-Fix-build-break-when-CONFIG_CLK_DEBUG-i.patch
deleted file mode 100644
index 73163515b..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0004-ENGR00271136-Fix-build-break-when-CONFIG_CLK_DEBUG-i.patch
+++ /dev/null
@@ -1,43 +0,0 @@
1From d8601292ae25e0af47aa4486055221ab44113f0e Mon Sep 17 00:00:00 2001
2From: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
3Date: Mon, 15 Jul 2013 15:34:54 -0500
4Subject: [PATCH] ENGR00271136 Fix build break when CONFIG_CLK_DEBUG is
5 disabled
6Organization: O.S. Systems Software LTDA.
7
8clk structure member name is defined only when CONFIG_CLK_DEBUG is enabled.
9Hence need to encapsulate the code with this config.
10
11Patch received from imx community:
12https://community.freescale.com/thread/308482
13
14Upstream-Status: Pending
15
16Signed-off-by: xiongweihuang
17Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
18---
19 arch/arm/plat-mxc/clock.c | 4 ++--
20 1 file changed, 2 insertions(+), 2 deletions(-)
21
22diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c
23index 93347eb..1aa2664 100755
24--- a/arch/arm/plat-mxc/clock.c
25+++ b/arch/arm/plat-mxc/clock.c
26@@ -58,12 +58,12 @@ static void __clk_disable(struct clk *clk)
27 {
28 if (clk == NULL || IS_ERR(clk))
29 return;
30-
31+#ifdef CONFIG_CLK_DEBUG
32 if (!clk->usecount) {
33 WARN(1, "clock enable/disable mismatch! clk %s\n", clk->name);
34 return;
35 }
36-
37+#endif
38 if (!(--clk->usecount)) {
39 if (clk->disable)
40 clk->disable(clk);
41--
421.8.4.rc3
43
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0005-ENGR00271359-Add-Multi-touch-support.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0005-ENGR00271359-Add-Multi-touch-support.patch
deleted file mode 100644
index cb201980e..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0005-ENGR00271359-Add-Multi-touch-support.patch
+++ /dev/null
@@ -1,98 +0,0 @@
1From 538f4bb2f7a51f267395550a5be9f0ab2e426712 Mon Sep 17 00:00:00 2001
2From: Erik Boto <erik.boto@pelagicore.com>
3Date: Tue, 16 Jul 2013 12:06:05 -0500
4Subject: [PATCH] ENGR00271359 Add Multi-touch support
5Organization: O.S. Systems Software LTDA.
6
7The previous behavior of the driver did not work properly with Qt5
8QtQuick multi touch-point gestures, due to how touch-points are
9reported when removing a touch-point. My interpretation of the
10available documentation [1] was that the driver should report all
11touch-points between SYN_REPORTs, but it is not explicitly stated so.
12I've found another mail-thread [2] where the creator of the protocol
13states:
14
15"The protocol defines a generic way of sending a variable amount of
16contacts. The contact count is obtained by counting the number of
17non-empty finger packets between SYN_REPORT events."-Henrik Rydberg
18
19I think this verifies my assumption that all touch-points should be
20reported between SYN_REPORTs, otherwise it can not be used to obtain
21the count.
22
23[1] https://www.kernel.org/doc/Documentation/input/multi-touch-protocol.txt
24[2] http://lists.x.org/archives/xorg-devel/2010-March/006466.html
25
26Upstream-Status: Pending
27
28Signed-off-by: Erik Boto <erik.boto@pelagicore.com>
29Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
30(cherry picked from commit 7cba001c5a502680f6dbf902821726779a9c9287)
31---
32 drivers/input/touchscreen/egalax_ts.c | 36 +++++++++++++++++------------------
33 1 file changed, 18 insertions(+), 18 deletions(-)
34
35diff --git a/drivers/input/touchscreen/egalax_ts.c b/drivers/input/touchscreen/egalax_ts.c
36index 0b6cde7..271f820 100644
37--- a/drivers/input/touchscreen/egalax_ts.c
38+++ b/drivers/input/touchscreen/egalax_ts.c
39@@ -133,7 +133,6 @@ retry:
40 }
41
42 if (down) {
43- /* should also report old pointers */
44 events[id].valid = valid;
45 events[id].status = down;
46 events[id].x = x;
47@@ -144,23 +143,6 @@ retry:
48 input_report_abs(input_dev, ABS_Y, y);
49 input_event(data->input_dev, EV_KEY, BTN_TOUCH, 1);
50 input_report_abs(input_dev, ABS_PRESSURE, 1);
51-#else
52- for (i = 0; i < MAX_SUPPORT_POINTS; i++) {
53- if (!events[i].valid)
54- continue;
55- dev_dbg(&client->dev, "report id:%d valid:%d x:%d y:%d",
56- i, valid, x, y);
57-
58- input_report_abs(input_dev,
59- ABS_MT_TRACKING_ID, i);
60- input_report_abs(input_dev,
61- ABS_MT_TOUCH_MAJOR, 1);
62- input_report_abs(input_dev,
63- ABS_MT_POSITION_X, events[i].x);
64- input_report_abs(input_dev,
65- ABS_MT_POSITION_Y, events[i].y);
66- input_mt_sync(input_dev);
67- }
68 #endif
69 } else {
70 dev_dbg(&client->dev, "release id:%d\n", id);
71@@ -176,6 +158,24 @@ retry:
72 #endif
73 }
74
75+#ifndef CONFIG_TOUCHSCREEN_EGALAX_SINGLE_TOUCH
76+ /* report all pointers */
77+ for (i = 0; i < MAX_SUPPORT_POINTS; i++) {
78+ if (!events[i].valid)
79+ continue;
80+ dev_dbg(&client->dev, "report id:%d valid:%d x:%d y:%d",
81+ i, valid, x, y);
82+ input_report_abs(input_dev,
83+ ABS_MT_TRACKING_ID, i);
84+ input_report_abs(input_dev,
85+ ABS_MT_TOUCH_MAJOR, 1);
86+ input_report_abs(input_dev,
87+ ABS_MT_POSITION_X, events[i].x);
88+ input_report_abs(input_dev,
89+ ABS_MT_POSITION_Y, events[i].y);
90+ input_mt_sync(input_dev);
91+ }
92+#endif
93 input_sync(input_dev);
94 return IRQ_HANDLED;
95 }
96--
971.8.4.rc3
98
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0006-Add-support-for-DVI-monitors.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0006-Add-support-for-DVI-monitors.patch
deleted file mode 100644
index 00a6b5c6d..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0006-Add-support-for-DVI-monitors.patch
+++ /dev/null
@@ -1,227 +0,0 @@
1From 3e6441d113f72b412081a2c87f39011e4c253a35 Mon Sep 17 00:00:00 2001
2From: Robert Winkler <robert.winkler@boundarydevices.com>
3Date: Fri, 19 Jul 2013 19:00:41 -0700
4Subject: [PATCH] Add support for DVI monitors
5Organization: O.S. Systems Software LTDA.
6
7Upstream-Status: Pending
8
9Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
10---
11 arch/arm/plat-mxc/include/mach/mxc_hdmi.h | 7 +++
12 drivers/video/mxc_hdmi.c | 98 +++++++++++++------------------
13 2 files changed, 49 insertions(+), 56 deletions(-)
14
15diff --git a/arch/arm/plat-mxc/include/mach/mxc_hdmi.h b/arch/arm/plat-mxc/include/mach/mxc_hdmi.h
16index 94f7638..af59c62 100644
17--- a/arch/arm/plat-mxc/include/mach/mxc_hdmi.h
18+++ b/arch/arm/plat-mxc/include/mach/mxc_hdmi.h
19@@ -605,6 +605,10 @@ enum {
20 HDMI_IH_MUTE_PHY_STAT0_TX_PHY_LOCK = 0x2,
21 HDMI_IH_MUTE_PHY_STAT0_HPD = 0x1,
22
23+/* IH and IH_MUTE convenience macro RX_SENSE | HPD*/
24+ HDMI_DVI_IH_STAT = 0x3D,
25+
26+
27 /* IH_AHBDMAAUD_STAT0 field values */
28 HDMI_IH_AHBDMAAUD_STAT0_ERROR = 0x20,
29 HDMI_IH_AHBDMAAUD_STAT0_LOST = 0x10,
30@@ -903,6 +907,9 @@ enum {
31 HDMI_PHY_HPD = 0x02,
32 HDMI_PHY_TX_PHY_LOCK = 0x01,
33
34+/* HDMI STAT convenience RX_SENSE | HPD */
35+ HDMI_DVI_STAT = 0xF2,
36+
37 /* PHY_I2CM_SLAVE_ADDR field values */
38 HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,
39 HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,
40diff --git a/drivers/video/mxc_hdmi.c b/drivers/video/mxc_hdmi.c
41index c5069aa..544f352 100644
42--- a/drivers/video/mxc_hdmi.c
43+++ b/drivers/video/mxc_hdmi.c
44@@ -180,7 +180,6 @@ struct mxc_hdmi {
45 bool dft_mode_set;
46 char *dft_mode_str;
47 int default_bpp;
48- u8 latest_intr_stat;
49 bool irq_enabled;
50 spinlock_t irq_lock;
51 bool phy_enabled;
52@@ -1996,58 +1995,48 @@ static void hotplug_worker(struct work_struct *work)
53 struct delayed_work *delay_work = to_delayed_work(work);
54 struct mxc_hdmi *hdmi =
55 container_of(delay_work, struct mxc_hdmi, hotplug_work);
56- u32 phy_int_stat, phy_int_pol, phy_int_mask;
57- u8 val;
58+ u32 hdmi_phy_stat0, hdmi_phy_pol0, hdmi_phy_mask0;
59 unsigned long flags;
60 char event_string[32];
61 char *envp[] = { event_string, NULL };
62
63- phy_int_stat = hdmi->latest_intr_stat;
64- phy_int_pol = hdmi_readb(HDMI_PHY_POL0);
65
66- dev_dbg(&hdmi->pdev->dev, "phy_int_stat=0x%x, phy_int_pol=0x%x\n",
67- phy_int_stat, phy_int_pol);
68+ hdmi_phy_stat0 = hdmi_readb(HDMI_PHY_STAT0);
69+ hdmi_phy_pol0 = hdmi_readb(HDMI_PHY_POL0);
70+
71+ dev_dbg(&hdmi->pdev->dev, "hdmi_phy_stat0=0x%x, hdmi_phy_pol0=0x%x\n",
72+ hdmi_phy_stat0, hdmi_phy_pol0);
73+
74+ /* Make HPD intr active low to capture unplug event or
75+ * active high to capture plugin event */
76+ hdmi_writeb((HDMI_DVI_STAT & ~hdmi_phy_stat0), HDMI_PHY_POL0);
77
78 /* check cable status */
79- if (phy_int_stat & HDMI_IH_PHY_STAT0_HPD) {
80- /* cable connection changes */
81- if (phy_int_pol & HDMI_PHY_HPD) {
82- /* Plugin event */
83- dev_dbg(&hdmi->pdev->dev, "EVENT=plugin\n");
84- mxc_hdmi_cable_connected(hdmi);
85-
86- /* Make HPD intr active low to capture unplug event */
87- val = hdmi_readb(HDMI_PHY_POL0);
88- val &= ~HDMI_PHY_HPD;
89- hdmi_writeb(val, HDMI_PHY_POL0);
90-
91- sprintf(event_string, "EVENT=plugin");
92- kobject_uevent_env(&hdmi->pdev->dev.kobj, KOBJ_CHANGE, envp);
93+ if (hdmi_phy_stat0 & HDMI_DVI_STAT) {
94+ /* Plugin event */
95+ dev_dbg(&hdmi->pdev->dev, "EVENT=plugin\n");
96+ mxc_hdmi_cable_connected(hdmi);
97+
98+ sprintf(event_string, "EVENT=plugin");
99+ kobject_uevent_env(&hdmi->pdev->dev.kobj, KOBJ_CHANGE, envp);
100 #ifdef CONFIG_MXC_HDMI_CEC
101- mxc_hdmi_cec_handle(0x80);
102+ mxc_hdmi_cec_handle(0x80);
103 #endif
104- hdmi_set_cable_state(1);
105-
106- } else if (!(phy_int_pol & HDMI_PHY_HPD)) {
107- /* Plugout event */
108- dev_dbg(&hdmi->pdev->dev, "EVENT=plugout\n");
109- hdmi_set_cable_state(0);
110- mxc_hdmi_abort_stream();
111- mxc_hdmi_cable_disconnected(hdmi);
112+ hdmi_set_cable_state(1);
113
114- /* Make HPD intr active high to capture plugin event */
115- val = hdmi_readb(HDMI_PHY_POL0);
116- val |= HDMI_PHY_HPD;
117- hdmi_writeb(val, HDMI_PHY_POL0);
118+ } else {
119+ /* Plugout event */
120+ dev_dbg(&hdmi->pdev->dev, "EVENT=plugout\n");
121+ hdmi_set_cable_state(0);
122+ mxc_hdmi_abort_stream();
123+ mxc_hdmi_cable_disconnected(hdmi);
124
125- sprintf(event_string, "EVENT=plugout");
126- kobject_uevent_env(&hdmi->pdev->dev.kobj, KOBJ_CHANGE, envp);
127+ sprintf(event_string, "EVENT=plugout");
128+ kobject_uevent_env(&hdmi->pdev->dev.kobj, KOBJ_CHANGE, envp);
129 #ifdef CONFIG_MXC_HDMI_CEC
130- mxc_hdmi_cec_handle(0x100);
131+ mxc_hdmi_cec_handle(0x100);
132 #endif
133
134- } else
135- dev_dbg(&hdmi->pdev->dev, "EVENT=none?\n");
136 }
137
138 /* Lock here to ensure full powerdown sequence
139@@ -2055,12 +2044,12 @@ static void hotplug_worker(struct work_struct *work)
140 spin_lock_irqsave(&hdmi->irq_lock, flags);
141
142 /* Re-enable HPD interrupts */
143- phy_int_mask = hdmi_readb(HDMI_PHY_MASK0);
144- phy_int_mask &= ~HDMI_PHY_HPD;
145- hdmi_writeb(phy_int_mask, HDMI_PHY_MASK0);
146+ hdmi_phy_mask0 = hdmi_readb(HDMI_PHY_MASK0);
147+ hdmi_phy_mask0 &= ~HDMI_DVI_STAT;
148+ hdmi_writeb(hdmi_phy_mask0, HDMI_PHY_MASK0);
149
150 /* Unmute interrupts */
151- hdmi_writeb(~HDMI_IH_MUTE_PHY_STAT0_HPD, HDMI_IH_MUTE_PHY_STAT0);
152+ hdmi_writeb(~HDMI_DVI_IH_STAT, HDMI_IH_MUTE_PHY_STAT0);
153
154 if (hdmi_readb(HDMI_IH_FC_STAT2) & HDMI_IH_FC_STAT2_OVERFLOW_MASK)
155 mxc_hdmi_clear_overflow();
156@@ -2086,7 +2075,7 @@ static void hdcp_hdp_worker(struct work_struct *work)
157 static irqreturn_t mxc_hdmi_hotplug(int irq, void *data)
158 {
159 struct mxc_hdmi *hdmi = data;
160- u8 val, intr_stat;
161+ u8 val;
162 unsigned long flags;
163
164 spin_lock_irqsave(&hdmi->irq_lock, flags);
165@@ -2108,25 +2097,22 @@ static irqreturn_t mxc_hdmi_hotplug(int irq, void *data)
166 * HDMI registers.
167 */
168 /* Capture status - used in hotplug_worker ISR */
169- intr_stat = hdmi_readb(HDMI_IH_PHY_STAT0);
170-
171- if (intr_stat & HDMI_IH_PHY_STAT0_HPD) {
172+ if (hdmi_readb(HDMI_IH_PHY_STAT0) & HDMI_DVI_IH_STAT) {
173
174 dev_dbg(&hdmi->pdev->dev, "Hotplug interrupt received\n");
175- hdmi->latest_intr_stat = intr_stat;
176
177 /* Mute interrupts until handled */
178
179 val = hdmi_readb(HDMI_IH_MUTE_PHY_STAT0);
180- val |= HDMI_IH_MUTE_PHY_STAT0_HPD;
181+ val |= HDMI_DVI_IH_STAT;
182 hdmi_writeb(val, HDMI_IH_MUTE_PHY_STAT0);
183
184 val = hdmi_readb(HDMI_PHY_MASK0);
185- val |= HDMI_PHY_HPD;
186+ val |= HDMI_DVI_STAT;
187 hdmi_writeb(val, HDMI_PHY_MASK0);
188
189 /* Clear Hotplug interrupts */
190- hdmi_writeb(HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0);
191+ hdmi_writeb(HDMI_DVI_IH_STAT, HDMI_IH_PHY_STAT0);
192
193 schedule_delayed_work(&(hdmi->hotplug_work), msecs_to_jiffies(20));
194 }
195@@ -2282,13 +2268,13 @@ static void mxc_hdmi_fb_registered(struct mxc_hdmi *hdmi)
196 HDMI_PHY_I2CM_CTLINT_ADDR);
197
198 /* enable cable hot plug irq */
199- hdmi_writeb((u8)~HDMI_PHY_HPD, HDMI_PHY_MASK0);
200+ hdmi_writeb((u8)~HDMI_DVI_STAT, HDMI_PHY_MASK0);
201
202 /* Clear Hotplug interrupts */
203- hdmi_writeb(HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0);
204+ hdmi_writeb(HDMI_DVI_IH_STAT, HDMI_IH_PHY_STAT0);
205
206 /* Unmute interrupts */
207- hdmi_writeb(~HDMI_IH_MUTE_PHY_STAT0_HPD, HDMI_IH_MUTE_PHY_STAT0);
208+ hdmi_writeb(~HDMI_DVI_IH_STAT, HDMI_IH_MUTE_PHY_STAT0);
209
210 hdmi->fb_reg = true;
211
212@@ -2522,10 +2508,10 @@ static int mxc_hdmi_disp_init(struct mxc_dispdrv_handle *disp,
213
214 /* Configure registers related to HDMI interrupt
215 * generation before registering IRQ. */
216- hdmi_writeb(HDMI_PHY_HPD, HDMI_PHY_POL0);
217+ hdmi_writeb(HDMI_DVI_STAT, HDMI_PHY_POL0);
218
219 /* Clear Hotplug interrupts */
220- hdmi_writeb(HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0);
221+ hdmi_writeb(HDMI_DVI_IH_STAT, HDMI_IH_PHY_STAT0);
222
223 hdmi->nb.notifier_call = mxc_hdmi_fb_event;
224 ret = fb_register_client(&hdmi->nb);
225--
2261.8.4.rc3
227
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0007-ARM-mach-mx6-board-mx6q_sabresd-Register-SDHC3-first.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0007-ARM-mach-mx6-board-mx6q_sabresd-Register-SDHC3-first.patch
deleted file mode 100644
index d02aa40a3..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/0007-ARM-mach-mx6-board-mx6q_sabresd-Register-SDHC3-first.patch
+++ /dev/null
@@ -1,38 +0,0 @@
1From cd31abbe08372fa870fac78ae845edd4859f8835 Mon Sep 17 00:00:00 2001
2From: Fabio Estevam <fabio.estevam@freescale.com>
3Date: Sat, 28 Sep 2013 18:46:18 -0300
4Subject: [PATCH] ARM: mach-mx6: board-mx6q_sabresd: Register SDHC3 first
5Organization: O.S. Systems Software LTDA.
6
7On sabresd boards we boot from SDHC3, so let's register it as mmc0.
8
9Currently eMMC is mmc0 and mmc1 can be SDHC3 or SDHC2 (if present).
10
11Registering SDHC3 is safer as we can always find the rootfs.
12
13Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
14---
15 arch/arm/mach-mx6/board-mx6q_sabresd.c | 5 +----
16 1 file changed, 1 insertion(+), 4 deletions(-)
17
18diff --git a/arch/arm/mach-mx6/board-mx6q_sabresd.c b/arch/arm/mach-mx6/board-mx6q_sabresd.c
19index 3f9a845..4e6b323 100644
20--- a/arch/arm/mach-mx6/board-mx6q_sabresd.c
21+++ b/arch/arm/mach-mx6/board-mx6q_sabresd.c
22@@ -1847,12 +1847,9 @@ static void __init mx6_sabresd_board_init(void)
23
24 imx6q_add_pm_imx(0, &mx6q_sabresd_pm_data);
25
26- /* Move sd4 to first because sd4 connect to emmc.
27- Mfgtools want emmc is mmcblk0 and other sd card is mmcblk1.
28- */
29+ imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabresd_sd3_data);
30 imx6q_add_sdhci_usdhc_imx(3, &mx6q_sabresd_sd4_data);
31 imx6q_add_sdhci_usdhc_imx(1, &mx6q_sabresd_sd2_data);
32- imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabresd_sd3_data);
33 imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
34 imx6q_sabresd_init_usb();
35 /* SATA is not supported by MX6DL/Solo */
36--
371.8.4.rc3
38
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/ENGR00278350-gpu-viante-4.6.9p13-kernel-part-integra.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/ENGR00278350-gpu-viante-4.6.9p13-kernel-part-integra.patch
deleted file mode 100644
index 1e039fd5f..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/ENGR00278350-gpu-viante-4.6.9p13-kernel-part-integra.patch
+++ /dev/null
@@ -1,6261 +0,0 @@
1From 2e575255b8c53d3cfe2af068411696fe3c40debb Mon Sep 17 00:00:00 2001
2From: Loren Huang <b02279@freescale.com>
3Date: Mon, 2 Sep 2013 12:16:48 +0800
4Subject: [PATCH 01/16] ENGR00278350 gpu:viante 4.6.9p13 kernel part
5 integration
6
7Integrated 4.6.9p13 kernel part change.
8This integration is mainly for android test.
9Linux test will be focused on 3.10 kernel.
10
11Signed-off-by: Loren HUANG <b02279@freescale.com>
12Acked-by: Shawn Guo
13---
14 drivers/mxc/gpu-viv/Kbuild | 33 +-
15 .../GC350/hal/kernel/gc_hal_kernel_hardware_vg.c | 177 ++--
16 .../GC350/hal/kernel/gc_hal_kernel_hardware_vg.h | 9 +-
17 .../arch/XAQ2/hal/kernel/gc_hal_kernel_context.c | 8 +-
18 .../arch/XAQ2/hal/kernel/gc_hal_kernel_context.h | 13 +
19 .../arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c | 736 ++++++++++++-
20 .../arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h | 1 +
21 drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c | 125 ++-
22 drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h | 24 +-
23 .../mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c | 57 ++
24 .../gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c | 45 +-
25 drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c | 12 +
26 .../mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c | 29 +
27 .../hal/kernel/gc_hal_kernel_interrupt_vg.c | 3 +
28 drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c | 8 +-
29 .../hal/kernel/gc_hal_kernel_video_memory.c | 20 +-
30 drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h | 84 +-
31 drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h | 172 +++-
32 .../mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h | 142 ++-
33 drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h | 37 +
34 drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h | 46 +-
35 drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h | 125 ++-
36 .../mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h | 86 +-
37 .../mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h | 1078 +++-----------------
38 drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h | 48 +
39 drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h | 79 +-
40 .../mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h | 2 +-
41 .../hal/os/linux/kernel/gc_hal_kernel_device.c | 17 +-
42 .../hal/os/linux/kernel/gc_hal_kernel_device.h | 16 +-
43 .../hal/os/linux/kernel/gc_hal_kernel_driver.c | 99 +-
44 .../gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c | 655 ++++++++++--
45 .../hal/os/linux/kernel/gc_hal_kernel_sync.c | 174 ++++
46 .../hal/os/linux/kernel/gc_hal_kernel_sync.h | 71 ++
47 33 files changed, 2974 insertions(+), 1257 deletions(-)
48 create mode 100644 drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c
49 create mode 100644 drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h
50
51diff --git a/drivers/mxc/gpu-viv/Kbuild b/drivers/mxc/gpu-viv/Kbuild
52index 93b1259..2b277d6 100644
53--- a/drivers/mxc/gpu-viv/Kbuild
54+++ b/drivers/mxc/gpu-viv/Kbuild
55@@ -45,8 +45,6 @@ OBJS := $(OS_KERNEL_DIR)/gc_hal_kernel_device.o \
56 $(OS_KERNEL_DIR)/gc_hal_kernel_os.o \
57 $(OS_KERNEL_DIR)/gc_hal_kernel_debugfs.o
58
59-ifeq ($(USE_3D_VG), 1)
60-
61 OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \
62 $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \
63 $(HAL_KERNEL_DIR)/gc_hal_kernel_db.o \
64@@ -69,19 +67,9 @@ OBJS +=\
65 $(ARCH_VG_KERNEL_DIR)/gc_hal_kernel_hardware_command_vg.o\
66 $(ARCH_VG_KERNEL_DIR)/gc_hal_kernel_hardware_vg.o
67 endif
68-else
69-
70-OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \
71- $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \
72- $(HAL_KERNEL_DIR)/gc_hal_kernel_heap.o \
73- $(HAL_KERNEL_DIR)/gc_hal_kernel_interrupt.o \
74- $(HAL_KERNEL_DIR)/gc_hal_kernel_mmu.o \
75- $(HAL_KERNEL_DIR)/gc_hal_kernel_video_memory.o \
76- $(OS_KERNEL_DIR)/gc_hal_kernel_debug.o
77-
78-OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware.o \
79- $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware_command.o
80
81+ifneq ($(CONFIG_SYNC),)
82+OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_sync.o
83 endif
84
85 ifeq ($(KERNELRELEASE), )
86@@ -129,23 +117,16 @@ ifeq ($(CONFIG_DOVE_GPU), 1)
87 EXTRA_CFLAGS += -DCONFIG_DOVE_GPU=1
88 endif
89
90-ifeq ($(USE_POWER_MANAGEMENT), 1)
91-EXTRA_CFLAGS += -DgcdPOWER_MANAGEMENT=1
92-else
93-EXTRA_CFLAGS += -DgcdPOWER_MANAGEMENT=0
94-endif
95-
96 ifneq ($(USE_PLATFORM_DRIVER), 0)
97 EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=1
98 else
99 EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=0
100 endif
101
102-ifeq ($(USE_PROFILER), 1)
103+
104 EXTRA_CFLAGS += -DVIVANTE_PROFILER=1
105-else
106-EXTRA_CFLAGS += -DVIVANTE_PROFILER=0
107-endif
108+EXTRA_CFLAGS += -DVIVANTE_PROFILER_CONTEXT=1
109+
110
111 ifeq ($(ANDROID), 1)
112 EXTRA_CFLAGS += -DANDROID=1
113@@ -235,6 +216,10 @@ ifeq ($(USE_BANK_ALIGNMENT), 1)
114 endif
115 endif
116
117+ifneq ($(CONFIG_SYNC),)
118+EXTRA_CFLAGS += -DgcdANDROID_NATIVE_FENCE_SYNC=1
119+endif
120+
121 EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/inc
122 EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel
123 EXTRA_CFLAGS += -I$(AQARCH)/hal/kernel
124diff --git a/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c b/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c
125index 70c2cd6..a17d2fd 100644
126--- a/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c
127+++ b/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c
128@@ -217,50 +217,17 @@ _IdentifyHardware(
129 return status;
130 }
131
132-static gctTHREADFUNCRESULT gctTHREADFUNCTYPE
133-_TimeIdleThread(
134- gctTHREADFUNCPARAMETER ThreadParameter
135+#if gcdPOWEROFF_TIMEOUT
136+void
137+_VGPowerTimerFunction(
138+ gctPOINTER Data
139 )
140 {
141- gctUINT32 currentTime = 0;
142- gctBOOL isAfter = gcvFALSE;
143- gceCHIPPOWERSTATE state;
144-
145- /* Cast the object. */
146- gckVGHARDWARE hardware = (gckVGHARDWARE) ThreadParameter;
147-
148- while(gcvTRUE)
149- {
150- gcmkVERIFY_OK(gckOS_WaitSignal(hardware->os,
151- hardware->idleSignal, gcvINFINITE));
152-
153- if (hardware->killThread)
154- {
155- break;
156- }
157-
158- do
159- {
160- gcmkVERIFY_OK(gckOS_GetTicks(&currentTime));
161-
162- gcmkVERIFY_OK(
163- gckOS_TicksAfter(currentTime, hardware->powerOffTime, &isAfter));
164-
165- if (isAfter)
166- {
167- gcmkVERIFY_OK(gckVGHARDWARE_SetPowerManagementState(
168- hardware, gcvPOWER_OFF_BROADCAST));
169- }
170-
171- gcmkVERIFY_OK(gckOS_Delay(hardware->os, 200));
172-
173- gcmkVERIFY_OK(gckVGHARDWARE_QueryPowerManagementState(
174- hardware, &state));
175-
176- } while (state == gcvPOWER_IDLE);
177- }
178- return 0;
179+ gckVGHARDWARE hardware = (gckVGHARDWARE)Data;
180+ gcmkVERIFY_OK(
181+ gckVGHARDWARE_SetPowerManagementState(hardware, gcvPOWER_OFF_TIMEOUT));
182 }
183+#endif
184
185 /******************************************************************************\
186 ****************************** gckVGHARDWARE API code *****************************
187@@ -338,15 +305,21 @@ gckVGHARDWARE_Construct(
188 hardware->chipMinorFeatures2 = chipMinorFeatures2;
189
190 hardware->powerMutex = gcvNULL;
191- hardware->idleSignal = gcvNULL;
192 hardware->chipPowerState = gcvPOWER_ON;
193 hardware->chipPowerStateGlobal = gcvPOWER_ON;
194 hardware->clockState = gcvTRUE;
195 hardware->powerState = gcvTRUE;
196- hardware->powerOffTimeout = gcdPOWEROFF_TIMEOUT;
197+
198 hardware->powerOffTime = 0;
199- hardware->timeIdleThread = gcvNULL;
200- hardware->killThread = gcvFALSE;
201+#if gcdPOWEROFF_TIMEOUT
202+ hardware->powerOffTimeout = gcdPOWEROFF_TIMEOUT;
203+
204+ gcmkVERIFY_OK(gckOS_CreateTimer(Os,
205+ _VGPowerTimerFunction,
206+ (gctPOINTER)hardware,
207+ &hardware->powerOffTimer));
208+#endif
209+
210 /* Determine whether FE 2.0 is present. */
211 hardware->fe20 = ((((gctUINT32) (hardware->chipFeatures)) >> (0 ? 28:28) & ((gctUINT32) ((((1 ? 28:28) - (0 ? 28:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 28:28) - (0 ? 28:28) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 28:28) - (0 ? 28:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 28:28) - (0 ? 28:28) + 1)))))));
212
213@@ -365,18 +338,10 @@ gckVGHARDWARE_Construct(
214 gcmkVERIFY_OK(gckVGHARDWARE_SetFastClear(hardware, -1));
215
216 gcmkERR_BREAK(gckOS_CreateMutex(Os, &hardware->powerMutex));
217- gcmkERR_BREAK(gckOS_CreateSignal(Os, gcvFALSE, &hardware->idleSignal));
218
219 /* Enable power management by default. */
220 hardware->powerManagement = gcvTRUE;
221
222- gcmkERR_BREAK(gckOS_StartThread(
223- hardware->os,
224- _TimeIdleThread,
225- hardware,
226- &hardware->timeIdleThread
227- ));
228-
229 /* Return pointer to the gckVGHARDWARE object. */
230 *Hardware = hardware;
231
232@@ -386,6 +351,14 @@ gckVGHARDWARE_Construct(
233 }
234 while (gcvFALSE);
235
236+#if gcdPOWEROFF_TIMEOUT
237+ if (hardware->powerOffTimer != gcvNULL)
238+ {
239+ gcmkVERIFY_OK(gckOS_StopTimer(Os, hardware->powerOffTimer));
240+ gcmkVERIFY_OK(gckOS_DestroyTimer(Os, hardware->powerOffTimer));
241+ }
242+#endif
243+
244 if (hardware->pageTableDirty != gcvNULL)
245 {
246 gcmkVERIFY_OK(gckOS_AtomDestroy(Os, hardware->pageTableDirty));
247@@ -428,10 +401,6 @@ gckVGHARDWARE_Destroy(
248 /* Verify the arguments. */
249 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
250
251- Hardware->killThread = gcvTRUE;
252- gcmkVERIFY_OK(gckOS_Signal(Hardware->os, Hardware->idleSignal, gcvTRUE));
253- gcmkVERIFY_OK(gckOS_StopThread(Hardware->os, Hardware->timeIdleThread));
254-
255 /* Mark the object as unknown. */
256 Hardware->object.type = gcvOBJ_UNKNOWN;
257
258@@ -441,11 +410,10 @@ gckVGHARDWARE_Destroy(
259 Hardware->os, Hardware->powerMutex));
260 }
261
262- if (Hardware->idleSignal != gcvNULL)
263- {
264- gcmkVERIFY_OK(gckOS_DestroySignal(
265- Hardware->os, Hardware->idleSignal));
266- }
267+#if gcdPOWEROFF_TIMEOUT
268+ gcmkVERIFY_OK(gckOS_StopTimer(Hardware->os, Hardware->powerOffTimer));
269+ gcmkVERIFY_OK(gckOS_DestroyTimer(Hardware->os, Hardware->powerOffTimer));
270+#endif
271
272 if (Hardware->pageTableDirty != gcvNULL)
273 {
274@@ -1510,11 +1478,15 @@ gckVGHARDWARE_SetPowerManagementState(
275 gctBOOL commitMutex = gcvFALSE;
276 gctBOOL mutexAcquired = gcvFALSE;
277
278+#if gcdPOWEROFF_TIMEOUT
279+ gctBOOL timeout = gcvFALSE;
280+ gctBOOL isAfter = gcvFALSE;
281+ gctUINT32 currentTime;
282+#endif
283+
284 gctBOOL broadcast = gcvFALSE;
285 gctUINT32 process, thread;
286 gctBOOL global = gcvFALSE;
287- gctUINT32 currentTime;
288-
289
290 #if gcdENABLE_PROFILING
291 gctUINT64 time, freq, mutexTime, onTime, stallTime, stopTime, delayTime,
292@@ -1661,6 +1633,16 @@ gckVGHARDWARE_SetPowerManagementState(
293 global = gcvTRUE;
294 break;
295
296+#if gcdPOWEROFF_TIMEOUT
297+ case gcvPOWER_OFF_TIMEOUT:
298+ /* Convert to OFF and note we are inside broadcast. */
299+ State = gcvPOWER_OFF;
300+ broadcast = gcvTRUE;
301+ /* Check time out */
302+ timeout = gcvTRUE;
303+ break;
304+#endif
305+
306 default:
307 break;
308 }
309@@ -1719,6 +1701,31 @@ gckVGHARDWARE_SetPowerManagementState(
310 flag = flags[Hardware->chipPowerState][State];
311 /*clock = clocks[State];*/
312
313+#if gcdPOWEROFF_TIMEOUT
314+ if (timeout)
315+ {
316+ gcmkONERROR(gckOS_GetTicks(&currentTime));
317+
318+ gcmkONERROR(
319+ gckOS_TicksAfter(Hardware->powerOffTime, currentTime, &isAfter));
320+
321+ /* powerOffTime is pushed forward, give up.*/
322+ if (isAfter
323+ /* Expect a transition start from IDLE. */
324+ || (Hardware->chipPowerState == gcvPOWER_ON)
325+ || (Hardware->chipPowerState == gcvPOWER_OFF)
326+ )
327+ {
328+ /* Release the power mutex. */
329+ gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
330+
331+ /* No need to do anything. */
332+ gcmkFOOTER_NO();
333+ return gcvSTATUS_OK;
334+ }
335+ }
336+#endif
337+
338 if (flag == 0)
339 {
340 /* Release the power mutex. */
341@@ -1742,6 +1749,18 @@ gckVGHARDWARE_SetPowerManagementState(
342 return gcvSTATUS_OK;
343 }
344 }
345+ else
346+ {
347+ if (flag & gcvPOWER_FLAG_ACQUIRE)
348+ {
349+ /* Acquire the power management semaphore. */
350+ gcmkONERROR(gckOS_AcquireSemaphore(os, command->powerSemaphore));
351+ acquired = gcvTRUE;
352+
353+ /* avoid acquiring again. */
354+ flag &= ~gcvPOWER_FLAG_ACQUIRE;
355+ }
356+ }
357
358 if (flag & (gcvPOWER_FLAG_INITIALIZE | gcvPOWER_FLAG_CLOCK_ON))
359 {
360@@ -1858,14 +1877,6 @@ gckVGHARDWARE_SetPowerManagementState(
361 Hardware->chipPowerStateGlobal = State;
362 }
363
364- if (State == gcvPOWER_IDLE)
365- {
366- gcmkVERIFY_OK(gckOS_Signal(os, Hardware->idleSignal, gcvTRUE));
367- }
368- /* Reset power off time */
369- gcmkVERIFY_OK(gckOS_GetTicks(&currentTime));
370- Hardware->powerOffTime = currentTime + Hardware->powerOffTimeout;
371-
372 if (commitMutex)
373 {
374 /* Acquire the mutex. */
375@@ -1875,6 +1886,28 @@ gckVGHARDWARE_SetPowerManagementState(
376 ));
377 }
378
379+#if gcdPOWEROFF_TIMEOUT
380+ /* Reset power off time */
381+ gcmkONERROR(gckOS_GetTicks(&currentTime));
382+
383+ Hardware->powerOffTime = currentTime + Hardware->powerOffTimeout;
384+
385+ if (State == gcvPOWER_IDLE)
386+ {
387+ /* Start a timer to power off GPU when GPU enters IDLE or SUSPEND. */
388+ gcmkVERIFY_OK(gckOS_StartTimer(os,
389+ Hardware->powerOffTimer,
390+ Hardware->powerOffTimeout));
391+ }
392+ else
393+ {
394+ gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "Cancel powerOfftimer");
395+
396+ /* Cancel running timer when GPU enters ON or OFF. */
397+ gcmkVERIFY_OK(gckOS_StopTimer(os, Hardware->powerOffTimer));
398+ }
399+#endif
400+
401 /* Release the power mutex. */
402 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
403
404diff --git a/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h b/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h
405index 16b81ae..73d4594 100644
406--- a/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h
407+++ b/drivers/mxc/gpu-viv/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h
408@@ -53,7 +53,6 @@ struct _gckVGHARDWARE
409 gctBOOL clockState;
410 gctBOOL powerState;
411 gctPOINTER powerMutex;
412- gctSIGNAL idleSignal;
413 gctUINT32 powerProcess;
414 gctUINT32 powerThread;
415 gceCHIPPOWERSTATE chipPowerState;
416@@ -61,11 +60,13 @@ struct _gckVGHARDWARE
417 gctISRMANAGERFUNC startIsr;
418 gctISRMANAGERFUNC stopIsr;
419 gctPOINTER isrContext;
420+ gctPOINTER pageTableDirty;
421+
422+#if gcdPOWEROFF_TIMEOUT
423 gctUINT32 powerOffTime;
424 gctUINT32 powerOffTimeout;
425- gctTHREAD timeIdleThread;
426- gctBOOL killThread;
427- gctPOINTER pageTableDirty;
428+ gctPOINTER powerOffTimer;
429+#endif
430
431 gctBOOL powerManagement;
432 };
433diff --git a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c
434index 24003e7..42e6915 100644
435--- a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c
436+++ b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c
437@@ -181,7 +181,8 @@ _FlushPipe(
438 ? ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)))
439 : ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
440 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
441- | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)));
442+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)))
443+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
444
445 /* Semaphore from FE to PE. */
446 *buffer++
447@@ -620,7 +621,10 @@ _InitializeContextBuffer(
448 index += _State(Context, index, 0x10180 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE);
449 index += _State(Context, index, 0x10200 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE);
450 index += _State(Context, index, 0x10280 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE);
451- index += _State(Context, index, 0x02C00 >> 2, 0x00000000, 256, gcvFALSE, gcvFALSE);
452+ for (i = 0; i < 256 / 16; i += 1)
453+ {
454+ index += _State(Context, index, (0x02C00 >> 2) + i * 16, 0x00000000, 14, gcvFALSE, gcvFALSE);
455+ }
456 index += _State(Context, index, 0x10300 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE);
457 index += _State(Context, index, 0x10380 >> 2, 0x00321000, 32, gcvFALSE, gcvFALSE);
458 index += _State(Context, index, 0x10400 >> 2, 0x00000000, 32, gcvFALSE, gcvFALSE);
459diff --git a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h
460index 7554045..5d2c7c7 100644
461--- a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h
462+++ b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h
463@@ -134,6 +134,19 @@ struct _gckCONTEXT
464 #if gcdSECURE_USER
465 gctBOOL_PTR hint;
466 #endif
467+
468+#if VIVANTE_PROFILER_CONTEXT
469+ gcsPROFILER_COUNTERS latestProfiler;
470+ gcsPROFILER_COUNTERS histroyProfiler;
471+ gctUINT32 prevVSInstCount;
472+ gctUINT32 prevVSBranchInstCount;
473+ gctUINT32 prevVSTexInstCount;
474+ gctUINT32 prevVSVertexCount;
475+ gctUINT32 prevPSInstCount;
476+ gctUINT32 prevPSBranchInstCount;
477+ gctUINT32 prevPSTexInstCount;
478+ gctUINT32 prevPSPixelCount;
479+#endif
480 };
481
482 #ifdef __cplusplus
483diff --git a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c
484index 00f3839..e02dc23 100644
485--- a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c
486+++ b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c
487@@ -21,6 +21,9 @@
488
489 #include "gc_hal.h"
490 #include "gc_hal_kernel.h"
491+#if VIVANTE_PROFILER_CONTEXT
492+#include "gc_hal_kernel_context.h"
493+#endif
494
495 #define _GC_OBJ_ZONE gcvZONE_HARDWARE
496
497@@ -69,6 +72,7 @@ _IdentifyHardware(
498 gctUINT32 numConstants = 0;
499 gctUINT32 bufferSize = 0;
500 gctUINT32 varyingsCount = 0;
501+ gctBOOL useHZ;
502
503 gcmkHEADER_ARG("Os=0x%x", Os);
504
505@@ -209,6 +213,15 @@ _IdentifyHardware(
506 0x00088,
507 &Identity->chipMinorFeatures3));
508
509+ /*The BG2 chip has no compression supertiled, and the bit of GCMinorFeature3BugFixes15 is n/a*/
510+ if(Identity->chipModel == gcv1000 && Identity->chipRevision == 0x5036)
511+ {
512+ Identity->chipMinorFeatures3
513+ = ((((gctUINT32) (Identity->chipMinorFeatures3)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
514+ Identity->chipMinorFeatures3
515+ = ((((gctUINT32) (Identity->chipMinorFeatures3)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27)));
516+ }
517+
518 /* Read chip minor featuress register #4. */
519 gcmkONERROR(
520 gckOS_ReadRegisterEx(Os, Core,
521@@ -244,14 +257,31 @@ _IdentifyHardware(
522 if (((Identity->chipModel == gcv1000) && ((Identity->chipRevision == 0x5035)
523 || (Identity->chipRevision == 0x5036)
524 || (Identity->chipRevision == 0x5037)))
525- || ((Identity->chipModel == gcv800) && (Identity->chipRevision == 0x4612)))
526+ || ((Identity->chipModel == gcv800) && (Identity->chipRevision == 0x4612))
527+ || ((Identity->chipModel == gcv860) && (Identity->chipRevision == 0x4647)))
528 {
529 Identity->superTileMode = 1;
530 }
531
532+ if (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5245)
533+ {
534+ useHZ = ((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 26:26) & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))))
535+ || ((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 8:8) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))));
536+ }
537+ else
538+ {
539+ useHZ = gcvFALSE;
540+ }
541
542- /* Disable HZ when EZ is present for older chips. */
543- if (!((((gctUINT32) (Identity->chipFeatures)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))))
544+ if (useHZ)
545+ {
546+ /* Disable EZ. */
547+ Identity->chipFeatures
548+ = ((((gctUINT32) (Identity->chipFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)));
549+ }
550+
551+ /* Disable HZ when EZ is present for older chips. */
552+ else if (!((((gctUINT32) (Identity->chipFeatures)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))))
553 {
554 /* Disable HIERARCHICAL_Z. */
555 Identity->chipMinorFeatures
556@@ -470,6 +500,15 @@ _IdentifyHardware(
557 Identity->varyingsCount = 8;
558 }
559
560+ /* For some cores, it consumes two varying for position, so the max varying vectors should minus one. */
561+ if ((Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5222) ||
562+ (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5208) ||
563+ ((Identity->chipModel == gcv2100 || Identity->chipModel == gcv2000) && Identity->chipRevision == 0x5108) ||
564+ (Identity->chipModel == gcv880 && (Identity->chipRevision == 0x5107 || Identity->chipRevision == 0x5106)))
565+ {
566+ Identity->varyingsCount -= 1;
567+ }
568+
569 /* Success. */
570 gcmkFOOTER();
571 return gcvSTATUS_OK;
572@@ -535,9 +574,9 @@ _DumpDebugRegisters(
573 IN gcsiDEBUG_REGISTERS_PTR Descriptor
574 )
575 {
576- gceSTATUS status;
577+ gceSTATUS status = gcvSTATUS_OK;
578 gctUINT32 select;
579- gctUINT32 data;
580+ gctUINT32 data = 0;
581 gctUINT i;
582
583 gcmkHEADER_ARG("Os=0x%X Descriptor=0x%X", Os, Descriptor);
584@@ -643,6 +682,42 @@ OnError:
585 return status;
586 }
587
588+gceSTATUS
589+_FlushCache(
590+ gckHARDWARE Hardware,
591+ gckCOMMAND Command
592+ )
593+{
594+ gceSTATUS status;
595+ gctSIZE_T bytes, requested;
596+ gctPOINTER buffer;
597+
598+ /* Get the size of the flush command. */
599+ gcmkONERROR(gckHARDWARE_Flush(Hardware,
600+ gcvFLUSH_ALL,
601+ gcvNULL,
602+ &requested));
603+
604+ /* Reserve space in the command queue. */
605+ gcmkONERROR(gckCOMMAND_Reserve(Command,
606+ requested,
607+ &buffer,
608+ &bytes));
609+
610+ /* Append a flush. */
611+ gcmkONERROR(gckHARDWARE_Flush(
612+ Hardware, gcvFLUSH_ALL, buffer, &bytes
613+ ));
614+
615+ /* Execute the command queue. */
616+ gcmkONERROR(gckCOMMAND_Execute(Command, requested));
617+
618+ return gcvSTATUS_OK;
619+
620+OnError:
621+ return status;
622+}
623+
624 /******************************************************************************\
625 ****************************** gckHARDWARE API code *****************************
626 \******************************************************************************/
627@@ -809,6 +884,9 @@ gckHARDWARE_Construct(
628 /* Enable power management by default. */
629 hardware->powerManagement = gcvTRUE;
630
631+ /* Disable profiler by default */
632+ hardware->gpuProfiler = gcvFALSE;
633+
634 /* Return pointer to the gckHARDWARE object. */
635 *Hardware = hardware;
636
637@@ -1113,6 +1191,31 @@ gckHARDWARE_InitializeHardware(
638 ((((gctUINT32) (0x01590880)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23)))));
639 }
640
641+ if ((gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_HALTI2) == gcvFALSE)
642+ || (gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_HALTI2) && (Hardware->identity.chipRevision < 0x5422))
643+ )
644+ {
645+ gctUINT32 data;
646+
647+ gcmkONERROR(
648+ gckOS_ReadRegisterEx(Hardware->os,
649+ Hardware->core,
650+ Hardware->powerBaseAddress
651+ + 0x00104,
652+ &data));
653+
654+
655+ data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) << (0 ? 15:15))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) << (0 ? 15:15)));
656+
657+
658+ gcmkONERROR(
659+ gckOS_WriteRegisterEx(Hardware->os,
660+ Hardware->core,
661+ Hardware->powerBaseAddress
662+ + 0x00104,
663+ data));
664+ }
665+
666 /* Special workaround for this core
667 ** Make sure FE and TX are on different buses */
668 if ((Hardware->identity.chipModel == gcv2000)
669@@ -1152,7 +1255,9 @@ gckHARDWARE_InitializeHardware(
670 }
671
672 if (Hardware->identity.chipModel >= gcv400
673- && Hardware->identity.chipModel != gcv420)
674+ && Hardware->identity.chipModel != gcv420
675+ && (((((gctUINT32) (Hardware->identity.chipMinorFeatures3)) >> (0 ? 15:15) & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) != gcvTRUE)
676+ )
677 {
678 gctUINT32 data;
679
680@@ -2883,35 +2988,44 @@ gckHARDWARE_QueryShaderCaps(
681 OUT gctUINT * Varyings
682 )
683 {
684+ gctUINT32 vsConstMax;
685+ gctUINT32 psConstMax;
686+
687 gcmkHEADER_ARG("Hardware=0x%x VertexUniforms=0x%x "
688 "FragmentUniforms=0x%x Varyings=0x%x",
689 Hardware, VertexUniforms,
690 FragmentUniforms, Varyings);
691
692+ if ((Hardware->identity.chipModel == gcv2000)
693+ && (Hardware->identity.chipRevision == 0x5118))
694+ {
695+ vsConstMax = 256;
696+ psConstMax = 64;
697+ }
698+ else if (Hardware->identity.numConstants > 256)
699+ {
700+ vsConstMax = 256;
701+ psConstMax = 256;
702+ }
703+ else if (Hardware->identity.numConstants == 256)
704+ {
705+ vsConstMax = 256;
706+ psConstMax = 256;
707+ }
708+ else
709+ {
710+ vsConstMax = 168;
711+ psConstMax = 64;
712+ }
713+
714 if (VertexUniforms != gcvNULL)
715 {
716- /* Return the vs shader const count. */
717- if (Hardware->identity.chipModel < gcv4000)
718- {
719- *VertexUniforms = 168;
720- }
721- else
722- {
723- *VertexUniforms = 256;
724- }
725+ *VertexUniforms = vsConstMax;
726 }
727
728 if (FragmentUniforms != gcvNULL)
729 {
730- /* Return the ps shader const count. */
731- if (Hardware->identity.chipModel < gcv4000)
732- {
733- *FragmentUniforms = 64;
734- }
735- else
736- {
737- *FragmentUniforms = 256;
738- }
739+ *FragmentUniforms = psConstMax;
740 }
741
742 if (Varyings != gcvNULL)
743@@ -3229,12 +3343,28 @@ gckHARDWARE_SetMMUv2(
744 gctBOOL commitEntered = gcvFALSE;
745 gctPOINTER pointer = gcvNULL;
746 gctBOOL acquired = gcvFALSE;
747+ gctBOOL config2D;
748+ gctSIZE_T configSize;
749
750 gcmkHEADER_ARG("Hardware=0x%x Enable=%d", Hardware, Enable);
751
752 /* Verify the arguments. */
753 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
754
755+ config2D = gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_PIPE_3D)
756+ && gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_PIPE_2D);
757+
758+ configSize = 4 * 4;
759+
760+ if (config2D)
761+ {
762+ configSize +=
763+ /* Pipe Select. */
764+ 4 * 4
765+ /* Configure MMU States. */
766+ + 4 * 4;
767+ }
768+
769 /* Convert logical address into physical address. */
770 gcmkONERROR(
771 gckOS_GetPhysicalAddress(Hardware->os, MtlbAddress, &config));
772@@ -3281,7 +3411,7 @@ gckHARDWARE_SetMMUv2(
773 commitEntered = gcvTRUE;
774
775 gcmkONERROR(gckCOMMAND_Reserve(
776- command, 16, &pointer, &bufferSize
777+ command, configSize, &pointer, &bufferSize
778 ));
779
780 buffer = pointer;
781@@ -3300,10 +3430,43 @@ gckHARDWARE_SetMMUv2(
782
783 buffer[3] = address;
784
785+ if (config2D)
786+ {
787+ /* LoadState(AQPipeSelect, 1), pipe. */
788+ buffer[4]
789+ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
790+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
791+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
792+
793+ buffer[5] = 0x1;
794+
795+ buffer[6]
796+ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
797+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0061) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
798+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
799+
800+ buffer[7] = config;
801+
802+ buffer[8]
803+ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
804+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0060) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
805+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
806+
807+ buffer[9] = address;
808+
809+ /* LoadState(AQPipeSelect, 1), pipe. */
810+ buffer[10]
811+ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
812+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
813+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
814+
815+ buffer[11] = 0x0;
816+ }
817+
818 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
819 "Setup MMU: config=%08x, Safe Address=%08x\n.", config, address);
820
821- gcmkONERROR(gckCOMMAND_Execute(command, 16));
822+ gcmkONERROR(gckCOMMAND_Execute(command, configSize));
823
824 if (FromPower == gcvFALSE)
825 {
826@@ -3501,6 +3664,8 @@ gckHARDWARE_Flush(
827 gctUINT32 flush = 0;
828 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
829 gceSTATUS status;
830+ gctBOOL fcFlushStall;
831+ gctUINT32 reserveBytes = 8;
832
833 gcmkHEADER_ARG("Hardware=0x%x Flush=0x%x Logical=0x%x *Bytes=%lu",
834 Hardware, Flush, Logical, gcmOPT_VALUE(Bytes));
835@@ -3511,6 +3676,16 @@ gckHARDWARE_Flush(
836 /* Get current pipe. */
837 pipe = Hardware->kernel->command->pipeSelect;
838
839+ fcFlushStall
840+ = ((((gctUINT32) (Hardware->identity.chipMinorFeatures1)) >> (0 ? 31:31) & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1)))))))
841+ && (Flush == gcvFLUSH_ALL)
842+ ;
843+
844+ if (fcFlushStall)
845+ {
846+ reserveBytes += 8;
847+ }
848+
849 /* Flush 3D color cache. */
850 if ((Flush & gcvFLUSH_COLOR) && (pipe == 0x0))
851 {
852@@ -3527,6 +3702,7 @@ gckHARDWARE_Flush(
853 if ((Flush & gcvFLUSH_TEXTURE) && (pipe == 0x0))
854 {
855 flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)));
856+ flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
857 }
858
859 /* Flush 2D cache. */
860@@ -3550,7 +3726,7 @@ gckHARDWARE_Flush(
861 /* Copy to command queue. */
862 if (Logical != gcvNULL)
863 {
864- if (*Bytes < 8)
865+ if (*Bytes < reserveBytes)
866 {
867 /* Command queue too small. */
868 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
869@@ -3565,12 +3741,26 @@ gckHARDWARE_Flush(
870
871 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
872 "0x%x: FLUSH 0x%x", logical, flush);
873+
874+ if (fcFlushStall)
875+ {
876+ logical[2] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
877+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0594) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
878+ | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
879+
880+ logical[3] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
881+
882+
883+ gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
884+ "0x%x: FLUSH 0x%x", logical + 3, logical[3]);
885+ }
886+
887 }
888
889 if (Bytes != gcvNULL)
890 {
891- /* 8 bytes required. */
892- *Bytes = 8;
893+ /* bytes required. */
894+ *Bytes = reserveBytes;
895 }
896 }
897
898@@ -4285,6 +4475,48 @@ gckHARDWARE_SetPowerManagementState(
899 }
900 }
901
902+ /* Flush Cache before Power Off. */
903+ if (flag & gcvPOWER_FLAG_POWER_OFF)
904+ {
905+ if (Hardware->clockState == gcvFALSE)
906+ {
907+ /* Turn off the GPU power. */
908+ gcmkONERROR(
909+ gckOS_SetGPUPower(os,
910+ Hardware->core,
911+ gcvTRUE,
912+ gcvTRUE));
913+
914+ Hardware->clockState = gcvTRUE;
915+
916+ if (gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_DYNAMIC_FREQUENCY_SCALING) != gcvTRUE)
917+ {
918+ /* Write the clock control register. */
919+ gcmkONERROR(gckOS_WriteRegisterEx(os,
920+ Hardware->core,
921+ 0x00000,
922+ clocks[0]));
923+
924+ /* Done loading the frequency scaler. */
925+ gcmkONERROR(gckOS_WriteRegisterEx(os,
926+ Hardware->core,
927+ 0x00000,
928+ ((((gctUINT32) (clocks[0])) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)))));
929+ }
930+ }
931+
932+ gcmkONERROR(gckCOMMAND_Start(command));
933+
934+ gcmkONERROR(_FlushCache(Hardware, command));
935+
936+ gckOS_Delay(gcvNULL, 1);
937+
938+ /* Stop the command parser. */
939+ gcmkONERROR(gckCOMMAND_Stop(command, gcvFALSE));
940+
941+ flag |= gcvPOWER_FLAG_CLOCK_OFF;
942+ }
943+
944 /* Get time until stopped. */
945 gcmkPROFILE_QUERY(time, stopTime);
946
947@@ -4582,6 +4814,40 @@ gckHARDWARE_SetPowerManagement(
948 return gcvSTATUS_OK;
949 }
950
951+/*******************************************************************************
952+**
953+** gckHARDWARE_SetGpuProfiler
954+**
955+** Configure GPU profiler function.
956+** Only used in driver initialization stage.
957+**
958+** INPUT:
959+**
960+** gckHARDWARE Harwdare
961+** Pointer to an gckHARDWARE object.
962+**
963+** gctBOOL GpuProfiler
964+** GOU Profiler State.
965+**
966+*/
967+gceSTATUS
968+gckHARDWARE_SetGpuProfiler(
969+ IN gckHARDWARE Hardware,
970+ IN gctBOOL GpuProfiler
971+ )
972+{
973+ gcmkHEADER_ARG("Hardware=0x%x", Hardware);
974+
975+ /* Verify the arguments. */
976+ gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
977+
978+ Hardware->gpuProfiler = GpuProfiler;
979+
980+ /* Success. */
981+ gcmkFOOTER_NO();
982+ return gcvSTATUS_OK;
983+}
984+
985 #if gcdENABLE_FSCALE_VAL_ADJUST
986 gceSTATUS
987 gckHARDWARE_SetFscaleValue(
988@@ -5141,6 +5407,402 @@ OnError:
989 }
990 #endif
991
992+#if VIVANTE_PROFILER_CONTEXT
993+#define gcmkUPDATE_PROFILE_DATA(data) \
994+ profilerHistroy->data += profiler->data
995+
996+gceSTATUS
997+gckHARDWARE_QueryContextProfile(
998+ IN gckHARDWARE Hardware,
999+ IN gctBOOL Reset,
1000+ IN gckCONTEXT Context,
1001+ OUT gcsPROFILER_COUNTERS * Counters
1002+ )
1003+{
1004+ gceSTATUS status;
1005+ gckCOMMAND command = Hardware->kernel->command;
1006+ gcsPROFILER_COUNTERS * profiler = Counters;
1007+
1008+ gcmkHEADER_ARG("Hardware=0x%x Counters=0x%x", Hardware, Counters);
1009+
1010+ /* Verify the arguments. */
1011+ gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1012+
1013+ /* Acquire the context sequnence mutex. */
1014+ gcmkONERROR(gckOS_AcquireMutex(
1015+ command->os, command->mutexContextSeq, gcvINFINITE
1016+ ));
1017+
1018+ /* Read the counters. */
1019+ gcmkVERIFY_OK(gckOS_MemCopy(
1020+ profiler, &Context->histroyProfiler, gcmSIZEOF(gcsPROFILER_COUNTERS)
1021+ ));
1022+
1023+ if (Reset)
1024+ {
1025+ /* Reset counters. */
1026+ gcmkVERIFY_OK(gckOS_ZeroMemory(
1027+ &Context->histroyProfiler, gcmSIZEOF(gcsPROFILER_COUNTERS)
1028+ ));
1029+ }
1030+
1031+ gcmkVERIFY_OK(gckOS_ReleaseMutex(
1032+ command->os, command->mutexContextSeq
1033+ ));
1034+
1035+ /* Success. */
1036+ gcmkFOOTER_NO();
1037+ return gcvSTATUS_OK;
1038+
1039+OnError:
1040+ /* Return the status. */
1041+ gcmkFOOTER();
1042+ return status;
1043+}
1044+
1045+
1046+gceSTATUS
1047+gckHARDWARE_UpdateContextProfile(
1048+ IN gckHARDWARE Hardware,
1049+ IN gckCONTEXT Context
1050+ )
1051+{
1052+ gceSTATUS status;
1053+ gcsPROFILER_COUNTERS * profiler = &Context->latestProfiler;
1054+ gcsPROFILER_COUNTERS * profilerHistroy = &Context->histroyProfiler;
1055+ gctUINT i, clock;
1056+ gctUINT32 colorKilled, colorDrawn, depthKilled, depthDrawn;
1057+ gctUINT32 totalRead, totalWrite;
1058+ gceCHIPMODEL chipModel;
1059+ gctUINT32 chipRevision;
1060+ gctUINT32 temp;
1061+ gctBOOL needResetShader = gcvFALSE;
1062+
1063+ gcmkHEADER_ARG("Hardware=0x%x Context=0x%x", Hardware, Context);
1064+
1065+ /* Verify the arguments. */
1066+ gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1067+ gcmkVERIFY_OBJECT(Context, gcvOBJ_CONTEXT);
1068+
1069+ chipModel = Hardware->identity.chipModel;
1070+ chipRevision = Hardware->identity.chipRevision;
1071+ if (chipModel == gcv2000 || (chipModel == gcv2100 && chipRevision == 0x5118))
1072+ {
1073+ needResetShader = gcvTRUE;
1074+ }
1075+
1076+ /* Read the counters. */
1077+ gcmkONERROR(
1078+ gckOS_ReadRegisterEx(Hardware->os,
1079+ Hardware->core,
1080+ 0x00438,
1081+ &profiler->gpuCyclesCounter));
1082+ gcmkUPDATE_PROFILE_DATA(gpuCyclesCounter);
1083+
1084+ gcmkONERROR(
1085+ gckOS_ReadRegisterEx(Hardware->os,
1086+ Hardware->core,
1087+ 0x00078,
1088+ &profiler->gpuTotalCyclesCounter));
1089+ gcmkUPDATE_PROFILE_DATA(gpuTotalCyclesCounter);
1090+
1091+ gcmkONERROR(
1092+ gckOS_ReadRegisterEx(Hardware->os,
1093+ Hardware->core,
1094+ 0x0007C,
1095+ &profiler->gpuIdleCyclesCounter));
1096+ gcmkUPDATE_PROFILE_DATA(gpuIdleCyclesCounter);
1097+
1098+ /* Read clock control register. */
1099+ gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
1100+ Hardware->core,
1101+ 0x00000,
1102+ &clock));
1103+
1104+ profiler->gpuTotalRead64BytesPerFrame = 0;
1105+ profiler->gpuTotalWrite64BytesPerFrame = 0;
1106+ profiler->pe_pixel_count_killed_by_color_pipe = 0;
1107+ profiler->pe_pixel_count_killed_by_depth_pipe = 0;
1108+ profiler->pe_pixel_count_drawn_by_color_pipe = 0;
1109+ profiler->pe_pixel_count_drawn_by_depth_pipe = 0;
1110+
1111+ /* Walk through all avaiable pixel pipes. */
1112+ for (i = 0; i < Hardware->identity.pixelPipes; ++i)
1113+ {
1114+ /* Select proper pipe. */
1115+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1116+ Hardware->core,
1117+ 0x00000,
1118+ ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20))) | (((gctUINT32) ((gctUINT32) (i) & ((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20)))));
1119+
1120+ /* BW */
1121+ gcmkONERROR(
1122+ gckOS_ReadRegisterEx(Hardware->os,
1123+ Hardware->core,
1124+ 0x00040,
1125+ &totalRead));
1126+ gcmkONERROR(
1127+ gckOS_ReadRegisterEx(Hardware->os,
1128+ Hardware->core,
1129+ 0x00044,
1130+ &totalWrite));
1131+
1132+ profiler->gpuTotalRead64BytesPerFrame += totalRead;
1133+ profiler->gpuTotalWrite64BytesPerFrame += totalWrite;
1134+ gcmkUPDATE_PROFILE_DATA(gpuTotalRead64BytesPerFrame);
1135+ gcmkUPDATE_PROFILE_DATA(gpuTotalWrite64BytesPerFrame);
1136+
1137+ /* PE */
1138+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &colorKilled));
1139+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &depthKilled));
1140+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &colorDrawn));
1141+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &depthDrawn));
1142+
1143+ profiler->pe_pixel_count_killed_by_color_pipe += colorKilled;
1144+ profiler->pe_pixel_count_killed_by_depth_pipe += depthKilled;
1145+ profiler->pe_pixel_count_drawn_by_color_pipe += colorDrawn;
1146+ profiler->pe_pixel_count_drawn_by_depth_pipe += depthDrawn;
1147+ gcmkUPDATE_PROFILE_DATA(pe_pixel_count_killed_by_color_pipe);
1148+ gcmkUPDATE_PROFILE_DATA(pe_pixel_count_killed_by_depth_pipe);
1149+ gcmkUPDATE_PROFILE_DATA(pe_pixel_count_drawn_by_color_pipe);
1150+ gcmkUPDATE_PROFILE_DATA(pe_pixel_count_drawn_by_depth_pipe);
1151+ }
1152+
1153+ /* Reset clock control register. */
1154+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1155+ Hardware->core,
1156+ 0x00000,
1157+ clock));
1158+
1159+
1160+
1161+
1162+ /* Reset counters. */
1163+ gcmkONERROR(
1164+ gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 1));
1165+ gcmkONERROR(
1166+ gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 0));
1167+ gcmkONERROR(
1168+ gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00438, 0));
1169+ gcmkONERROR(
1170+ gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00078, 0));
1171+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
1172+gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))
1173+));
1174+
1175+ /* SH */
1176+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1177+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->ps_inst_counter));
1178+ if (needResetShader)
1179+ {
1180+ temp = profiler->ps_inst_counter;
1181+ profiler->ps_inst_counter -= Context->prevPSInstCount;
1182+ Context->prevPSInstCount = temp;
1183+ }
1184+ gcmkUPDATE_PROFILE_DATA(ps_inst_counter);
1185+
1186+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1187+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_pixel_counter));
1188+ if (needResetShader)
1189+ {
1190+ temp = profiler->rendered_pixel_counter;
1191+ profiler->rendered_pixel_counter -= Context->prevPSPixelCount;
1192+ Context->prevPSPixelCount = temp;
1193+ }
1194+ gcmkUPDATE_PROFILE_DATA(rendered_pixel_counter);
1195+
1196+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1197+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vs_inst_counter));
1198+ if (needResetShader)
1199+ {
1200+ temp = profiler->vs_inst_counter;
1201+ profiler->vs_inst_counter -= Context->prevVSInstCount;
1202+ Context->prevVSInstCount = temp;
1203+ }
1204+ gcmkUPDATE_PROFILE_DATA(vs_inst_counter);
1205+
1206+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1207+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_vertice_counter));
1208+ if (needResetShader)
1209+ {
1210+ temp = profiler->rendered_vertice_counter;
1211+ profiler->rendered_vertice_counter -= Context->prevVSVertexCount;
1212+ Context->prevVSVertexCount = temp;
1213+ }
1214+ gcmkUPDATE_PROFILE_DATA(rendered_vertice_counter);
1215+
1216+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (11) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1217+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_branch_inst_counter));
1218+ if (needResetShader)
1219+ {
1220+ temp = profiler->vtx_branch_inst_counter;
1221+ profiler->vtx_branch_inst_counter -= Context->prevVSBranchInstCount;
1222+ Context->prevVSBranchInstCount = temp;
1223+ }
1224+ gcmkUPDATE_PROFILE_DATA(vtx_branch_inst_counter);
1225+
1226+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (12) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1227+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_texld_inst_counter));
1228+ if (needResetShader)
1229+ {
1230+ temp = profiler->vtx_texld_inst_counter;
1231+ profiler->vtx_texld_inst_counter -= Context->prevVSTexInstCount;
1232+ Context->prevVSTexInstCount = temp;
1233+ }
1234+ gcmkUPDATE_PROFILE_DATA(vtx_texld_inst_counter);
1235+
1236+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (13) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1237+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_branch_inst_counter));
1238+ if (needResetShader)
1239+ {
1240+ temp = profiler->pxl_branch_inst_counter;
1241+ profiler->pxl_branch_inst_counter -= Context->prevPSBranchInstCount;
1242+ Context->prevPSBranchInstCount = temp;
1243+ }
1244+ gcmkUPDATE_PROFILE_DATA(pxl_branch_inst_counter);
1245+
1246+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (14) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1247+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_texld_inst_counter));
1248+ if (needResetShader)
1249+ {
1250+ temp = profiler->pxl_texld_inst_counter;
1251+ profiler->pxl_texld_inst_counter -= Context->prevPSTexInstCount;
1252+ Context->prevPSTexInstCount = temp;
1253+ }
1254+ gcmkUPDATE_PROFILE_DATA(pxl_texld_inst_counter);
1255+
1256+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1257+gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24)))
1258+));
1259+
1260+ /* PA */
1261+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1262+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_vtx_counter));
1263+ gcmkUPDATE_PROFILE_DATA(pa_input_vtx_counter);
1264+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (4) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1265+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_prim_counter));
1266+ gcmkUPDATE_PROFILE_DATA(pa_input_prim_counter);
1267+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1268+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_output_prim_counter));
1269+ gcmkUPDATE_PROFILE_DATA(pa_output_prim_counter);
1270+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1271+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_depth_clipped_counter));
1272+ gcmkUPDATE_PROFILE_DATA(pa_depth_clipped_counter);
1273+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1274+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_trivial_rejected_counter));
1275+ gcmkUPDATE_PROFILE_DATA(pa_trivial_rejected_counter);
1276+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1277+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_culled_counter));
1278+ gcmkUPDATE_PROFILE_DATA(pa_culled_counter);
1279+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1280+gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0)))
1281+));
1282+
1283+ /* SE */
1284+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
1285+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_triangle_count));
1286+ gcmkUPDATE_PROFILE_DATA(se_culled_triangle_count);
1287+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
1288+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_lines_count));
1289+ gcmkUPDATE_PROFILE_DATA(se_culled_lines_count);
1290+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
1291+gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8)))
1292+));
1293+
1294+ /* RA */
1295+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
1296+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_pixel_count));
1297+ gcmkUPDATE_PROFILE_DATA(ra_valid_pixel_count);
1298+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
1299+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_quad_count));
1300+ gcmkUPDATE_PROFILE_DATA(ra_total_quad_count);
1301+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
1302+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_quad_count_after_early_z));
1303+ gcmkUPDATE_PROFILE_DATA(ra_valid_quad_count_after_early_z);
1304+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
1305+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_primitive_count));
1306+ gcmkUPDATE_PROFILE_DATA(ra_total_primitive_count);
1307+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
1308+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_pipe_cache_miss_counter));
1309+ gcmkUPDATE_PROFILE_DATA(ra_pipe_cache_miss_counter);
1310+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
1311+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_prefetch_cache_miss_counter));
1312+ gcmkUPDATE_PROFILE_DATA(ra_prefetch_cache_miss_counter);
1313+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
1314+gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))
1315+));
1316+
1317+ /* TX */
1318+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1319+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_bilinear_requests));
1320+ gcmkUPDATE_PROFILE_DATA(tx_total_bilinear_requests);
1321+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1322+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_trilinear_requests));
1323+ gcmkUPDATE_PROFILE_DATA(tx_total_trilinear_requests);
1324+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1325+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_discarded_texture_requests));
1326+ gcmkUPDATE_PROFILE_DATA(tx_total_discarded_texture_requests);
1327+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1328+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_texture_requests));
1329+ gcmkUPDATE_PROFILE_DATA(tx_total_texture_requests);
1330+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1331+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_count));
1332+ gcmkUPDATE_PROFILE_DATA(tx_mem_read_count);
1333+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1334+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_in_8B_count));
1335+ gcmkUPDATE_PROFILE_DATA(tx_mem_read_in_8B_count);
1336+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1337+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_count));
1338+ gcmkUPDATE_PROFILE_DATA(tx_cache_miss_count);
1339+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1340+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_hit_texel_count));
1341+ gcmkUPDATE_PROFILE_DATA(tx_cache_hit_texel_count);
1342+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1343+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_texel_count));
1344+ gcmkUPDATE_PROFILE_DATA(tx_cache_miss_texel_count);
1345+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
1346+gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24)))
1347+));
1348+
1349+ /* MC */
1350+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1351+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_pipeline));
1352+ gcmkUPDATE_PROFILE_DATA(mc_total_read_req_8B_from_pipeline);
1353+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1354+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_IP));
1355+ gcmkUPDATE_PROFILE_DATA(mc_total_read_req_8B_from_IP);
1356+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1357+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_write_req_8B_from_pipeline));
1358+ gcmkUPDATE_PROFILE_DATA(mc_total_write_req_8B_from_pipeline);
1359+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
1360+gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0)))
1361+));
1362+
1363+ /* HI */
1364+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
1365+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_read_request_stalled));
1366+ gcmkUPDATE_PROFILE_DATA(hi_axi_cycles_read_request_stalled);
1367+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
1368+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_request_stalled));
1369+ gcmkUPDATE_PROFILE_DATA(hi_axi_cycles_write_request_stalled);
1370+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
1371+gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_data_stalled));
1372+ gcmkUPDATE_PROFILE_DATA(hi_axi_cycles_write_data_stalled);
1373+ gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
1374+gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8)))
1375+));
1376+
1377+ /* Success. */
1378+ gcmkFOOTER_NO();
1379+ return gcvSTATUS_OK;
1380+
1381+OnError:
1382+ /* Return the status. */
1383+ gcmkFOOTER();
1384+ return status;
1385+}
1386+#endif
1387+
1388 static gceSTATUS
1389 _ResetGPU(
1390 IN gckHARDWARE Hardware,
1391@@ -5602,6 +6264,22 @@ gckHARDWARE_IsFeatureAvailable(
1392 && ((((gctUINT32) (Hardware->identity.chipFeatures)) >> (0 ? 2:2) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))));
1393 break;
1394
1395+ case gcvFEATURE_PIPE_2D:
1396+ available = ((((gctUINT32) (Hardware->identity.chipFeatures)) >> (0 ? 9:9) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))));
1397+ break;
1398+
1399+ case gcvFEATURE_PIPE_3D:
1400+#ifndef VIVANTE_NO_3D
1401+ available = ((((gctUINT32) (Hardware->identity.chipFeatures)) >> (0 ? 2:2) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))));
1402+#else
1403+ available = gcvFALSE;
1404+#endif
1405+ break;
1406+
1407+ case gcvFEATURE_HALTI2:
1408+ available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures4)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))));
1409+ break;
1410+
1411 default:
1412 gcmkFATAL("Invalid feature has been requested.");
1413 available = gcvFALSE;
1414diff --git a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h
1415index 37226b7..287ea60 100644
1416--- a/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h
1417+++ b/drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h
1418@@ -92,6 +92,7 @@ struct _gckHARDWARE
1419 #endif
1420
1421 gctBOOL powerManagement;
1422+ gctBOOL gpuProfiler;
1423 };
1424
1425 gceSTATUS
1426diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c
1427index b7b0d28..12a5340 100644
1428--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c
1429+++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c
1430@@ -128,19 +128,6 @@ _ResetFinishFunction(
1431 ** Pointer to a variable that will hold the pointer to the gckKERNEL
1432 ** object.
1433 */
1434-#ifdef ANDROID
1435-#if gcdNEW_PROFILER_FILE
1436-#define DEFAULT_PROFILE_FILE_NAME "/sdcard/vprofiler.vpd"
1437-#else
1438-#define DEFAULT_PROFILE_FILE_NAME "/sdcard/vprofiler.xml"
1439-#endif
1440-#else
1441-#if gcdNEW_PROFILER_FILE
1442-#define DEFAULT_PROFILE_FILE_NAME "vprofiler.vpd"
1443-#else
1444-#define DEFAULT_PROFILE_FILE_NAME "vprofiler.xml"
1445-#endif
1446-#endif
1447
1448 gceSTATUS
1449 gckKERNEL_Construct(
1450@@ -302,17 +289,12 @@ gckKERNEL_Construct(
1451
1452 #if VIVANTE_PROFILER
1453 /* Initialize profile setting */
1454-#if defined ANDROID
1455 kernel->profileEnable = gcvFALSE;
1456-#else
1457- kernel->profileEnable = gcvTRUE;
1458-#endif
1459 kernel->profileCleanRegister = gcvTRUE;
1460+#endif
1461
1462- gcmkVERIFY_OK(
1463- gckOS_MemCopy(kernel->profileFileName,
1464- DEFAULT_PROFILE_FILE_NAME,
1465- gcmSIZEOF(DEFAULT_PROFILE_FILE_NAME) + 1));
1466+#if gcdANDROID_NATIVE_FENCE_SYNC
1467+ gcmkONERROR(gckOS_CreateSyncTimeline(Os, &kernel->timeline));
1468 #endif
1469
1470 /* Return pointer to the gckKERNEL object. */
1471@@ -395,6 +377,13 @@ OnError:
1472 }
1473 #endif
1474
1475+#if gcdANDROID_NATIVE_FENCE_SYNC
1476+ if (kernel->timeline)
1477+ {
1478+ gcmkVERIFY_OK(gckOS_DestroySyncTimeline(Os, kernel->timeline));
1479+ }
1480+#endif
1481+
1482 gcmkVERIFY_OK(gcmkOS_SAFE_FREE(Os, kernel));
1483 }
1484
1485@@ -525,6 +514,10 @@ gckKERNEL_Destroy(
1486 }
1487 #endif
1488
1489+#if gcdANDROID_NATIVE_FENCE_SYNC
1490+ gcmkVERIFY_OK(gckOS_DestroySyncTimeline(Kernel->os, Kernel->timeline));
1491+#endif
1492+
1493 /* Mark the gckKERNEL object as unknown. */
1494 Kernel->object.type = gcvOBJ_UNKNOWN;
1495
1496@@ -1310,7 +1303,8 @@ gckKERNEL_Dispatch(
1497 /* Commit a command and context buffer. */
1498 gcmkONERROR(
1499 gckCOMMAND_Commit(Kernel->command,
1500- gcmNAME_TO_PTR(Interface->u.Commit.context),
1501+ Interface->u.Commit.context ?
1502+ gcmNAME_TO_PTR(Interface->u.Commit.context) : gcvNULL,
1503 gcmUINT64_TO_PTR(Interface->u.Commit.commandBuffer),
1504 gcmUINT64_TO_PTR(Interface->u.Commit.delta),
1505 gcmUINT64_TO_PTR(Interface->u.Commit.queue),
1506@@ -1600,7 +1594,15 @@ gckKERNEL_Dispatch(
1507 break;
1508
1509 case gcvHAL_READ_ALL_PROFILE_REGISTERS:
1510-#if VIVANTE_PROFILER
1511+#if VIVANTE_PROFILER && VIVANTE_PROFILER_CONTEXT
1512+ /* Read profile data according to the context. */
1513+ gcmkONERROR(
1514+ gckHARDWARE_QueryContextProfile(
1515+ Kernel->hardware,
1516+ Kernel->profileCleanRegister,
1517+ gcmNAME_TO_PTR(Interface->u.RegisterProfileData.context),
1518+ &Interface->u.RegisterProfileData.counters));
1519+#elif VIVANTE_PROFILER
1520 /* Read all 3D profile registers. */
1521 gcmkONERROR(
1522 gckHARDWARE_QueryProfileRegisters(
1523@@ -1628,11 +1630,6 @@ gckKERNEL_Dispatch(
1524 #if VIVANTE_PROFILER
1525 /* Get profile setting */
1526 Interface->u.GetProfileSetting.enable = Kernel->profileEnable;
1527-
1528- gcmkVERIFY_OK(
1529- gckOS_MemCopy(Interface->u.GetProfileSetting.fileName,
1530- Kernel->profileFileName,
1531- gcdMAX_PROFILE_FILE_NAME));
1532 #endif
1533
1534 status = gcvSTATUS_OK;
1535@@ -1640,12 +1637,13 @@ gckKERNEL_Dispatch(
1536 case gcvHAL_SET_PROFILE_SETTING:
1537 #if VIVANTE_PROFILER
1538 /* Set profile setting */
1539- Kernel->profileEnable = Interface->u.SetProfileSetting.enable;
1540-
1541- gcmkVERIFY_OK(
1542- gckOS_MemCopy(Kernel->profileFileName,
1543- Interface->u.SetProfileSetting.fileName,
1544- gcdMAX_PROFILE_FILE_NAME));
1545+ if(Kernel->hardware->gpuProfiler)
1546+ Kernel->profileEnable = Interface->u.SetProfileSetting.enable;
1547+ else
1548+ {
1549+ status = gcvSTATUS_NOT_SUPPORTED;
1550+ break;
1551+ }
1552 #endif
1553
1554 status = gcvSTATUS_OK;
1555@@ -2093,6 +2091,61 @@ gckKERNEL_Dispatch(
1556 #endif
1557 break;
1558
1559+#if gcdANDROID_NATIVE_FENCE_SYNC
1560+ case gcvHAL_SYNC_POINT:
1561+ {
1562+ gctSYNC_POINT syncPoint;
1563+
1564+ switch (Interface->u.SyncPoint.command)
1565+ {
1566+ case gcvSYNC_POINT_CREATE:
1567+ gcmkONERROR(gckOS_CreateSyncPoint(Kernel->os, &syncPoint));
1568+
1569+ Interface->u.SyncPoint.syncPoint = gcmPTR_TO_UINT64(syncPoint);
1570+
1571+ gcmkVERIFY_OK(
1572+ gckKERNEL_AddProcessDB(Kernel,
1573+ processID, gcvDB_SYNC_POINT,
1574+ syncPoint,
1575+ gcvNULL,
1576+ 0));
1577+ break;
1578+
1579+ case gcvSYNC_POINT_DESTROY:
1580+ syncPoint = gcmUINT64_TO_PTR(Interface->u.SyncPoint.syncPoint);
1581+
1582+ gcmkONERROR(gckOS_DestroySyncPoint(Kernel->os, syncPoint));
1583+
1584+ gcmkVERIFY_OK(
1585+ gckKERNEL_RemoveProcessDB(Kernel,
1586+ processID, gcvDB_SYNC_POINT,
1587+ syncPoint));
1588+ break;
1589+
1590+ default:
1591+ gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
1592+ break;
1593+ }
1594+ }
1595+ break;
1596+
1597+ case gcvHAL_CREATE_NATIVE_FENCE:
1598+ {
1599+ gctINT fenceFD;
1600+ gctSYNC_POINT syncPoint =
1601+ gcmUINT64_TO_PTR(Interface->u.CreateNativeFence.syncPoint);
1602+
1603+ gcmkONERROR(
1604+ gckOS_CreateNativeFence(Kernel->os,
1605+ Kernel->timeline,
1606+ syncPoint,
1607+ &fenceFD));
1608+
1609+ Interface->u.CreateNativeFence.fenceFD = fenceFD;
1610+ }
1611+ break;
1612+#endif
1613+
1614 default:
1615 /* Invalid command. */
1616 gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
1617@@ -2856,6 +2909,8 @@ gckKERNEL_Recovery(
1618 return gcvSTATUS_OK;
1619 }
1620
1621+ gcmkPRINT("[galcore]: GPU[%d] hang, automatic recovery.", Kernel->core);
1622+
1623 /* Start a timer to clear reset flag, before timer is expired,
1624 ** other recovery request is ignored. */
1625 gcmkVERIFY_OK(
1626@@ -3382,7 +3437,7 @@ gckLINKQUEUE_Dequeue(
1627 IN gckLINKQUEUE LinkQueue
1628 )
1629 {
1630- gcmASSERT(LinkQueue->count == gcdLINK_QUEUE_SIZE);
1631+ gcmkASSERT(LinkQueue->count == gcdLINK_QUEUE_SIZE);
1632
1633 LinkQueue->count--;
1634 LinkQueue->front = (LinkQueue->front + 1) % gcdLINK_QUEUE_SIZE;
1635diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h
1636index 5896e93..1c40df2 100644
1637--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h
1638+++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h
1639@@ -140,8 +140,9 @@ typedef enum _gceDATABASE_TYPE
1640 gcvDB_CONTEXT, /* Context */
1641 gcvDB_IDLE, /* GPU idle. */
1642 gcvDB_MAP_MEMORY, /* Map memory */
1643- gcvDB_SHARED_INFO, /* Private data */
1644- gcvDB_MAP_USER_MEMORY /* Map user memory */
1645+ gcvDB_SHARED_INFO, /* Private data */
1646+ gcvDB_MAP_USER_MEMORY, /* Map user memory */
1647+ gcvDB_SYNC_POINT, /* Sync point. */
1648 }
1649 gceDATABASE_TYPE;
1650
1651@@ -406,9 +407,6 @@ struct _gckKERNEL
1652 /* Enable profiling */
1653 gctBOOL profileEnable;
1654
1655- /* The profile file name */
1656- gctCHAR profileFileName[gcdMAX_PROFILE_FILE_NAME];
1657-
1658 /* Clear profile register or not*/
1659 gctBOOL profileCleanRegister;
1660
1661@@ -445,6 +443,10 @@ struct _gckKERNEL
1662 #if gcdDVFS
1663 gckDVFS dvfs;
1664 #endif
1665+
1666+#if gcdANDROID_NATIVE_FENCE_SYNC
1667+ gctHANDLE timeline;
1668+#endif
1669 };
1670
1671 struct _FrequencyHistory
1672@@ -496,6 +498,11 @@ struct _gckCOMMAND
1673 /* Context switching mutex. */
1674 gctPOINTER mutexContext;
1675
1676+#if VIVANTE_PROFILER_CONTEXT
1677+ /* Context sequence mutex. */
1678+ gctPOINTER mutexContextSeq;
1679+#endif
1680+
1681 /* Command queue power semaphore. */
1682 gctPOINTER powerSemaphore;
1683
1684@@ -649,6 +656,8 @@ struct _gckEVENT
1685 gctPOINTER eventListMutex;
1686
1687 gctPOINTER submitTimer;
1688+
1689+ volatile gctBOOL inNotify;
1690 };
1691
1692 /* Free all events belonging to a process. */
1693@@ -668,6 +677,11 @@ gckEVENT_Stop(
1694 IN OUT gctSIZE_T * waitSize
1695 );
1696
1697+gceSTATUS
1698+gckEVENT_WaitEmpty(
1699+ IN gckEVENT Event
1700+ );
1701+
1702 /* gcuVIDMEM_NODE structure. */
1703 typedef union _gcuVIDMEM_NODE
1704 {
1705diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c
1706index 9ee9ea1..73dab81 100644
1707--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c
1708+++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c
1709@@ -494,6 +494,11 @@ gckCOMMAND_Construct(
1710 /* Create the context switching mutex. */
1711 gcmkONERROR(gckOS_CreateMutex(os, &command->mutexContext));
1712
1713+#if VIVANTE_PROFILER_CONTEXT
1714+ /* Create the context switching mutex. */
1715+ gcmkONERROR(gckOS_CreateMutex(os, &command->mutexContextSeq));
1716+#endif
1717+
1718 /* Create the power management semaphore. */
1719 gcmkONERROR(gckOS_CreateSemaphore(os, &command->powerSemaphore));
1720
1721@@ -572,6 +577,13 @@ OnError:
1722 gcmkVERIFY_OK(gckOS_DeleteMutex(os, command->mutexContext));
1723 }
1724
1725+#if VIVANTE_PROFILER_CONTEXT
1726+ if (command->mutexContextSeq != gcvNULL)
1727+ {
1728+ gcmkVERIFY_OK(gckOS_DeleteMutex(os, command->mutexContextSeq));
1729+ }
1730+#endif
1731+
1732 if (command->mutexQueue != gcvNULL)
1733 {
1734 gcmkVERIFY_OK(gckOS_DeleteMutex(os, command->mutexQueue));
1735@@ -662,6 +674,11 @@ gckCOMMAND_Destroy(
1736 /* Delete the context switching mutex. */
1737 gcmkVERIFY_OK(gckOS_DeleteMutex(Command->os, Command->mutexContext));
1738
1739+#if VIVANTE_PROFILER_CONTEXT
1740+ if (Command->mutexContextSeq != gcvNULL)
1741+ gcmkVERIFY_OK(gckOS_DeleteMutex(Command->os, Command->mutexContextSeq));
1742+#endif
1743+
1744 /* Delete the command queue mutex. */
1745 gcmkVERIFY_OK(gckOS_DeleteMutex(Command->os, Command->mutexQueue));
1746
1747@@ -1127,6 +1144,10 @@ gckCOMMAND_Commit(
1748 # endif
1749 #endif
1750
1751+#if VIVANTE_PROFILER_CONTEXT
1752+ gctBOOL sequenceAcquired = gcvFALSE;
1753+#endif
1754+
1755 gctPOINTER pointer = gcvNULL;
1756
1757 gcmkHEADER_ARG(
1758@@ -1145,6 +1166,17 @@ gckCOMMAND_Commit(
1759
1760 gcmkONERROR(_FlushMMU(Command));
1761
1762+#if VIVANTE_PROFILER_CONTEXT
1763+ if((Command->kernel->hardware->gpuProfiler) && (Command->kernel->profileEnable))
1764+ {
1765+ /* Acquire the context sequnence mutex. */
1766+ gcmkONERROR(gckOS_AcquireMutex(
1767+ Command->os, Command->mutexContextSeq, gcvINFINITE
1768+ ));
1769+ sequenceAcquired = gcvTRUE;
1770+ }
1771+#endif
1772+
1773 /* Acquire the command queue. */
1774 gcmkONERROR(gckCOMMAND_EnterCommit(Command, gcvFALSE));
1775 commitEntered = gcvTRUE;
1776@@ -2002,6 +2034,23 @@ gckCOMMAND_Commit(
1777 gcmkONERROR(gckCOMMAND_ExitCommit(Command, gcvFALSE));
1778 commitEntered = gcvFALSE;
1779
1780+#if VIVANTE_PROFILER_CONTEXT
1781+ if(sequenceAcquired)
1782+ {
1783+ gcmkONERROR(gckCOMMAND_Stall(Command, gcvTRUE));
1784+ if (Command->currContext)
1785+ {
1786+ gcmkONERROR(gckHARDWARE_UpdateContextProfile(
1787+ hardware,
1788+ Command->currContext));
1789+ }
1790+
1791+ /* Release the context switching mutex. */
1792+ gcmkONERROR(gckOS_ReleaseMutex(Command->os, Command->mutexContextSeq));
1793+ sequenceAcquired = gcvFALSE;
1794+ }
1795+#endif
1796+
1797 /* Loop while there are records in the queue. */
1798 while (EventQueue != gcvNULL)
1799 {
1800@@ -2114,6 +2163,14 @@ OnError:
1801 gcmkVERIFY_OK(gckCOMMAND_ExitCommit(Command, gcvFALSE));
1802 }
1803
1804+#if VIVANTE_PROFILER_CONTEXT
1805+ if (sequenceAcquired)
1806+ {
1807+ /* Release the context sequence mutex. */
1808+ gcmkVERIFY_OK(gckOS_ReleaseMutex(Command->os, Command->mutexContextSeq));
1809+ }
1810+#endif
1811+
1812 /* Unmap the command buffer pointer. */
1813 if (commandBufferMapped)
1814 {
1815diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c
1816index 76c1c10..1a7c340 100644
1817--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c
1818+++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c
1819@@ -2819,6 +2819,7 @@ gckVGCOMMAND_Construct(
1820 ** Enable TS overflow interrupt.
1821 */
1822
1823+ command->info.tsOverflowInt = 0;
1824 gcmkERR_BREAK(gckVGINTERRUPT_Enable(
1825 Kernel->interrupt,
1826 &command->info.tsOverflowInt,
1827@@ -3406,38 +3407,26 @@ gckVGCOMMAND_Commit(
1828 gctBOOL previousExecuted;
1829 gctUINT controlIndex;
1830
1831+ gcmkERR_BREAK(gckVGHARDWARE_SetPowerManagementState(
1832+ Command->hardware, gcvPOWER_ON_AUTO
1833+ ));
1834+
1835+ /* Acquire the power semaphore. */
1836+ gcmkERR_BREAK(gckOS_AcquireSemaphore(
1837+ Command->os, Command->powerSemaphore
1838+ ));
1839+
1840 /* Acquire the mutex. */
1841- gcmkERR_BREAK(gckOS_AcquireMutex(
1842+ status = gckOS_AcquireMutex(
1843 Command->os,
1844 Command->commitMutex,
1845 gcvINFINITE
1846- ));
1847-
1848- status = gckVGHARDWARE_SetPowerManagementState(
1849- Command->hardware, gcvPOWER_ON_AUTO);
1850-
1851- if (gcmIS_ERROR(status))
1852- {
1853- /* Acquire the mutex. */
1854- gcmkVERIFY_OK(gckOS_ReleaseMutex(
1855- Command->os,
1856- Command->commitMutex
1857- ));
1858-
1859- break;
1860- }
1861- /* Acquire the power semaphore. */
1862- status = gckOS_AcquireSemaphore(
1863- Command->os, Command->powerSemaphore);
1864+ );
1865
1866 if (gcmIS_ERROR(status))
1867 {
1868- /* Acquire the mutex. */
1869- gcmkVERIFY_OK(gckOS_ReleaseMutex(
1870- Command->os,
1871- Command->commitMutex
1872- ));
1873-
1874+ gcmkVERIFY_OK(gckOS_ReleaseSemaphore(
1875+ Command->os, Command->powerSemaphore));
1876 break;
1877 }
1878
1879@@ -3669,14 +3658,14 @@ gckVGCOMMAND_Commit(
1880 }
1881 while (gcvFALSE);
1882
1883- gcmkVERIFY_OK(gckOS_ReleaseSemaphore(
1884- Command->os, Command->powerSemaphore));
1885-
1886 /* Release the mutex. */
1887 gcmkCHECK_STATUS(gckOS_ReleaseMutex(
1888 Command->os,
1889 Command->commitMutex
1890 ));
1891+
1892+ gcmkVERIFY_OK(gckOS_ReleaseSemaphore(
1893+ Command->os, Command->powerSemaphore));
1894 }
1895 while (gcvFALSE);
1896
1897diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c
1898index 673d4f7..134351a 100644
1899--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c
1900+++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_db.c
1901@@ -1307,6 +1307,18 @@ gckKERNEL_DestroyProcessDB(
1902 status = gckOS_FreeMemory(Kernel->os, record->physical);
1903 break;
1904
1905+#if gcdANDROID_NATIVE_FENCE_SYNC
1906+ case gcvDB_SYNC_POINT:
1907+ /* Free the user signal. */
1908+ status = gckOS_DestroySyncPoint(Kernel->os,
1909+ (gctSYNC_POINT) record->data);
1910+
1911+ gcmkTRACE_ZONE(gcvLEVEL_WARNING, gcvZONE_DATABASE,
1912+ "DB: SYNC POINT %d (status=%d)",
1913+ (gctINT)(gctUINTPTR_T)record->data, status);
1914+ break;
1915+#endif
1916+
1917 default:
1918 gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DATABASE,
1919 "DB: Correcupted record=0x%08x type=%d",
1920diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c
1921index 217f7f1..2d81a56 100644
1922--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c
1923+++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c
1924@@ -931,6 +931,7 @@ gckEVENT_AddList(
1925 || (Interface->command == gcvHAL_TIMESTAMP)
1926 || (Interface->command == gcvHAL_COMMIT_DONE)
1927 || (Interface->command == gcvHAL_FREE_VIRTUAL_COMMAND_BUFFER)
1928+ || (Interface->command == gcvHAL_SYNC_POINT)
1929 );
1930
1931 /* Validate the source. */
1932@@ -2131,6 +2132,9 @@ gckEVENT_Notify(
1933 gcvINFINITE));
1934 acquired = gcvTRUE;
1935
1936+ /* We are in the notify loop. */
1937+ Event->inNotify = gcvTRUE;
1938+
1939 /* Grab the event head. */
1940 record = queue->head;
1941
1942@@ -2463,6 +2467,17 @@ gckEVENT_Notify(
1943 break;
1944 #endif
1945
1946+#if gcdANDROID_NATIVE_FENCE_SYNC
1947+ case gcvHAL_SYNC_POINT:
1948+ {
1949+ gctSYNC_POINT syncPoint;
1950+
1951+ syncPoint = gcmUINT64_TO_PTR(record->info.u.SyncPoint.syncPoint);
1952+ status = gckOS_SignalSyncPoint(Event->os, syncPoint);
1953+ }
1954+ break;
1955+#endif
1956+
1957 case gcvHAL_COMMIT_DONE:
1958 break;
1959
1960@@ -2505,6 +2520,9 @@ gckEVENT_Notify(
1961 gcmkONERROR(_TryToIdleGPU(Event));
1962 }
1963
1964+ /* We are out the notify loop. */
1965+ Event->inNotify = gcvFALSE;
1966+
1967 /* Success. */
1968 gcmkFOOTER_NO();
1969 return gcvSTATUS_OK;
1970@@ -2524,6 +2542,9 @@ OnError:
1971 }
1972 #endif
1973
1974+ /* We are out the notify loop. */
1975+ Event->inNotify = gcvFALSE;
1976+
1977 /* Return the status. */
1978 gcmkFOOTER();
1979 return status;
1980@@ -2871,3 +2892,11 @@ gckEVENT_Dump(
1981 return gcvSTATUS_OK;
1982 }
1983
1984+gceSTATUS gckEVENT_WaitEmpty(gckEVENT Event)
1985+{
1986+ gctBOOL isEmpty;
1987+
1988+ while (Event->inNotify || (gcmIS_SUCCESS(gckEVENT_IsEmpty(Event, &isEmpty)) && !isEmpty)) ;
1989+
1990+ return gcvSTATUS_OK;
1991+}
1992diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c
1993index 8ac187b..50bc63e 100644
1994--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c
1995+++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_interrupt_vg.c
1996@@ -794,6 +794,9 @@ gckVGINTERRUPT_Enque(
1997 Interrupt->kernel->hardware, &triggered
1998 ));
1999
2000+ /* Mask out TS overflow interrupt */
2001+ triggered &= 0xfffffffe;
2002+
2003 /* No interrupts to process? */
2004 if (triggered == 0)
2005 {
2006diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c
2007index c7f67c7..e4ca497 100644
2008--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c
2009+++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c
2010@@ -1436,7 +1436,7 @@ gckMMU_AllocatePages(
2011 acquired = gcvTRUE;
2012
2013 /* Allocate page table for current MMU. */
2014- for (i = 0; i < mirrorPageTable->reference; i++)
2015+ for (i = 0; i < (gctINT)mirrorPageTable->reference; i++)
2016 {
2017 if (Mmu == mirrorPageTable->mmus[i])
2018 {
2019@@ -1446,7 +1446,7 @@ gckMMU_AllocatePages(
2020 }
2021
2022 /* Allocate page table for other MMUs. */
2023- for (i = 0; i < mirrorPageTable->reference; i++)
2024+ for (i = 0; i < (gctINT)mirrorPageTable->reference; i++)
2025 {
2026 mmu = mirrorPageTable->mmus[i];
2027
2028@@ -1500,7 +1500,7 @@ gckMMU_FreePages(
2029
2030 offset = (gctUINT32)PageTable - (gctUINT32)Mmu->pageTableLogical;
2031
2032- for (i = 0; i < mirrorPageTable->reference; i++)
2033+ for (i = 0; i < (gctINT)mirrorPageTable->reference; i++)
2034 {
2035 mmu = mirrorPageTable->mmus[i];
2036
2037@@ -1639,7 +1639,7 @@ gckMMU_SetPage(
2038 _WritePageEntry(PageEntry, data);
2039
2040 #if gcdMIRROR_PAGETABLE
2041- for (i = 0; i < mirrorPageTable->reference; i++)
2042+ for (i = 0; i < (gctINT)mirrorPageTable->reference; i++)
2043 {
2044 mmu = mirrorPageTable->mmus[i];
2045
2046diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c
2047index 8b8bbdc..3b5dd82 100644
2048--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c
2049+++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c
2050@@ -1582,6 +1582,7 @@ _NeedVirtualMapping(
2051 gctUINT32 end;
2052 gcePOOL pool;
2053 gctUINT32 offset;
2054+ gctUINT32 baseAddress;
2055
2056 gcmkHEADER_ARG("Node=0x%X", Node);
2057
2058@@ -1601,10 +1602,16 @@ _NeedVirtualMapping(
2059 else
2060 #endif
2061 {
2062- /* For cores which can't access all physical address. */
2063- gcmkONERROR(gckHARDWARE_ConvertLogical(Kernel->hardware,
2064- Node->Virtual.logical,
2065- &phys));
2066+ /* Convert logical address into a physical address. */
2067+ gcmkONERROR(
2068+ gckOS_GetPhysicalAddress(Kernel->os, Node->Virtual.logical, &phys));
2069+
2070+ gcmkONERROR(gckOS_GetBaseAddress(Kernel->os, &baseAddress));
2071+
2072+ gcmkASSERT(phys >= baseAddress);
2073+
2074+ /* Subtract baseAddress to get a GPU address used for programming. */
2075+ phys -= baseAddress;
2076
2077 /* If part of region is belong to gcvPOOL_VIRTUAL,
2078 ** whole region has to be mapped. */
2079@@ -1734,6 +1741,11 @@ gckVIDMEM_Lock(
2080 gcmkONERROR(gckOS_AcquireMutex(os, Node->Virtual.mutex, gcvINFINITE));
2081 acquired = gcvTRUE;
2082
2083+#if gcdPAGED_MEMORY_CACHEABLE
2084+ /* Force video memory cacheable. */
2085+ Cacheable = gcvTRUE;
2086+#endif
2087+
2088 gcmkONERROR(
2089 gckOS_LockPages(os,
2090 Node->Virtual.physical,
2091diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h
2092index 4406d7e..7312cc2 100644
2093--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h
2094+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h
2095@@ -123,6 +123,12 @@ extern "C" {
2096
2097 #define gcvINVALID_ADDRESS ~0U
2098
2099+#define gcmGET_PRE_ROTATION(rotate) \
2100+ ((rotate) & (~(gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y)))
2101+
2102+#define gcmGET_POST_ROTATION(rotate) \
2103+ ((rotate) & (gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y))
2104+
2105 /******************************************************************************\
2106 ******************************** gcsOBJECT Object *******************************
2107 \******************************************************************************/
2108@@ -1124,6 +1130,60 @@ gckOS_UnmapUserMemory(
2109 IN gctUINT32 Address
2110 );
2111
2112+/******************************************************************************\
2113+************************** Android Native Fence Sync ***************************
2114+\******************************************************************************/
2115+gceSTATUS
2116+gckOS_CreateSyncTimeline(
2117+ IN gckOS Os,
2118+ OUT gctHANDLE * Timeline
2119+ );
2120+
2121+gceSTATUS
2122+gckOS_DestroySyncTimeline(
2123+ IN gckOS Os,
2124+ IN gctHANDLE Timeline
2125+ );
2126+
2127+gceSTATUS
2128+gckOS_CreateSyncPoint(
2129+ IN gckOS Os,
2130+ OUT gctSYNC_POINT * SyncPoint
2131+ );
2132+
2133+gceSTATUS
2134+gckOS_ReferenceSyncPoint(
2135+ IN gckOS Os,
2136+ IN gctSYNC_POINT SyncPoint
2137+ );
2138+
2139+gceSTATUS
2140+gckOS_DestroySyncPoint(
2141+ IN gckOS Os,
2142+ IN gctSYNC_POINT SyncPoint
2143+ );
2144+
2145+gceSTATUS
2146+gckOS_SignalSyncPoint(
2147+ IN gckOS Os,
2148+ IN gctSYNC_POINT SyncPoint
2149+ );
2150+
2151+gceSTATUS
2152+gckOS_QuerySyncPoint(
2153+ IN gckOS Os,
2154+ IN gctSYNC_POINT SyncPoint,
2155+ OUT gctBOOL_PTR State
2156+ );
2157+
2158+gceSTATUS
2159+gckOS_CreateNativeFence(
2160+ IN gckOS Os,
2161+ IN gctHANDLE Timeline,
2162+ IN gctSYNC_POINT SyncPoint,
2163+ OUT gctINT * FenceFD
2164+ );
2165+
2166 #if !USE_NEW_LINUX_SIGNAL
2167 /* Create signal to be used in the user space. */
2168 gceSTATUS
2169@@ -1758,7 +1818,7 @@ gckKERNEL_Recovery(
2170 void
2171 gckKERNEL_SetTimeOut(
2172 IN gckKERNEL Kernel,
2173- IN gctUINT32 timeOut
2174+ IN gctUINT32 timeOut
2175 );
2176
2177 /* Get access to the user data. */
2178@@ -2078,6 +2138,12 @@ gckHARDWARE_SetPowerManagement(
2179 IN gctBOOL PowerManagement
2180 );
2181
2182+gceSTATUS
2183+gckHARDWARE_SetGpuProfiler(
2184+ IN gckHARDWARE Hardware,
2185+ IN gctBOOL GpuProfiler
2186+ );
2187+
2188 #if gcdENABLE_FSCALE_VAL_ADJUST
2189 gceSTATUS
2190 gckHARDWARE_SetFscaleValue(
2191@@ -2554,6 +2620,22 @@ gckHARDWARE_QueryProfileRegisters(
2192 );
2193 #endif
2194
2195+#if VIVANTE_PROFILER_CONTEXT
2196+gceSTATUS
2197+gckHARDWARE_QueryContextProfile(
2198+ IN gckHARDWARE Hardware,
2199+ IN gctBOOL Clear,
2200+ IN gckCONTEXT Context,
2201+ OUT gcsPROFILER_COUNTERS * Counters
2202+ );
2203+
2204+gceSTATUS
2205+gckHARDWARE_UpdateContextProfile(
2206+ IN gckHARDWARE Hardware,
2207+ IN gckCONTEXT Context
2208+ );
2209+#endif
2210+
2211 gceSTATUS
2212 gckOS_SignalQueryHardware(
2213 IN gckOS Os,
2214diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h
2215index 44689b0..9c17114 100644
2216--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h
2217+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h
2218@@ -71,10 +71,17 @@ typedef struct _gcoFENCE * gcoFENCE;
2219 typedef struct _gcsSYNC_CONTEXT * gcsSYNC_CONTEXT_PTR;
2220 #endif
2221
2222+typedef struct _gcoOS_SymbolsList gcoOS_SymbolsList;
2223+
2224 /******************************************************************************\
2225 ******************************* Process local storage *************************
2226 \******************************************************************************/
2227 typedef struct _gcsPLS * gcsPLS_PTR;
2228+
2229+typedef void (* gctPLS_DESTRUCTOR) (
2230+ gcsPLS_PTR
2231+ );
2232+
2233 typedef struct _gcsPLS
2234 {
2235 /* Global objects. */
2236@@ -103,6 +110,12 @@ typedef struct _gcsPLS
2237
2238 /* PorcessID of the constrcutor process */
2239 gctUINT32 processID;
2240+#if gcdFORCE_GAL_LOAD_TWICE
2241+ /* ThreadID of the constrcutor process. */
2242+ gctSIZE_T threadID;
2243+ /* Flag for calling module destructor. */
2244+ gctBOOL exiting;
2245+#endif
2246
2247 /* Reference count for destructor. */
2248 gcsATOM_PTR reference;
2249@@ -111,6 +124,8 @@ typedef struct _gcsPLS
2250 gctBOOL bNeedSupportNP2Texture;
2251 #endif
2252
2253+ /* Destructor for eglDisplayInfo. */
2254+ gctPLS_DESTRUCTOR destructor;
2255 }
2256 gcsPLS;
2257
2258@@ -148,6 +163,11 @@ typedef struct _gcsTLS
2259 #endif
2260 gco2D engine2D;
2261 gctBOOL copied;
2262+
2263+#if gcdFORCE_GAL_LOAD_TWICE
2264+ /* libGAL.so handle */
2265+ gctHANDLE handle;
2266+#endif
2267 }
2268 gcsTLS;
2269
2270@@ -160,6 +180,7 @@ typedef enum _gcePLS_VALUE
2271 gcePLS_VALUE_EGL_DISPLAY_INFO,
2272 gcePLS_VALUE_EGL_SURFACE_INFO,
2273 gcePLS_VALUE_EGL_CONFIG_FORMAT_INFO,
2274+ gcePLS_VALUE_EGL_DESTRUCTOR_INFO,
2275 }
2276 gcePLS_VALUE;
2277
2278@@ -577,6 +598,12 @@ gcoHAL_Call(
2279 IN OUT gcsHAL_INTERFACE_PTR Interface
2280 );
2281
2282+gceSTATUS
2283+gcoHAL_GetPatchID(
2284+ IN gcoHAL Hal,
2285+ OUT gcePATCH_ID * PatchID
2286+ );
2287+
2288 /* Schedule an event. */
2289 gceSTATUS
2290 gcoHAL_ScheduleEvent(
2291@@ -637,6 +664,16 @@ gcoHAL_QuerySeparated3D2D(
2292 IN gcoHAL Hal
2293 );
2294
2295+gceSTATUS
2296+gcoHAL_QuerySpecialHint(
2297+ IN gceSPECIAL_HINT Hint
2298+ );
2299+
2300+gceSTATUS
2301+gcoHAL_SetSpecialHintData(
2302+ IN gcoHARDWARE Hardware
2303+ );
2304+
2305 /* Get pointer to gcoVG object. */
2306 gceSTATUS
2307 gcoHAL_GetVGEngine(
2308@@ -786,7 +823,6 @@ gcoOS_FreeVideoMemory(
2309 IN gctPOINTER Handle
2310 );
2311
2312-#if gcdENABLE_BANK_ALIGNMENT
2313 gceSTATUS
2314 gcoSURF_GetBankOffsetBytes(
2315 IN gcoSURF Surfce,
2316@@ -794,7 +830,6 @@ gcoSURF_GetBankOffsetBytes(
2317 IN gctUINT32 Stride,
2318 IN gctUINT32_PTR Bytes
2319 );
2320-#endif
2321
2322 /* Map user memory. */
2323 gceSTATUS
2324@@ -918,6 +953,21 @@ gcoOS_Flush(
2325 IN gctFILE File
2326 );
2327
2328+/* Close a file descriptor. */
2329+gceSTATUS
2330+gcoOS_CloseFD(
2331+ IN gcoOS Os,
2332+ IN gctINT FD
2333+ );
2334+
2335+/* Dup file descriptor to another. */
2336+gceSTATUS
2337+gcoOS_DupFD(
2338+ IN gcoOS Os,
2339+ IN gctINT FD,
2340+ OUT gctINT * FD2
2341+ );
2342+
2343 /* Create an endpoint for communication. */
2344 gceSTATUS
2345 gcoOS_Socket(
2346@@ -977,6 +1027,14 @@ gcoOS_GetEnv(
2347 OUT gctSTRING * Value
2348 );
2349
2350+/* Set environment variable value. */
2351+gceSTATUS
2352+gcoOS_SetEnv(
2353+ IN gcoOS Os,
2354+ IN gctCONST_STRING VarName,
2355+ IN gctSTRING Value
2356+ );
2357+
2358 /* Get current working directory. */
2359 gceSTATUS
2360 gcoOS_GetCwd(
2361@@ -1210,6 +1268,13 @@ gcoOS_DetectProcessByEncryptedName(
2362 IN gctCONST_STRING Name
2363 );
2364
2365+#if defined(ANDROID)
2366+gceSTATUS
2367+gcoOS_DetectProgrameByEncryptedSymbols(
2368+ IN gcoOS_SymbolsList Symbols
2369+ );
2370+#endif
2371+
2372 /*----------------------------------------------------------------------------*/
2373 /*----- Atoms ----------------------------------------------------------------*/
2374
2375@@ -1403,6 +1468,42 @@ gcoOS_UnmapSignal(
2376 IN gctSIGNAL Signal
2377 );
2378
2379+/*----------------------------------------------------------------------------*/
2380+/*----- Android Native Fence -------------------------------------------------*/
2381+
2382+/* Create sync point. */
2383+gceSTATUS
2384+gcoOS_CreateSyncPoint(
2385+ IN gcoOS Os,
2386+ OUT gctSYNC_POINT * SyncPoint
2387+ );
2388+
2389+/* Destroy sync point. */
2390+gceSTATUS
2391+gcoOS_DestroySyncPoint(
2392+ IN gcoOS Os,
2393+ IN gctSYNC_POINT SyncPoint
2394+ );
2395+
2396+/* Create native fence. */
2397+gceSTATUS
2398+gcoOS_CreateNativeFence(
2399+ IN gcoOS Os,
2400+ IN gctSYNC_POINT SyncPoint,
2401+ OUT gctINT * FenceFD
2402+ );
2403+
2404+/* Wait on native fence. */
2405+gceSTATUS
2406+gcoOS_WaitNativeFence(
2407+ IN gcoOS Os,
2408+ IN gctINT FenceFD,
2409+ IN gctUINT32 Timeout
2410+ );
2411+
2412+/*----------------------------------------------------------------------------*/
2413+/*----- Memory Access and Cache ----------------------------------------------*/
2414+
2415 /* Write a register. */
2416 gceSTATUS
2417 gcoOS_WriteRegister(
2418@@ -1507,7 +1608,7 @@ gcoOS_QueryProfileTickRate(
2419 # define gcmPROFILE_QUERY(start, ticks) do { } while (gcvFALSE)
2420 # define gcmPROFILE_ONLY(x) do { } while (gcvFALSE)
2421 # define gcmPROFILE_ELSE(x) x
2422-# define gcmPROFILE_DECLARE_ONLY(x) typedef x
2423+# define gcmPROFILE_DECLARE_ONLY(x) do { } while (gcvFALSE)
2424 # define gcmPROFILE_DECLARE_ELSE(x) x
2425 #endif
2426
2427@@ -1579,6 +1680,28 @@ typedef struct _gcsRECT
2428 }
2429 gcsRECT;
2430
2431+typedef union _gcsPIXEL
2432+{
2433+ struct
2434+ {
2435+ gctFLOAT r, g, b, a;
2436+ gctFLOAT d, s;
2437+ } pf;
2438+
2439+ struct
2440+ {
2441+ gctINT32 r, g, b, a;
2442+ gctINT32 d, s;
2443+ } pi;
2444+
2445+ struct
2446+ {
2447+ gctUINT32 r, g, b, a;
2448+ gctUINT32 d, s;
2449+ } pui;
2450+
2451+} gcsPIXEL;
2452+
2453
2454 /******************************************************************************\
2455 ********************************* gcoSURF Object ********************************
2456@@ -1795,6 +1918,18 @@ gcoSURF_SetRotation(
2457 );
2458
2459 gceSTATUS
2460+gcoSURF_SetPreRotation(
2461+ IN gcoSURF Surface,
2462+ IN gceSURF_ROTATION Rotation
2463+ );
2464+
2465+gceSTATUS
2466+gcoSURF_GetPreRotation(
2467+ IN gcoSURF Surface,
2468+ IN gceSURF_ROTATION *Rotation
2469+ );
2470+
2471+gceSTATUS
2472 gcoSURF_IsValid(
2473 IN gcoSURF Surface
2474 );
2475@@ -1824,6 +1959,15 @@ gcoSURF_DisableTileStatus(
2476 IN gcoSURF Surface,
2477 IN gctBOOL Decompress
2478 );
2479+
2480+gceSTATUS
2481+gcoSURF_AlignResolveRect(
2482+ IN gcoSURF Surf,
2483+ IN gcsPOINT_PTR RectOrigin,
2484+ IN gcsPOINT_PTR RectSize,
2485+ OUT gcsPOINT_PTR AlignedOrigin,
2486+ OUT gcsPOINT_PTR AlignedSize
2487+ );
2488 #endif /* VIVANTE_NO_3D */
2489
2490 /* Get surface size. */
2491@@ -1910,6 +2054,9 @@ gcoSURF_FillFromTile(
2492 IN gcoSURF Surface
2493 );
2494
2495+/* Check if surface needs a filler. */
2496+gceSTATUS gcoSURF_NeedFiller(IN gcoSURF Surface);
2497+
2498 /* Fill surface with a value. */
2499 gceSTATUS
2500 gcoSURF_Fill(
2501@@ -1949,6 +2096,19 @@ gcoSURF_SetBuffer(
2502 IN gctUINT32 Physical
2503 );
2504
2505+/* Set the underlying video buffer for the surface wrapper. */
2506+gceSTATUS
2507+gcoSURF_SetVideoBuffer(
2508+ IN gcoSURF Surface,
2509+ IN gceSURF_TYPE Type,
2510+ IN gceSURF_FORMAT Format,
2511+ IN gctUINT Width,
2512+ IN gctUINT Height,
2513+ IN gctUINT Stride,
2514+ IN gctPOINTER *LogicalPlane1,
2515+ IN gctUINT32 *PhysicalPlane1
2516+ );
2517+
2518 /* Set the size of the surface in pixels and map the underlying buffer. */
2519 gceSTATUS
2520 gcoSURF_SetWindow(
2521@@ -3705,6 +3865,12 @@ gcGetUserDebugOption(
2522 void
2523 );
2524
2525+struct _gcoOS_SymbolsList
2526+{
2527+ gcePATCH_ID patchId;
2528+ const char * symList[10];
2529+};
2530+
2531 #if gcdHAS_ELLIPSES
2532 #define gcmUSER_DEBUG_MSG(level, ...) \
2533 do \
2534diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h
2535index 8693c37..062224c 100644
2536--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h
2537+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h
2538@@ -39,12 +39,10 @@ extern "C" {
2539 #define GC_ENABLE_LOADTIME_OPT 1
2540 #endif
2541
2542-#define TEMP_OPT_CONSTANT_TEXLD_COORD 1
2543+#define TEMP_OPT_CONSTANT_TEXLD_COORD 0
2544
2545 #define TEMP_SHADER_PATCH 1
2546
2547-#define ADD_PRE_ROTATION_TO_VS 0
2548-
2549 #define TEMP_INLINE_ALL_EXPANSION 1
2550 /******************************* IR VERSION ******************/
2551 #define gcdSL_IR_VERSION gcmCC('\0','\0','\0','\1')
2552@@ -271,6 +269,7 @@ typedef enum _gcSL_OPCODE
2553 gcSL_ADDSAT, /* 0x5C */ /* Integer only. */
2554 gcSL_SUBSAT, /* 0x5D */ /* Integer only. */
2555 gcSL_MULSAT, /* 0x5E */ /* Integer only. */
2556+ gcSL_DP2, /* 0x5F */
2557 gcSL_MAXOPCODE
2558 }
2559 gcSL_OPCODE;
2560@@ -474,6 +473,9 @@ struct _gcsHINT
2561
2562 gctBOOL clipW;
2563
2564+ /* Flag whether or not the shader has a KILL instruction. */
2565+ gctBOOL hasKill;
2566+
2567 /* Element count. */
2568 gctUINT32 elementCount;
2569
2570@@ -495,12 +497,18 @@ struct _gcsHINT
2571 /* Balance maximum. */
2572 gctUINT32 balanceMax;
2573
2574+ /* Auto-shift balancing. */
2575+ gctBOOL autoShift;
2576+
2577 /* Flag whether the PS outputs the depth value or not. */
2578 gctBOOL psHasFragDepthOut;
2579
2580 /* Flag whether the ThreadWalker is in PS. */
2581 gctBOOL threadWalkerInPS;
2582
2583+ /* HW reg number for position of VS */
2584+ gctUINT32 hwRegNoOfSIVPos;
2585+
2586 #if gcdALPHA_KILL_IN_SHADER
2587 /* States to set when alpha kill is enabled. */
2588 gctUINT32 killStateAddress;
2589@@ -687,12 +695,12 @@ typedef enum _gceSHADER_FLAGS
2590 gcvSHADER_USE_ALPHA_KILL = 0x100,
2591 #endif
2592
2593-#if ADD_PRE_ROTATION_TO_VS
2594+#if gcdPRE_ROTATION && (ANDROID_SDK_VERSION >= 14)
2595 gcvSHADER_VS_PRE_ROTATION = 0x200,
2596 #endif
2597
2598 #if TEMP_INLINE_ALL_EXPANSION
2599- gcvSHADER_INLINE_ALL_EXPANSION = 0x200,
2600+ gcvSHADER_INLINE_ALL_EXPANSION = 0x400,
2601 #endif
2602 }
2603 gceSHADER_FLAGS;
2604@@ -827,6 +835,7 @@ typedef struct _gcOPTIMIZER_OPTION
2605 gctBOOL dumpOptimizerVerbose; /* dump result IR in each optimization phase */
2606 gctBOOL dumpBEGenertedCode; /* dump generated machine code */
2607 gctBOOL dumpBEVerbose; /* dump BE tree and optimization detail */
2608+ gctBOOL dumpBEFinalIR; /* dump BE final IR */
2609
2610 /* Code generation */
2611
2612@@ -945,6 +954,8 @@ extern gcOPTIMIZER_OPTION theOptimizerOption;
2613 gcmOPT_DUMP_CODEGEN_VERBOSE() )
2614 #define gcmOPT_DUMP_CODEGEN_VERBOSE() \
2615 (gcmGetOptimizerOption()->dumpBEVerbose != 0)
2616+#define gcmOPT_DUMP_FINAL_IR() \
2617+ (gcmGetOptimizerOption()->dumpBEFinalIR != 0)
2618
2619 #define gcmOPT_SET_DUMP_SHADER_SRC(v) \
2620 gcmGetOptimizerOption()->dumpShaderSource = (v)
2621@@ -1064,6 +1075,13 @@ typedef struct _gcNPOT_PATCH_PARAM
2622 gctINT texDimension; /* 2 or 3 */
2623 }gcNPOT_PATCH_PARAM, *gcNPOT_PATCH_PARAM_PTR;
2624
2625+typedef struct _gcZBIAS_PATCH_PARAM
2626+{
2627+ /* Driver uses this to program uniform that designating zbias */
2628+ gctINT uniformAddr;
2629+ gctINT channel;
2630+}gcZBIAS_PATCH_PARAM, *gcZBIAS_PATCH_PARAM_PTR;
2631+
2632 void
2633 gcGetOptionFromEnv(
2634 IN OUT gcOPTIMIZER_OPTION * Option
2635@@ -1556,6 +1574,43 @@ gcSHADER_AddUniform(
2636 OUT gcUNIFORM * Uniform
2637 );
2638
2639+/*******************************************************************************
2640+** gcSHADER_AddPreRotationUniform
2641+********************************************************************************
2642+**
2643+** Add an uniform to a gcSHADER object.
2644+**
2645+** INPUT:
2646+**
2647+** gcSHADER Shader
2648+** Pointer to a gcSHADER object.
2649+**
2650+** gctCONST_STRING Name
2651+** Name of the uniform to add.
2652+**
2653+** gcSHADER_TYPE Type
2654+** Type of the uniform to add.
2655+**
2656+** gctSIZE_T Length
2657+** Array length of the uniform to add. 'Length' must be at least 1.
2658+**
2659+** gctINT col
2660+** Which uniform.
2661+**
2662+** OUTPUT:
2663+**
2664+** gcUNIFORM * Uniform
2665+** Pointer to a variable receiving the gcUNIFORM object pointer.
2666+*/
2667+gceSTATUS
2668+gcSHADER_AddPreRotationUniform(
2669+ IN gcSHADER Shader,
2670+ IN gctCONST_STRING Name,
2671+ IN gcSHADER_TYPE Type,
2672+ IN gctSIZE_T Length,
2673+ IN gctINT col,
2674+ OUT gcUNIFORM * Uniform
2675+ );
2676
2677 /*******************************************************************************
2678 ** gcSHADER_AddUniformEx
2679@@ -1677,6 +1732,28 @@ gcSHADER_GetUniformCount(
2680 );
2681
2682 /*******************************************************************************
2683+** gcSHADER_GetPreRotationUniform
2684+********************************************************************************
2685+**
2686+** Get the preRotate Uniform.
2687+**
2688+** INPUT:
2689+**
2690+** gcSHADER Shader
2691+** Pointer to a gcSHADER object.
2692+**
2693+** OUTPUT:
2694+**
2695+** gcUNIFORM ** pUniform
2696+** Pointer to a preRotation uniforms array.
2697+*/
2698+gceSTATUS
2699+gcSHADER_GetPreRotationUniform(
2700+ IN gcSHADER Shader,
2701+ OUT gcUNIFORM ** pUniform
2702+ );
2703+
2704+/*******************************************************************************
2705 ** gcSHADER_GetUniform
2706 ********************************************************************************
2707 **
2708@@ -3438,6 +3515,34 @@ gcUNIFORM_SetValueF(
2709 );
2710
2711 /*******************************************************************************
2712+** gcUNIFORM_ProgramF
2713+**
2714+** Set the value of a uniform in floating point.
2715+**
2716+** INPUT:
2717+**
2718+** gctUINT32 Address
2719+** Address of Uniform.
2720+**
2721+** gctSIZE_T Row/Col
2722+**
2723+** const gctFLOAT * Value
2724+** Pointer to a buffer holding the floating point values for the
2725+** uniform.
2726+**
2727+** OUTPUT:
2728+**
2729+** Nothing.
2730+*/
2731+gceSTATUS
2732+gcUNIFORM_ProgramF(
2733+ IN gctUINT32 Address,
2734+ IN gctSIZE_T Row,
2735+ IN gctSIZE_T Col,
2736+ IN const gctFLOAT * Value
2737+ );
2738+
2739+/*******************************************************************************
2740 ** gcUNIFORM_GetModelViewProjMatrix
2741 ********************************************************************************
2742 **
2743@@ -3912,6 +4017,23 @@ gcRecompileShaders(
2744 IN gctUINT32 *SamplerWrapS,
2745 IN gctUINT32 *SamplerWrapT
2746 );
2747+
2748+gceSTATUS
2749+gcRecompileDepthBias(
2750+ IN gcoHAL Hal,
2751+ IN gcMACHINECODE_PTR pVsMachineCode,
2752+ /*Recompile variables*/
2753+ IN OUT gctPOINTER *ppRecompileStateBuffer,
2754+ IN OUT gctSIZE_T *pRecompileStateBufferSize,
2755+ IN OUT gcsHINT_PTR *ppRecompileHints,
2756+ /* natvie state*/
2757+ IN gctPOINTER pNativeStateBuffer,
2758+ IN gctSIZE_T nativeStateBufferSize,
2759+ IN gcsHINT_PTR pNativeHints,
2760+ OUT gctINT * uniformAddr,
2761+ OUT gctINT * uniformChannel
2762+ );
2763+
2764 /*******************************************************************************
2765 ** gcSaveProgram
2766 ********************************************************************************
2767@@ -4138,6 +4260,16 @@ gcSHADER_PatchNPOTForMachineCode(
2768 IN OUT gcsHINT_PTR pHints /* User needs copy original hints to this one, then passed this one in */
2769 );
2770
2771+gceSTATUS
2772+gcSHADER_PatchZBiasForMachineCodeVS(
2773+ IN gcMACHINECODE_PTR pMachineCode,
2774+ IN OUT gcZBIAS_PATCH_PARAM_PTR pPatchParam,
2775+ IN gctUINT hwSupportedInstCount,
2776+ OUT gctPOINTER* ppCmdBuffer,
2777+ OUT gctUINT32* pByteSizeOfCmdBuffer,
2778+ IN OUT gcsHINT_PTR pHints /* User needs copy original hints to this one, then passed this one in */
2779+ );
2780+
2781 #ifdef __cplusplus
2782 }
2783 #endif
2784diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h
2785index b056c52..fc8c395 100644
2786--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h
2787+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_driver.h
2788@@ -166,6 +166,12 @@ typedef enum _gceHAL_COMMAND_CODES
2789
2790 /* Reset time stamp. */
2791 gcvHAL_QUERY_RESET_TIME_STAMP,
2792+
2793+ /* Sync point operations. */
2794+ gcvHAL_SYNC_POINT,
2795+
2796+ /* Create native fence and return its fd. */
2797+ gcvHAL_CREATE_NATIVE_FENCE,
2798 }
2799 gceHAL_COMMAND_CODES;
2800
2801@@ -723,6 +729,10 @@ typedef struct _gcsHAL_INTERFACE
2802 /* gcvHAL_READ_ALL_PROFILE_REGISTERS */
2803 struct _gcsHAL_READ_ALL_PROFILE_REGISTERS
2804 {
2805+#if VIVANTE_PROFILER_CONTEXT
2806+ /* Context buffer object gckCONTEXT. Just a name. */
2807+ IN gctUINT32 context;
2808+#endif
2809 /* Data read. */
2810 OUT gcsPROFILER_COUNTERS counters;
2811 }
2812@@ -978,6 +988,33 @@ typedef struct _gcsHAL_INTERFACE
2813 OUT gctUINT64 timeStamp;
2814 }
2815 QueryResetTimeStamp;
2816+
2817+ struct _gcsHAL_SYNC_POINT
2818+ {
2819+ /* Command. */
2820+ gceSYNC_POINT_COMMAND_CODES command;
2821+
2822+ /* Sync point. */
2823+ IN OUT gctUINT64 syncPoint;
2824+
2825+ /* From where. */
2826+ IN gceKERNEL_WHERE fromWhere;
2827+
2828+ /* Signaled state. */
2829+ OUT gctBOOL state;
2830+ }
2831+ SyncPoint;
2832+
2833+ struct _gcsHAL_CREATE_NATIVE_FENCE
2834+ {
2835+ /* Signal id to dup. */
2836+ IN gctUINT64 syncPoint;
2837+
2838+ /* Native fence file descriptor. */
2839+ OUT gctINT fenceFD;
2840+
2841+ }
2842+ CreateNativeFence;
2843 }
2844 u;
2845 }
2846diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h
2847index 8481375..3fb2fe4 100644
2848--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h
2849+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_engine.h
2850@@ -323,6 +323,15 @@ gcoSURF_Resolve(
2851 IN gcoSURF DestSurface
2852 );
2853
2854+gceSTATUS
2855+gcoSURF_IsHWResolveable(
2856+ IN gcoSURF SrcSurface,
2857+ IN gcoSURF DestSurface,
2858+ IN gcsPOINT_PTR SrcOrigin,
2859+ IN gcsPOINT_PTR DestOrigin,
2860+ IN gcsPOINT_PTR RectSize
2861+ );
2862+
2863 /* Resolve rectangular area of a surface. */
2864 gceSTATUS
2865 gcoSURF_ResolveRect(
2866@@ -345,6 +354,11 @@ gcoSURF_IsRenderable(
2867 IN gcoSURF Surface
2868 );
2869
2870+gceSTATUS
2871+gcoSURF_IsFormatRenderableAsRT(
2872+ IN gcoSURF Surface
2873+ );
2874+
2875 #if gcdSYNC
2876 gceSTATUS
2877 gcoSURF_GetFence(
2878@@ -1006,6 +1020,7 @@ typedef struct _gcsALPHA_INFO
2879 gctBOOL test;
2880 gceCOMPARE compare;
2881 gctUINT8 reference;
2882+ gctFLOAT floatReference;
2883
2884 /* Alpha blending states. */
2885 gctBOOL blend;
2886@@ -1040,7 +1055,8 @@ gco3D_SetAlphaCompare(
2887 gceSTATUS
2888 gco3D_SetAlphaReference(
2889 IN gco3D Engine,
2890- IN gctUINT8 Reference
2891+ IN gctUINT8 Reference,
2892+ IN gctFLOAT FloatReference
2893 );
2894
2895 /* Set alpha test reference in fixed point. */
2896@@ -1504,6 +1520,19 @@ gcoTEXTURE_UploadSub(
2897 IN gceSURF_FORMAT Format
2898 );
2899
2900+/* Upload YUV data to an gcoTEXTURE object. */
2901+gceSTATUS
2902+gcoTEXTURE_UploadYUV(
2903+ IN gcoTEXTURE Texture,
2904+ IN gceTEXTURE_FACE Face,
2905+ IN gctUINT Width,
2906+ IN gctUINT Height,
2907+ IN gctUINT Slice,
2908+ IN gctPOINTER Memory[3],
2909+ IN gctINT Stride[3],
2910+ IN gceSURF_FORMAT Format
2911+ );
2912+
2913 /* Upload compressed data to an gcoTEXTURE object. */
2914 gceSTATUS
2915 gcoTEXTURE_UploadCompressed(
2916@@ -1621,6 +1650,13 @@ gcoTEXTURE_QueryCaps(
2917 );
2918
2919 gceSTATUS
2920+gcoTEXTURE_GetTiling(
2921+ IN gcoTEXTURE Texture,
2922+ IN gctINT preferLevel,
2923+ OUT gceTILING * Tiling
2924+ );
2925+
2926+gceSTATUS
2927 gcoTEXTURE_GetClosestFormat(
2928 IN gcoHAL Hal,
2929 IN gceSURF_FORMAT InFormat,
2930@@ -2001,6 +2037,14 @@ gcoHAL_SetSharedInfo(
2931 IN gctSIZE_T Bytes
2932 );
2933
2934+#if VIVANTE_PROFILER_CONTEXT
2935+gceSTATUS
2936+gcoHARDWARE_GetContext(
2937+ IN gcoHARDWARE Hardware,
2938+ OUT gctUINT32 * Context
2939+ );
2940+#endif
2941+
2942 #ifdef __cplusplus
2943 }
2944 #endif
2945diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h
2946index a1d9ae5..8e3c2f8 100644
2947--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h
2948+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h
2949@@ -146,10 +146,26 @@ typedef enum _gceFEATURE
2950 gcvFEATURE_FRUSTUM_CLIP_FIX,
2951 gcvFEATURE_TEXTURE_LINEAR,
2952 gcvFEATURE_TEXTURE_YUV_ASSEMBLER,
2953+ gcvFEATURE_SHADER_HAS_INSTRUCTION_CACHE,
2954 gcvFEATURE_DYNAMIC_FREQUENCY_SCALING,
2955 gcvFEATURE_BUGFIX15,
2956+ gcvFEATURE_2D_GAMMA,
2957+ gcvFEATURE_2D_COLOR_SPACE_CONVERSION,
2958+ gcvFEATURE_2D_SUPER_TILE_VERSION,
2959 gcvFEATURE_2D_MIRROR_EXTENSION,
2960+ gcvFEATURE_2D_SUPER_TILE_V1,
2961+ gcvFEATURE_2D_SUPER_TILE_V2,
2962+ gcvFEATURE_2D_SUPER_TILE_V3,
2963+ gcvFEATURE_2D_MULTI_SOURCE_BLT_EX2,
2964 gcvFEATURE_ELEMENT_INDEX_UINT,
2965+ gcvFEATURE_2D_COMPRESSION,
2966+ gcvFEATURE_2D_OPF_YUV_OUTPUT,
2967+ gcvFEATURE_2D_MULTI_SRC_BLT_TO_UNIFIED_DST_RECT,
2968+ gcvFEATURE_2D_YUV_MODE,
2969+ gcvFEATURE_DECOMPRESS_Z16,
2970+ gcvFEATURE_LINEAR_RENDER_TARGET,
2971+ gcvFEATURE_BUG_FIXES8,
2972+ gcvFEATURE_HALTI2,
2973 }
2974 gceFEATURE;
2975
2976@@ -203,11 +219,14 @@ typedef enum _gceSURF_TYPE
2977 gcvSURF_NO_VIDMEM = 0x200, /* Used to allocate surfaces with no underlying vidmem node.
2978 In Android, vidmem node is allocated by another process. */
2979 gcvSURF_CACHEABLE = 0x400, /* Used to allocate a cacheable surface */
2980-#if gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST
2981 gcvSURF_FLIP = 0x800, /* The Resolve Target the will been flip resolve from RT */
2982-#endif
2983 gcvSURF_TILE_STATUS_DIRTY = 0x1000, /* Init tile status to all dirty */
2984
2985+ gcvSURF_LINEAR = 0x2000,
2986+
2987+ gcvSURF_TEXTURE_LINEAR = gcvSURF_TEXTURE
2988+ | gcvSURF_LINEAR,
2989+
2990 gcvSURF_RENDER_TARGET_NO_TILE_STATUS = gcvSURF_RENDER_TARGET
2991 | gcvSURF_NO_TILE_STATUS,
2992
2993@@ -217,6 +236,9 @@ typedef enum _gceSURF_TYPE
2994 gcvSURF_DEPTH_NO_TILE_STATUS = gcvSURF_DEPTH
2995 | gcvSURF_NO_TILE_STATUS,
2996
2997+ gcvSURF_DEPTH_TS_DIRTY = gcvSURF_DEPTH
2998+ | gcvSURF_TILE_STATUS_DIRTY,
2999+
3000 /* Supported surface types with no vidmem node. */
3001 gcvSURF_BITMAP_NO_VIDMEM = gcvSURF_BITMAP
3002 | gcvSURF_NO_VIDMEM,
3003@@ -231,10 +253,8 @@ typedef enum _gceSURF_TYPE
3004 gcvSURF_CACHEABLE_BITMAP = gcvSURF_BITMAP
3005 | gcvSURF_CACHEABLE,
3006
3007-#if gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST
3008 gcvSURF_FLIP_BITMAP = gcvSURF_BITMAP
3009 | gcvSURF_FLIP,
3010-#endif
3011 }
3012 gceSURF_TYPE;
3013
3014@@ -263,6 +283,9 @@ typedef enum _gceSURF_ROTATION
3015 gcvSURF_270_DEGREE,
3016 gcvSURF_FLIP_X,
3017 gcvSURF_FLIP_Y,
3018+
3019+ gcvSURF_POST_FLIP_X = 0x40000000,
3020+ gcvSURF_POST_FLIP_Y = 0x80000000,
3021 }
3022 gceSURF_ROTATION;
3023
3024@@ -622,21 +645,16 @@ gce2D_PORTER_DUFF_RULE;
3025 typedef enum _gce2D_YUV_COLOR_MODE
3026 {
3027 gcv2D_YUV_601= 0,
3028- gcv2D_YUV_709
3029-}
3030-gce2D_YUV_COLOR_MODE;
3031+ gcv2D_YUV_709,
3032+ gcv2D_YUV_USER_DEFINED,
3033+ gcv2D_YUV_USER_DEFINED_CLAMP,
3034
3035-/* 2D Rotation and flipping. */
3036-typedef enum _gce2D_ORIENTATION
3037-{
3038- gcv2D_0_DEGREE = 0,
3039- gcv2D_90_DEGREE,
3040- gcv2D_180_DEGREE,
3041- gcv2D_270_DEGREE,
3042- gcv2D_X_FLIP,
3043- gcv2D_Y_FLIP
3044+ /* Default setting is for src. gcv2D_YUV_DST
3045+ can be ORed to set dst.
3046+ */
3047+ gcv2D_YUV_DST = 0x80000000,
3048 }
3049-gce2D_ORIENTATION;
3050+gce2D_YUV_COLOR_MODE;
3051
3052 typedef enum _gce2D_COMMAND
3053 {
3054@@ -656,21 +674,39 @@ typedef enum _gce2D_TILE_STATUS_CONFIG
3055 gcv2D_TSC_ENABLE = 0x00000001,
3056 gcv2D_TSC_COMPRESSED = 0x00000002,
3057 gcv2D_TSC_DOWN_SAMPLER = 0x00000004,
3058+ gcv2D_TSC_2D_COMPRESSED = 0x00000008,
3059 }
3060 gce2D_TILE_STATUS_CONFIG;
3061
3062 typedef enum _gce2D_QUERY
3063 {
3064- gcv2D_QUERY_RGB_ADDRESS_MAX_ALIGN = 0,
3065- gcv2D_QUERY_RGB_STRIDE_MAX_ALIGN,
3066- gcv2D_QUERY_YUV_ADDRESS_MAX_ALIGN,
3067- gcv2D_QUERY_YUV_STRIDE_MAX_ALIGN,
3068+ gcv2D_QUERY_RGB_ADDRESS_MIN_ALIGN = 0,
3069+ gcv2D_QUERY_RGB_STRIDE_MIN_ALIGN,
3070+ gcv2D_QUERY_YUV_ADDRESS_MIN_ALIGN,
3071+ gcv2D_QUERY_YUV_STRIDE_MIN_ALIGN,
3072 }
3073 gce2D_QUERY;
3074
3075+typedef enum _gce2D_SUPER_TILE_VERSION
3076+{
3077+ gcv2D_SUPER_TILE_VERSION_V1 = 1,
3078+ gcv2D_SUPER_TILE_VERSION_V2 = 2,
3079+ gcv2D_SUPER_TILE_VERSION_V3 = 3,
3080+}
3081+gce2D_SUPER_TILE_VERSION;
3082+
3083 typedef enum _gce2D_STATE
3084 {
3085 gcv2D_STATE_SPECIAL_FILTER_MIRROR_MODE = 1,
3086+ gcv2D_STATE_SUPER_TILE_VERSION,
3087+ gcv2D_STATE_EN_GAMMA,
3088+ gcv2D_STATE_DE_GAMMA,
3089+ gcv2D_STATE_MULTI_SRC_BLIT_UNIFIED_DST_RECT,
3090+
3091+ gcv2D_STATE_ARRAY_EN_GAMMA = 0x10001,
3092+ gcv2D_STATE_ARRAY_DE_GAMMA,
3093+ gcv2D_STATE_ARRAY_CSC_YUV_TO_RGB,
3094+ gcv2D_STATE_ARRAY_CSC_RGB_TO_YUV,
3095 }
3096 gce2D_STATE;
3097
3098@@ -809,6 +845,15 @@ typedef enum _gceUSER_SIGNAL_COMMAND_CODES
3099 }
3100 gceUSER_SIGNAL_COMMAND_CODES;
3101
3102+/* Sync point command codes. */
3103+typedef enum _gceSYNC_POINT_COMMAND_CODES
3104+{
3105+ gcvSYNC_POINT_CREATE,
3106+ gcvSYNC_POINT_DESTROY,
3107+ gcvSYNC_POINT_SIGNAL,
3108+}
3109+gceSYNC_POINT_COMMAND_CODES;
3110+
3111 /* Event locations. */
3112 typedef enum _gceKERNEL_WHERE
3113 {
3114@@ -848,6 +893,44 @@ typedef enum _gceDEBUG_MESSAGE_TYPE
3115 }
3116 gceDEBUG_MESSAGE_TYPE;
3117
3118+typedef enum _gceSPECIAL_HINT
3119+{
3120+ gceSPECIAL_HINT0,
3121+ gceSPECIAL_HINT1,
3122+ gceSPECIAL_HINT2,
3123+ gceSPECIAL_HINT3,
3124+ /* For disable dynamic stream/index */
3125+ gceSPECIAL_HINT4
3126+}
3127+gceSPECIAL_HINT;
3128+
3129+typedef enum _gceMACHINECODE
3130+{
3131+ gcvMACHINECODE_HOVERJET0 = 0x0,
3132+ gcvMACHINECODE_HOVERJET1 ,
3133+
3134+ gcvMACHINECODE_TAIJI0 ,
3135+ gcvMACHINECODE_TAIJI1 ,
3136+ gcvMACHINECODE_TAIJI2 ,
3137+
3138+ gcvMACHINECODE_ANTUTU0 ,
3139+
3140+ gcvMACHINECODE_GLB27_RELEASE_0,
3141+ gcvMACHINECODE_GLB27_RELEASE_1,
3142+
3143+ gcvMACHINECODE_WAVESCAPE0 ,
3144+ gcvMACHINECODE_WAVESCAPE1 ,
3145+
3146+ gcvMACHINECODE_NENAMARKV2_4_0 ,
3147+ gcvMACHINECODE_NENAMARKV2_4_1 ,
3148+
3149+ gcvMACHINECODE_GLB25_RELEASE_0,
3150+ gcvMACHINECODE_GLB25_RELEASE_1,
3151+ gcvMACHINECODE_GLB25_RELEASE_2,
3152+}
3153+gceMACHINECODE;
3154+
3155+
3156 /******************************************************************************\
3157 ****************************** Object Declarations *****************************
3158 \******************************************************************************/
3159diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h
3160index 9e2a8db..b53b618 100644
3161--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h
3162+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h
3163@@ -46,7 +46,7 @@
3164 This define enables the profiler.
3165 */
3166 #ifndef VIVANTE_PROFILER
3167-# define VIVANTE_PROFILER 0
3168+# define VIVANTE_PROFILER 1
3169 #endif
3170
3171 #ifndef VIVANTE_PROFILER_PERDRAW
3172@@ -54,6 +54,15 @@
3173 #endif
3174
3175 /*
3176+ VIVANTE_PROFILER_CONTEXT
3177+
3178+ This define enables the profiler according to each hw context.
3179+*/
3180+#ifndef VIVANTE_PROFILER_CONTEXT
3181+# define VIVANTE_PROFILER_CONTEXT 1
3182+#endif
3183+
3184+/*
3185 gcdUSE_VG
3186
3187 Enable VG HAL layer (only for GC350).
3188@@ -729,7 +738,24 @@
3189 Use linear buffer for GPU apps so HWC can do 2D composition.
3190 */
3191 #ifndef gcdGPU_LINEAR_BUFFER_ENABLED
3192-# define gcdGPU_LINEAR_BUFFER_ENABLED 0
3193+# define gcdGPU_LINEAR_BUFFER_ENABLED 1
3194+#endif
3195+
3196+/*
3197+ gcdENABLE_RENDER_INTO_WINDOW
3198+
3199+ Enable Render-Into-Window (ie, No-Resolve) feature on android.
3200+ NOTE that even if enabled, it still depends on hardware feature and
3201+ android application behavior. When hardware feature or application
3202+ behavior can not support render into window mode, it will fail back
3203+ to normal mode.
3204+ When Render-Into-Window is finally used, window back buffer of android
3205+ applications will be allocated matching render target tiling format.
3206+ Otherwise buffer tiling is decided by the above option
3207+ 'gcdGPU_LINEAR_BUFFER_ENABLED'.
3208+*/
3209+#ifndef gcdENABLE_RENDER_INTO_WINDOW
3210+# define gcdENABLE_RENDER_INTO_WINDOW 1
3211 #endif
3212
3213 /*
3214@@ -758,7 +784,11 @@
3215 #endif
3216
3217 #ifndef gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST
3218-# define gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST 0
3219+# ifdef ANDROID
3220+# define gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST 1
3221+# else
3222+# define gcdANDROID_UNALIGNED_LINEAR_COMPOSITION_ADJUST 0
3223+# endif
3224 #endif
3225
3226 #ifndef gcdENABLE_PE_DITHER_FIX
3227@@ -800,6 +830,10 @@
3228 # define gcdDISALBE_EARLY_EARLY_Z 1
3229 #endif
3230
3231+#ifndef gcdSHADER_SRC_BY_MACHINECODE
3232+# define gcdSHADER_SRC_BY_MACHINECODE 1
3233+#endif
3234+
3235 /*
3236 gcdLINK_QUEUE_SIZE
3237
3238@@ -849,11 +883,20 @@
3239 #define gcdUSE_NPOT_PATCH 1
3240 #endif
3241
3242-
3243 #ifndef gcdSYNC
3244 # define gcdSYNC 1
3245 #endif
3246
3247+#ifndef gcdENABLE_SPECIAL_HINT3
3248+# define gcdENABLE_SPECIAL_HINT3 1
3249+#endif
3250+
3251+#if defined(ANDROID)
3252+#ifndef gcdPRE_ROTATION
3253+# define gcdPRE_ROTATION 1
3254+#endif
3255+#endif
3256+
3257 /*
3258 gcdDVFS
3259
3260@@ -866,4 +909,39 @@
3261 # define gcdDVFS_POLLING_TIME (gcdDVFS_ANAYLSE_WINDOW * 4)
3262 #endif
3263
3264+/*
3265+ gcdANDROID_NATIVE_FENCE_SYNC
3266+
3267+ Enable android native fence sync. It is introduced since jellybean-4.2.
3268+ Depends on linux kernel option: CONFIG_SYNC.
3269+
3270+ 0: Disabled
3271+ 1: Build framework for native fence sync feature, and EGL extension
3272+ 2: Enable async swap buffers for client
3273+ * Native fence sync for client 'queueBuffer' in EGL, which is
3274+ 'acquireFenceFd' for layer in compositor side.
3275+ 3. Enable async hwcomposer composition.
3276+ * 'releaseFenceFd' for layer in compositor side, which is native
3277+ fence sync when client 'dequeueBuffer'
3278+ * Native fence sync for compositor 'queueBuffer' in EGL, which is
3279+ 'acquireFenceFd' for framebuffer target for DC
3280+ */
3281+#ifndef gcdANDROID_NATIVE_FENCE_SYNC
3282+# define gcdANDROID_NATIVE_FENCE_SYNC 0
3283+#endif
3284+
3285+#ifndef gcdFORCE_MIPMAP
3286+# define gcdFORCE_MIPMAP 0
3287+#endif
3288+
3289+/*
3290+ gcdFORCE_GAL_LOAD_TWICE
3291+
3292+ When non-zero, each thread except the main one will load libGAL.so twice to avoid potential segmetantion fault when app using dlopen/dlclose.
3293+ If threads exit arbitrarily, libGAL.so may not unload until the process quit.
3294+ */
3295+#ifndef gcdFORCE_GAL_LOAD_TWICE
3296+# define gcdFORCE_GAL_LOAD_TWICE 0
3297+#endif
3298+
3299 #endif /* __gc_hal_options_h_ */
3300diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h
3301index 3e450ba..aed73aa 100644
3302--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h
3303+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_profiler.h
3304@@ -45,509 +45,115 @@ extern "C" {
3305 #define gcdNEW_PROFILER_FILE 1
3306 #endif
3307
3308-/* OpenGL ES11 API IDs. */
3309-#define ES11_ACTIVETEXTURE 1
3310-#define ES11_ALPHAFUNC (ES11_ACTIVETEXTURE + 1)
3311-#define ES11_ALPHAFUNCX (ES11_ALPHAFUNC + 1)
3312-#define ES11_BINDBUFFER (ES11_ALPHAFUNCX + 1)
3313-#define ES11_BINDTEXTURE (ES11_BINDBUFFER + 1)
3314-#define ES11_BLENDFUNC (ES11_BINDTEXTURE + 1)
3315-#define ES11_BUFFERDATA (ES11_BLENDFUNC + 1)
3316-#define ES11_BUFFERSUBDATA (ES11_BUFFERDATA + 1)
3317-#define ES11_CLEAR (ES11_BUFFERSUBDATA + 1)
3318-#define ES11_CLEARCOLOR (ES11_CLEAR + 1)
3319-#define ES11_CLEARCOLORX (ES11_CLEARCOLOR + 1)
3320-#define ES11_CLEARDEPTHF (ES11_CLEARCOLORX + 1)
3321-#define ES11_CLEARDEPTHX (ES11_CLEARDEPTHF + 1)
3322-#define ES11_CLEARSTENCIL (ES11_CLEARDEPTHX + 1)
3323-#define ES11_CLIENTACTIVETEXTURE (ES11_CLEARSTENCIL + 1)
3324-#define ES11_CLIPPLANEF (ES11_CLIENTACTIVETEXTURE + 1)
3325-#define ES11_CLIPPLANEX (ES11_CLIPPLANEF + 1)
3326-#define ES11_COLOR4F (ES11_CLIPPLANEX + 1)
3327-#define ES11_COLOR4UB (ES11_COLOR4F + 1)
3328-#define ES11_COLOR4X (ES11_COLOR4UB + 1)
3329-#define ES11_COLORMASK (ES11_COLOR4X + 1)
3330-#define ES11_COLORPOINTER (ES11_COLORMASK + 1)
3331-#define ES11_COMPRESSEDTEXIMAGE2D (ES11_COLORPOINTER + 1)
3332-#define ES11_COMPRESSEDTEXSUBIMAGE2D (ES11_COMPRESSEDTEXIMAGE2D + 1)
3333-#define ES11_COPYTEXIMAGE2D (ES11_COMPRESSEDTEXSUBIMAGE2D + 1)
3334-#define ES11_COPYTEXSUBIMAGE2D (ES11_COPYTEXIMAGE2D + 1)
3335-#define ES11_CULLFACE (ES11_COPYTEXSUBIMAGE2D + 1)
3336-#define ES11_DELETEBUFFERS (ES11_CULLFACE + 1)
3337-#define ES11_DELETETEXTURES (ES11_DELETEBUFFERS + 1)
3338-#define ES11_DEPTHFUNC (ES11_DELETETEXTURES + 1)
3339-#define ES11_DEPTHMASK (ES11_DEPTHFUNC + 1)
3340-#define ES11_DEPTHRANGEF (ES11_DEPTHMASK + 1)
3341-#define ES11_DEPTHRANGEX (ES11_DEPTHRANGEF + 1)
3342-#define ES11_DISABLE (ES11_DEPTHRANGEX + 1)
3343-#define ES11_DISABLECLIENTSTATE (ES11_DISABLE + 1)
3344-#define ES11_DRAWARRAYS (ES11_DISABLECLIENTSTATE + 1)
3345-#define ES11_DRAWELEMENTS (ES11_DRAWARRAYS + 1)
3346-#define ES11_ENABLE (ES11_DRAWELEMENTS + 1)
3347-#define ES11_ENABLECLIENTSTATE (ES11_ENABLE + 1)
3348-#define ES11_FINISH (ES11_ENABLECLIENTSTATE + 1)
3349-#define ES11_FLUSH (ES11_FINISH + 1)
3350-#define ES11_FOGF (ES11_FLUSH + 1)
3351-#define ES11_FOGFV (ES11_FOGF + 1)
3352-#define ES11_FOGX (ES11_FOGFV + 1)
3353-#define ES11_FOGXV (ES11_FOGX + 1)
3354-#define ES11_FRONTFACE (ES11_FOGXV + 1)
3355-#define ES11_FRUSTUMF (ES11_FRONTFACE + 1)
3356-#define ES11_FRUSTUMX (ES11_FRUSTUMF + 1)
3357-#define ES11_GENBUFFERS (ES11_FRUSTUMX + 1)
3358-#define ES11_GENTEXTURES (ES11_GENBUFFERS + 1)
3359-#define ES11_GETBOOLEANV (ES11_GENTEXTURES + 1)
3360-#define ES11_GETBUFFERPARAMETERIV (ES11_GETBOOLEANV + 1)
3361-#define ES11_GETCLIPPLANEF (ES11_GETBUFFERPARAMETERIV + 1)
3362-#define ES11_GETCLIPPLANEX (ES11_GETCLIPPLANEF + 1)
3363-#define ES11_GETERROR (ES11_GETCLIPPLANEX + 1)
3364-#define ES11_GETFIXEDV (ES11_GETERROR + 1)
3365-#define ES11_GETFLOATV (ES11_GETFIXEDV + 1)
3366-#define ES11_GETINTEGERV (ES11_GETFLOATV + 1)
3367-#define ES11_GETLIGHTFV (ES11_GETINTEGERV + 1)
3368-#define ES11_GETLIGHTXV (ES11_GETLIGHTFV + 1)
3369-#define ES11_GETMATERIALFV (ES11_GETLIGHTXV + 1)
3370-#define ES11_GETMATERIALXV (ES11_GETMATERIALFV + 1)
3371-#define ES11_GETPOINTERV (ES11_GETMATERIALXV + 1)
3372-#define ES11_GETSTRING (ES11_GETPOINTERV + 1)
3373-#define ES11_GETTEXENVFV (ES11_GETSTRING + 1)
3374-#define ES11_GETTEXENVIV (ES11_GETTEXENVFV + 1)
3375-#define ES11_GETTEXENVXV (ES11_GETTEXENVIV + 1)
3376-#define ES11_GETTEXPARAMETERFV (ES11_GETTEXENVXV + 1)
3377-#define ES11_GETTEXPARAMETERIV (ES11_GETTEXPARAMETERFV + 1)
3378-#define ES11_GETTEXPARAMETERXV (ES11_GETTEXPARAMETERIV + 1)
3379-#define ES11_HINT (ES11_GETTEXPARAMETERXV + 1)
3380-#define ES11_ISBUFFER (ES11_HINT + 1)
3381-#define ES11_ISENABLED (ES11_ISBUFFER + 1)
3382-#define ES11_ISTEXTURE (ES11_ISENABLED + 1)
3383-#define ES11_LIGHTF (ES11_ISTEXTURE + 1)
3384-#define ES11_LIGHTFV (ES11_LIGHTF + 1)
3385-#define ES11_LIGHTMODELF (ES11_LIGHTFV + 1)
3386-#define ES11_LIGHTMODELFV (ES11_LIGHTMODELF + 1)
3387-#define ES11_LIGHTMODELX (ES11_LIGHTMODELFV + 1)
3388-#define ES11_LIGHTMODELXV (ES11_LIGHTMODELX + 1)
3389-#define ES11_LIGHTX (ES11_LIGHTMODELXV + 1)
3390-#define ES11_LIGHTXV (ES11_LIGHTX + 1)
3391-#define ES11_LINEWIDTH (ES11_LIGHTXV + 1)
3392-#define ES11_LINEWIDTHX (ES11_LINEWIDTH + 1)
3393-#define ES11_LOADIDENTITY (ES11_LINEWIDTHX + 1)
3394-#define ES11_LOADMATRIXF (ES11_LOADIDENTITY + 1)
3395-#define ES11_LOADMATRIXX (ES11_LOADMATRIXF + 1)
3396-#define ES11_LOGICOP (ES11_LOADMATRIXX + 1)
3397-#define ES11_MATERIALF (ES11_LOGICOP + 1)
3398-#define ES11_MATERIALFV (ES11_MATERIALF + 1)
3399-#define ES11_MATERIALX (ES11_MATERIALFV + 1)
3400-#define ES11_MATERIALXV (ES11_MATERIALX + 1)
3401-#define ES11_MATRIXMODE (ES11_MATERIALXV + 1)
3402-#define ES11_MULTITEXCOORD4F (ES11_MATRIXMODE + 1)
3403-#define ES11_MULTITEXCOORD4X (ES11_MULTITEXCOORD4F + 1)
3404-#define ES11_MULTMATRIXF (ES11_MULTITEXCOORD4X + 1)
3405-#define ES11_MULTMATRIXX (ES11_MULTMATRIXF + 1)
3406-#define ES11_NORMAL3F (ES11_MULTMATRIXX + 1)
3407-#define ES11_NORMAL3X (ES11_NORMAL3F + 1)
3408-#define ES11_NORMALPOINTER (ES11_NORMAL3X + 1)
3409-#define ES11_ORTHOF (ES11_NORMALPOINTER + 1)
3410-#define ES11_ORTHOX (ES11_ORTHOF + 1)
3411-#define ES11_PIXELSTOREI (ES11_ORTHOX + 1)
3412-#define ES11_POINTPARAMETERF (ES11_PIXELSTOREI + 1)
3413-#define ES11_POINTPARAMETERFV (ES11_POINTPARAMETERF + 1)
3414-#define ES11_POINTPARAMETERX (ES11_POINTPARAMETERFV + 1)
3415-#define ES11_POINTPARAMETERXV (ES11_POINTPARAMETERX + 1)
3416-#define ES11_POINTSIZE (ES11_POINTPARAMETERXV + 1)
3417-#define ES11_POINTSIZEX (ES11_POINTSIZE + 1)
3418-#define ES11_POLYGONOFFSET (ES11_POINTSIZEX + 1)
3419-#define ES11_POLYGONOFFSETX (ES11_POLYGONOFFSET + 1)
3420-#define ES11_POPMATRIX (ES11_POLYGONOFFSETX + 1)
3421-#define ES11_PUSHMATRIX (ES11_POPMATRIX + 1)
3422-#define ES11_READPIXELS (ES11_PUSHMATRIX + 1)
3423-#define ES11_ROTATEF (ES11_READPIXELS + 1)
3424-#define ES11_ROTATEX (ES11_ROTATEF + 1)
3425-#define ES11_SAMPLECOVERAGE (ES11_ROTATEX + 1)
3426-#define ES11_SAMPLECOVERAGEX (ES11_SAMPLECOVERAGE + 1)
3427-#define ES11_SCALEF (ES11_SAMPLECOVERAGEX + 1)
3428-#define ES11_SCALEX (ES11_SCALEF + 1)
3429-#define ES11_SCISSOR (ES11_SCALEX + 1)
3430-#define ES11_SHADEMODEL (ES11_SCISSOR + 1)
3431-#define ES11_STENCILFUNC (ES11_SHADEMODEL + 1)
3432-#define ES11_STENCILMASK (ES11_STENCILFUNC + 1)
3433-#define ES11_STENCILOP (ES11_STENCILMASK + 1)
3434-#define ES11_TEXCOORDPOINTER (ES11_STENCILOP + 1)
3435-#define ES11_TEXENVF (ES11_TEXCOORDPOINTER + 1)
3436-#define ES11_TEXENVFV (ES11_TEXENVF + 1)
3437-#define ES11_TEXENVI (ES11_TEXENVFV + 1)
3438-#define ES11_TEXENVIV (ES11_TEXENVI + 1)
3439-#define ES11_TEXENVX (ES11_TEXENVIV + 1)
3440-#define ES11_TEXENVXV (ES11_TEXENVX + 1)
3441-#define ES11_TEXIMAGE2D (ES11_TEXENVXV + 1)
3442-#define ES11_TEXPARAMETERF (ES11_TEXIMAGE2D + 1)
3443-#define ES11_TEXPARAMETERFV (ES11_TEXPARAMETERF + 1)
3444-#define ES11_TEXPARAMETERI (ES11_TEXPARAMETERFV + 1)
3445-#define ES11_TEXPARAMETERIV (ES11_TEXPARAMETERI + 1)
3446-#define ES11_TEXPARAMETERX (ES11_TEXPARAMETERIV + 1)
3447-#define ES11_TEXPARAMETERXV (ES11_TEXPARAMETERX + 1)
3448-#define ES11_TEXSUBIMAGE2D (ES11_TEXPARAMETERXV + 1)
3449-#define ES11_TRANSLATEF (ES11_TEXSUBIMAGE2D + 1)
3450-#define ES11_TRANSLATEX (ES11_TRANSLATEF + 1)
3451-#define ES11_VERTEXPOINTER (ES11_TRANSLATEX + 1)
3452-#define ES11_VIEWPORT (ES11_VERTEXPOINTER + 1)
3453-#define ES11_BLENDEQUATIONOES (ES11_VIEWPORT + 1)
3454-#define ES11_BLENDFUNCSEPERATEOES (ES11_BLENDEQUATIONOES + 1)
3455-#define ES11_BLENDEQUATIONSEPARATEOES (ES11_BLENDFUNCSEPERATEOES + 1)
3456-#define ES11_GLMAPBUFFEROES (ES11_BLENDEQUATIONSEPARATEOES + 1)
3457-#define ES11_GLUNMAPBUFFEROES (ES11_GLMAPBUFFEROES + 1)
3458-#define ES11_GLGETBUFFERPOINTERVOES (ES11_GLUNMAPBUFFEROES + 1)
3459-#define ES11_CALLS (ES11_GLGETBUFFERPOINTERVOES + 1)
3460-#define ES11_DRAWCALLS (ES11_CALLS + 1)
3461-#define ES11_STATECHANGECALLS (ES11_DRAWCALLS + 1)
3462-#define ES11_POINTCOUNT (ES11_STATECHANGECALLS + 1)
3463-#define ES11_LINECOUNT (ES11_POINTCOUNT + 1)
3464-#define ES11_TRIANGLECOUNT (ES11_LINECOUNT + 1)
3465-
3466-/* OpenGL ES2X API IDs. */
3467-#define ES20_ACTIVETEXTURE 1
3468-#define ES20_ATTACHSHADER (ES20_ACTIVETEXTURE + 1)
3469-#define ES20_BINDATTRIBLOCATION (ES20_ATTACHSHADER + 1)
3470-#define ES20_BINDBUFFER (ES20_BINDATTRIBLOCATION + 1)
3471-#define ES20_BINDFRAMEBUFFER (ES20_BINDBUFFER + 1)
3472-#define ES20_BINDRENDERBUFFER (ES20_BINDFRAMEBUFFER + 1)
3473-#define ES20_BINDTEXTURE (ES20_BINDRENDERBUFFER + 1)
3474-#define ES20_BLENDCOLOR (ES20_BINDTEXTURE + 1)
3475-#define ES20_BLENDEQUATION (ES20_BLENDCOLOR + 1)
3476-#define ES20_BLENDEQUATIONSEPARATE (ES20_BLENDEQUATION + 1)
3477-#define ES20_BLENDFUNC (ES20_BLENDEQUATIONSEPARATE + 1)
3478-#define ES20_BLENDFUNCSEPARATE (ES20_BLENDFUNC + 1)
3479-#define ES20_BUFFERDATA (ES20_BLENDFUNCSEPARATE + 1)
3480-#define ES20_BUFFERSUBDATA (ES20_BUFFERDATA + 1)
3481-#define ES20_CHECKFRAMEBUFFERSTATUS (ES20_BUFFERSUBDATA + 1)
3482-#define ES20_CLEAR (ES20_CHECKFRAMEBUFFERSTATUS + 1)
3483-#define ES20_CLEARCOLOR (ES20_CLEAR + 1)
3484-#define ES20_CLEARDEPTHF (ES20_CLEARCOLOR + 1)
3485-#define ES20_CLEARSTENCIL (ES20_CLEARDEPTHF + 1)
3486-#define ES20_COLORMASK (ES20_CLEARSTENCIL + 1)
3487-#define ES20_COMPILESHADER (ES20_COLORMASK + 1)
3488-#define ES20_COMPRESSEDTEXIMAGE2D (ES20_COMPILESHADER + 1)
3489-#define ES20_COMPRESSEDTEXSUBIMAGE2D (ES20_COMPRESSEDTEXIMAGE2D + 1)
3490-#define ES20_COPYTEXIMAGE2D (ES20_COMPRESSEDTEXSUBIMAGE2D + 1)
3491-#define ES20_COPYTEXSUBIMAGE2D (ES20_COPYTEXIMAGE2D + 1)
3492-#define ES20_CREATEPROGRAM (ES20_COPYTEXSUBIMAGE2D + 1)
3493-#define ES20_CREATESHADER (ES20_CREATEPROGRAM + 1)
3494-#define ES20_CULLFACE (ES20_CREATESHADER + 1)
3495-#define ES20_DELETEBUFFERS (ES20_CULLFACE + 1)
3496-#define ES20_DELETEFRAMEBUFFERS (ES20_DELETEBUFFERS + 1)
3497-#define ES20_DELETEPROGRAM (ES20_DELETEFRAMEBUFFERS + 1)
3498-#define ES20_DELETERENDERBUFFERS (ES20_DELETEPROGRAM + 1)
3499-#define ES20_DELETESHADER (ES20_DELETERENDERBUFFERS + 1)
3500-#define ES20_DELETETEXTURES (ES20_DELETESHADER + 1)
3501-#define ES20_DEPTHFUNC (ES20_DELETETEXTURES + 1)
3502-#define ES20_DEPTHMASK (ES20_DEPTHFUNC + 1)
3503-#define ES20_DEPTHRANGEF (ES20_DEPTHMASK + 1)
3504-#define ES20_DETACHSHADER (ES20_DEPTHRANGEF + 1)
3505-#define ES20_DISABLE (ES20_DETACHSHADER + 1)
3506-#define ES20_DISABLEVERTEXATTRIBARRAY (ES20_DISABLE + 1)
3507-#define ES20_DRAWARRAYS (ES20_DISABLEVERTEXATTRIBARRAY + 1)
3508-#define ES20_DRAWELEMENTS (ES20_DRAWARRAYS + 1)
3509-#define ES20_ENABLE (ES20_DRAWELEMENTS + 1)
3510-#define ES20_ENABLEVERTEXATTRIBARRAY (ES20_ENABLE + 1)
3511-#define ES20_FINISH (ES20_ENABLEVERTEXATTRIBARRAY + 1)
3512-#define ES20_FLUSH (ES20_FINISH + 1)
3513-#define ES20_FRAMEBUFFERRENDERBUFFER (ES20_FLUSH + 1)
3514-#define ES20_FRAMEBUFFERTEXTURE2D (ES20_FRAMEBUFFERRENDERBUFFER + 1)
3515-#define ES20_FRONTFACE (ES20_FRAMEBUFFERTEXTURE2D + 1)
3516-#define ES20_GENBUFFERS (ES20_FRONTFACE + 1)
3517-#define ES20_GENERATEMIPMAP (ES20_GENBUFFERS + 1)
3518-#define ES20_GENFRAMEBUFFERS (ES20_GENERATEMIPMAP + 1)
3519-#define ES20_GENRENDERBUFFERS (ES20_GENFRAMEBUFFERS + 1)
3520-#define ES20_GENTEXTURES (ES20_GENRENDERBUFFERS + 1)
3521-#define ES20_GETACTIVEATTRIB (ES20_GENTEXTURES + 1)
3522-#define ES20_GETACTIVEUNIFORM (ES20_GETACTIVEATTRIB + 1)
3523-#define ES20_GETATTACHEDSHADERS (ES20_GETACTIVEUNIFORM + 1)
3524-#define ES20_GETATTRIBLOCATION (ES20_GETATTACHEDSHADERS + 1)
3525-#define ES20_GETBOOLEANV (ES20_GETATTRIBLOCATION + 1)
3526-#define ES20_GETBUFFERPARAMETERIV (ES20_GETBOOLEANV + 1)
3527-#define ES20_GETERROR (ES20_GETBUFFERPARAMETERIV + 1)
3528-#define ES20_GETFLOATV (ES20_GETERROR + 1)
3529-#define ES20_GETFRAMEBUFFERATTACHMENTPARAMETERIV (ES20_GETFLOATV + 1)
3530-#define ES20_GETINTEGERV (ES20_GETFRAMEBUFFERATTACHMENTPARAMETERIV + 1)
3531-#define ES20_GETPROGRAMIV (ES20_GETINTEGERV + 1)
3532-#define ES20_GETPROGRAMINFOLOG (ES20_GETPROGRAMIV + 1)
3533-#define ES20_GETRENDERBUFFERPARAMETERIV (ES20_GETPROGRAMINFOLOG + 1)
3534-#define ES20_GETSHADERIV (ES20_GETRENDERBUFFERPARAMETERIV + 1)
3535-#define ES20_GETSHADERINFOLOG (ES20_GETSHADERIV + 1)
3536-#define ES20_GETSHADERPRECISIONFORMAT (ES20_GETSHADERINFOLOG + 1)
3537-#define ES20_GETSHADERSOURCE (ES20_GETSHADERPRECISIONFORMAT + 1)
3538-#define ES20_GETSTRING (ES20_GETSHADERSOURCE + 1)
3539-#define ES20_GETTEXPARAMETERFV (ES20_GETSTRING + 1)
3540-#define ES20_GETTEXPARAMETERIV (ES20_GETTEXPARAMETERFV + 1)
3541-#define ES20_GETUNIFORMFV (ES20_GETTEXPARAMETERIV + 1)
3542-#define ES20_GETUNIFORMIV (ES20_GETUNIFORMFV + 1)
3543-#define ES20_GETUNIFORMLOCATION (ES20_GETUNIFORMIV + 1)
3544-#define ES20_GETVERTEXATTRIBFV (ES20_GETUNIFORMLOCATION + 1)
3545-#define ES20_GETVERTEXATTRIBIV (ES20_GETVERTEXATTRIBFV + 1)
3546-#define ES20_GETVERTEXATTRIBPOINTERV (ES20_GETVERTEXATTRIBIV + 1)
3547-#define ES20_HINT (ES20_GETVERTEXATTRIBPOINTERV + 1)
3548-#define ES20_ISBUFFER (ES20_HINT + 1)
3549-#define ES20_ISENABLED (ES20_ISBUFFER + 1)
3550-#define ES20_ISFRAMEBUFFER (ES20_ISENABLED + 1)
3551-#define ES20_ISPROGRAM (ES20_ISFRAMEBUFFER + 1)
3552-#define ES20_ISRENDERBUFFER (ES20_ISPROGRAM + 1)
3553-#define ES20_ISSHADER (ES20_ISRENDERBUFFER + 1)
3554-#define ES20_ISTEXTURE (ES20_ISSHADER + 1)
3555-#define ES20_LINEWIDTH (ES20_ISTEXTURE + 1)
3556-#define ES20_LINKPROGRAM (ES20_LINEWIDTH + 1)
3557-#define ES20_PIXELSTOREI (ES20_LINKPROGRAM + 1)
3558-#define ES20_POLYGONOFFSET (ES20_PIXELSTOREI + 1)
3559-#define ES20_READPIXELS (ES20_POLYGONOFFSET + 1)
3560-#define ES20_RELEASESHADERCOMPILER (ES20_READPIXELS + 1)
3561-#define ES20_RENDERBUFFERSTORAGE (ES20_RELEASESHADERCOMPILER + 1)
3562-#define ES20_SAMPLECOVERAGE (ES20_RENDERBUFFERSTORAGE + 1)
3563-#define ES20_SCISSOR (ES20_SAMPLECOVERAGE + 1)
3564-#define ES20_SHADERBINARY (ES20_SCISSOR + 1)
3565-#define ES20_SHADERSOURCE (ES20_SHADERBINARY + 1)
3566-#define ES20_STENCILFUNC (ES20_SHADERSOURCE + 1)
3567-#define ES20_STENCILFUNCSEPARATE (ES20_STENCILFUNC + 1)
3568-#define ES20_STENCILMASK (ES20_STENCILFUNCSEPARATE + 1)
3569-#define ES20_STENCILMASKSEPARATE (ES20_STENCILMASK + 1)
3570-#define ES20_STENCILOP (ES20_STENCILMASKSEPARATE + 1)
3571-#define ES20_STENCILOPSEPARATE (ES20_STENCILOP + 1)
3572-#define ES20_TEXIMAGE2D (ES20_STENCILOPSEPARATE + 1)
3573-#define ES20_TEXPARAMETERF (ES20_TEXIMAGE2D + 1)
3574-#define ES20_TEXPARAMETERFV (ES20_TEXPARAMETERF + 1)
3575-#define ES20_TEXPARAMETERI (ES20_TEXPARAMETERFV + 1)
3576-#define ES20_TEXPARAMETERIV (ES20_TEXPARAMETERI + 1)
3577-#define ES20_TEXSUBIMAGE2D (ES20_TEXPARAMETERIV + 1)
3578-#define ES20_UNIFORM1F (ES20_TEXSUBIMAGE2D + 1)
3579-#define ES20_UNIFORM1FV (ES20_UNIFORM1F + 1)
3580-#define ES20_UNIFORM1I (ES20_UNIFORM1FV + 1)
3581-#define ES20_UNIFORM1IV (ES20_UNIFORM1I + 1)
3582-#define ES20_UNIFORM2F (ES20_UNIFORM1IV + 1)
3583-#define ES20_UNIFORM2FV (ES20_UNIFORM2F + 1)
3584-#define ES20_UNIFORM2I (ES20_UNIFORM2FV + 1)
3585-#define ES20_UNIFORM2IV (ES20_UNIFORM2I + 1)
3586-#define ES20_UNIFORM3F (ES20_UNIFORM2IV + 1)
3587-#define ES20_UNIFORM3FV (ES20_UNIFORM3F + 1)
3588-#define ES20_UNIFORM3I (ES20_UNIFORM3FV + 1)
3589-#define ES20_UNIFORM3IV (ES20_UNIFORM3I + 1)
3590-#define ES20_UNIFORM4F (ES20_UNIFORM3IV + 1)
3591-#define ES20_UNIFORM4FV (ES20_UNIFORM4F + 1)
3592-#define ES20_UNIFORM4I (ES20_UNIFORM4FV + 1)
3593-#define ES20_UNIFORM4IV (ES20_UNIFORM4I + 1)
3594-#define ES20_UNIFORMMATRIX2FV (ES20_UNIFORM4IV + 1)
3595-#define ES20_UNIFORMMATRIX3FV (ES20_UNIFORMMATRIX2FV + 1)
3596-#define ES20_UNIFORMMATRIX4FV (ES20_UNIFORMMATRIX3FV + 1)
3597-#define ES20_USEPROGRAM (ES20_UNIFORMMATRIX4FV + 1)
3598-#define ES20_VALIDATEPROGRAM (ES20_USEPROGRAM + 1)
3599-#define ES20_VERTEXATTRIB1F (ES20_VALIDATEPROGRAM + 1)
3600-#define ES20_VERTEXATTRIB1FV (ES20_VERTEXATTRIB1F + 1)
3601-#define ES20_VERTEXATTRIB2F (ES20_VERTEXATTRIB1FV + 1)
3602-#define ES20_VERTEXATTRIB2FV (ES20_VERTEXATTRIB2F + 1)
3603-#define ES20_VERTEXATTRIB3F (ES20_VERTEXATTRIB2FV + 1)
3604-#define ES20_VERTEXATTRIB3FV (ES20_VERTEXATTRIB3F + 1)
3605-#define ES20_VERTEXATTRIB4F (ES20_VERTEXATTRIB3FV + 1)
3606-#define ES20_VERTEXATTRIB4FV (ES20_VERTEXATTRIB4F + 1)
3607-#define ES20_VERTEXATTRIBPOINTER (ES20_VERTEXATTRIB4FV + 1)
3608-#define ES20_VIEWPORT (ES20_VERTEXATTRIBPOINTER + 1)
3609-#define ES20_GETPROGRAMBINARYOES (ES20_VIEWPORT + 1)
3610-#define ES20_PROGRAMBINARYOES (ES20_GETPROGRAMBINARYOES + 1)
3611-#define ES20_TEXIMAGE3DOES (ES20_PROGRAMBINARYOES + 1)
3612-#define ES20_TEXSUBIMAGE3DOES (ES20_TEXIMAGE3DOES + 1)
3613-#define ES20_COPYSUBIMAGE3DOES (ES20_TEXSUBIMAGE3DOES + 1)
3614-#define ES20_COMPRESSEDTEXIMAGE3DOES (ES20_COPYSUBIMAGE3DOES + 1)
3615-#define ES20_COMPRESSEDTEXSUBIMAGE3DOES (ES20_COMPRESSEDTEXIMAGE3DOES + 1)
3616-#define ES20_FRAMEBUFFERTEXTURE3DOES (ES20_COMPRESSEDTEXSUBIMAGE3DOES + 1)
3617-#define ES20_BINDVERTEXARRAYOES (ES20_FRAMEBUFFERTEXTURE3DOES + 1)
3618-#define ES20_GENVERTEXARRAYOES (ES20_BINDVERTEXARRAYOES + 1)
3619-#define ES20_ISVERTEXARRAYOES (ES20_GENVERTEXARRAYOES + 1)
3620-#define ES20_DELETEVERTEXARRAYOES (ES20_ISVERTEXARRAYOES + 1)
3621-#define ES20_GLMAPBUFFEROES (ES20_DELETEVERTEXARRAYOES + 1)
3622-#define ES20_GLUNMAPBUFFEROES (ES20_GLMAPBUFFEROES + 1)
3623-#define ES20_GLGETBUFFERPOINTERVOES (ES20_GLUNMAPBUFFEROES + 1)
3624-#define ES20_DISCARDFRAMEBUFFEREXT (ES20_GLGETBUFFERPOINTERVOES + 1)
3625-#define ES20_CALLS (ES20_DISCARDFRAMEBUFFEREXT + 1)
3626-#define ES20_DRAWCALLS (ES20_CALLS + 1)
3627-#define ES20_STATECHANGECALLS (ES20_DRAWCALLS + 1)
3628-#define ES20_POINTCOUNT (ES20_STATECHANGECALLS + 1)
3629-#define ES20_LINECOUNT (ES20_POINTCOUNT + 1)
3630-#define ES20_TRIANGLECOUNT (ES20_LINECOUNT + 1)
3631-
3632-/* OpenVG API IDs. */
3633-#define VG11_APPENDPATH 1
3634-#define VG11_APPENDPATHDATA (VG11_APPENDPATH + 1)
3635-#define VG11_CHILDIMAGE (VG11_APPENDPATHDATA + 1)
3636-#define VG11_CLEAR (VG11_CHILDIMAGE + 1)
3637-#define VG11_CLEARGLYPH (VG11_CLEAR + 1)
3638-#define VG11_CLEARIMAGE (VG11_CLEARGLYPH + 1)
3639-#define VG11_CLEARPATH (VG11_CLEARIMAGE + 1)
3640-#define VG11_COLORMATRIX (VG11_CLEARPATH + 1)
3641-#define VG11_CONVOLVE (VG11_COLORMATRIX + 1)
3642-#define VG11_COPYIMAGE (VG11_CONVOLVE + 1)
3643-#define VG11_COPYMASK (VG11_COPYIMAGE + 1)
3644-#define VG11_COPYPIXELS (VG11_COPYMASK + 1)
3645-#define VG11_CREATEFONT (VG11_COPYPIXELS + 1)
3646-#define VG11_CREATEIMAGE (VG11_CREATEFONT + 1)
3647-#define VG11_CREATEMASKLAYER (VG11_CREATEIMAGE + 1)
3648-#define VG11_CREATEPAINT (VG11_CREATEMASKLAYER + 1)
3649-#define VG11_CREATEPATH (VG11_CREATEPAINT + 1)
3650-#define VG11_DESTROYFONT (VG11_CREATEPATH + 1)
3651-#define VG11_DESTROYIMAGE (VG11_DESTROYFONT + 1)
3652-#define VG11_DESTROYMASKLAYER (VG11_DESTROYIMAGE + 1)
3653-#define VG11_DESTROYPAINT (VG11_DESTROYMASKLAYER + 1)
3654-#define VG11_DESTROYPATH (VG11_DESTROYPAINT + 1)
3655-#define VG11_DRAWGLYPH (VG11_DESTROYPATH + 1)
3656-#define VG11_DRAWGLYPHS (VG11_DRAWGLYPH + 1)
3657-#define VG11_DRAWIMAGE (VG11_DRAWGLYPHS + 1)
3658-#define VG11_DRAWPATH (VG11_DRAWIMAGE + 1)
3659-#define VG11_FILLMASKLAYER (VG11_DRAWPATH + 1)
3660-#define VG11_FINISH (VG11_FILLMASKLAYER + 1)
3661-#define VG11_FLUSH (VG11_FINISH + 1)
3662-#define VG11_GAUSSIANBLUR (VG11_FLUSH + 1)
3663-#define VG11_GETCOLOR (VG11_GAUSSIANBLUR + 1)
3664-#define VG11_GETERROR (VG11_GETCOLOR + 1)
3665-#define VG11_GETF (VG11_GETERROR + 1)
3666-#define VG11_GETFV (VG11_GETF + 1)
3667-#define VG11_GETI (VG11_GETFV + 1)
3668-#define VG11_GETIMAGESUBDATA (VG11_GETI + 1)
3669-#define VG11_GETIV (VG11_GETIMAGESUBDATA + 1)
3670-#define VG11_GETMATRIX (VG11_GETIV + 1)
3671-#define VG11_GETPAINT (VG11_GETMATRIX + 1)
3672-#define VG11_GETPARAMETERF (VG11_GETPAINT + 1)
3673-#define VG11_GETPARAMETERFV (VG11_GETPARAMETERF + 1)
3674-#define VG11_GETPARAMETERI (VG11_GETPARAMETERFV + 1)
3675-#define VG11_GETPARAMETERIV (VG11_GETPARAMETERI + 1)
3676-#define VG11_GETPARAMETERVECTORSIZE (VG11_GETPARAMETERIV + 1)
3677-#define VG11_GETPARENT (VG11_GETPARAMETERVECTORSIZE + 1)
3678-#define VG11_GETPATHCAPABILITIES (VG11_GETPARENT + 1)
3679-#define VG11_GETPIXELS (VG11_GETPATHCAPABILITIES + 1)
3680-#define VG11_GETSTRING (VG11_GETPIXELS + 1)
3681-#define VG11_GETVECTORSIZE (VG11_GETSTRING + 1)
3682-#define VG11_HARDWAREQUERY (VG11_GETVECTORSIZE + 1)
3683-#define VG11_IMAGESUBDATA (VG11_HARDWAREQUERY + 1)
3684-#define VG11_INTERPOLATEPATH (VG11_IMAGESUBDATA + 1)
3685-#define VG11_LOADIDENTITY (VG11_INTERPOLATEPATH + 1)
3686-#define VG11_LOADMATRIX (VG11_LOADIDENTITY + 1)
3687-#define VG11_LOOKUP (VG11_LOADMATRIX + 1)
3688-#define VG11_LOOKUPSINGLE (VG11_LOOKUP + 1)
3689-#define VG11_MASK (VG11_LOOKUPSINGLE + 1)
3690-#define VG11_MODIFYPATHCOORDS (VG11_MASK + 1)
3691-#define VG11_MULTMATRIX (VG11_MODIFYPATHCOORDS + 1)
3692-#define VG11_PAINTPATTERN (VG11_MULTMATRIX + 1)
3693-#define VG11_PATHBOUNDS (VG11_PAINTPATTERN + 1)
3694-#define VG11_PATHLENGTH (VG11_PATHBOUNDS + 1)
3695-#define VG11_PATHTRANSFORMEDBOUNDS (VG11_PATHLENGTH + 1)
3696-#define VG11_POINTALONGPATH (VG11_PATHTRANSFORMEDBOUNDS + 1)
3697-#define VG11_READPIXELS (VG11_POINTALONGPATH + 1)
3698-#define VG11_REMOVEPATHCAPABILITIES (VG11_READPIXELS + 1)
3699-#define VG11_RENDERTOMASK (VG11_REMOVEPATHCAPABILITIES + 1)
3700-#define VG11_ROTATE (VG11_RENDERTOMASK + 1)
3701-#define VG11_SCALE (VG11_ROTATE + 1)
3702-#define VG11_SEPARABLECONVOLVE (VG11_SCALE + 1)
3703-#define VG11_SETCOLOR (VG11_SEPARABLECONVOLVE + 1)
3704-#define VG11_SETF (VG11_SETCOLOR + 1)
3705-#define VG11_SETFV (VG11_SETF + 1)
3706-#define VG11_SETGLYPHTOIMAGE (VG11_SETFV + 1)
3707-#define VG11_SETGLYPHTOPATH (VG11_SETGLYPHTOIMAGE + 1)
3708-#define VG11_SETI (VG11_SETGLYPHTOPATH + 1)
3709-#define VG11_SETIV (VG11_SETI + 1)
3710-#define VG11_SETPAINT (VG11_SETIV + 1)
3711-#define VG11_SETPARAMETERF (VG11_SETPAINT + 1)
3712-#define VG11_SETPARAMETERFV (VG11_SETPARAMETERF + 1)
3713-#define VG11_SETPARAMETERI (VG11_SETPARAMETERFV + 1)
3714-#define VG11_SETPARAMETERIV (VG11_SETPARAMETERI + 1)
3715-#define VG11_SETPIXELS (VG11_SETPARAMETERIV + 1)
3716-#define VG11_SHEAR (VG11_SETPIXELS + 1)
3717-#define VG11_TRANSFORMPATH (VG11_SHEAR + 1)
3718-#define VG11_TRANSLATE (VG11_TRANSFORMPATH + 1)
3719-#define VG11_WRITEPIXELS (VG11_TRANSLATE + 1)
3720-#define VG11_CALLS (VG11_WRITEPIXELS + 1)
3721-#define VG11_DRAWCALLS (VG11_CALLS + 1)
3722-#define VG11_STATECHANGECALLS (VG11_DRAWCALLS + 1)
3723-#define VG11_FILLCOUNT (VG11_STATECHANGECALLS + 1)
3724-#define VG11_STROKECOUNT (VG11_FILLCOUNT + 1)
3725+#define ES11_CALLS 151
3726+#define ES11_DRAWCALLS (ES11_CALLS + 1)
3727+#define ES11_STATECHANGECALLS (ES11_DRAWCALLS + 1)
3728+#define ES11_POINTCOUNT (ES11_STATECHANGECALLS + 1)
3729+#define ES11_LINECOUNT (ES11_POINTCOUNT + 1)
3730+#define ES11_TRIANGLECOUNT (ES11_LINECOUNT + 1)
3731+
3732+#define ES20_CALLS 159
3733+#define ES20_DRAWCALLS (ES20_CALLS + 1)
3734+#define ES20_STATECHANGECALLS (ES20_DRAWCALLS + 1)
3735+#define ES20_POINTCOUNT (ES20_STATECHANGECALLS + 1)
3736+#define ES20_LINECOUNT (ES20_POINTCOUNT + 1)
3737+#define ES20_TRIANGLECOUNT (ES20_LINECOUNT + 1)
3738+
3739+#define VG11_CALLS 88
3740+#define VG11_DRAWCALLS (VG11_CALLS + 1)
3741+#define VG11_STATECHANGECALLS (VG11_DRAWCALLS + 1)
3742+#define VG11_FILLCOUNT (VG11_STATECHANGECALLS + 1)
3743+#define VG11_STROKECOUNT (VG11_FILLCOUNT + 1)
3744 /* End of Driver API ID Definitions. */
3745
3746 /* HAL & MISC IDs. */
3747-#define HAL_VERTBUFNEWBYTEALLOC 1
3748-#define HAL_VERTBUFTOTALBYTEALLOC (HAL_VERTBUFNEWBYTEALLOC + 1)
3749-#define HAL_VERTBUFNEWOBJALLOC (HAL_VERTBUFTOTALBYTEALLOC + 1)
3750-#define HAL_VERTBUFTOTALOBJALLOC (HAL_VERTBUFNEWOBJALLOC + 1)
3751-#define HAL_INDBUFNEWBYTEALLOC (HAL_VERTBUFTOTALOBJALLOC + 1)
3752-#define HAL_INDBUFTOTALBYTEALLOC (HAL_INDBUFNEWBYTEALLOC + 1)
3753-#define HAL_INDBUFNEWOBJALLOC (HAL_INDBUFTOTALBYTEALLOC + 1)
3754-#define HAL_INDBUFTOTALOBJALLOC (HAL_INDBUFNEWOBJALLOC + 1)
3755-#define HAL_TEXBUFNEWBYTEALLOC (HAL_INDBUFTOTALOBJALLOC + 1)
3756-#define HAL_TEXBUFTOTALBYTEALLOC (HAL_TEXBUFNEWBYTEALLOC + 1)
3757-#define HAL_TEXBUFNEWOBJALLOC (HAL_TEXBUFTOTALBYTEALLOC + 1)
3758-#define HAL_TEXBUFTOTALOBJALLOC (HAL_TEXBUFNEWOBJALLOC + 1)
3759-
3760-#define GPU_CYCLES 1
3761-#define GPU_READ64BYTE (GPU_CYCLES + 1)
3762-#define GPU_WRITE64BYTE (GPU_READ64BYTE + 1)
3763-#define GPU_TOTALCYCLES (GPU_WRITE64BYTE + 1)
3764-#define GPU_IDLECYCLES (GPU_TOTALCYCLES + 1)
3765-
3766-#define VS_INSTCOUNT 1
3767-#define VS_BRANCHINSTCOUNT (VS_INSTCOUNT + 1)
3768-#define VS_TEXLDINSTCOUNT (VS_BRANCHINSTCOUNT + 1)
3769-#define VS_RENDEREDVERTCOUNT (VS_TEXLDINSTCOUNT + 1)
3770-
3771-#define PS_INSTCOUNT 1
3772-#define PS_BRANCHINSTCOUNT (PS_INSTCOUNT + 1)
3773-#define PS_TEXLDINSTCOUNT (PS_BRANCHINSTCOUNT + 1)
3774-#define PS_RENDEREDPIXCOUNT (PS_TEXLDINSTCOUNT + 1)
3775-
3776-#define PA_INVERTCOUNT 1
3777-#define PA_INPRIMCOUNT (PA_INVERTCOUNT + 1)
3778-#define PA_OUTPRIMCOUNT (PA_INPRIMCOUNT + 1)
3779-#define PA_DEPTHCLIPCOUNT (PA_OUTPRIMCOUNT + 1)
3780-#define PA_TRIVIALREJCOUNT (PA_DEPTHCLIPCOUNT + 1)
3781-#define PA_CULLCOUNT (PA_TRIVIALREJCOUNT + 1)
3782-
3783-#define SE_TRIANGLECOUNT 1
3784-#define SE_LINECOUNT (SE_TRIANGLECOUNT + 1)
3785-
3786-#define RA_VALIDPIXCOUNT 1
3787-#define RA_TOTALQUADCOUNT (RA_VALIDPIXCOUNT + 1)
3788-#define RA_VALIDQUADCOUNTEZ (RA_TOTALQUADCOUNT + 1)
3789-#define RA_TOTALPRIMCOUNT (RA_VALIDQUADCOUNTEZ + 1)
3790-#define RA_PIPECACHEMISSCOUNT (RA_TOTALPRIMCOUNT + 1)
3791-#define RA_PREFCACHEMISSCOUNT (RA_PIPECACHEMISSCOUNT + 1)
3792-#define RA_EEZCULLCOUNT (RA_PREFCACHEMISSCOUNT + 1)
3793-
3794-#define TX_TOTBILINEARREQ 1
3795-#define TX_TOTTRILINEARREQ (TX_TOTBILINEARREQ + 1)
3796-#define TX_TOTDISCARDTEXREQ (TX_TOTTRILINEARREQ + 1)
3797-#define TX_TOTTEXREQ (TX_TOTDISCARDTEXREQ + 1)
3798-#define TX_MEMREADCOUNT (TX_TOTTEXREQ + 1)
3799-#define TX_MEMREADIN8BCOUNT (TX_MEMREADCOUNT + 1)
3800-#define TX_CACHEMISSCOUNT (TX_MEMREADIN8BCOUNT + 1)
3801-#define TX_CACHEHITTEXELCOUNT (TX_CACHEMISSCOUNT + 1)
3802-#define TX_CACHEMISSTEXELCOUNT (TX_CACHEHITTEXELCOUNT + 1)
3803-
3804-#define PE_KILLEDBYCOLOR 1
3805-#define PE_KILLEDBYDEPTH (PE_KILLEDBYCOLOR + 1)
3806-#define PE_DRAWNBYCOLOR (PE_KILLEDBYDEPTH + 1)
3807-#define PE_DRAWNBYDEPTH (PE_DRAWNBYCOLOR + 1)
3808-
3809-#define MC_READREQ8BPIPE 1
3810-#define MC_READREQ8BIP (MC_READREQ8BPIPE + 1)
3811-#define MC_WRITEREQ8BPIPE (MC_READREQ8BIP + 1)
3812-
3813-#define AXI_READREQSTALLED 1
3814-#define AXI_WRITEREQSTALLED (AXI_READREQSTALLED + 1)
3815-#define AXI_WRITEDATASTALLED (AXI_WRITEREQSTALLED + 1)
3816-
3817-#define PVS_INSTRCOUNT 1
3818-#define PVS_ALUINSTRCOUNT (PVS_INSTRCOUNT + 1)
3819-#define PVS_TEXINSTRCOUNT (PVS_ALUINSTRCOUNT + 1)
3820-#define PVS_ATTRIBCOUNT (PVS_TEXINSTRCOUNT + 1)
3821-#define PVS_UNIFORMCOUNT (PVS_ATTRIBCOUNT + 1)
3822-#define PVS_FUNCTIONCOUNT (PVS_UNIFORMCOUNT + 1)
3823-
3824-#define PPS_INSTRCOUNT 1
3825-#define PPS_ALUINSTRCOUNT (PPS_INSTRCOUNT + 1)
3826-#define PPS_TEXINSTRCOUNT (PPS_ALUINSTRCOUNT + 1)
3827-#define PPS_ATTRIBCOUNT (PPS_TEXINSTRCOUNT + 1)
3828-#define PPS_UNIFORMCOUNT (PPS_ATTRIBCOUNT + 1)
3829-#define PPS_FUNCTIONCOUNT (PPS_UNIFORMCOUNT + 1)
3830+#define HAL_VERTBUFNEWBYTEALLOC 1
3831+#define HAL_VERTBUFTOTALBYTEALLOC (HAL_VERTBUFNEWBYTEALLOC + 1)
3832+#define HAL_VERTBUFNEWOBJALLOC (HAL_VERTBUFTOTALBYTEALLOC + 1)
3833+#define HAL_VERTBUFTOTALOBJALLOC (HAL_VERTBUFNEWOBJALLOC + 1)
3834+#define HAL_INDBUFNEWBYTEALLOC (HAL_VERTBUFTOTALOBJALLOC + 1)
3835+#define HAL_INDBUFTOTALBYTEALLOC (HAL_INDBUFNEWBYTEALLOC + 1)
3836+#define HAL_INDBUFNEWOBJALLOC (HAL_INDBUFTOTALBYTEALLOC + 1)
3837+#define HAL_INDBUFTOTALOBJALLOC (HAL_INDBUFNEWOBJALLOC + 1)
3838+#define HAL_TEXBUFNEWBYTEALLOC (HAL_INDBUFTOTALOBJALLOC + 1)
3839+#define HAL_TEXBUFTOTALBYTEALLOC (HAL_TEXBUFNEWBYTEALLOC + 1)
3840+#define HAL_TEXBUFNEWOBJALLOC (HAL_TEXBUFTOTALBYTEALLOC + 1)
3841+#define HAL_TEXBUFTOTALOBJALLOC (HAL_TEXBUFNEWOBJALLOC + 1)
3842+
3843+#define GPU_CYCLES 1
3844+#define GPU_READ64BYTE (GPU_CYCLES + 1)
3845+#define GPU_WRITE64BYTE (GPU_READ64BYTE + 1)
3846+#define GPU_TOTALCYCLES (GPU_WRITE64BYTE + 1)
3847+#define GPU_IDLECYCLES (GPU_TOTALCYCLES + 1)
3848+
3849+#define VS_INSTCOUNT 1
3850+#define VS_BRANCHINSTCOUNT (VS_INSTCOUNT + 1)
3851+#define VS_TEXLDINSTCOUNT (VS_BRANCHINSTCOUNT + 1)
3852+#define VS_RENDEREDVERTCOUNT (VS_TEXLDINSTCOUNT + 1)
3853+#define VS_SOURCE (VS_RENDEREDVERTCOUNT + 1)
3854+
3855+#define PS_INSTCOUNT 1
3856+#define PS_BRANCHINSTCOUNT (PS_INSTCOUNT + 1)
3857+#define PS_TEXLDINSTCOUNT (PS_BRANCHINSTCOUNT + 1)
3858+#define PS_RENDEREDPIXCOUNT (PS_TEXLDINSTCOUNT + 1)
3859+#define PS_SOURCE (PS_RENDEREDPIXCOUNT + 1)
3860+
3861+#define PA_INVERTCOUNT 1
3862+#define PA_INPRIMCOUNT (PA_INVERTCOUNT + 1)
3863+#define PA_OUTPRIMCOUNT (PA_INPRIMCOUNT + 1)
3864+#define PA_DEPTHCLIPCOUNT (PA_OUTPRIMCOUNT + 1)
3865+#define PA_TRIVIALREJCOUNT (PA_DEPTHCLIPCOUNT + 1)
3866+#define PA_CULLCOUNT (PA_TRIVIALREJCOUNT + 1)
3867+
3868+#define SE_TRIANGLECOUNT 1
3869+#define SE_LINECOUNT (SE_TRIANGLECOUNT + 1)
3870+
3871+#define RA_VALIDPIXCOUNT 1
3872+#define RA_TOTALQUADCOUNT (RA_VALIDPIXCOUNT + 1)
3873+#define RA_VALIDQUADCOUNTEZ (RA_TOTALQUADCOUNT + 1)
3874+#define RA_TOTALPRIMCOUNT (RA_VALIDQUADCOUNTEZ + 1)
3875+#define RA_PIPECACHEMISSCOUNT (RA_TOTALPRIMCOUNT + 1)
3876+#define RA_PREFCACHEMISSCOUNT (RA_PIPECACHEMISSCOUNT + 1)
3877+#define RA_EEZCULLCOUNT (RA_PREFCACHEMISSCOUNT + 1)
3878+
3879+#define TX_TOTBILINEARREQ 1
3880+#define TX_TOTTRILINEARREQ (TX_TOTBILINEARREQ + 1)
3881+#define TX_TOTDISCARDTEXREQ (TX_TOTTRILINEARREQ + 1)
3882+#define TX_TOTTEXREQ (TX_TOTDISCARDTEXREQ + 1)
3883+#define TX_MEMREADCOUNT (TX_TOTTEXREQ + 1)
3884+#define TX_MEMREADIN8BCOUNT (TX_MEMREADCOUNT + 1)
3885+#define TX_CACHEMISSCOUNT (TX_MEMREADIN8BCOUNT + 1)
3886+#define TX_CACHEHITTEXELCOUNT (TX_CACHEMISSCOUNT + 1)
3887+#define TX_CACHEMISSTEXELCOUNT (TX_CACHEHITTEXELCOUNT + 1)
3888+
3889+#define PE_KILLEDBYCOLOR 1
3890+#define PE_KILLEDBYDEPTH (PE_KILLEDBYCOLOR + 1)
3891+#define PE_DRAWNBYCOLOR (PE_KILLEDBYDEPTH + 1)
3892+#define PE_DRAWNBYDEPTH (PE_DRAWNBYCOLOR + 1)
3893+
3894+#define MC_READREQ8BPIPE 1
3895+#define MC_READREQ8BIP (MC_READREQ8BPIPE + 1)
3896+#define MC_WRITEREQ8BPIPE (MC_READREQ8BIP + 1)
3897+
3898+#define AXI_READREQSTALLED 1
3899+#define AXI_WRITEREQSTALLED (AXI_READREQSTALLED + 1)
3900+#define AXI_WRITEDATASTALLED (AXI_WRITEREQSTALLED + 1)
3901+
3902+#define PVS_INSTRCOUNT 1
3903+#define PVS_ALUINSTRCOUNT (PVS_INSTRCOUNT + 1)
3904+#define PVS_TEXINSTRCOUNT (PVS_ALUINSTRCOUNT + 1)
3905+#define PVS_ATTRIBCOUNT (PVS_TEXINSTRCOUNT + 1)
3906+#define PVS_UNIFORMCOUNT (PVS_ATTRIBCOUNT + 1)
3907+#define PVS_FUNCTIONCOUNT (PVS_UNIFORMCOUNT + 1)
3908+#define PVS_SOURCE (PVS_FUNCTIONCOUNT + 1)
3909+
3910+#define PPS_INSTRCOUNT 1
3911+#define PPS_ALUINSTRCOUNT (PPS_INSTRCOUNT + 1)
3912+#define PPS_TEXINSTRCOUNT (PPS_ALUINSTRCOUNT + 1)
3913+#define PPS_ATTRIBCOUNT (PPS_TEXINSTRCOUNT + 1)
3914+#define PPS_UNIFORMCOUNT (PPS_ATTRIBCOUNT + 1)
3915+#define PPS_FUNCTIONCOUNT (PPS_UNIFORMCOUNT + 1)
3916+#define PPS_SOURCE (PPS_FUNCTIONCOUNT + 1)
3917 /* End of MISC Counter IDs. */
3918
3919 #ifdef gcdNEW_PROFILER_FILE
3920@@ -578,8 +184,8 @@ extern "C" {
3921 #define VPG_ES11_TIME 0x170000
3922 #define VPG_ES20_TIME 0x180000
3923 #define VPG_FRAME 0x190000
3924-#define VPG_ES11_DRAW 0x200000
3925-#define VPG_ES20_DRAW 0x210000
3926+#define VPG_ES11_DRAW 0x200000
3927+#define VPG_ES20_DRAW 0x210000
3928 #define VPG_END 0xff0000
3929
3930 /* Info. */
3931@@ -592,7 +198,7 @@ extern "C" {
3932 #define VPC_INFOSCREENSIZE (VPC_INFODRIVERMODE + 1)
3933
3934 /* Counter Constants. */
3935-#define VPC_ELAPSETIME (VPG_TIME + 1)
3936+#define VPC_ELAPSETIME (VPG_TIME + 1)
3937 #define VPC_CPUTIME (VPC_ELAPSETIME + 1)
3938
3939 #define VPC_MEMMAXRES (VPG_MEM + 1)
3940@@ -600,404 +206,28 @@ extern "C" {
3941 #define VPC_MEMUNSHAREDDATA (VPC_MEMSHARED + 1)
3942 #define VPC_MEMUNSHAREDSTACK (VPC_MEMUNSHAREDDATA + 1)
3943
3944-/* OpenGL ES11 Counters. */
3945-#define VPC_ES11ACTIVETEXTURE (VPG_ES11 + ES11_ACTIVETEXTURE)
3946-#define VPC_ES11ALPHAFUNC (VPG_ES11 + ES11_ALPHAFUNC)
3947-#define VPC_ES11ALPHAFUNCX (VPG_ES11 + ES11_ALPHAFUNCX)
3948-#define VPC_ES11BINDBUFFER (VPG_ES11 + ES11_BINDBUFFER)
3949-#define VPC_ES11BINDTEXTURE (VPG_ES11 + ES11_BINDTEXTURE)
3950-#define VPC_ES11BLENDFUNC (VPG_ES11 + ES11_BLENDFUNC)
3951-#define VPC_ES11BUFFERDATA (VPG_ES11 + ES11_BUFFERDATA)
3952-#define VPC_ES11BUFFERSUBDATA (VPG_ES11 + ES11_BUFFERSUBDATA)
3953-#define VPC_ES11CLEAR (VPG_ES11 + ES11_CLEAR)
3954-#define VPC_ES11CLEARCOLOR (VPG_ES11 + ES11_CLEARCOLOR)
3955-#define VPC_ES11CLEARCOLORX (VPG_ES11 + ES11_CLEARCOLORX)
3956-#define VPC_ES11CLEARDEPTHF (VPG_ES11 + ES11_CLEARDEPTHF)
3957-#define VPC_ES11CLEARDEPTHX (VPG_ES11 + ES11_CLEARDEPTHX)
3958-#define VPC_ES11CLEARSTENCIL (VPG_ES11 + ES11_CLEARSTENCIL)
3959-#define VPC_ES11CLIENTACTIVETEXTURE (VPG_ES11 + ES11_CLIENTACTIVETEXTURE)
3960-#define VPC_ES11CLIPPLANEF (VPG_ES11 + ES11_CLIPPLANEF)
3961-#define VPC_ES11CLIPPLANEX (VPG_ES11 + ES11_CLIPPLANEX)
3962-#define VPC_ES11COLOR4F (VPG_ES11 + ES11_COLOR4F)
3963-#define VPC_ES11COLOR4UB (VPG_ES11 + ES11_COLOR4UB)
3964-#define VPC_ES11COLOR4X (VPG_ES11 + ES11_COLOR4X)
3965-#define VPC_ES11COLORMASK (VPG_ES11 + ES11_COLORMASK)
3966-#define VPC_ES11COLORPOINTER (VPG_ES11 + ES11_COLORPOINTER)
3967-#define VPC_ES11COMPRESSEDTEXIMAGE2D (VPG_ES11 + ES11_COMPRESSEDTEXIMAGE2D)
3968-#define VPC_ES11COMPRESSEDTEXSUBIMAGE2D (VPG_ES11 + ES11_COMPRESSEDTEXSUBIMAGE2D)
3969-#define VPC_ES11COPYTEXIMAGE2D (VPG_ES11 + ES11_COPYTEXIMAGE2D)
3970-#define VPC_ES11COPYTEXSUBIMAGE2D (VPG_ES11 + ES11_COPYTEXSUBIMAGE2D)
3971-#define VPC_ES11CULLFACE (VPG_ES11 + ES11_CULLFACE)
3972-#define VPC_ES11DELETEBUFFERS (VPG_ES11 + ES11_DELETEBUFFERS)
3973-#define VPC_ES11DELETETEXTURES (VPG_ES11 + ES11_DELETETEXTURES)
3974-#define VPC_ES11DEPTHFUNC (VPG_ES11 + ES11_DEPTHFUNC)
3975-#define VPC_ES11DEPTHMASK (VPG_ES11 + ES11_DEPTHMASK)
3976-#define VPC_ES11DEPTHRANGEF (VPG_ES11 + ES11_DEPTHRANGEF)
3977-#define VPC_ES11DEPTHRANGEX (VPG_ES11 + ES11_DEPTHRANGEX)
3978-#define VPC_ES11DISABLE (VPG_ES11 + ES11_DISABLE)
3979-#define VPC_ES11DISABLECLIENTSTATE (VPG_ES11 + ES11_DISABLECLIENTSTATE)
3980-#define VPC_ES11DRAWARRAYS (VPG_ES11 + ES11_DRAWARRAYS)
3981-#define VPC_ES11DRAWELEMENTS (VPG_ES11 + ES11_DRAWELEMENTS)
3982-#define VPC_ES11ENABLE (VPG_ES11 + ES11_ENABLE)
3983-#define VPC_ES11ENABLECLIENTSTATE (VPG_ES11 + ES11_ENABLECLIENTSTATE)
3984-#define VPC_ES11FINISH (VPG_ES11 + ES11_FINISH)
3985-#define VPC_ES11FLUSH (VPG_ES11 + ES11_FLUSH)
3986-#define VPC_ES11FOGF (VPG_ES11 + ES11_FOGF)
3987-#define VPC_ES11FOGFV (VPG_ES11 + ES11_FOGFV)
3988-#define VPC_ES11FOGX (VPG_ES11 + ES11_FOGX)
3989-#define VPC_ES11FOGXV (VPG_ES11 + ES11_FOGXV)
3990-#define VPC_ES11FRONTFACE (VPG_ES11 + ES11_FRONTFACE)
3991-#define VPC_ES11FRUSTUMF (VPG_ES11 + ES11_FRUSTUMF)
3992-#define VPC_ES11FRUSTUMX (VPG_ES11 + ES11_FRUSTUMX)
3993-#define VPC_ES11GENBUFFERS (VPG_ES11 + ES11_GENBUFFERS)
3994-#define VPC_ES11GENTEXTURES (VPG_ES11 + ES11_GENTEXTURES)
3995-#define VPC_ES11GETBOOLEANV (VPG_ES11 + ES11_GETBOOLEANV)
3996-#define VPC_ES11GETBUFFERPARAMETERIV (VPG_ES11 + ES11_GETBUFFERPARAMETERIV)
3997-#define VPC_ES11GETCLIPPLANEF (VPG_ES11 + ES11_GETCLIPPLANEF)
3998-#define VPC_ES11GETCLIPPLANEX (VPG_ES11 + ES11_GETCLIPPLANEX)
3999-#define VPC_ES11GETERROR (VPG_ES11 + ES11_GETERROR)
4000-#define VPC_ES11GETFIXEDV (VPG_ES11 + ES11_GETFIXEDV)
4001-#define VPC_ES11GETFLOATV (VPG_ES11 + ES11_GETFLOATV)
4002-#define VPC_ES11GETINTEGERV (VPG_ES11 + ES11_GETINTEGERV)
4003-#define VPC_ES11GETLIGHTFV (VPG_ES11 + ES11_GETLIGHTFV)
4004-#define VPC_ES11GETLIGHTXV (VPG_ES11 + ES11_GETLIGHTXV)
4005-#define VPC_ES11GETMATERIALFV (VPG_ES11 + ES11_GETMATERIALFV)
4006-#define VPC_ES11GETMATERIALXV (VPG_ES11 + ES11_GETMATERIALXV)
4007-#define VPC_ES11GETPOINTERV (VPG_ES11 + ES11_GETPOINTERV)
4008-#define VPC_ES11GETSTRING (VPG_ES11 + ES11_GETSTRING)
4009-#define VPC_ES11GETTEXENVFV (VPG_ES11 + ES11_GETTEXENVFV)
4010-#define VPC_ES11GETTEXENVIV (VPG_ES11 + ES11_GETTEXENVIV)
4011-#define VPC_ES11GETTEXENVXV (VPG_ES11 + ES11_GETTEXENVXV)
4012-#define VPC_ES11GETTEXPARAMETERFV (VPG_ES11 + ES11_GETTEXPARAMETERFV)
4013-#define VPC_ES11GETTEXPARAMETERIV (VPG_ES11 + ES11_GETTEXPARAMETERIV)
4014-#define VPC_ES11GETTEXPARAMETERXV (VPG_ES11 + ES11_GETTEXPARAMETERXV)
4015-#define VPC_ES11HINT (VPG_ES11 + ES11_HINT)
4016-#define VPC_ES11ISBUFFER (VPG_ES11 + ES11_ISBUFFER)
4017-#define VPC_ES11ISENABLED (VPG_ES11 + ES11_ISENABLED)
4018-#define VPC_ES11ISTEXTURE (VPG_ES11 + ES11_ISTEXTURE)
4019-#define VPC_ES11LIGHTF (VPG_ES11 + ES11_LIGHTF)
4020-#define VPC_ES11LIGHTFV (VPG_ES11 + ES11_LIGHTFV)
4021-#define VPC_ES11LIGHTMODELF (VPG_ES11 + ES11_LIGHTMODELF)
4022-#define VPC_ES11LIGHTMODELFV (VPG_ES11 + ES11_LIGHTMODELFV)
4023-#define VPC_ES11LIGHTMODELX (VPG_ES11 + ES11_LIGHTMODELX)
4024-#define VPC_ES11LIGHTMODELXV (VPG_ES11 + ES11_LIGHTMODELXV)
4025-#define VPC_ES11LIGHTX (VPG_ES11 + ES11_LIGHTX)
4026-#define VPC_ES11LIGHTXV (VPG_ES11 + ES11_LIGHTXV)
4027-#define VPC_ES11LINEWIDTH (VPG_ES11 + ES11_LINEWIDTH)
4028-#define VPC_ES11LINEWIDTHX (VPG_ES11 + ES11_LINEWIDTHX)
4029-#define VPC_ES11LOADIDENTITY (VPG_ES11 + ES11_LOADIDENTITY)
4030-#define VPC_ES11LOADMATRIXF (VPG_ES11 + ES11_LOADMATRIXF)
4031-#define VPC_ES11LOADMATRIXX (VPG_ES11 + ES11_LOADMATRIXX)
4032-#define VPC_ES11LOGICOP (VPG_ES11 + ES11_LOGICOP)
4033-#define VPC_ES11MATERIALF (VPG_ES11 + ES11_MATERIALF)
4034-#define VPC_ES11MATERIALFV (VPG_ES11 + ES11_MATERIALFV)
4035-#define VPC_ES11MATERIALX (VPG_ES11 + ES11_MATERIALX)
4036-#define VPC_ES11MATERIALXV (VPG_ES11 + ES11_MATERIALXV)
4037-#define VPC_ES11MATRIXMODE (VPG_ES11 + ES11_MATRIXMODE)
4038-#define VPC_ES11MULTITEXCOORD4F (VPG_ES11 + ES11_MULTITEXCOORD4F)
4039-#define VPC_ES11MULTITEXCOORD4X (VPG_ES11 + ES11_MULTITEXCOORD4X)
4040-#define VPC_ES11MULTMATRIXF (VPG_ES11 + ES11_MULTMATRIXF)
4041-#define VPC_ES11MULTMATRIXX (VPG_ES11 + ES11_MULTMATRIXX)
4042-#define VPC_ES11NORMAL3F (VPG_ES11 + ES11_NORMAL3F)
4043-#define VPC_ES11NORMAL3X (VPG_ES11 + ES11_NORMAL3X)
4044-#define VPC_ES11NORMALPOINTER (VPG_ES11 + ES11_NORMALPOINTER)
4045-#define VPC_ES11ORTHOF (VPG_ES11 + ES11_ORTHOF)
4046-#define VPC_ES11ORTHOX (VPG_ES11 + ES11_ORTHOX)
4047-#define VPC_ES11PIXELSTOREI (VPG_ES11 + ES11_PIXELSTOREI)
4048-#define VPC_ES11POINTPARAMETERF (VPG_ES11 + ES11_POINTPARAMETERF)
4049-#define VPC_ES11POINTPARAMETERFV (VPG_ES11 + ES11_POINTPARAMETERFV)
4050-#define VPC_ES11POINTPARAMETERX (VPG_ES11 + ES11_POINTPARAMETERX)
4051-#define VPC_ES11POINTPARAMETERXV (VPG_ES11 + ES11_POINTPARAMETERXV)
4052-#define VPC_ES11POINTSIZE (VPG_ES11 + ES11_POINTSIZE)
4053-#define VPC_ES11POINTSIZEX (VPG_ES11 + ES11_POINTSIZEX)
4054-#define VPC_ES11POLYGONOFFSET (VPG_ES11 + ES11_POLYGONOFFSET)
4055-#define VPC_ES11POLYGONOFFSETX (VPG_ES11 + ES11_POLYGONOFFSETX)
4056-#define VPC_ES11POPMATRIX (VPG_ES11 + ES11_POPMATRIX)
4057-#define VPC_ES11PUSHMATRIX (VPG_ES11 + ES11_PUSHMATRIX)
4058-#define VPC_ES11READPIXELS (VPG_ES11 + ES11_READPIXELS)
4059-#define VPC_ES11ROTATEF (VPG_ES11 + ES11_ROTATEF)
4060-#define VPC_ES11ROTATEX (VPG_ES11 + ES11_ROTATEX)
4061-#define VPC_ES11SAMPLECOVERAGE (VPG_ES11 + ES11_SAMPLECOVERAGE)
4062-#define VPC_ES11SAMPLECOVERAGEX (VPG_ES11 + ES11_SAMPLECOVERAGEX)
4063-#define VPC_ES11SCALEF (VPG_ES11 + ES11_SCALEF)
4064-#define VPC_ES11SCALEX (VPG_ES11 + ES11_SCALEX)
4065-#define VPC_ES11SCISSOR (VPG_ES11 + ES11_SCISSOR)
4066-#define VPC_ES11SHADEMODEL (VPG_ES11 + ES11_SHADEMODEL)
4067-#define VPC_ES11STENCILFUNC (VPG_ES11 + ES11_STENCILFUNC)
4068-#define VPC_ES11STENCILMASK (VPG_ES11 + ES11_STENCILMASK)
4069-#define VPC_ES11STENCILOP (VPG_ES11 + ES11_STENCILOP)
4070-#define VPC_ES11TEXCOORDPOINTER (VPG_ES11 + ES11_TEXCOORDPOINTER)
4071-#define VPC_ES11TEXENVF (VPG_ES11 + ES11_TEXENVF)
4072-#define VPC_ES11TEXENVFV (VPG_ES11 + ES11_TEXENVFV)
4073-#define VPC_ES11TEXENVI (VPG_ES11 + ES11_TEXENVI)
4074-#define VPC_ES11TEXENVIV (VPG_ES11 + ES11_TEXENVIV)
4075-#define VPC_ES11TEXENVX (VPG_ES11 + ES11_TEXENVX)
4076-#define VPC_ES11TEXENVXV (VPG_ES11 + ES11_TEXENVXV)
4077-#define VPC_ES11TEXIMAGE2D (VPG_ES11 + ES11_TEXIMAGE2D)
4078-#define VPC_ES11TEXPARAMETERF (VPG_ES11 + ES11_TEXPARAMETERF)
4079-#define VPC_ES11TEXPARAMETERFV (VPG_ES11 + ES11_TEXPARAMETERFV)
4080-#define VPC_ES11TEXPARAMETERI (VPG_ES11 + ES11_TEXPARAMETERI)
4081-#define VPC_ES11TEXPARAMETERIV (VPG_ES11 + ES11_TEXPARAMETERIV)
4082-#define VPC_ES11TEXPARAMETERX (VPG_ES11 + ES11_TEXPARAMETERX)
4083-#define VPC_ES11TEXPARAMETERXV (VPG_ES11 + ES11_TEXPARAMETERXV)
4084-#define VPC_ES11TEXSUBIMAGE2D (VPG_ES11 + ES11_TEXSUBIMAGE2D)
4085-#define VPC_ES11TRANSLATEF (VPG_ES11 + ES11_TRANSLATEF)
4086-#define VPC_ES11TRANSLATEX (VPG_ES11 + ES11_TRANSLATEX)
4087-#define VPC_ES11VERTEXPOINTER (VPG_ES11 + ES11_VERTEXPOINTER)
4088-#define VPC_ES11VIEWPORT (VPG_ES11 + ES11_VIEWPORT)
4089 /* OpenGL ES11 Statics Counter IDs. */
4090-#define VPC_ES11CALLS (VPG_ES11 + ES11_CALLS)
4091-#define VPC_ES11DRAWCALLS (VPG_ES11 + ES11_DRAWCALLS)
4092-#define VPC_ES11STATECHANGECALLS (VPG_ES11 + ES11_STATECHANGECALLS)
4093-#define VPC_ES11POINTCOUNT (VPG_ES11 + ES11_POINTCOUNT)
4094-#define VPC_ES11LINECOUNT (VPG_ES11 + ES11_LINECOUNT)
4095-#define VPC_ES11TRIANGLECOUNT (VPG_ES11 + ES11_TRIANGLECOUNT)
4096-
4097-/* OpenGLES 2.x */
4098-#define VPC_ES20ACTIVETEXTURE (VPG_ES20 + ES20_ACTIVETEXTURE)
4099-#define VPC_ES20ATTACHSHADER (VPG_ES20 + ES20_ATTACHSHADER)
4100-#define VPC_ES20BINDATTRIBLOCATION (VPG_ES20 + ES20_BINDATTRIBLOCATION)
4101-#define VPC_ES20BINDBUFFER (VPG_ES20 + ES20_BINDBUFFER)
4102-#define VPC_ES20BINDFRAMEBUFFER (VPG_ES20 + ES20_BINDFRAMEBUFFER)
4103-#define VPC_ES20BINDRENDERBUFFER (VPG_ES20 + ES20_BINDRENDERBUFFER)
4104-#define VPC_ES20BINDTEXTURE (VPG_ES20 + ES20_BINDTEXTURE)
4105-#define VPC_ES20BLENDCOLOR (VPG_ES20 + ES20_BLENDCOLOR)
4106-#define VPC_ES20BLENDEQUATION (VPG_ES20 + ES20_BLENDEQUATION)
4107-#define VPC_ES20BLENDEQUATIONSEPARATE (VPG_ES20 + ES20_BLENDEQUATIONSEPARATE)
4108-#define VPC_ES20BLENDFUNC (VPG_ES20 + ES20_BLENDFUNC)
4109-#define VPC_ES20BLENDFUNCSEPARATE (VPG_ES20 + ES20_BLENDFUNCSEPARATE)
4110-#define VPC_ES20BUFFERDATA (VPG_ES20 + ES20_BUFFERDATA)
4111-#define VPC_ES20BUFFERSUBDATA (VPG_ES20 + ES20_BUFFERSUBDATA)
4112-#define VPC_ES20CHECKFRAMEBUFFERSTATUS (VPG_ES20 + ES20_CHECKFRAMEBUFFERSTATUS)
4113-#define VPC_ES20CLEAR (VPG_ES20 + ES20_CLEAR)
4114-#define VPC_ES20CLEARCOLOR (VPG_ES20 + ES20_CLEARCOLOR)
4115-#define VPC_ES20CLEARDEPTHF (VPG_ES20 + ES20_CLEARDEPTHF)
4116-#define VPC_ES20CLEARSTENCIL (VPG_ES20 + ES20_CLEARSTENCIL)
4117-#define VPC_ES20COLORMASK (VPG_ES20 + ES20_COLORMASK)
4118-#define VPC_ES20COMPILESHADER (VPG_ES20 + ES20_COMPILESHADER)
4119-#define VPC_ES20COMPRESSEDTEXIMAGE2D (VPG_ES20 + ES20_COMPRESSEDTEXIMAGE2D)
4120-#define VPC_ES20COMPRESSEDTEXSUBIMAGE2D (VPG_ES20 + ES20_COMPRESSEDTEXSUBIMAGE2D)
4121-#define VPC_ES20COPYTEXIMAGE2D (VPG_ES20 + ES20_COPYTEXIMAGE2D)
4122-#define VPC_ES20COPYTEXSUBIMAGE2D (VPG_ES20 + ES20_COPYTEXSUBIMAGE2D)
4123-#define VPC_ES20CREATEPROGRAM (VPG_ES20 + ES20_CREATEPROGRAM)
4124-#define VPC_ES20CREATESHADER (VPG_ES20 + ES20_CREATESHADER)
4125-#define VPC_ES20CULLFACE (VPG_ES20 + ES20_CULLFACE)
4126-#define VPC_ES20DELETEBUFFERS (VPG_ES20 + ES20_DELETEBUFFERS)
4127-#define VPC_ES20DELETEFRAMEBUFFERS (VPG_ES20 + ES20_DELETEFRAMEBUFFERS)
4128-#define VPC_ES20DELETEPROGRAM (VPG_ES20 + ES20_DELETEPROGRAM)
4129-#define VPC_ES20DELETERENDERBUFFERS (VPG_ES20 + ES20_DELETERENDERBUFFERS)
4130-#define VPC_ES20DELETESHADER (VPG_ES20 + ES20_DELETESHADER)
4131-#define VPC_ES20DELETETEXTURES (VPG_ES20 + ES20_DELETETEXTURES)
4132-#define VPC_ES20DEPTHFUNC (VPG_ES20 + ES20_DEPTHFUNC)
4133-#define VPC_ES20DEPTHMASK (VPG_ES20 + ES20_DEPTHMASK)
4134-#define VPC_ES20DEPTHRANGEF (VPG_ES20 + ES20_DEPTHRANGEF)
4135-#define VPC_ES20DETACHSHADER (VPG_ES20 + ES20_DETACHSHADER)
4136-#define VPC_ES20DISABLE (VPG_ES20 + ES20_DISABLE)
4137-#define VPC_ES20DISABLEVERTEXATTRIBARRAY (VPG_ES20 + ES20_DISABLEVERTEXATTRIBARRAY)
4138-#define VPC_ES20DRAWARRAYS (VPG_ES20 + ES20_DRAWARRAYS)
4139-#define VPC_ES20DRAWELEMENTS (VPG_ES20 + ES20_DRAWELEMENTS)
4140-#define VPC_ES20ENABLE (VPG_ES20 + ES20_ENABLE)
4141-#define VPC_ES20ENABLEVERTEXATTRIBARRAY (VPG_ES20 + ES20_ENABLEVERTEXATTRIBARRAY)
4142-#define VPC_ES20FINISH (VPG_ES20 + ES20_FINISH)
4143-#define VPC_ES20FLUSH (VPG_ES20 + ES20_FLUSH)
4144-#define VPC_ES20FRAMEBUFFERRENDERBUFFER (VPG_ES20 + ES20_FRAMEBUFFERRENDERBUFFER)
4145-#define VPC_ES20FRAMEBUFFERTEXTURE2D (VPG_ES20 + ES20_FRAMEBUFFERTEXTURE2D)
4146-#define VPC_ES20FRONTFACE (VPG_ES20 + ES20_FRONTFACE)
4147-#define VPC_ES20GENBUFFERS (VPG_ES20 + ES20_GENBUFFERS)
4148-#define VPC_ES20GENERATEMIPMAP (VPG_ES20 + ES20_GENERATEMIPMAP)
4149-#define VPC_ES20GENFRAMEBUFFERS (VPG_ES20 + ES20_GENFRAMEBUFFERS)
4150-#define VPC_ES20GENRENDERBUFFERS (VPG_ES20 + ES20_GENRENDERBUFFERS)
4151-#define VPC_ES20GENTEXTURES (VPG_ES20 + ES20_GENTEXTURES)
4152-#define VPC_ES20GETACTIVEATTRIB (VPG_ES20 + ES20_GETACTIVEATTRIB)
4153-#define VPC_ES20GETACTIVEUNIFORM (VPG_ES20 + ES20_GETACTIVEUNIFORM)
4154-#define VPC_ES20GETATTACHEDSHADERS (VPG_ES20 + ES20_GETATTACHEDSHADERS)
4155-#define VPC_ES20GETATTRIBLOCATION (VPG_ES20 + ES20_GETATTRIBLOCATION)
4156-#define VPC_ES20GETBOOLEANV (VPG_ES20 + ES20_GETBOOLEANV)
4157-#define VPC_ES20GETBUFFERPARAMETERIV (VPG_ES20 + ES20_GETBUFFERPARAMETERIV)
4158-#define VPC_ES20GETERROR (VPG_ES20 + ES20_GETERROR)
4159-#define VPC_ES20GETFLOATV (VPG_ES20 + ES20_GETFLOATV)
4160-#define VPC_ES20GETFRAMEBUFFERATTACHMENTPARAMETERIV (VPG_ES20 + ES20_GETFRAMEBUFFERATTACHMENTPARAMETERIV)
4161-#define VPC_ES20GETINTEGERV (VPG_ES20 + ES20_GETINTEGERV)
4162-#define VPC_ES20GETPROGRAMIV (VPG_ES20 + ES20_GETPROGRAMIV)
4163-#define VPC_ES20GETPROGRAMINFOLOG (VPG_ES20 + ES20_GETPROGRAMINFOLOG)
4164-#define VPC_ES20GETRENDERBUFFERPARAMETERIV (VPG_ES20 + ES20_GETRENDERBUFFERPARAMETERIV)
4165-#define VPC_ES20GETSHADERIV (VPG_ES20 + ES20_GETSHADERIV)
4166-#define VPC_ES20GETSHADERINFOLOG (VPG_ES20 + ES20_GETSHADERINFOLOG)
4167-#define VPC_ES20GETSHADERPRECISIONFORMAT (VPG_ES20 + ES20_GETSHADERPRECISIONFORMAT)
4168-#define VPC_ES20GETSHADERSOURCE (VPG_ES20 + ES20_GETSHADERSOURCE)
4169-#define VPC_ES20GETSTRING (VPG_ES20 + ES20_GETSTRING)
4170-#define VPC_ES20GETTEXPARAMETERFV (VPG_ES20 + ES20_GETTEXPARAMETERFV)
4171-#define VPC_ES20GETTEXPARAMETERIV (VPG_ES20 + ES20_GETTEXPARAMETERIV)
4172-#define VPC_ES20GETUNIFORMFV (VPG_ES20 + ES20_GETUNIFORMFV)
4173-#define VPC_ES20GETUNIFORMIV (VPG_ES20 + ES20_GETUNIFORMIV)
4174-#define VPC_ES20GETUNIFORMLOCATION (VPG_ES20 + ES20_GETUNIFORMLOCATION)
4175-#define VPC_ES20GETVERTEXATTRIBFV (VPG_ES20 + ES20_GETVERTEXATTRIBFV)
4176-#define VPC_ES20GETVERTEXATTRIBIV (VPG_ES20 + ES20_GETVERTEXATTRIBIV)
4177-#define VPC_ES20GETVERTEXATTRIBPOINTERV (VPG_ES20 + ES20_GETVERTEXATTRIBPOINTERV)
4178-#define VPC_ES20HINT (VPG_ES20 + ES20_HINT)
4179-#define VPC_ES20ISBUFFER (VPG_ES20 + ES20_ISBUFFER)
4180-#define VPC_ES20ISENABLED (VPG_ES20 + ES20_ISENABLED)
4181-#define VPC_ES20ISFRAMEBUFFER (VPG_ES20 + ES20_ISFRAMEBUFFER)
4182-#define VPC_ES20ISPROGRAM (VPG_ES20 + ES20_ISPROGRAM)
4183-#define VPC_ES20ISRENDERBUFFER (VPG_ES20 + ES20_ISRENDERBUFFER)
4184-#define VPC_ES20ISSHADER (VPG_ES20 + ES20_ISSHADER)
4185-#define VPC_ES20ISTEXTURE (VPG_ES20 + ES20_ISTEXTURE)
4186-#define VPC_ES20LINEWIDTH (VPG_ES20 + ES20_LINEWIDTH)
4187-#define VPC_ES20LINKPROGRAM (VPG_ES20 + ES20_LINKPROGRAM)
4188-#define VPC_ES20PIXELSTOREI (VPG_ES20 + ES20_PIXELSTOREI)
4189-#define VPC_ES20POLYGONOFFSET (VPG_ES20 + ES20_POLYGONOFFSET)
4190-#define VPC_ES20READPIXELS (VPG_ES20 + ES20_READPIXELS)
4191-#define VPC_ES20RELEASESHADERCOMPILER (VPG_ES20 + ES20_RELEASESHADERCOMPILER)
4192-#define VPC_ES20RENDERBUFFERSTORAGE (VPG_ES20 + ES20_RENDERBUFFERSTORAGE)
4193-#define VPC_ES20SAMPLECOVERAGE (VPG_ES20 + ES20_SAMPLECOVERAGE)
4194-#define VPC_ES20SCISSOR (VPG_ES20 + ES20_SCISSOR)
4195-#define VPC_ES20SHADERBINARY (VPG_ES20 + ES20_SHADERBINARY)
4196-#define VPC_ES20SHADERSOURCE (VPG_ES20 + ES20_SHADERSOURCE)
4197-#define VPC_ES20STENCILFUNC (VPG_ES20 + ES20_STENCILFUNC)
4198-#define VPC_ES20STENCILFUNCSEPARATE (VPG_ES20 + ES20_STENCILFUNCSEPARATE)
4199-#define VPC_ES20STENCILMASK (VPG_ES20 + ES20_STENCILMASK)
4200-#define VPC_ES20STENCILMASKSEPARATE (VPG_ES20 + ES20_STENCILMASKSEPARATE)
4201-#define VPC_ES20STENCILOP (VPG_ES20 + ES20_STENCILOP)
4202-#define VPC_ES20STENCILOPSEPARATE (VPG_ES20 + ES20_STENCILOPSEPARATE)
4203-#define VPC_ES20TEXIMAGE2D (VPG_ES20 + ES20_TEXIMAGE2D)
4204-#define VPC_ES20TEXPARAMETERF (VPG_ES20 + ES20_TEXPARAMETERF)
4205-#define VPC_ES20TEXPARAMETERFV (VPG_ES20 + ES20_TEXPARAMETERFV)
4206-#define VPC_ES20TEXPARAMETERI (VPG_ES20 + ES20_TEXPARAMETERI)
4207-#define VPC_ES20TEXPARAMETERIV (VPG_ES20 + ES20_TEXPARAMETERIV)
4208-#define VPC_ES20TEXSUBIMAGE2D (VPG_ES20 + ES20_TEXSUBIMAGE2D)
4209-#define VPC_ES20UNIFORM1F (VPG_ES20 + ES20_UNIFORM1F)
4210-#define VPC_ES20UNIFORM1FV (VPG_ES20 + ES20_UNIFORM1FV)
4211-#define VPC_ES20UNIFORM1I (VPG_ES20 + ES20_UNIFORM1I)
4212-#define VPC_ES20UNIFORM1IV (VPG_ES20 + ES20_UNIFORM1IV)
4213-#define VPC_ES20UNIFORM2F (VPG_ES20 + ES20_UNIFORM2F)
4214-#define VPC_ES20UNIFORM2FV (VPG_ES20 + ES20_UNIFORM2FV)
4215-#define VPC_ES20UNIFORM2I (VPG_ES20 + ES20_UNIFORM2I)
4216-#define VPC_ES20UNIFORM2IV (VPG_ES20 + ES20_UNIFORM2IV)
4217-#define VPC_ES20UNIFORM3F (VPG_ES20 + ES20_UNIFORM3F)
4218-#define VPC_ES20UNIFORM3FV (VPG_ES20 + ES20_UNIFORM3FV)
4219-#define VPC_ES20UNIFORM3I (VPG_ES20 + ES20_UNIFORM3I)
4220-#define VPC_ES20UNIFORM3IV (VPG_ES20 + ES20_UNIFORM3IV)
4221-#define VPC_ES20UNIFORM4F (VPG_ES20 + ES20_UNIFORM4F)
4222-#define VPC_ES20UNIFORM4FV (VPG_ES20 + ES20_UNIFORM4FV)
4223-#define VPC_ES20UNIFORM4I (VPG_ES20 + ES20_UNIFORM4I)
4224-#define VPC_ES20UNIFORM4IV (VPG_ES20 + ES20_UNIFORM4IV)
4225-#define VPC_ES20UNIFORMMATRIX2FV (VPG_ES20 + ES20_UNIFORMMATRIX2FV)
4226-#define VPC_ES20UNIFORMMATRIX3FV (VPG_ES20 + ES20_UNIFORMMATRIX3FV)
4227-#define VPC_ES20UNIFORMMATRIX4FV (VPG_ES20 + ES20_UNIFORMMATRIX4FV)
4228-#define VPC_ES20USEPROGRAM (VPG_ES20 + ES20_USEPROGRAM)
4229-#define VPC_ES20VALIDATEPROGRAM (VPG_ES20 + ES20_VALIDATEPROGRAM)
4230-#define VPC_ES20VERTEXATTRIB1F (VPG_ES20 + ES20_VERTEXATTRIB1F)
4231-#define VPC_ES20VERTEXATTRIB1FV (VPG_ES20 + ES20_VERTEXATTRIB1FV)
4232-#define VPC_ES20VERTEXATTRIB2F (VPG_ES20 + ES20_VERTEXATTRIB2F)
4233-#define VPC_ES20VERTEXATTRIB2FV (VPG_ES20 + ES20_VERTEXATTRIB2FV)
4234-#define VPC_ES20VERTEXATTRIB3F (VPG_ES20 + ES20_VERTEXATTRIB3F)
4235-#define VPC_ES20VERTEXATTRIB3FV (VPG_ES20 + ES20_VERTEXATTRIB3FV)
4236-#define VPC_ES20VERTEXATTRIB4F (VPG_ES20 + ES20_VERTEXATTRIB4F)
4237-#define VPC_ES20VERTEXATTRIB4FV (VPG_ES20 + ES20_VERTEXATTRIB4FV)
4238-#define VPC_ES20VERTEXATTRIBPOINTER (VPG_ES20 + ES20_VERTEXATTRIBPOINTER)
4239-#define VPC_ES20VIEWPORT (VPG_ES20 + ES20_VIEWPORT)
4240+#define VPC_ES11CALLS (VPG_ES11 + ES11_CALLS)
4241+#define VPC_ES11DRAWCALLS (VPG_ES11 + ES11_DRAWCALLS)
4242+#define VPC_ES11STATECHANGECALLS (VPG_ES11 + ES11_STATECHANGECALLS)
4243+#define VPC_ES11POINTCOUNT (VPG_ES11 + ES11_POINTCOUNT)
4244+#define VPC_ES11LINECOUNT (VPG_ES11 + ES11_LINECOUNT)
4245+#define VPC_ES11TRIANGLECOUNT (VPG_ES11 + ES11_TRIANGLECOUNT)
4246+
4247 /* OpenGL ES20 Statistics Counter IDs. */
4248-#define VPC_ES20CALLS (VPG_ES20 + ES20_CALLS)
4249-#define VPC_ES20DRAWCALLS (VPG_ES20 + ES20_DRAWCALLS)
4250-#define VPC_ES20STATECHANGECALLS (VPG_ES20 + ES20_STATECHANGECALLS)
4251-#define VPC_ES20POINTCOUNT (VPG_ES20 + ES20_POINTCOUNT)
4252-#define VPC_ES20LINECOUNT (VPG_ES20 + ES20_LINECOUNT)
4253-#define VPC_ES20TRIANGLECOUNT (VPG_ES20 + ES20_TRIANGLECOUNT)
4254-
4255-/* VG11 Counters. */
4256-#define VPC_VG11APPENDPATH (VPG_VG11 + VG11_APPENDPATH)
4257-#define VPC_VG11APPENDPATHDATA (VPG_VG11 + VG11_APPENDPATHDATA)
4258-#define VPC_VG11CHILDIMAGE (VPG_VG11 + VG11_CHILDIMAGE)
4259-#define VPC_VG11CLEAR (VPG_VG11 + VG11_CLEAR)
4260-#define VPC_VG11CLEARGLYPH (VPG_VG11 + VG11_CLEARGLYPH)
4261-#define VPC_VG11CLEARIMAGE (VPG_VG11 + VG11_CLEARIMAGE)
4262-#define VPC_VG11CLEARPATH (VPG_VG11 + VG11_CLEARPATH)
4263-#define VPC_VG11COLORMATRIX (VPG_VG11 + VG11_COLORMATRIX)
4264-#define VPC_VG11CONVOLVE (VPG_VG11 + VG11_CONVOLVE)
4265-#define VPC_VG11COPYIMAGE (VPG_VG11 + VG11_COPYIMAGE)
4266-#define VPC_VG11COPYMASK (VPG_VG11 + VG11_COPYMASK)
4267-#define VPC_VG11COPYPIXELS (VPG_VG11 + VG11_COPYPIXELS)
4268-#define VPC_VG11CREATEFONT (VPG_VG11 + VG11_CREATEFONT)
4269-#define VPC_VG11CREATEIMAGE (VPG_VG11 + VG11_CREATEIMAGE)
4270-#define VPC_VG11CREATEMASKLAYER (VPG_VG11 + VG11_CREATEMASKLAYER)
4271-#define VPC_VG11CREATEPAINT (VPG_VG11 + VG11_CREATEPAINT)
4272-#define VPC_VG11CREATEPATH (VPG_VG11 + VG11_CREATEPATH)
4273-#define VPC_VG11DESTROYFONT (VPG_VG11 + VG11_DESTROYFONT)
4274-#define VPC_VG11DESTROYIMAGE (VPG_VG11 + VG11_DESTROYIMAGE)
4275-#define VPC_VG11DESTROYMASKLAYER (VPG_VG11 + VG11_DESTROYMASKLAYER)
4276-#define VPC_VG11DESTROYPAINT (VPG_VG11 + VG11_DESTROYPAINT)
4277-#define VPC_VG11DESTROYPATH (VPG_VG11 + VG11_DESTROYPATH)
4278-#define VPC_VG11DRAWGLYPH (VPG_VG11 + VG11_DRAWGLYPH)
4279-#define VPC_VG11DRAWGLYPHS (VPG_VG11 + VG11_DRAWGLYPHS)
4280-#define VPC_VG11DRAWIMAGE (VPG_VG11 + VG11_DRAWIMAGE)
4281-#define VPC_VG11DRAWPATH (VPG_VG11 + VG11_DRAWPATH)
4282-#define VPC_VG11FILLMASKLAYER (VPG_VG11 + VG11_FILLMASKLAYER)
4283-#define VPC_VG11FINISH (VPG_VG11 + VG11_FINISH)
4284-#define VPC_VG11FLUSH (VPG_VG11 + VG11_FLUSH)
4285-#define VPC_VG11GAUSSIANBLUR (VPG_VG11 + VG11_GAUSSIANBLUR)
4286-#define VPC_VG11GETCOLOR (VPG_VG11 + VG11_GETCOLOR)
4287-#define VPC_VG11GETERROR (VPG_VG11 + VG11_GETERROR)
4288-#define VPC_VG11GETF (VPG_VG11 + VG11_GETF)
4289-#define VPC_VG11GETFV (VPG_VG11 + VG11_GETFV)
4290-#define VPC_VG11GETI (VPG_VG11 + VG11_GETI)
4291-#define VPC_VG11GETIMAGESUBDATA (VPG_VG11 + VG11_GETIMAGESUBDATA)
4292-#define VPC_VG11GETIV (VPG_VG11 + VG11_GETIV)
4293-#define VPC_VG11GETMATRIX (VPG_VG11 + VG11_GETMATRIX)
4294-#define VPC_VG11GETPAINT (VPG_VG11 + VG11_GETPAINT)
4295-#define VPC_VG11GETPARAMETERF (VPG_VG11 + VG11_GETPARAMETERF)
4296-#define VPC_VG11GETPARAMETERFV (VPG_VG11 + VG11_GETPARAMETERFV)
4297-#define VPC_VG11GETPARAMETERI (VPG_VG11 + VG11_GETPARAMETERI)
4298-#define VPC_VG11GETPARAMETERIV (VPG_VG11 + VG11_GETPARAMETERIV)
4299-#define VPC_VG11GETPARAMETERVECTORSIZE (VPG_VG11 + VG11_GETPARAMETERVECTORSIZE)
4300-#define VPC_VG11GETPARENT (VPG_VG11 + VG11_GETPARENT)
4301-#define VPC_VG11GETPATHCAPABILITIES (VPG_VG11 + VG11_GETPATHCAPABILITIES)
4302-#define VPC_VG11GETPIXELS (VPG_VG11 + VG11_GETPIXELS)
4303-#define VPC_VG11GETSTRING (VPG_VG11 + VG11_GETSTRING)
4304-#define VPC_VG11GETVECTORSIZE (VPG_VG11 + VG11_GETVECTORSIZE)
4305-#define VPC_VG11HARDWAREQUERY (VPG_VG11 + VG11_HARDWAREQUERY)
4306-#define VPC_VG11IMAGESUBDATA (VPG_VG11 + VG11_IMAGESUBDATA)
4307-#define VPC_VG11INTERPOLATEPATH (VPG_VG11 + VG11_INTERPOLATEPATH)
4308-#define VPC_VG11LOADIDENTITY (VPG_VG11 + VG11_LOADIDENTITY)
4309-#define VPC_VG11LOADMATRIX (VPG_VG11 + VG11_LOADMATRIX)
4310-#define VPC_VG11LOOKUP (VPG_VG11 + VG11_LOOKUP)
4311-#define VPC_VG11LOOKUPSINGLE (VPG_VG11 + VG11_LOOKUPSINGLE)
4312-#define VPC_VG11MASK (VPG_VG11 + VG11_MASK)
4313-#define VPC_VG11MODIFYPATHCOORDS (VPG_VG11 + VG11_MODIFYPATHCOORDS)
4314-#define VPC_VG11MULTMATRIX (VPG_VG11 + VG11_MULTMATRIX)
4315-#define VPC_VG11PAINTPATTERN (VPG_VG11 + VG11_PAINTPATTERN)
4316-#define VPC_VG11PATHBOUNDS (VPG_VG11 + VG11_PATHBOUNDS)
4317-#define VPC_VG11PATHLENGTH (VPG_VG11 + VG11_PATHLENGTH)
4318-#define VPC_VG11PATHTRANSFORMEDBOUNDS (VPG_VG11 + VG11_PATHTRANSFORMEDBOUNDS)
4319-#define VPC_VG11POINTALONGPATH (VPG_VG11 + VG11_POINTALONGPATH)
4320-#define VPC_VG11READPIXELS (VPG_VG11 + VG11_READPIXELS)
4321-#define VPC_VG11REMOVEPATHCAPABILITIES (VPG_VG11 + VG11_REMOVEPATHCAPABILITIES)
4322-#define VPC_VG11RENDERTOMASK (VPG_VG11 + VG11_RENDERTOMASK)
4323-#define VPC_VG11ROTATE (VPG_VG11 + VG11_ROTATE)
4324-#define VPC_VG11SCALE (VPG_VG11 + VG11_SCALE)
4325-#define VPC_VG11SEPARABLECONVOLVE (VPG_VG11 + VG11_SEPARABLECONVOLVE)
4326-#define VPC_VG11SETCOLOR (VPG_VG11 + VG11_SETCOLOR)
4327-#define VPC_VG11SETF (VPG_VG11 + VG11_SETF)
4328-#define VPC_VG11SETFV (VPG_VG11 + VG11_SETFV)
4329-#define VPC_VG11SETGLYPHTOIMAGE (VPG_VG11 + VG11_SETGLYPHTOIMAGE)
4330-#define VPC_VG11SETGLYPHTOPATH (VPG_VG11 + VG11_SETGLYPHTOPATH)
4331-#define VPC_VG11SETI (VPG_VG11 + VG11_SETI)
4332-#define VPC_VG11SETIV (VPG_VG11 + VG11_SETIV)
4333-#define VPC_VG11SETPAINT (VPG_VG11 + VG11_SETPAINT)
4334-#define VPC_VG11SETPARAMETERF (VPG_VG11 + VG11_SETPARAMETERF)
4335-#define VPC_VG11SETPARAMETERFV (VPG_VG11 + VG11_SETPARAMETERFV)
4336-#define VPC_VG11SETPARAMETERI (VPG_VG11 + VG11_SETPARAMETERI)
4337-#define VPC_VG11SETPARAMETERIV (VPG_VG11 + VG11_SETPARAMETERIV)
4338-#define VPC_VG11SETPIXELS (VPG_VG11 + VG11_SETPIXELS)
4339-#define VPC_VG11SHEAR (VPG_VG11 + VG11_SHEAR)
4340-#define VPC_VG11TRANSFORMPATH (VPG_VG11 + VG11_TRANSFORMPATH)
4341-#define VPC_VG11TRANSLATE (VPG_VG11 + VG11_TRANSLATE)
4342-#define VPC_VG11WRITEPIXELS (VPG_VG11 + VG11_WRITEPIXELS)
4343+#define VPC_ES20CALLS (VPG_ES20 + ES20_CALLS)
4344+#define VPC_ES20DRAWCALLS (VPG_ES20 + ES20_DRAWCALLS)
4345+#define VPC_ES20STATECHANGECALLS (VPG_ES20 + ES20_STATECHANGECALLS)
4346+#define VPC_ES20POINTCOUNT (VPG_ES20 + ES20_POINTCOUNT)
4347+#define VPC_ES20LINECOUNT (VPG_ES20 + ES20_LINECOUNT)
4348+#define VPC_ES20TRIANGLECOUNT (VPG_ES20 + ES20_TRIANGLECOUNT)
4349+
4350 /* OpenVG Statistics Counter IDs. */
4351-#define VPC_VG11CALLS (VPG_VG11 + VG11_CALLS)
4352-#define VPC_VG11DRAWCALLS (VPG_VG11 + VG11_DRAWCALLS)
4353-#define VPC_VG11STATECHANGECALLS (VPG_VG11 + VG11_STATECHANGECALLS)
4354-#define VPC_VG11FILLCOUNT (VPG_VG11 + VG11_FILLCOUNT)
4355-#define VPC_VG11STROKECOUNT (VPG_VG11 + VG11_STROKECOUNT)
4356+#define VPC_VG11CALLS (VPG_VG11 + VG11_CALLS)
4357+#define VPC_VG11DRAWCALLS (VPG_VG11 + VG11_DRAWCALLS)
4358+#define VPC_VG11STATECHANGECALLS (VPG_VG11 + VG11_STATECHANGECALLS)
4359+#define VPC_VG11FILLCOUNT (VPG_VG11 + VG11_FILLCOUNT)
4360+#define VPC_VG11STROKECOUNT (VPG_VG11 + VG11_STROKECOUNT)
4361
4362 /* HAL Counters. */
4363 #define VPC_HALVERTBUFNEWBYTEALLOC (VPG_HAL + HAL_VERTBUFNEWBYTEALLOC)
4364@@ -1018,7 +248,7 @@ extern "C" {
4365 #define VPC_GPUREAD64BYTE (VPG_GPU + GPU_READ64BYTE)
4366 #define VPC_GPUWRITE64BYTE (VPG_GPU + GPU_WRITE64BYTE)
4367 #define VPC_GPUTOTALCYCLES (VPG_GPU + GPU_TOTALCYCLES)
4368-#define VPC_GPUIDLECYCLES (VPG_GPU + GPU_IDLECYCLES)
4369+#define VPC_GPUIDLECYCLES (VPG_GPU + GPU_IDLECYCLES)
4370
4371 /* HW: Shader Counters. */
4372 #define VPC_VSINSTCOUNT (VPG_VS + VS_INSTCOUNT)
4373@@ -1026,9 +256,9 @@ extern "C" {
4374 #define VPC_VSTEXLDINSTCOUNT (VPG_VS + VS_TEXLDINSTCOUNT)
4375 #define VPC_VSRENDEREDVERTCOUNT (VPG_VS + VS_RENDEREDVERTCOUNT)
4376 /* HW: PS Count. */
4377-#define VPC_PSINSTCOUNT (VPG_PS + PS_INSTCOUNT)
4378-#define VPC_PSBRANCHINSTCOUNT (VPG_PS + PS_BRANCHINSTCOUNT)
4379-#define VPC_PSTEXLDINSTCOUNT (VPG_PS + PS_TEXLDINSTCOUNT)
4380+#define VPC_PSINSTCOUNT (VPG_PS + PS_INSTCOUNT)
4381+#define VPC_PSBRANCHINSTCOUNT (VPG_PS + PS_BRANCHINSTCOUNT)
4382+#define VPC_PSTEXLDINSTCOUNT (VPG_PS + PS_TEXLDINSTCOUNT)
4383 #define VPC_PSRENDEREDPIXCOUNT (VPG_PS + PS_RENDEREDPIXCOUNT)
4384
4385
4386@@ -1071,7 +301,7 @@ extern "C" {
4387 #define VPC_PEDRAWNBYDEPTH (VPG_PE + PE_DRAWNBYDEPTH)
4388
4389 /* HW: MC Counters. */
4390-#define VPC_MCREADREQ8BPIPE (VPG_MC + MC_READREQ8BPIPE)
4391+#define VPC_MCREADREQ8BPIPE (VPG_MC + MC_READREQ8BPIPE)
4392 #define VPC_MCREADREQ8BIP (VPG_MC + MC_READREQ8BIP)
4393 #define VPC_MCWRITEREQ8BPIPE (VPG_MC + MC_WRITEREQ8BPIPE)
4394
4395@@ -1087,6 +317,7 @@ extern "C" {
4396 #define VPC_PVSATTRIBCOUNT (VPG_PVS + PVS_ATTRIBCOUNT)
4397 #define VPC_PVSUNIFORMCOUNT (VPG_PVS + PVS_UNIFORMCOUNT)
4398 #define VPC_PVSFUNCTIONCOUNT (VPG_PVS + PVS_FUNCTIONCOUNT)
4399+#define VPC_PVSSOURCE (VPG_PVS + PVS_SOURCE)
4400
4401 #define VPC_PPSINSTRCOUNT (VPG_PPS + PPS_INSTRCOUNT)
4402 #define VPC_PPSALUINSTRCOUNT (VPG_PPS + PPS_ALUINSTRCOUNT)
4403@@ -1094,7 +325,9 @@ extern "C" {
4404 #define VPC_PPSATTRIBCOUNT (VPG_PPS + PPS_ATTRIBCOUNT)
4405 #define VPC_PPSUNIFORMCOUNT (VPG_PPS + PPS_UNIFORMCOUNT)
4406 #define VPC_PPSFUNCTIONCOUNT (VPG_PPS + PPS_FUNCTIONCOUNT)
4407+#define VPC_PPSSOURCE (VPG_PPS + PPS_SOURCE)
4408
4409+#define VPC_PROGRAMHANDLE (VPG_PROG + 1)
4410
4411 #define VPG_ES20_DRAW_NO (VPG_ES20_DRAW + 1)
4412 #define VPG_ES11_DRAW_NO (VPG_ES11_DRAW + 1)
4413@@ -1118,8 +351,8 @@ typedef struct _gcsPROFILER_COUNTERS
4414
4415 /* HW vairable counters. */
4416 gctUINT32 gpuCyclesCounter;
4417- gctUINT32 gpuTotalCyclesCounter;
4418- gctUINT32 gpuIdleCyclesCounter;
4419+ gctUINT32 gpuTotalCyclesCounter;
4420+ gctUINT32 gpuIdleCyclesCounter;
4421 gctUINT32 gpuTotalRead64BytesPerFrame;
4422 gctUINT32 gpuTotalWrite64BytesPerFrame;
4423
4424@@ -1158,7 +391,7 @@ typedef struct _gcsPROFILER_COUNTERS
4425 gctUINT32 ra_total_primitive_count;
4426 gctUINT32 ra_pipe_cache_miss_counter;
4427 gctUINT32 ra_prefetch_cache_miss_counter;
4428- gctUINT32 ra_eez_culled_counter;
4429+ gctUINT32 ra_eez_culled_counter;
4430
4431 /* TX */
4432 gctUINT32 tx_total_bilinear_requests;
4433@@ -1190,7 +423,7 @@ typedef struct _gcsPROFILER
4434 gctBOOL enableHal;
4435 gctBOOL enableHW;
4436 gctBOOL enableSH;
4437- gctBOOL isSyncMode;
4438+ gctBOOL isSyncMode;
4439
4440 gctBOOL useSocket;
4441 gctINT sockFd;
4442@@ -1234,14 +467,17 @@ typedef struct _gcsPROFILER
4443 gctUINT32 redundantStateChangeCalls;
4444 #endif
4445
4446- gctUINT32 prevVSInstCount;
4447- gctUINT32 prevVSBranchInstCount;
4448- gctUINT32 prevVSTexInstCount;
4449- gctUINT32 prevVSVertexCount;
4450- gctUINT32 prevPSInstCount;
4451- gctUINT32 prevPSBranchInstCount;
4452- gctUINT32 prevPSTexInstCount;
4453- gctUINT32 prevPSPixelCount;
4454+ gctUINT32 prevVSInstCount;
4455+ gctUINT32 prevVSBranchInstCount;
4456+ gctUINT32 prevVSTexInstCount;
4457+ gctUINT32 prevVSVertexCount;
4458+ gctUINT32 prevPSInstCount;
4459+ gctUINT32 prevPSBranchInstCount;
4460+ gctUINT32 prevPSTexInstCount;
4461+ gctUINT32 prevPSPixelCount;
4462+
4463+ char* psSource;
4464+ char* vsSource;
4465
4466 }
4467 gcsPROFILER;
4468@@ -1315,6 +551,18 @@ gcoPROFILER_Count(
4469 IN gctINT Value
4470 );
4471
4472+gceSTATUS
4473+gcoPROFILER_ShaderSourceFS(
4474+ IN gcoHAL Hal,
4475+ IN char* source
4476+ );
4477+
4478+gceSTATUS
4479+gcoPROFILER_ShaderSourceVS(
4480+ IN gcoHAL Hal,
4481+ IN char* source
4482+ );
4483+
4484 /* Profile input vertex shader. */
4485 gceSTATUS
4486 gcoPROFILER_ShaderVS(
4487diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h
4488index bc4171e..6e4d830 100644
4489--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h
4490+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_raster.h
4491@@ -568,6 +568,23 @@ gco2D_MonoBlit(
4492 IN gceSURF_FORMAT DestFormat
4493 );
4494
4495+gceSTATUS
4496+gco2D_MonoBlitEx(
4497+ IN gco2D Engine,
4498+ IN gctPOINTER StreamBits,
4499+ IN gctINT32 StreamStride,
4500+ IN gctINT32 StreamWidth,
4501+ IN gctINT32 StreamHeight,
4502+ IN gctINT32 StreamX,
4503+ IN gctINT32 StreamY,
4504+ IN gctUINT32 FgColor,
4505+ IN gctUINT32 BgColor,
4506+ IN gcsRECT_PTR SrcRect,
4507+ IN gcsRECT_PTR DstRect,
4508+ IN gctUINT8 FgRop,
4509+ IN gctUINT8 BgRop
4510+ );
4511+
4512 /* Set kernel size. */
4513 gceSTATUS
4514 gco2D_SetKernelSize(
4515@@ -942,6 +959,15 @@ gco2D_SetSourceTileStatus(
4516 );
4517
4518 gceSTATUS
4519+gco2D_SetTargetTileStatus(
4520+ IN gco2D Engine,
4521+ IN gce2D_TILE_STATUS_CONFIG TileStatusConfig,
4522+ IN gceSURF_FORMAT CompressedFormat,
4523+ IN gctUINT32 ClearValue,
4524+ IN gctUINT32 GpuAddress
4525+ );
4526+
4527+gceSTATUS
4528 gco2D_QueryU32(
4529 IN gco2D Engine,
4530 IN gce2D_QUERY Item,
4531@@ -955,6 +981,28 @@ gco2D_SetStateU32(
4532 IN gctUINT32 Value
4533 );
4534
4535+gceSTATUS
4536+gco2D_SetStateArrayI32(
4537+ IN gco2D Engine,
4538+ IN gce2D_STATE State,
4539+ IN gctINT32_PTR Array,
4540+ IN gctINT32 ArraySize
4541+ );
4542+
4543+gceSTATUS
4544+gco2D_SetStateArrayU32(
4545+ IN gco2D Engine,
4546+ IN gce2D_STATE State,
4547+ IN gctUINT32_PTR Array,
4548+ IN gctINT32 ArraySize
4549+ );
4550+
4551+gceSTATUS
4552+gco2D_SetTargetRect(
4553+ IN gco2D Engine,
4554+ IN gcsRECT_PTR Rect
4555+ );
4556+
4557 #ifdef __cplusplus
4558 }
4559 #endif
4560diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h
4561index 5c0877d..14801aa 100644
4562--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h
4563+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_types.h
4564@@ -128,6 +128,7 @@ typedef int gctBOOL;
4565 typedef gctBOOL * gctBOOL_PTR;
4566
4567 typedef int gctINT;
4568+typedef long gctLONG;
4569 typedef signed char gctINT8;
4570 typedef signed short gctINT16;
4571 typedef signed int gctINT32;
4572@@ -171,6 +172,7 @@ typedef void * gctFILE;
4573 typedef void * gctSIGNAL;
4574 typedef void * gctWINDOW;
4575 typedef void * gctIMAGE;
4576+typedef void * gctSYNC_POINT;
4577
4578 typedef void * gctSEMAPHORE;
4579
4580@@ -941,12 +943,19 @@ typedef struct _gcsHAL_FRAME_INFO
4581 OUT gctUINT readRequests[8];
4582 OUT gctUINT writeRequests[8];
4583
4584+ /* FE counters. */
4585+ OUT gctUINT drawCount;
4586+ OUT gctUINT vertexOutCount;
4587+ OUT gctUINT vertexMissCount;
4588+
4589 /* 3D counters. */
4590 OUT gctUINT vertexCount;
4591 OUT gctUINT primitiveCount;
4592 OUT gctUINT rejectedPrimitives;
4593 OUT gctUINT culledPrimitives;
4594 OUT gctUINT clippedPrimitives;
4595+ OUT gctUINT droppedPrimitives;
4596+ OUT gctUINT frustumClippedPrimitives;
4597 OUT gctUINT outPrimitives;
4598 OUT gctUINT inPrimitives;
4599 OUT gctUINT culledQuadCount;
4600@@ -964,18 +973,86 @@ typedef struct _gcsHAL_FRAME_INFO
4601 OUT gctUINT shaderCycles;
4602 OUT gctUINT vsInstructionCount;
4603 OUT gctUINT vsTextureCount;
4604+ OUT gctUINT vsBranchCount;
4605+ OUT gctUINT vsVertices;
4606 OUT gctUINT psInstructionCount;
4607 OUT gctUINT psTextureCount;
4608+ OUT gctUINT psBranchCount;
4609+ OUT gctUINT psPixels;
4610
4611 /* Texture counters. */
4612 OUT gctUINT bilinearRequests;
4613 OUT gctUINT trilinearRequests;
4614- OUT gctUINT txBytes8;
4615+ OUT gctUINT txBytes8[2];
4616 OUT gctUINT txHitCount;
4617 OUT gctUINT txMissCount;
4618 }
4619 gcsHAL_FRAME_INFO;
4620
4621+typedef enum _gcePATCH_ID
4622+{
4623+ gcePATCH_UNKNOWN = 0xFFFFFFFF,
4624+
4625+ /* Benchmark list*/
4626+ gcePATCH_GLB11 = 0x0,
4627+ gcePATCH_GLB21,
4628+ gcePATCH_GLB25,
4629+ gcePATCH_GLB27,
4630+
4631+ gcePATCH_BM21,
4632+ gcePATCH_MM,
4633+ gcePATCH_MM06,
4634+ gcePATCH_MM07,
4635+ gcePATCH_QUADRANT,
4636+ gcePATCH_ANTUTU,
4637+ gcePATCH_SMARTBENCH,
4638+ gcePATCH_JPCT,
4639+ gcePATCH_NENAMARK,
4640+ gcePATCH_NENAMARK2,
4641+ gcePATCH_NEOCORE,
4642+ gcePATCH_GLB,
4643+ gcePATCH_GB,
4644+ gcePATCH_RTESTVA,
4645+ gcePATCH_BMX,
4646+ gcePATCH_BMGUI,
4647+
4648+ /* Game list */
4649+ gcePATCH_NBA2013,
4650+ gcePATCH_BARDTALE,
4651+ gcePATCH_BUSPARKING3D,
4652+ gcePATCH_FISHBOODLE,
4653+ gcePATCH_SUBWAYSURFER,
4654+ gcePATCH_HIGHWAYDRIVER,
4655+ gcePATCH_PREMIUM,
4656+ gcePATCH_RACEILLEGAL,
4657+ gcePATCH_BLABLA,
4658+ gcePATCH_MEGARUN,
4659+ gcePATCH_GALAXYONFIRE2,
4660+ gcePATCH_GLOFTR3HM,
4661+ gcePATCH_GLOFTSXHM,
4662+ gcePATCH_GLOFTF3HM,
4663+ gcePATCH_GLOFTGANG,
4664+ gcePATCH_XRUNNER,
4665+ gcePATCH_WP,
4666+ gcePATCH_DEVIL,
4667+ gcePATCH_HOLYARCH,
4668+ gcePATCH_MUSE,
4669+ gcePATCH_SG,
4670+ gcePATCH_SIEGECRAFT,
4671+ gcePATCH_CARCHALLENGE,
4672+ gcePATCH_HEROESCALL,
4673+ gcePATCH_MONOPOLY,
4674+ gcePATCH_CTGL20,
4675+ gcePATCH_FIREFOX,
4676+ gcePATCH_CHORME,
4677+ gcePATCH_DUOKANTV,
4678+ gcePATCH_TESTAPP,
4679+
4680+ /* Count enum*/
4681+ gcePATCH_COUNT,
4682+}
4683+gcePATCH_ID;
4684+
4685 #if gcdLINK_QUEUE_SIZE
4686 typedef struct _gckLINKDATA * gckLINKDATA;
4687 struct _gckLINKDATA
4688diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h
4689index 03cb4d6..2eab666 100644
4690--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h
4691+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h
4692@@ -28,7 +28,7 @@
4693
4694 #define gcvVERSION_PATCH 9
4695
4696-#define gcvVERSION_BUILD 6622
4697+#define gcvVERSION_BUILD 9754
4698
4699 #define gcvVERSION_DATE __DATE__
4700
4701diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c
4702index 4d48bd5..b029428 100644
4703--- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c
4704+++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c
4705@@ -25,7 +25,9 @@
4706 #include <linux/mm.h>
4707 #include <linux/mman.h>
4708 #include <linux/slab.h>
4709+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
4710 #include <mach/hardware.h>
4711+#endif
4712 #include <linux/pm_runtime.h>
4713
4714 #define _GC_OBJ_ZONE gcvZONE_DEVICE
4715@@ -305,6 +307,7 @@ gckGALDEVICE_Construct(
4716 IN gctUINT LogFileSize,
4717 IN struct device *pdev,
4718 IN gctINT PowerManagement,
4719+ IN gctINT GpuProfiler,
4720 OUT gckGALDEVICE *Device
4721 )
4722 {
4723@@ -369,6 +372,10 @@ gckGALDEVICE_Construct(
4724 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
4725 /*get gpu regulator*/
4726 device->gpu_regulator = regulator_get(pdev, "cpu_vddgpu");
4727+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4728+ device->gpu_regulator = regulator_get(pdev, "vddpu");
4729+#endif
4730+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4731 if (IS_ERR(device->gpu_regulator)) {
4732 gcmkTRACE_ZONE(gcvLEVEL_ERROR, gcvZONE_DRIVER,
4733 "%s(%d): Failed to get gpu regulator %s/%s \n",
4734@@ -541,6 +548,10 @@ gckGALDEVICE_Construct(
4735 device->kernels[gcvCORE_MAJOR]->hardware, PowerManagement
4736 ));
4737
4738+ gcmkONERROR(gckHARDWARE_SetGpuProfiler(
4739+ device->kernels[gcvCORE_MAJOR]->hardware, GpuProfiler
4740+ ));
4741+
4742 #if COMMAND_PROCESSOR_VERSION == 1
4743 /* Start the command queue. */
4744 gcmkONERROR(gckCOMMAND_Start(device->kernels[gcvCORE_MAJOR]->command));
4745@@ -599,6 +610,7 @@ gckGALDEVICE_Construct(
4746 device->kernels[gcvCORE_2D]->hardware, PowerManagement
4747 ));
4748
4749+
4750 #if COMMAND_PROCESSOR_VERSION == 1
4751 /* Start the command queue. */
4752 gcmkONERROR(gckCOMMAND_Start(device->kernels[gcvCORE_2D]->command));
4753@@ -635,6 +647,7 @@ gckGALDEVICE_Construct(
4754 device->kernels[gcvCORE_VG]->vg->hardware,
4755 PowerManagement
4756 ));
4757+
4758 #endif
4759 }
4760 else
4761@@ -849,6 +862,7 @@ gckGALDEVICE_Construct(
4762 }
4763 else
4764 {
4765+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
4766 mem_region = request_mem_region(
4767 ContiguousBase, ContiguousSize, "galcore managed memory"
4768 );
4769@@ -864,6 +878,7 @@ gckGALDEVICE_Construct(
4770
4771 gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
4772 }
4773+#endif
4774
4775 device->requestedContiguousBase = ContiguousBase;
4776 device->requestedContiguousSize = ContiguousSize;
4777@@ -1107,7 +1122,7 @@ gckGALDEVICE_Destroy(
4778 pm_runtime_disable(Device->pmdev);
4779 #endif
4780
4781-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
4782+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4783 if (Device->gpu_regulator) {
4784 regulator_put(Device->gpu_regulator);
4785 Device->gpu_regulator = NULL;
4786diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h
4787index dde4f03..c51432f 100644
4788--- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h
4789+++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.h
4790@@ -26,6 +26,15 @@
4791 ******************************* gckGALDEVICE Structure *******************************
4792 \******************************************************************************/
4793
4794+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4795+struct contiguous_mem_pool {
4796+ struct dma_attrs attrs;
4797+ dma_addr_t phys;
4798+ void *virt;
4799+ size_t size;
4800+};
4801+#endif
4802+
4803 typedef struct _gckGALDEVICE
4804 {
4805 /* Objects. */
4806@@ -91,12 +100,16 @@ typedef struct _gckGALDEVICE
4807 struct clk *clk_2d_axi;
4808 struct clk *clk_vg_axi;
4809
4810-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
4811+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4812 /*Power management.*/
4813 struct regulator *gpu_regulator;
4814 #endif
4815 /*Run time pm*/
4816 struct device *pmdev;
4817+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4818+ struct contiguous_mem_pool *pool;
4819+ struct reset_control *rstc[gcdMAX_GPU_COUNT];
4820+#endif
4821 }
4822 * gckGALDEVICE;
4823
4824@@ -171,6 +184,7 @@ gceSTATUS gckGALDEVICE_Construct(
4825 IN gctUINT LogFileSize,
4826 IN struct device *pdev,
4827 IN gctINT PowerManagement,
4828+ IN gctINT GpuProfiler,
4829 OUT gckGALDEVICE *Device
4830 );
4831
4832diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c
4833index bacd531..88a7e4e6 100644
4834--- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c
4835+++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c
4836@@ -1,7 +1,7 @@
4837 /****************************************************************************
4838 *
4839 * Copyright (C) 2005 - 2013 by Vivante Corp.
4840-* Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
4841+* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
4842 *
4843 * This program is free software; you can redistribute it and/or modify
4844 * it under the terms of the GNU General Public License as published by
4845@@ -69,14 +69,26 @@ task_notify_func(struct notifier_block *self, unsigned long val, void *data)
4846 #include <mach/viv_gpu.h>
4847 #else
4848 #include <linux/pm_runtime.h>
4849+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
4850 #include <mach/busfreq.h>
4851+#else
4852+#include <linux/reset.h>
4853+#endif
4854 #endif
4855 /* Zone used for header/footer. */
4856 #define _GC_OBJ_ZONE gcvZONE_DRIVER
4857
4858 #if gcdENABLE_FSCALE_VAL_ADJUST
4859+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4860+#include <linux/device_cooling.h>
4861+#define REG_THERMAL_NOTIFIER(a) register_devfreq_cooling_notifier(a);
4862+#define UNREG_THERMAL_NOTIFIER(a) unregister_devfreq_cooling_notifier(a);
4863+#else
4864 extern int register_thermal_notifier(struct notifier_block *nb);
4865 extern int unregister_thermal_notifier(struct notifier_block *nb);
4866+#define REG_THERMAL_NOTIFIER(a) register_thermal_notifier(a);
4867+#define UNREG_THERMAL_NOTIFIER(a) unregister_thermal_notifier(a);
4868+#endif
4869 #endif
4870
4871 MODULE_DESCRIPTION("Vivante Graphics Driver");
4872@@ -116,7 +128,11 @@ module_param(registerMemBaseVG, ulong, 0644);
4873 static ulong registerMemSizeVG = 2 << 10;
4874 module_param(registerMemSizeVG, ulong, 0644);
4875
4876+#if gcdENABLE_FSCALE_VAL_ADJUST
4877+static ulong contiguousSize = 128 << 20;
4878+#else
4879 static ulong contiguousSize = 4 << 20;
4880+#endif
4881 module_param(contiguousSize, ulong, 0644);
4882
4883 static ulong contiguousBase = 0;
4884@@ -134,6 +150,9 @@ module_param(compression, int, 0644);
4885 static int powerManagement = 1;
4886 module_param(powerManagement, int, 0644);
4887
4888+static int gpuProfiler = 0;
4889+module_param(gpuProfiler, int, 0644);
4890+
4891 static int signal = 48;
4892 module_param(signal, int, 0644);
4893
4894@@ -786,7 +805,9 @@ static int drv_init(struct device *pdev)
4895
4896 printk(KERN_INFO "Galcore version %d.%d.%d.%d\n",
4897 gcvVERSION_MAJOR, gcvVERSION_MINOR, gcvVERSION_PATCH, gcvVERSION_BUILD);
4898-
4899+ /* when enable gpu profiler, we need to turn off gpu powerMangement */
4900+ if(gpuProfiler)
4901+ powerManagement = 0;
4902 if (showArgs)
4903 {
4904 printk("galcore options:\n");
4905@@ -818,6 +839,7 @@ static int drv_init(struct device *pdev)
4906 printk(" physSize = 0x%08lX\n", physSize);
4907 printk(" logFileSize = %d KB \n", logFileSize);
4908 printk(" powerManagement = %d\n", powerManagement);
4909+ printk(" gpuProfiler = %d\n", gpuProfiler);
4910 #if ENABLE_GPU_CLOCK_BY_DRIVER
4911 printk(" coreClock = %lu\n", coreClock);
4912 #endif
4913@@ -841,9 +863,14 @@ static int drv_init(struct device *pdev)
4914 logFileSize,
4915 pdev,
4916 powerManagement,
4917+ gpuProfiler,
4918 &device
4919 ));
4920
4921+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4922+ device->pool = dev_get_drvdata(pdev);
4923+#endif
4924+
4925 /* Start the GAL device. */
4926 gcmkONERROR(gckGALDEVICE_Start(device));
4927
4928@@ -1028,11 +1055,18 @@ static struct notifier_block thermal_hot_pm_notifier = {
4929
4930
4931
4932+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)
4933+static int gpu_probe(struct platform_device *pdev)
4934+#else
4935 static int __devinit gpu_probe(struct platform_device *pdev)
4936+#endif
4937 {
4938 int ret = -ENODEV;
4939 struct resource* res;
4940-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
4941+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4942+ struct contiguous_mem_pool *pool;
4943+ struct reset_control *rstc;
4944+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
4945 struct device_node *dn =pdev->dev.of_node;
4946 const u32 *prop;
4947 #else
4948@@ -1077,7 +1111,22 @@ static int __devinit gpu_probe(struct platform_device *pdev)
4949 registerMemSizeVG = res->end - res->start + 1;
4950 }
4951
4952-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
4953+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4954+ pool = devm_kzalloc(&pdev->dev, sizeof(*pool), GFP_KERNEL);
4955+ if (!pool)
4956+ return -ENOMEM;
4957+ pool->size = contiguousSize;
4958+ init_dma_attrs(&pool->attrs);
4959+ dma_set_attr(DMA_ATTR_WRITE_COMBINE, &pool->attrs);
4960+ pool->virt = dma_alloc_attrs(&pdev->dev, pool->size, &pool->phys,
4961+ GFP_KERNEL, &pool->attrs);
4962+ if (!pool->virt) {
4963+ dev_err(&pdev->dev, "Failed to allocate contiguous memory\n");
4964+ return -ENOMEM;
4965+ }
4966+ contiguousBase = pool->phys;
4967+ dev_set_drvdata(&pdev->dev, pool);
4968+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
4969 prop = of_get_property(dn, "contiguousbase", NULL);
4970 if(prop)
4971 contiguousBase = *prop;
4972@@ -1095,30 +1144,56 @@ static int __devinit gpu_probe(struct platform_device *pdev)
4973
4974 if (!ret)
4975 {
4976+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
4977+ rstc = devm_reset_control_get(&pdev->dev, "gpu3d");
4978+ galDevice->rstc[gcvCORE_MAJOR] = IS_ERR(rstc) ? NULL : rstc;
4979+
4980+ rstc = devm_reset_control_get(&pdev->dev, "gpu2d");
4981+ galDevice->rstc[gcvCORE_2D] = IS_ERR(rstc) ? NULL : rstc;
4982+
4983+ rstc = devm_reset_control_get(&pdev->dev, "gpuvg");
4984+ galDevice->rstc[gcvCORE_VG] = IS_ERR(rstc) ? NULL : rstc;
4985+#endif
4986 platform_set_drvdata(pdev, galDevice);
4987
4988 #if gcdENABLE_FSCALE_VAL_ADJUST
4989- if(galDevice->kernels[gcvCORE_MAJOR])
4990- register_thermal_notifier(&thermal_hot_pm_notifier);
4991+ if (galDevice->kernels[gcvCORE_MAJOR])
4992+ REG_THERMAL_NOTIFIER(&thermal_hot_pm_notifier);
4993 #endif
4994 gcmkFOOTER_NO();
4995 return ret;
4996 }
4997 #if gcdENABLE_FSCALE_VAL_ADJUST
4998- unregister_thermal_notifier(&thermal_hot_pm_notifier);
4999+ UNREG_THERMAL_NOTIFIER(&thermal_hot_pm_notifier);
5000+#endif
5001+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
5002+ dma_free_attrs(&pdev->dev, pool->size, pool->virt, pool->phys,
5003+ &pool->attrs);
5004 #endif
5005 gcmkFOOTER_ARG(KERN_INFO "Failed to register gpu driver: %d\n", ret);
5006 return ret;
5007 }
5008
5009+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)
5010+static int gpu_remove(struct platform_device *pdev)
5011+#else
5012 static int __devexit gpu_remove(struct platform_device *pdev)
5013+#endif
5014 {
5015+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
5016+ gckGALDEVICE device = platform_get_drvdata(pdev);
5017+ struct contiguous_mem_pool *pool = device->pool;
5018+#endif
5019 gcmkHEADER();
5020 #if gcdENABLE_FSCALE_VAL_ADJUST
5021 if(galDevice->kernels[gcvCORE_MAJOR])
5022- unregister_thermal_notifier(&thermal_hot_pm_notifier);
5023+ UNREG_THERMAL_NOTIFIER(&thermal_hot_pm_notifier);
5024 #endif
5025 drv_exit();
5026+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
5027+ dma_free_attrs(&pdev->dev, pool->size, pool->virt, pool->phys,
5028+ &pool->attrs);
5029+#endif
5030 gcmkFOOTER_NO();
5031 return 0;
5032 }
5033@@ -1254,13 +1329,17 @@ MODULE_DEVICE_TABLE(of, mxs_gpu_dt_ids);
5034 #ifdef CONFIG_PM
5035 static int gpu_runtime_suspend(struct device *dev)
5036 {
5037+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
5038 release_bus_freq(BUS_FREQ_HIGH);
5039+#endif
5040 return 0;
5041 }
5042
5043 static int gpu_runtime_resume(struct device *dev)
5044 {
5045+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
5046 request_bus_freq(BUS_FREQ_HIGH);
5047+#endif
5048 return 0;
5049 }
5050
5051@@ -1284,7 +1363,11 @@ static const struct dev_pm_ops gpu_pm_ops = {
5052
5053 static struct platform_driver gpu_driver = {
5054 .probe = gpu_probe,
5055+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)
5056+ .remove = gpu_remove,
5057+#else
5058 .remove = __devexit_p(gpu_remove),
5059+#endif
5060
5061 .suspend = gpu_suspend,
5062 .resume = gpu_resume,
5063diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
5064index e7edc39..331c73f 100644
5065--- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
5066+++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
5067@@ -30,19 +30,30 @@
5068 #include <linux/dma-mapping.h>
5069 #include <linux/slab.h>
5070 #include <linux/idr.h>
5071+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
5072 #include <mach/hardware.h>
5073+#endif
5074 #include <linux/workqueue.h>
5075 #include <linux/idr.h>
5076 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,23)
5077 #include <linux/math64.h>
5078 #endif
5079-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
5080+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
5081+#include <linux/reset.h>
5082+static inline void imx_gpc_power_up_pu(bool flag) {}
5083+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
5084 #include <mach/common.h>
5085 #endif
5086 #include <linux/delay.h>
5087 #include <linux/pm_runtime.h>
5088
5089
5090+#if gcdANDROID_NATIVE_FENCE_SYNC
5091+#include <linux/file.h>
5092+#include "gc_hal_kernel_sync.h"
5093+#endif
5094+
5095+
5096 #define _GC_OBJ_ZONE gcvZONE_OS
5097
5098 /*******************************************************************************
5099@@ -148,6 +159,7 @@ typedef struct _gcsINTEGER_DB
5100 {
5101 struct idr idr;
5102 spinlock_t lock;
5103+ gctINT curr;
5104 }
5105 gcsINTEGER_DB;
5106
5107@@ -180,6 +192,14 @@ struct _gckOS
5108 /* signal id database. */
5109 gcsINTEGER_DB signalDB;
5110
5111+#if gcdANDROID_NATIVE_FENCE_SYNC
5112+ /* Lock. */
5113+ gctPOINTER syncPointMutex;
5114+
5115+ /* sync point id database. */
5116+ gcsINTEGER_DB syncPointDB;
5117+#endif
5118+
5119 gcsUSER_MAPPING_PTR userMap;
5120 gctPOINTER debugLock;
5121
5122@@ -215,6 +235,25 @@ typedef struct _gcsSIGNAL
5123 }
5124 gcsSIGNAL;
5125
5126+#if gcdANDROID_NATIVE_FENCE_SYNC
5127+typedef struct _gcsSYNC_POINT * gcsSYNC_POINT_PTR;
5128+typedef struct _gcsSYNC_POINT
5129+{
5130+ /* The reference counter. */
5131+ atomic_t ref;
5132+
5133+ /* State. */
5134+ atomic_t state;
5135+
5136+ /* timeline. */
5137+ struct sync_timeline * timeline;
5138+
5139+ /* ID. */
5140+ gctUINT32 id;
5141+}
5142+gcsSYNC_POINT;
5143+#endif
5144+
5145 typedef struct _gcsPageInfo * gcsPageInfo_PTR;
5146 typedef struct _gcsPageInfo
5147 {
5148@@ -767,7 +806,32 @@ _AllocateIntegerId(
5149 )
5150 {
5151 int result;
5152+ gctINT next;
5153+
5154+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)
5155+ idr_preload(GFP_KERNEL | gcdNOWARN);
5156
5157+ spin_lock(&Database->lock);
5158+
5159+ next = (Database->curr + 1 <= 0) ? 1 : Database->curr + 1;
5160+ result = idr_alloc(&Database->idr, KernelPointer, next, 0, GFP_ATOMIC);
5161+
5162+ if (!result)
5163+ {
5164+ Database->curr = *Id;
5165+ }
5166+
5167+ spin_unlock(&Database->lock);
5168+
5169+ idr_preload_end();
5170+
5171+ if (result < 0)
5172+ {
5173+ return gcvSTATUS_OUT_OF_RESOURCES;
5174+ }
5175+
5176+ *Id = result;
5177+#else
5178 again:
5179 if (idr_pre_get(&Database->idr, GFP_KERNEL | gcdNOWARN) == 0)
5180 {
5181@@ -776,8 +840,15 @@ again:
5182
5183 spin_lock(&Database->lock);
5184
5185- /* Try to get a id greater than 0. */
5186- result = idr_get_new_above(&Database->idr, KernelPointer, 1, Id);
5187+ next = (Database->curr + 1 <= 0) ? 1 : Database->curr + 1;
5188+
5189+ /* Try to get a id greater than current id. */
5190+ result = idr_get_new_above(&Database->idr, KernelPointer, next, Id);
5191+
5192+ if (!result)
5193+ {
5194+ Database->curr = *Id;
5195+ }
5196
5197 spin_unlock(&Database->lock);
5198
5199@@ -790,6 +861,7 @@ again:
5200 {
5201 return gcvSTATUS_OUT_OF_RESOURCES;
5202 }
5203+#endif
5204
5205 return gcvSTATUS_OK;
5206 }
5207@@ -1008,6 +1080,21 @@ gckOS_Construct(
5208 /* Initialize signal id database. */
5209 idr_init(&os->signalDB.idr);
5210
5211+#if gcdANDROID_NATIVE_FENCE_SYNC
5212+ /*
5213+ * Initialize the sync point manager.
5214+ */
5215+
5216+ /* Initialize mutex. */
5217+ gcmkONERROR(gckOS_CreateMutex(os, &os->syncPointMutex));
5218+
5219+ /* Initialize sync point id database lock. */
5220+ spin_lock_init(&os->syncPointDB.lock);
5221+
5222+ /* Initialize sync point id database. */
5223+ idr_init(&os->syncPointDB.idr);
5224+#endif
5225+
5226 #if gcdUSE_NON_PAGED_MEMORY_CACHE
5227 os->cacheSize = 0;
5228 os->cacheHead = gcvNULL;
5229@@ -1031,6 +1118,15 @@ gckOS_Construct(
5230 return gcvSTATUS_OK;
5231
5232 OnError:
5233+
5234+#if gcdANDROID_NATIVE_FENCE_SYNC
5235+ if (os->syncPointMutex != gcvNULL)
5236+ {
5237+ gcmkVERIFY_OK(
5238+ gckOS_DeleteMutex(os, os->syncPointMutex));
5239+ }
5240+#endif
5241+
5242 if (os->signalMutex != gcvNULL)
5243 {
5244 gcmkVERIFY_OK(
5245@@ -1104,6 +1200,15 @@ gckOS_Destroy(
5246 _FreeAllNonPagedMemoryCache(Os);
5247 #endif
5248
5249+#if gcdANDROID_NATIVE_FENCE_SYNC
5250+ /*
5251+ * Destroy the sync point manager.
5252+ */
5253+
5254+ /* Destroy the mutex. */
5255+ gcmkVERIFY_OK(gckOS_DeleteMutex(Os, Os->syncPointMutex));
5256+#endif
5257+
5258 /*
5259 * Destroy the signal manager.
5260 */
5261@@ -1961,12 +2066,6 @@ gckOS_AllocateNonPagedMemory(
5262 gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
5263 }
5264
5265- if ((Os->device->baseAddress & 0x80000000) != (mdl->dmaHandle & 0x80000000))
5266- {
5267- mdl->dmaHandle = (mdl->dmaHandle & ~0x80000000)
5268- | (Os->device->baseAddress & 0x80000000);
5269- }
5270-
5271 mdl->addr = addr;
5272
5273 /* Return allocated memory. */
5274@@ -2307,6 +2406,7 @@ gckOS_ReadRegisterEx(
5275
5276 /* Verify the arguments. */
5277 gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
5278+ gcmkVERIFY_ARGUMENT(Address < Os->device->requestedRegisterMemSizes[Core]);
5279 gcmkVERIFY_ARGUMENT(Data != gcvNULL);
5280
5281 *Data = readl((gctUINT8 *)Os->device->registerBases[Core] + Address);
5282@@ -2357,6 +2457,8 @@ gckOS_WriteRegisterEx(
5283 {
5284 gcmkHEADER_ARG("Os=0x%X Core=%d Address=0x%X Data=0x%08x", Os, Core, Address, Data);
5285
5286+ gcmkVERIFY_ARGUMENT(Address < Os->device->requestedRegisterMemSizes[Core]);
5287+
5288 writel(Data, (gctUINT8 *)Os->device->registerBases[Core] + Address);
5289
5290 /* Success. */
5291@@ -2799,16 +2901,25 @@ gckOS_MapPhysical(
5292
5293 if (mdl == gcvNULL)
5294 {
5295+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
5296+ struct contiguous_mem_pool *pool = Os->device->pool;
5297+
5298+ if (Physical >= pool->phys && Physical < pool->phys + pool->size)
5299+ logical = (gctPOINTER)(Physical - pool->phys + pool->virt);
5300+ else
5301+ logical = gcvNULL;
5302+#else
5303 /* Map memory as cached memory. */
5304 request_mem_region(physical, Bytes, "MapRegion");
5305 logical = (gctPOINTER) ioremap_nocache(physical, Bytes);
5306+#endif
5307
5308 if (logical == gcvNULL)
5309 {
5310 gcmkTRACE_ZONE(
5311 gcvLEVEL_INFO, gcvZONE_OS,
5312- "%s(%d): Failed to ioremap",
5313- __FUNCTION__, __LINE__
5314+ "%s(%d): Failed to map physical address 0x%08x",
5315+ __FUNCTION__, __LINE__, Physical
5316 );
5317
5318 MEMORY_UNLOCK(Os);
5319@@ -3621,7 +3732,7 @@ gckOS_Delay(
5320 if (Delay > 0)
5321 {
5322 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28)
5323- ktime_t delay = ktime_set(0, Delay * NSEC_PER_MSEC);
5324+ ktime_t delay = ktime_set(Delay/1000, (Delay%1000) * NSEC_PER_MSEC);
5325 __set_current_state(TASK_UNINTERRUPTIBLE);
5326 schedule_hrtimeout(&delay, HRTIMER_MODE_REL);
5327 #else
5328@@ -3881,8 +3992,13 @@ gckOS_AllocatePagedMemoryEx(
5329
5330 if (Contiguous)
5331 {
5332- /* Get contiguous pages, and suppress warning (stack dump) from kernel when
5333- we run out of memory. */
5334+ gctUINT32 order = get_order(bytes);
5335+
5336+ if (order >= MAX_ORDER)
5337+ {
5338+ gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
5339+ }
5340+
5341 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)
5342 addr =
5343 alloc_pages_exact(numPages * PAGE_SIZE, GFP_KERNEL | gcdNOWARN | __GFP_NORETRY);
5344@@ -3894,12 +4010,12 @@ gckOS_AllocatePagedMemoryEx(
5345 mdl->exact = gcvTRUE;
5346 #else
5347 mdl->u.contiguousPages =
5348- alloc_pages(GFP_KERNEL | gcdNOWARN | __GFP_NORETRY, GetOrder(numPages));
5349+ alloc_pages(GFP_KERNEL | gcdNOWARN | __GFP_NORETRY, order);
5350 #endif
5351 if (mdl->u.contiguousPages == gcvNULL)
5352 {
5353 mdl->u.contiguousPages =
5354- alloc_pages(GFP_KERNEL | __GFP_HIGHMEM | gcdNOWARN, GetOrder(numPages));
5355+ alloc_pages(GFP_KERNEL | __GFP_HIGHMEM | gcdNOWARN, order);
5356
5357 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)
5358 mdl->exact = gcvFALSE;
5359@@ -4239,13 +4355,13 @@ gckOS_LockPages(
5360 }
5361
5362 mdlMap->vma->vm_flags |= gcdVM_FLAGS;
5363-#if !gcdPAGED_MEMORY_CACHEABLE
5364+
5365 if (Cacheable == gcvFALSE)
5366 {
5367 /* Make this mapping non-cached. */
5368 mdlMap->vma->vm_page_prot = gcmkPAGED_MEMROY_PROT(mdlMap->vma->vm_page_prot);
5369 }
5370-#endif
5371+
5372 addr = mdl->addr;
5373
5374 /* Now map all the vmalloc pages to this user address. */
5375@@ -5336,6 +5452,7 @@ OnError:
5376 {
5377 /* Get the user pages. */
5378 down_read(&current->mm->mmap_sem);
5379+
5380 result = get_user_pages(current,
5381 current->mm,
5382 memory & PAGE_MASK,
5383@@ -5345,105 +5462,127 @@ OnError:
5384 pages,
5385 gcvNULL
5386 );
5387+
5388 up_read(&current->mm->mmap_sem);
5389
5390 if (result <=0 || result < pageCount)
5391 {
5392 struct vm_area_struct *vma;
5393
5394- /* Free the page table. */
5395- if (pages != gcvNULL)
5396+ /* Release the pages if any. */
5397+ if (result > 0)
5398 {
5399- /* Release the pages if any. */
5400- if (result > 0)
5401+ for (i = 0; i < result; i++)
5402 {
5403- for (i = 0; i < result; i++)
5404+ if (pages[i] == gcvNULL)
5405 {
5406- if (pages[i] == gcvNULL)
5407- {
5408- break;
5409- }
5410-
5411- page_cache_release(pages[i]);
5412+ break;
5413 }
5414+
5415+ page_cache_release(pages[i]);
5416+ pages[i] = gcvNULL;
5417 }
5418
5419- kfree(pages);
5420- pages = gcvNULL;
5421+ result = 0;
5422 }
5423
5424 vma = find_vma(current->mm, memory);
5425
5426- if (vma && (vma->vm_flags & VM_PFNMAP) )
5427+ if (vma && (vma->vm_flags & VM_PFNMAP))
5428 {
5429 pte_t * pte;
5430 spinlock_t * ptl;
5431- unsigned long pfn;
5432+ gctUINTPTR_T logical = memory;
5433
5434- pgd_t * pgd = pgd_offset(current->mm, memory);
5435- pud_t * pud = pud_offset(pgd, memory);
5436- if (pud)
5437+ for (i = 0; i < pageCount; i++)
5438 {
5439- pmd_t * pmd = pmd_offset(pud, memory);
5440- pte = pte_offset_map_lock(current->mm, pmd, memory, &ptl);
5441- if (!pte)
5442+ pgd_t * pgd = pgd_offset(current->mm, logical);
5443+ pud_t * pud = pud_offset(pgd, logical);
5444+
5445+ if (pud)
5446+ {
5447+ pmd_t * pmd = pmd_offset(pud, logical);
5448+ pte = pte_offset_map_lock(current->mm, pmd, logical, &ptl);
5449+ if (!pte)
5450+ {
5451+ gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
5452+ }
5453+ }
5454+ else
5455 {
5456 gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
5457 }
5458+
5459+ pages[i] = pte_page(*pte);
5460+ pte_unmap_unlock(pte, ptl);
5461+
5462+ /* Advance to next. */
5463+ logical += PAGE_SIZE;
5464 }
5465- else
5466+ }
5467+ else
5468+ {
5469+ gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
5470+ }
5471+
5472+ /* Check if this memory is contiguous for old mmu. */
5473+ if (Os->device->kernels[Core]->hardware->mmuVersion == 0)
5474+ {
5475+ for (i = 1; i < pageCount; i++)
5476 {
5477- gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
5478+ if (pages[i] != nth_page(pages[0], i))
5479+ {
5480+ /* Non-contiguous. */
5481+ break;
5482+ }
5483 }
5484
5485- pfn = pte_pfn(*pte);
5486-
5487- physical = (pfn << PAGE_SHIFT) | (memory & ~PAGE_MASK);
5488+ if (i == pageCount)
5489+ {
5490+ /* Contiguous memory. */
5491+ physical = page_to_phys(pages[0]) | (memory & ~PAGE_MASK);
5492
5493- pte_unmap_unlock(pte, ptl);
5494+ if (!((physical - Os->device->baseAddress) & 0x80000000))
5495+ {
5496+ kfree(pages);
5497+ pages = gcvNULL;
5498
5499- if ((Os->device->kernels[Core]->hardware->mmuVersion == 0)
5500- && !((physical - Os->device->baseAddress) & 0x80000000))
5501- {
5502- info->pages = gcvNULL;
5503- info->pageTable = gcvNULL;
5504+ info->pages = gcvNULL;
5505+ info->pageTable = gcvNULL;
5506
5507- MEMORY_MAP_UNLOCK(Os);
5508+ MEMORY_MAP_UNLOCK(Os);
5509
5510- *Address = physical - Os->device->baseAddress;
5511- *Info = info;
5512+ *Address = physical - Os->device->baseAddress;
5513+ *Info = info;
5514
5515- gcmkFOOTER_ARG("*Info=0x%X *Address=0x%08x",
5516- *Info, *Address);
5517+ gcmkFOOTER_ARG("*Info=0x%X *Address=0x%08x",
5518+ *Info, *Address);
5519
5520- return gcvSTATUS_OK;
5521+ return gcvSTATUS_OK;
5522+ }
5523 }
5524 }
5525- else
5526+
5527+ /* Reference pages. */
5528+ for (i = 0; i < pageCount; i++)
5529 {
5530- gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
5531+ get_page(pages[i]);
5532 }
5533 }
5534 }
5535
5536- if (pages)
5537- {
5538- for (i = 0; i < pageCount; i++)
5539- {
5540- /* Flush(clean) the data cache. */
5541- gcmkONERROR(gckOS_CacheFlush(Os, _GetProcessID(), gcvNULL,
5542- (gctPOINTER)(gctUINTPTR_T)page_to_phys(pages[i]),
5543- (gctPOINTER)(memory & PAGE_MASK) + i*PAGE_SIZE,
5544- PAGE_SIZE));
5545- }
5546- }
5547- else
5548+ for (i = 0; i < pageCount; i++)
5549 {
5550+#ifdef CONFIG_ARM
5551+ gctUINT32 data;
5552+ get_user(data, (gctUINT32*)((memory & PAGE_MASK) + i * PAGE_SIZE));
5553+#endif
5554+
5555 /* Flush(clean) the data cache. */
5556 gcmkONERROR(gckOS_CacheFlush(Os, _GetProcessID(), gcvNULL,
5557- (gctPOINTER)(gctUINTPTR_T)(physical & PAGE_MASK),
5558- (gctPOINTER)(memory & PAGE_MASK),
5559- PAGE_SIZE * pageCount));
5560+ (gctPOINTER)(gctUINTPTR_T)page_to_phys(pages[i]),
5561+ (gctPOINTER)(memory & PAGE_MASK) + i*PAGE_SIZE,
5562+ PAGE_SIZE));
5563 }
5564
5565 #if gcdENABLE_VG
5566@@ -5464,20 +5603,14 @@ OnError:
5567 (gctPOINTER *) &pageTable,
5568 &address));
5569 }
5570+
5571 /* Fill the page table. */
5572 for (i = 0; i < pageCount; i++)
5573 {
5574 gctUINT32 phys;
5575 gctUINT32_PTR tab = pageTable + i * (PAGE_SIZE/4096);
5576
5577- if (pages)
5578- {
5579- phys = page_to_phys(pages[i]);
5580- }
5581- else
5582- {
5583- phys = (physical & PAGE_MASK) + i * PAGE_SIZE;
5584- }
5585+ phys = page_to_phys(pages[i]);
5586
5587 #if gcdENABLE_VG
5588 if (Core == gcvCORE_VG)
5589@@ -6126,7 +6259,7 @@ gckOS_CacheClean(
5590 #else
5591 dma_sync_single_for_device(
5592 gcvNULL,
5593- Physical,
5594+ (dma_addr_t)Physical,
5595 Bytes,
5596 DMA_TO_DEVICE);
5597 #endif
5598@@ -6205,7 +6338,7 @@ gckOS_CacheInvalidate(
5599 #else
5600 dma_sync_single_for_device(
5601 gcvNULL,
5602- Physical,
5603+ (dma_addr_t)Physical,
5604 Bytes,
5605 DMA_FROM_DEVICE);
5606 #endif
5607@@ -6279,7 +6412,7 @@ gckOS_CacheFlush(
5608 #else
5609 dma_sync_single_for_device(
5610 gcvNULL,
5611- Physical,
5612+ (dma_addr_t)Physical,
5613 Bytes,
5614 DMA_BIDIRECTIONAL);
5615 #endif
5616@@ -6827,6 +6960,9 @@ gckOS_SetGPUPower(
5617 struct clk *clk_2dcore = Os->device->clk_2d_core;
5618 struct clk *clk_2d_axi = Os->device->clk_2d_axi;
5619 struct clk *clk_vg_axi = Os->device->clk_vg_axi;
5620+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
5621+ int ret;
5622+#endif
5623
5624 gctBOOL oldClockState = gcvFALSE;
5625 gctBOOL oldPowerState = gcvFALSE;
5626@@ -6852,9 +6988,13 @@ gckOS_SetGPUPower(
5627 }
5628 if((Power == gcvTRUE) && (oldPowerState == gcvFALSE))
5629 {
5630-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
5631- if(!IS_ERR(Os->device->gpu_regulator))
5632- regulator_enable(Os->device->gpu_regulator);
5633+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
5634+ if(!IS_ERR(Os->device->gpu_regulator)) {
5635+ ret = regulator_enable(Os->device->gpu_regulator);
5636+ if (ret != 0)
5637+ gckOS_Print("%s(%d): fail to enable pu regulator %d!\n",
5638+ __FUNCTION__, __LINE__, ret);
5639+ }
5640 #else
5641 imx_gpc_power_up_pu(true);
5642 #endif
5643@@ -6969,7 +7109,7 @@ gckOS_SetGPUPower(
5644 pm_runtime_put_sync(Os->device->pmdev);
5645 #endif
5646
5647-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
5648+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
5649 if(!IS_ERR(Os->device->gpu_regulator))
5650 regulator_disable(Os->device->gpu_regulator);
5651 #else
5652@@ -7033,6 +7173,10 @@ gckOS_ResetGPU(
5653 }
5654
5655 gcmkFOOTER_NO();
5656+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
5657+ struct reset_control *rstc = Os->device->rstc[Core];
5658+ if (rstc)
5659+ reset_control_reset(rstc);
5660 #else
5661 imx_src_reset_gpu((int)Core);
5662 #endif
5663@@ -8529,3 +8673,338 @@ gckOS_GetProcessNameByPid(
5664 return gcvSTATUS_OK;
5665 }
5666
5667+#if gcdANDROID_NATIVE_FENCE_SYNC
5668+
5669+gceSTATUS
5670+gckOS_CreateSyncPoint(
5671+ IN gckOS Os,
5672+ OUT gctSYNC_POINT * SyncPoint
5673+ )
5674+{
5675+ gceSTATUS status;
5676+ gcsSYNC_POINT_PTR syncPoint;
5677+
5678+ gcmkHEADER_ARG("Os=0x%X", Os);
5679+
5680+ /* Verify the arguments. */
5681+ gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
5682+
5683+ /* Create an sync point structure. */
5684+ syncPoint = (gcsSYNC_POINT_PTR) kmalloc(
5685+ sizeof(gcsSYNC_POINT), GFP_KERNEL | gcdNOWARN);
5686+
5687+ if (syncPoint == gcvNULL)
5688+ {
5689+ gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
5690+ }
5691+
5692+ /* Initialize the sync point. */
5693+ atomic_set(&syncPoint->ref, 1);
5694+ atomic_set(&syncPoint->state, 0);
5695+
5696+ gcmkONERROR(_AllocateIntegerId(&Os->syncPointDB, syncPoint, &syncPoint->id));
5697+
5698+ *SyncPoint = (gctSYNC_POINT)(gctUINTPTR_T)syncPoint->id;
5699+
5700+ gcmkFOOTER_ARG("*SyncPonint=%d", syncPoint->id);
5701+ return gcvSTATUS_OK;
5702+
5703+OnError:
5704+ if (syncPoint != gcvNULL)
5705+ {
5706+ kfree(syncPoint);
5707+ }
5708+
5709+ gcmkFOOTER();
5710+ return status;
5711+}
5712+
5713+gceSTATUS
5714+gckOS_ReferenceSyncPoint(
5715+ IN gckOS Os,
5716+ IN gctSYNC_POINT SyncPoint
5717+ )
5718+{
5719+ gceSTATUS status;
5720+ gcsSYNC_POINT_PTR syncPoint;
5721+
5722+ gcmkHEADER_ARG("Os=0x%X", Os);
5723+
5724+ /* Verify the arguments. */
5725+ gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
5726+ gcmkVERIFY_ARGUMENT(SyncPoint != gcvNULL);
5727+
5728+ gcmkONERROR(
5729+ _QueryIntegerId(&Os->syncPointDB,
5730+ (gctUINT32)(gctUINTPTR_T)SyncPoint,
5731+ (gctPOINTER)&syncPoint));
5732+
5733+ /* Initialize the sync point. */
5734+ atomic_inc(&syncPoint->ref);
5735+
5736+ gcmkFOOTER_NO();
5737+ return gcvSTATUS_OK;
5738+
5739+OnError:
5740+ gcmkFOOTER();
5741+ return status;
5742+}
5743+
5744+gceSTATUS
5745+gckOS_DestroySyncPoint(
5746+ IN gckOS Os,
5747+ IN gctSYNC_POINT SyncPoint
5748+ )
5749+{
5750+ gceSTATUS status;
5751+ gcsSYNC_POINT_PTR syncPoint;
5752+ gctBOOL acquired = gcvFALSE;
5753+
5754+ gcmkHEADER_ARG("Os=0x%X SyncPoint=%d", Os, (gctUINT32)(gctUINTPTR_T)SyncPoint);
5755+
5756+ /* Verify the arguments. */
5757+ gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
5758+ gcmkVERIFY_ARGUMENT(SyncPoint != gcvNULL);
5759+
5760+ gcmkONERROR(gckOS_AcquireMutex(Os, Os->syncPointMutex, gcvINFINITE));
5761+ acquired = gcvTRUE;
5762+
5763+ gcmkONERROR(
5764+ _QueryIntegerId(&Os->syncPointDB,
5765+ (gctUINT32)(gctUINTPTR_T)SyncPoint,
5766+ (gctPOINTER)&syncPoint));
5767+
5768+ gcmkASSERT(syncPoint->id == (gctUINT32)(gctUINTPTR_T)SyncPoint);
5769+
5770+ if (atomic_dec_and_test(&syncPoint->ref))
5771+ {
5772+ gcmkVERIFY_OK(_DestroyIntegerId(&Os->syncPointDB, syncPoint->id));
5773+
5774+ /* Free the sgianl. */
5775+ syncPoint->timeline = gcvNULL;
5776+ kfree(syncPoint);
5777+ }
5778+
5779+ gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->syncPointMutex));
5780+ acquired = gcvFALSE;
5781+
5782+ /* Success. */
5783+ gcmkFOOTER_NO();
5784+ return gcvSTATUS_OK;
5785+
5786+OnError:
5787+ if (acquired)
5788+ {
5789+ /* Release the mutex. */
5790+ gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->syncPointMutex));
5791+ }
5792+
5793+ gcmkFOOTER();
5794+ return status;
5795+}
5796+
5797+gceSTATUS
5798+gckOS_SignalSyncPoint(
5799+ IN gckOS Os,
5800+ IN gctSYNC_POINT SyncPoint
5801+ )
5802+{
5803+ gceSTATUS status;
5804+ gcsSYNC_POINT_PTR syncPoint;
5805+ gctBOOL acquired = gcvFALSE;
5806+
5807+ gcmkHEADER_ARG("Os=0x%X SyncPoint=%d", Os, (gctUINT32)(gctUINTPTR_T)SyncPoint);
5808+
5809+ /* Verify the arguments. */
5810+ gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
5811+ gcmkVERIFY_ARGUMENT(SyncPoint != gcvNULL);
5812+
5813+ gcmkONERROR(gckOS_AcquireMutex(Os, Os->syncPointMutex, gcvINFINITE));
5814+ acquired = gcvTRUE;
5815+
5816+ gcmkONERROR(
5817+ _QueryIntegerId(&Os->syncPointDB,
5818+ (gctUINT32)(gctUINTPTR_T)SyncPoint,
5819+ (gctPOINTER)&syncPoint));
5820+
5821+ gcmkASSERT(syncPoint->id == (gctUINT32)(gctUINTPTR_T)SyncPoint);
5822+
5823+ /* Get state. */
5824+ atomic_set(&syncPoint->state, gcvTRUE);
5825+
5826+ /* Signal timeline. */
5827+ if (syncPoint->timeline)
5828+ {
5829+ sync_timeline_signal(syncPoint->timeline);
5830+ }
5831+
5832+ gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->syncPointMutex));
5833+ acquired = gcvFALSE;
5834+
5835+ /* Success. */
5836+ gcmkFOOTER_NO();
5837+ return gcvSTATUS_OK;
5838+
5839+OnError:
5840+ if (acquired)
5841+ {
5842+ /* Release the mutex. */
5843+ gcmkVERIFY_OK(gckOS_ReleaseMutex(Os, Os->syncPointMutex));
5844+ }
5845+
5846+ gcmkFOOTER();
5847+ return status;
5848+}
5849+
5850+gceSTATUS
5851+gckOS_QuerySyncPoint(
5852+ IN gckOS Os,
5853+ IN gctSYNC_POINT SyncPoint,
5854+ OUT gctBOOL_PTR State
5855+ )
5856+{
5857+ gceSTATUS status;
5858+ gcsSYNC_POINT_PTR syncPoint;
5859+
5860+ gcmkHEADER_ARG("Os=0x%X SyncPoint=%d", Os, (gctUINT32)(gctUINTPTR_T)SyncPoint);
5861+
5862+ /* Verify the arguments. */
5863+ gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
5864+ gcmkVERIFY_ARGUMENT(SyncPoint != gcvNULL);
5865+
5866+ gcmkONERROR(
5867+ _QueryIntegerId(&Os->syncPointDB,
5868+ (gctUINT32)(gctUINTPTR_T)SyncPoint,
5869+ (gctPOINTER)&syncPoint));
5870+
5871+ gcmkASSERT(syncPoint->id == (gctUINT32)(gctUINTPTR_T)SyncPoint);
5872+
5873+ /* Get state. */
5874+ *State = atomic_read(&syncPoint->state);
5875+
5876+ /* Success. */
5877+ gcmkFOOTER_ARG("*State=%d", *State);
5878+ return gcvSTATUS_OK;
5879+
5880+OnError:
5881+ gcmkFOOTER();
5882+ return status;
5883+}
5884+
5885+gceSTATUS
5886+gckOS_CreateSyncTimeline(
5887+ IN gckOS Os,
5888+ OUT gctHANDLE * Timeline
5889+ )
5890+{
5891+ struct viv_sync_timeline * timeline;
5892+
5893+ /* Create viv sync timeline. */
5894+ timeline = viv_sync_timeline_create("viv timeline", Os);
5895+
5896+ if (timeline == gcvNULL)
5897+ {
5898+ /* Out of memory. */
5899+ return gcvSTATUS_OUT_OF_MEMORY;
5900+ }
5901+
5902+ *Timeline = (gctHANDLE) timeline;
5903+ return gcvSTATUS_OK;
5904+}
5905+
5906+gceSTATUS
5907+gckOS_DestroySyncTimeline(
5908+ IN gckOS Os,
5909+ IN gctHANDLE Timeline
5910+ )
5911+{
5912+ struct viv_sync_timeline * timeline;
5913+ gcmkASSERT(Timeline != gcvNULL);
5914+
5915+ /* Destroy timeline. */
5916+ timeline = (struct viv_sync_timeline *) Timeline;
5917+ sync_timeline_destroy(&timeline->obj);
5918+
5919+ return gcvSTATUS_OK;
5920+}
5921+
5922+gceSTATUS
5923+gckOS_CreateNativeFence(
5924+ IN gckOS Os,
5925+ IN gctHANDLE Timeline,
5926+ IN gctSYNC_POINT SyncPoint,
5927+ OUT gctINT * FenceFD
5928+ )
5929+{
5930+ int fd = -1;
5931+ struct viv_sync_timeline *timeline;
5932+ struct sync_pt * pt = gcvNULL;
5933+ struct sync_fence * fence;
5934+ char name[32];
5935+ gcsSYNC_POINT_PTR syncPoint;
5936+ gceSTATUS status;
5937+
5938+ gcmkHEADER_ARG("Os=0x%X Timeline=0x%X SyncPoint=%d",
5939+ Os, Timeline, (gctUINT)(gctUINTPTR_T)SyncPoint);
5940+
5941+ gcmkONERROR(
5942+ _QueryIntegerId(&Os->syncPointDB,
5943+ (gctUINT32)(gctUINTPTR_T)SyncPoint,
5944+ (gctPOINTER)&syncPoint));
5945+
5946+ /* Cast timeline. */
5947+ timeline = (struct viv_sync_timeline *) Timeline;
5948+
5949+ fd = get_unused_fd();
5950+
5951+ if (fd < 0)
5952+ {
5953+ /* Out of resources. */
5954+ gcmkONERROR(gcvSTATUS_OUT_OF_RESOURCES);
5955+ }
5956+
5957+ /* Create viv_sync_pt. */
5958+ pt = viv_sync_pt_create(timeline, SyncPoint);
5959+
5960+ if (pt == gcvNULL)
5961+ {
5962+ gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
5963+ }
5964+
5965+ /* Reference sync_timeline. */
5966+ syncPoint->timeline = &timeline->obj;
5967+
5968+ /* Build fence name. */
5969+ snprintf(name, 32, "viv sync_fence-%u", (gctUINT)(gctUINTPTR_T)SyncPoint);
5970+
5971+ /* Create sync_fence. */
5972+ fence = sync_fence_create(name, pt);
5973+
5974+ if (fence == NULL)
5975+ {
5976+ gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
5977+ }
5978+
5979+ /* Install fence to fd. */
5980+ sync_fence_install(fence, fd);
5981+
5982+ *FenceFD = fd;
5983+ gcmkFOOTER_ARG("*FenceFD=%d", fd);
5984+ return gcvSTATUS_OK;
5985+
5986+OnError:
5987+ /* Error roll back. */
5988+ if (pt)
5989+ {
5990+ sync_pt_free(pt);
5991+ }
5992+
5993+ if (fd > 0)
5994+ {
5995+ put_unused_fd(fd);
5996+ }
5997+
5998+ gcmkFOOTER();
5999+ return status;
6000+}
6001+#endif
6002diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c
6003new file mode 100644
6004index 0000000..7efae1c
6005--- /dev/null
6006+++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.c
6007@@ -0,0 +1,174 @@
6008+/****************************************************************************
6009+*
6010+* Copyright (C) 2005 - 2013 by Vivante Corp.
6011+*
6012+* This program is free software; you can redistribute it and/or modify
6013+* it under the terms of the GNU General Public License as published by
6014+* the Free Software Foundation; either version 2 of the license, or
6015+* (at your option) any later version.
6016+*
6017+* This program is distributed in the hope that it will be useful,
6018+* but WITHOUT ANY WARRANTY; without even the implied warranty of
6019+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6020+* GNU General Public License for more details.
6021+*
6022+* You should have received a copy of the GNU General Public License
6023+* along with this program; if not write to the Free Software
6024+* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
6025+*
6026+*****************************************************************************/
6027+
6028+
6029+#include <linux/kernel.h>
6030+#include <linux/file.h>
6031+#include <linux/fs.h>
6032+#include <linux/miscdevice.h>
6033+#include <linux/module.h>
6034+#include <linux/syscalls.h>
6035+#include <linux/uaccess.h>
6036+
6037+#include "gc_hal_kernel_sync.h"
6038+
6039+#if gcdANDROID_NATIVE_FENCE_SYNC
6040+
6041+static struct sync_pt *
6042+viv_sync_pt_dup(
6043+ struct sync_pt * sync_pt
6044+ )
6045+{
6046+ gceSTATUS status;
6047+ struct viv_sync_pt *pt;
6048+ struct viv_sync_pt *src;
6049+ struct viv_sync_timeline *obj;
6050+
6051+ src = (struct viv_sync_pt *) sync_pt;
6052+ obj = (struct viv_sync_timeline *) sync_pt->parent;
6053+
6054+ /* Create the new sync_pt. */
6055+ pt = (struct viv_sync_pt *)
6056+ sync_pt_create(&obj->obj, sizeof(struct viv_sync_pt));
6057+
6058+ pt->stamp = src->stamp;
6059+ pt->sync = src->sync;
6060+
6061+ /* Reference sync point. */
6062+ status = gckOS_ReferenceSyncPoint(obj->os, pt->sync);
6063+
6064+ if (gcmIS_ERROR(status))
6065+ {
6066+ sync_pt_free((struct sync_pt *)pt);
6067+ return NULL;
6068+ }
6069+
6070+ return (struct sync_pt *)pt;
6071+}
6072+
6073+static int
6074+viv_sync_pt_has_signaled(
6075+ struct sync_pt * sync_pt
6076+ )
6077+{
6078+ gceSTATUS status;
6079+ gctBOOL state;
6080+ struct viv_sync_pt * pt;
6081+ struct viv_sync_timeline * obj;
6082+
6083+ pt = (struct viv_sync_pt *)sync_pt;
6084+ obj = (struct viv_sync_timeline *)sync_pt->parent;
6085+
6086+ status = gckOS_QuerySyncPoint(obj->os, pt->sync, &state);
6087+
6088+ if (gcmIS_ERROR(status))
6089+ {
6090+ /* Error. */
6091+ return -1;
6092+ }
6093+
6094+ return state;
6095+}
6096+
6097+static int
6098+viv_sync_pt_compare(
6099+ struct sync_pt * a,
6100+ struct sync_pt * b
6101+ )
6102+{
6103+ int ret;
6104+ struct viv_sync_pt * pt1 = (struct viv_sync_pt *) a;
6105+ struct viv_sync_pt * pt2 = (struct viv_sync_pt *) b;
6106+
6107+ ret = (pt1->stamp < pt2->stamp) ? -1
6108+ : (pt1->stamp == pt2->stamp) ? 0
6109+ : 1;
6110+
6111+ return ret;
6112+}
6113+
6114+static void
6115+viv_sync_pt_free(
6116+ struct sync_pt * sync_pt
6117+ )
6118+{
6119+ struct viv_sync_pt * pt;
6120+ struct viv_sync_timeline * obj;
6121+
6122+ pt = (struct viv_sync_pt *) sync_pt;
6123+ obj = (struct viv_sync_timeline *) sync_pt->parent;
6124+
6125+ gckOS_DestroySyncPoint(obj->os, pt->sync);
6126+}
6127+
6128+static struct sync_timeline_ops viv_timeline_ops =
6129+{
6130+ .driver_name = "viv_sync",
6131+ .dup = viv_sync_pt_dup,
6132+ .has_signaled = viv_sync_pt_has_signaled,
6133+ .compare = viv_sync_pt_compare,
6134+ .free_pt = viv_sync_pt_free,
6135+};
6136+
6137+struct viv_sync_timeline *
6138+viv_sync_timeline_create(
6139+ const char * name,
6140+ gckOS os
6141+ )
6142+{
6143+ struct viv_sync_timeline * obj;
6144+
6145+ obj = (struct viv_sync_timeline *)
6146+ sync_timeline_create(&viv_timeline_ops, sizeof(struct viv_sync_timeline), name);
6147+
6148+ obj->os = os;
6149+ obj->stamp = 0;
6150+
6151+ return obj;
6152+}
6153+
6154+struct sync_pt *
6155+viv_sync_pt_create(
6156+ struct viv_sync_timeline * obj,
6157+ gctSYNC_POINT SyncPoint
6158+ )
6159+{
6160+ gceSTATUS status;
6161+ struct viv_sync_pt * pt;
6162+
6163+ pt = (struct viv_sync_pt *)
6164+ sync_pt_create(&obj->obj, sizeof(struct viv_sync_pt));
6165+
6166+ pt->stamp = obj->stamp++;
6167+ pt->sync = SyncPoint;
6168+
6169+ /* Dup signal. */
6170+ status = gckOS_ReferenceSyncPoint(obj->os, SyncPoint);
6171+
6172+ if (gcmIS_ERROR(status))
6173+ {
6174+ sync_pt_free((struct sync_pt *)pt);
6175+ return NULL;
6176+ }
6177+
6178+ return (struct sync_pt *) pt;
6179+}
6180+
6181+#endif
6182diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h
6183new file mode 100644
6184index 0000000..6fc12e5
6185--- /dev/null
6186+++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_sync.h
6187@@ -0,0 +1,71 @@
6188+/****************************************************************************
6189+*
6190+* Copyright (C) 2005 - 2013 by Vivante Corp.
6191+*
6192+* This program is free software; you can redistribute it and/or modify
6193+* it under the terms of the GNU General Public License as published by
6194+* the Free Software Foundation; either version 2 of the license, or
6195+* (at your option) any later version.
6196+*
6197+* This program is distributed in the hope that it will be useful,
6198+* but WITHOUT ANY WARRANTY; without even the implied warranty of
6199+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6200+* GNU General Public License for more details.
6201+*
6202+* You should have received a copy of the GNU General Public License
6203+* along with this program; if not write to the Free Software
6204+* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
6205+*
6206+*****************************************************************************/
6207+
6208+
6209+#ifndef __gc_hal_kernel_sync_h_
6210+#define __gc_hal_kernel_sync_h_
6211+
6212+#include <linux/types.h>
6213+
6214+#include <linux/sync.h>
6215+
6216+#include <gc_hal.h>
6217+#include <gc_hal_base.h>
6218+
6219+struct viv_sync_timeline
6220+{
6221+ /* Parent object. */
6222+ struct sync_timeline obj;
6223+
6224+ /* Timestamp when sync_pt is created. */
6225+ gctUINT stamp;
6226+
6227+ /* Pointer to os struct. */
6228+ gckOS os;
6229+};
6230+
6231+
6232+struct viv_sync_pt
6233+{
6234+ /* Parent object. */
6235+ struct sync_pt pt;
6236+
6237+ /* Reference sync point*/
6238+ gctSYNC_POINT sync;
6239+
6240+ /* Timestamp when sync_pt is created. */
6241+ gctUINT stamp;
6242+};
6243+
6244+/* Create viv_sync_timeline object. */
6245+struct viv_sync_timeline *
6246+viv_sync_timeline_create(
6247+ const char * Name,
6248+ gckOS Os
6249+ );
6250+
6251+/* Create viv_sync_pt object. */
6252+struct sync_pt *
6253+viv_sync_pt_create(
6254+ struct viv_sync_timeline * Obj,
6255+ gctSYNC_POINT SyncPoint
6256+ );
6257+
6258+#endif /* __gc_hal_kernel_sync_h_ */
6259--
62601.7.9.5
6261
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/drm-vivante-Add-00-sufix-in-returned-bus-Id.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/drm-vivante-Add-00-sufix-in-returned-bus-Id.patch
deleted file mode 100644
index 815d02c38..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/drm-vivante-Add-00-sufix-in-returned-bus-Id.patch
+++ /dev/null
@@ -1,31 +0,0 @@
1From b37a944f55a5010bd08297a63db0275540922f32 Mon Sep 17 00:00:00 2001
2From: Otavio Salvador <otavio@ossystems.com.br>
3Date: Thu, 22 Aug 2013 16:31:29 -0300
4Subject: [PATCH] drm/vivante: Add ":00" sufix in returned bus Id
5
6This makes the 3.0.35 compatible with a Xorg driver build for 3.5.7 or
7newer kernels.
8
9Upstream-Status: Inapropriate [embedded specific]
10
11Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
12---
13 drivers/gpu/drm/vivante/vivante_drv.c | 2 +-
14 1 file changed, 1 insertion(+), 1 deletion(-)
15
16diff --git a/drivers/gpu/drm/vivante/vivante_drv.c b/drivers/gpu/drm/vivante/vivante_drv.c
17index 4224608..cea360d 100644
18--- a/drivers/gpu/drm/vivante/vivante_drv.c
19+++ b/drivers/gpu/drm/vivante/vivante_drv.c
20@@ -55,7 +55,7 @@
21
22 #include "drm_pciids.h"
23
24-static char platformdevicename[] = "Vivante GCCore";
25+static char platformdevicename[] = "Vivante GCCore:00";
26 static struct platform_device *pplatformdev;
27
28 static struct drm_driver driver = {
29--
301.8.4.rc1
31
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/epdc-Rename-mxcfb_epdc_kernel.h-to-mxc_epdc.h.patch b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/epdc-Rename-mxcfb_epdc_kernel.h-to-mxc_epdc.h.patch
deleted file mode 100644
index 0a20b3ff9..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/epdc-Rename-mxcfb_epdc_kernel.h-to-mxc_epdc.h.patch
+++ /dev/null
@@ -1,143 +0,0 @@
1From 149545df26169d257b144ff78934ce9cb5b6818b Mon Sep 17 00:00:00 2001
2From: Otavio Salvador <otavio@ossystems.com.br>
3Date: Sat, 19 Oct 2013 10:55:11 -0300
4Subject: [PATCH] epdc: Rename mxcfb_epdc_kernel.h to mxc_epdc.h
5Organization: O.S. Systems Software LTDA.
6
7This allow for forward compatibility with imx-test >= 3.10.9-1.0.0.
8
9Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
10---
11 drivers/video/mxc/mxc_epdc_fb.c | 2 +-
12 include/linux/mxcfb_epdc.h | 49 +++++++++++++++++++++++++++++++++++++++
13 include/linux/mxcfb_epdc_kernel.h | 49 ---------------------------------------
14 3 files changed, 50 insertions(+), 50 deletions(-)
15 create mode 100644 include/linux/mxcfb_epdc.h
16 delete mode 100644 include/linux/mxcfb_epdc_kernel.h
17
18diff --git a/drivers/video/mxc/mxc_epdc_fb.c b/drivers/video/mxc/mxc_epdc_fb.c
19index 4103498..b3ef8ea 100644
20--- a/drivers/video/mxc/mxc_epdc_fb.c
21+++ b/drivers/video/mxc/mxc_epdc_fb.c
22@@ -43,7 +43,7 @@
23 #include <linux/dmaengine.h>
24 #include <linux/pxp_dma.h>
25 #include <linux/mxcfb.h>
26-#include <linux/mxcfb_epdc_kernel.h>
27+#include <linux/mxcfb_epdc.h>
28 #include <linux/gpio.h>
29 #include <linux/regulator/driver.h>
30 #include <linux/fsl_devices.h>
31diff --git a/include/linux/mxcfb_epdc.h b/include/linux/mxcfb_epdc.h
32new file mode 100644
33index 0000000..06fea6f
34--- /dev/null
35+++ b/include/linux/mxcfb_epdc.h
36@@ -0,0 +1,49 @@
37+/*
38+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
39+ *
40+ * This program is free software; you can redistribute it and/or modify
41+ * it under the terms of the GNU General Public License as published by
42+ * the Free Software Foundation; either version 2 of the License, or
43+ * (at your option) any later version.
44+ *
45+ * This program is distributed in the hope that it will be useful,
46+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
47+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
48+ * GNU General Public License for more details.
49+ *
50+ * You should have received a copy of the GNU General Public License
51+ * along with this program; if not, write to the Free Software
52+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
53+ *
54+ */
55+#ifndef _MXCFB_EPDC_KERNEL
56+#define _MXCFB_EPDC_KERNEL
57+
58+void mxc_epdc_fb_set_waveform_modes(struct mxcfb_waveform_modes *modes,
59+ struct fb_info *info);
60+int mxc_epdc_fb_set_temperature(int temperature, struct fb_info *info);
61+int mxc_epdc_fb_set_auto_update(u32 auto_mode, struct fb_info *info);
62+int mxc_epdc_fb_send_update(struct mxcfb_update_data *upd_data,
63+ struct fb_info *info);
64+int mxc_epdc_fb_wait_update_complete(
65+ struct mxcfb_update_marker_data *marker_data,
66+ struct fb_info *info);
67+int mxc_epdc_fb_set_pwrdown_delay(u32 pwrdown_delay,
68+ struct fb_info *info);
69+int mxc_epdc_get_pwrdown_delay(struct fb_info *info);
70+int mxc_epdc_fb_set_upd_scheme(u32 upd_scheme, struct fb_info *info);
71+
72+void mxc_spdc_fb_set_waveform_modes(struct mxcfb_waveform_modes *modes,
73+ struct fb_info *info);
74+int mxc_spdc_fb_set_temperature(int temperature, struct fb_info *info);
75+int mxc_spdc_fb_set_auto_update(u32 auto_mode, struct fb_info *info);
76+int mxc_spdc_fb_send_update(struct mxcfb_update_data *upd_data,
77+ struct fb_info *info);
78+int mxc_spdc_fb_wait_update_complete(
79+ struct mxcfb_update_marker_data *marker_data,
80+ struct fb_info *info);
81+int mxc_spdc_fb_set_pwrdown_delay(u32 pwrdown_delay,
82+ struct fb_info *info);
83+int mxc_spdc_get_pwrdown_delay(struct fb_info *info);
84+int mxc_spdc_fb_set_upd_scheme(u32 upd_scheme, struct fb_info *info);
85+#endif
86diff --git a/include/linux/mxcfb_epdc_kernel.h b/include/linux/mxcfb_epdc_kernel.h
87deleted file mode 100644
88index 06fea6f..0000000
89--- a/include/linux/mxcfb_epdc_kernel.h
90+++ /dev/null
91@@ -1,49 +0,0 @@
92-/*
93- * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
94- *
95- * This program is free software; you can redistribute it and/or modify
96- * it under the terms of the GNU General Public License as published by
97- * the Free Software Foundation; either version 2 of the License, or
98- * (at your option) any later version.
99- *
100- * This program is distributed in the hope that it will be useful,
101- * but WITHOUT ANY WARRANTY; without even the implied warranty of
102- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
103- * GNU General Public License for more details.
104- *
105- * You should have received a copy of the GNU General Public License
106- * along with this program; if not, write to the Free Software
107- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
108- *
109- */
110-#ifndef _MXCFB_EPDC_KERNEL
111-#define _MXCFB_EPDC_KERNEL
112-
113-void mxc_epdc_fb_set_waveform_modes(struct mxcfb_waveform_modes *modes,
114- struct fb_info *info);
115-int mxc_epdc_fb_set_temperature(int temperature, struct fb_info *info);
116-int mxc_epdc_fb_set_auto_update(u32 auto_mode, struct fb_info *info);
117-int mxc_epdc_fb_send_update(struct mxcfb_update_data *upd_data,
118- struct fb_info *info);
119-int mxc_epdc_fb_wait_update_complete(
120- struct mxcfb_update_marker_data *marker_data,
121- struct fb_info *info);
122-int mxc_epdc_fb_set_pwrdown_delay(u32 pwrdown_delay,
123- struct fb_info *info);
124-int mxc_epdc_get_pwrdown_delay(struct fb_info *info);
125-int mxc_epdc_fb_set_upd_scheme(u32 upd_scheme, struct fb_info *info);
126-
127-void mxc_spdc_fb_set_waveform_modes(struct mxcfb_waveform_modes *modes,
128- struct fb_info *info);
129-int mxc_spdc_fb_set_temperature(int temperature, struct fb_info *info);
130-int mxc_spdc_fb_set_auto_update(u32 auto_mode, struct fb_info *info);
131-int mxc_spdc_fb_send_update(struct mxcfb_update_data *upd_data,
132- struct fb_info *info);
133-int mxc_spdc_fb_wait_update_complete(
134- struct mxcfb_update_marker_data *marker_data,
135- struct fb_info *info);
136-int mxc_spdc_fb_set_pwrdown_delay(u32 pwrdown_delay,
137- struct fb_info *info);
138-int mxc_spdc_get_pwrdown_delay(struct fb_info *info);
139-int mxc_spdc_fb_set_upd_scheme(u32 upd_scheme, struct fb_info *info);
140-#endif
141--
1421.8.4.rc3
143
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6dl/defconfig b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6dl/defconfig
deleted file mode 100644
index d7095195c..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6dl/defconfig
+++ /dev/null
@@ -1,301 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_CGROUPS=y
7CONFIG_EMBEDDED=y
8CONFIG_PERF_EVENTS=y
9CONFIG_KPROBES=y
10CONFIG_MODULES=y
11CONFIG_MODULE_UNLOAD=y
12CONFIG_MODULE_FORCE_UNLOAD=y
13CONFIG_MODVERSIONS=y
14# CONFIG_BLK_DEV_BSG is not set
15CONFIG_ARCH_MXC=y
16CONFIG_GPIO_PCA953X=y
17CONFIG_ARCH_MX6=y
18CONFIG_FORCE_MAX_ZONEORDER=14
19CONFIG_MACH_MX6Q_ARM2=y
20CONFIG_MACH_MX6Q_SABRELITE=y
21CONFIG_MACH_MX6Q_SABRESD=y
22CONFIG_MACH_MX6Q_SABREAUTO=y
23CONFIG_MACH_MX6Q_HDMIDONGLE=y
24CONFIG_USB_EHCI_ARC_H1=y
25CONFIG_USB_FSL_ARC_OTG=y
26CONFIG_MXC_PWM=y
27CONFIG_MXC_REBOOT_MFGMODE=y
28CONFIG_CLK_DEBUG=y
29CONFIG_DMA_ZONE_SIZE=184
30# CONFIG_SWP_EMULATE is not set
31CONFIG_ARM_ERRATA_743622=y
32CONFIG_ARM_ERRATA_751472=y
33CONFIG_ARM_ERRATA_754322=y
34CONFIG_ARM_ERRATA_764369=y
35CONFIG_NO_HZ=y
36CONFIG_HIGH_RES_TIMERS=y
37CONFIG_SMP=y
38CONFIG_VMSPLIT_2G=y
39CONFIG_PREEMPT=y
40CONFIG_AEABI=y
41# CONFIG_OABI_COMPAT is not set
42CONFIG_HIGHMEM=y
43CONFIG_COMPACTION=y
44CONFIG_KSM=y
45CONFIG_ZBOOT_ROM_TEXT=0x0
46CONFIG_ZBOOT_ROM_BSS=0x0
47CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off"
48CONFIG_CPU_FREQ=y
49CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
50CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
51CONFIG_CPU_FREQ_GOV_POWERSAVE=y
52CONFIG_CPU_FREQ_GOV_USERSPACE=y
53CONFIG_CPU_FREQ_GOV_ONDEMAND=y
54CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
55CONFIG_CPU_FREQ_IMX=y
56CONFIG_VFP=y
57CONFIG_NEON=y
58# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
59CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y
60CONFIG_PM_RUNTIME=y
61CONFIG_PM_DEBUG=y
62CONFIG_APM_EMULATION=y
63CONFIG_NET=y
64CONFIG_PACKET=y
65CONFIG_UNIX=y
66CONFIG_INET=y
67CONFIG_IP_MULTICAST=y
68CONFIG_IP_PNP=y
69CONFIG_IP_PNP_DHCP=y
70CONFIG_IP_PNP_BOOTP=y
71# CONFIG_INET_LRO is not set
72# CONFIG_IPV6 is not set
73CONFIG_NETFILTER=y
74CONFIG_LLC2=y
75CONFIG_CAN=y
76CONFIG_CAN_RAW=y
77CONFIG_CAN_BCM=y
78CONFIG_CAN_VCAN=y
79CONFIG_CAN_FLEXCAN=y
80CONFIG_BT=y
81CONFIG_BT_L2CAP=y
82CONFIG_BT_SCO=y
83CONFIG_BT_RFCOMM=y
84CONFIG_BT_RFCOMM_TTY=y
85CONFIG_BT_BNEP=y
86CONFIG_BT_BNEP_MC_FILTER=y
87CONFIG_BT_BNEP_PROTO_FILTER=y
88CONFIG_BT_HIDP=y
89CONFIG_BT_HCIBTUSB=y
90CONFIG_BT_HCIUART=y
91CONFIG_BT_HCIUART_ATH3K=y
92CONFIG_BT_HCIVHCI=y
93CONFIG_CFG80211=y
94CONFIG_RFKILL=y
95CONFIG_RFKILL_INPUT=y
96CONFIG_DEVTMPFS=y
97CONFIG_DEVTMPFS_MOUNT=y
98CONFIG_CONNECTOR=y
99CONFIG_MTD=y
100CONFIG_MTD_CHAR=y
101CONFIG_MTD_BLOCK=y
102CONFIG_MTD_CFI=y
103CONFIG_MTD_CFI_AMDSTD=y
104CONFIG_MTD_PHYSMAP=y
105CONFIG_MTD_M25P80=y
106CONFIG_MTD_NAND=y
107CONFIG_MTD_NAND_GPMI_NAND=y
108CONFIG_MTD_UBI=y
109CONFIG_BLK_DEV_LOOP=y
110CONFIG_MISC_DEVICES=y
111CONFIG_MXS_PERFMON=m
112CONFIG_BLK_DEV_SD=y
113CONFIG_SCSI_MULTI_LUN=y
114CONFIG_ATA=y
115# CONFIG_SATA_PMP is not set
116CONFIG_SATA_AHCI_PLATFORM=y
117CONFIG_NETDEVICES=y
118CONFIG_MICREL_PHY=y
119CONFIG_NET_ETHERNET=y
120CONFIG_SMSC911X=y
121CONFIG_FEC_NAPI=y
122# CONFIG_NETDEV_1000 is not set
123# CONFIG_NETDEV_10000 is not set
124CONFIG_ATH_COMMON=m
125CONFIG_ATH6KL=m
126CONFIG_HOSTAP=y
127CONFIG_INPUT_POLLDEV=y
128CONFIG_INPUT_EVDEV=y
129CONFIG_KEYBOARD_GPIO=y
130# CONFIG_INPUT_MOUSE is not set
131CONFIG_INPUT_TOUCHSCREEN=y
132CONFIG_TOUCHSCREEN_EGALAX=y
133CONFIG_TOUCHSCREEN_EGALAX_SINGLE_TOUCH=y
134CONFIG_TOUCHSCREEN_ELAN=y
135CONFIG_TOUCHSCREEN_MAX11801=y
136CONFIG_INPUT_MISC=y
137CONFIG_INPUT_UINPUT=y
138CONFIG_INPUT_ISL29023=y
139CONFIG_VT_HW_CONSOLE_BINDING=y
140CONFIG_SERIAL_IMX=y
141CONFIG_SERIAL_IMX_CONSOLE=y
142CONFIG_FSL_OTP=y
143CONFIG_HW_RANDOM=y
144CONFIG_MXS_VIIM=y
145CONFIG_I2C=y
146CONFIG_I2C_CHARDEV=y
147CONFIG_I2C_IMX=y
148CONFIG_SPI=y
149CONFIG_SPI_IMX=y
150CONFIG_GPIO_SYSFS=y
151CONFIG_SABRESD_MAX8903=y
152CONFIG_SENSORS_MAX17135=y
153CONFIG_SENSORS_MAG3110=y
154# CONFIG_MXC_MMA8450 is not set
155CONFIG_WATCHDOG=y
156CONFIG_WATCHDOG_NOWAYOUT=y
157CONFIG_IMX2_WDT=y
158CONFIG_MFD_WM8994=y
159CONFIG_MFD_PFUZE=y
160CONFIG_MFD_MAX17135=y
161CONFIG_REGULATOR=y
162CONFIG_REGULATOR_FIXED_VOLTAGE=y
163CONFIG_REGULATOR_PFUZE100=y
164CONFIG_REGULATOR_MAX17135=y
165CONFIG_MEDIA_SUPPORT=y
166CONFIG_VIDEO_DEV=y
167# CONFIG_RC_CORE is not set
168# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
169CONFIG_VIDEO_MXC_CAMERA=m
170CONFIG_MXC_CAMERA_OV3640=m
171CONFIG_MXC_CAMERA_OV5640=m
172CONFIG_MXC_CAMERA_OV8820_MIPI=m
173CONFIG_MXC_CAMERA_OV5642=m
174CONFIG_MXC_TVIN_ADV7180=m
175CONFIG_MXC_CAMERA_OV5640_MIPI=m
176CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
177CONFIG_USB_VIDEO_CLASS=m
178# CONFIG_RADIO_ADAPTERS is not set
179CONFIG_DRM=m
180CONFIG_DRM_VIVANTE=m
181CONFIG_FB=y
182CONFIG_BACKLIGHT_LCD_SUPPORT=y
183# CONFIG_LCD_CLASS_DEVICE is not set
184CONFIG_BACKLIGHT_CLASS_DEVICE=y
185# CONFIG_BACKLIGHT_GENERIC is not set
186CONFIG_BACKLIGHT_PWM=y
187CONFIG_FB_MXC_LDB=y
188CONFIG_FB_MXC_MIPI_DSI=y
189CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
190CONFIG_FB_MXC_EINK_PANEL=y
191CONFIG_FB_MXC_HDMI=y
192CONFIG_FRAMEBUFFER_CONSOLE=y
193CONFIG_FONTS=y
194CONFIG_FONT_8x16=y
195CONFIG_LOGO=y
196CONFIG_SOUND=y
197CONFIG_SND=y
198CONFIG_SND_USB_AUDIO=y
199CONFIG_SND_SOC=y
200CONFIG_SND_IMX_SOC=y
201CONFIG_SND_SOC_IMX_SGTL5000=y
202CONFIG_SND_SOC_IMX_WM8962=y
203CONFIG_SND_SOC_IMX_CS42888=y
204CONFIG_SND_SOC_IMX_SPDIF=y
205CONFIG_SND_SOC_IMX_HDMI=y
206CONFIG_HIDRAW=y
207CONFIG_HID_A4TECH=m
208CONFIG_HID_APPLE=m
209CONFIG_HID_BELKIN=m
210CONFIG_HID_CHERRY=m
211CONFIG_HID_CHICONY=m
212CONFIG_HID_CYPRESS=m
213CONFIG_HID_EZKEY=m
214CONFIG_HID_GYRATION=m
215CONFIG_HID_LOGITECH=m
216CONFIG_HID_MICROSOFT=m
217CONFIG_HID_MONTEREY=m
218CONFIG_HID_PANTHERLORD=m
219CONFIG_HID_PETALYNX=m
220CONFIG_HID_SAMSUNG=m
221CONFIG_HID_SONY=m
222CONFIG_HID_SUNPLUS=m
223CONFIG_USB=y
224# CONFIG_USB_DEVICE_CLASS is not set
225CONFIG_USB_SUSPEND=y
226# CONFIG_USB_OTG_WHITELIST is not set
227CONFIG_USB_EHCI_HCD=y
228CONFIG_USB_EHCI_ARC=y
229CONFIG_USB_EHCI_ROOT_HUB_TT=y
230# CONFIG_USB_EHCI_TT_NEWSCHED is not set
231CONFIG_USB_STORAGE=y
232CONFIG_USB_GADGET=y
233CONFIG_USB_AUDIO=m
234CONFIG_USB_ETH=m
235CONFIG_USB_FILE_STORAGE=m
236CONFIG_USB_G_SERIAL=m
237CONFIG_MXC_OTG=y
238CONFIG_MMC=y
239CONFIG_MMC_UNSAFE_RESUME=y
240CONFIG_MMC_SDHCI=y
241CONFIG_MMC_SDHCI_PLTFM=y
242CONFIG_MMC_SDHCI_ESDHC_IMX=y
243CONFIG_NEW_LEDS=y
244CONFIG_LEDS_CLASS=y
245CONFIG_LEDS_GPIO=y
246CONFIG_LEDS_TRIGGERS=y
247CONFIG_LEDS_TRIGGER_GPIO=y
248CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
249CONFIG_RTC_CLASS=y
250CONFIG_RTC_INTF_DEV_UIE_EMUL=y
251CONFIG_RTC_DRV_SNVS=y
252CONFIG_DMADEVICES=y
253CONFIG_MXC_PXP_V2=y
254CONFIG_IMX_SDMA=y
255CONFIG_MXC_IPU=y
256# CONFIG_MXC_HMP4E is not set
257# CONFIG_MXC_HWEVENT is not set
258CONFIG_MXC_ASRC=y
259CONFIG_MXC_MLB150=m
260CONFIG_MXC_GPU_VIV=y
261CONFIG_MXC_MIPI_CSI2=y
262CONFIG_EXT2_FS=y
263CONFIG_EXT3_FS=y
264# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
265CONFIG_EXT4_FS=y
266CONFIG_AUTOFS4_FS=m
267CONFIG_MSDOS_FS=y
268CONFIG_VFAT_FS=y
269CONFIG_TMPFS=y
270CONFIG_JFFS2_FS=y
271CONFIG_UBIFS_FS=y
272CONFIG_CRAMFS=y
273CONFIG_NFS_FS=y
274CONFIG_NFS_V3=y
275CONFIG_ROOT_NFS=y
276CONFIG_PARTITION_ADVANCED=y
277CONFIG_EFI_PARTITION=y
278CONFIG_NLS_CODEPAGE_437=y
279CONFIG_NLS_ASCII=m
280CONFIG_NLS_ISO8859_1=y
281CONFIG_NLS_UTF8=m
282CONFIG_MAGIC_SYSRQ=y
283CONFIG_SYSCTL_SYSCALL_CHECK=y
284# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set
285CONFIG_FTRACE=y
286# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
287CONFIG_CRYPTO_TEST=m
288CONFIG_CRYPTO_CCM=y
289CONFIG_CRYPTO_GCM=y
290CONFIG_CRYPTO_CBC=y
291CONFIG_CRYPTO_CTS=y
292CONFIG_CRYPTO_LRW=y
293CONFIG_CRYPTO_PCBC=y
294CONFIG_CRYPTO_XTS=y
295CONFIG_CRYPTO_DES=y
296# CONFIG_CRYPTO_ANSI_CPRNG is not set
297CONFIG_CRYPTO_DEV_FSL_CAAM=y
298CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y
299CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y
300CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y
301CONFIG_CRC_CCITT=m
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6q/defconfig b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6q/defconfig
deleted file mode 100644
index 542e94941..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6q/defconfig
+++ /dev/null
@@ -1,302 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_CGROUPS=y
7CONFIG_EMBEDDED=y
8CONFIG_PERF_EVENTS=y
9CONFIG_KPROBES=y
10CONFIG_MODULES=y
11CONFIG_MODULE_UNLOAD=y
12CONFIG_MODULE_FORCE_UNLOAD=y
13CONFIG_MODVERSIONS=y
14# CONFIG_BLK_DEV_BSG is not set
15CONFIG_ARCH_MXC=y
16CONFIG_GPIO_PCA953X=y
17CONFIG_ARCH_MX6=y
18CONFIG_FORCE_MAX_ZONEORDER=14
19CONFIG_MACH_MX6Q_ARM2=y
20CONFIG_MACH_MX6Q_SABRELITE=y
21CONFIG_MACH_MX6Q_SABRESD=y
22CONFIG_MACH_MX6Q_SABREAUTO=y
23CONFIG_MACH_MX6Q_HDMIDONGLE=y
24CONFIG_USB_EHCI_ARC_H1=y
25CONFIG_USB_FSL_ARC_OTG=y
26CONFIG_MXC_PWM=y
27CONFIG_MXC_REBOOT_MFGMODE=y
28CONFIG_CLK_DEBUG=y
29CONFIG_DMA_ZONE_SIZE=184
30# CONFIG_SWP_EMULATE is not set
31CONFIG_ARM_ERRATA_743622=y
32CONFIG_ARM_ERRATA_751472=y
33CONFIG_ARM_ERRATA_754322=y
34CONFIG_ARM_ERRATA_764369=y
35CONFIG_NO_HZ=y
36CONFIG_HIGH_RES_TIMERS=y
37CONFIG_SMP=y
38CONFIG_VMSPLIT_2G=y
39CONFIG_PREEMPT=y
40CONFIG_AEABI=y
41# CONFIG_OABI_COMPAT is not set
42CONFIG_HIGHMEM=y
43CONFIG_COMPACTION=y
44CONFIG_KSM=y
45CONFIG_ZBOOT_ROM_TEXT=0x0
46CONFIG_ZBOOT_ROM_BSS=0x0
47CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off"
48CONFIG_CPU_FREQ=y
49CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
50CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
51CONFIG_CPU_FREQ_GOV_POWERSAVE=y
52CONFIG_CPU_FREQ_GOV_USERSPACE=y
53CONFIG_CPU_FREQ_GOV_ONDEMAND=y
54CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
55CONFIG_CPU_FREQ_IMX=y
56CONFIG_VFP=y
57CONFIG_NEON=y
58# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
59CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y
60CONFIG_PM_RUNTIME=y
61CONFIG_PM_DEBUG=y
62CONFIG_APM_EMULATION=y
63CONFIG_NET=y
64CONFIG_PACKET=y
65CONFIG_UNIX=y
66CONFIG_INET=y
67CONFIG_IP_MULTICAST=y
68CONFIG_IP_PNP=y
69CONFIG_IP_PNP_DHCP=y
70CONFIG_IP_PNP_BOOTP=y
71# CONFIG_INET_LRO is not set
72# CONFIG_IPV6 is not set
73CONFIG_NETFILTER=y
74CONFIG_LLC2=y
75CONFIG_CAN=y
76CONFIG_CAN_RAW=y
77CONFIG_CAN_BCM=y
78CONFIG_CAN_VCAN=y
79CONFIG_CAN_FLEXCAN=y
80CONFIG_BT=y
81CONFIG_BT_L2CAP=y
82CONFIG_BT_SCO=y
83CONFIG_BT_RFCOMM=y
84CONFIG_BT_RFCOMM_TTY=y
85CONFIG_BT_BNEP=y
86CONFIG_BT_BNEP_MC_FILTER=y
87CONFIG_BT_BNEP_PROTO_FILTER=y
88CONFIG_BT_HIDP=y
89CONFIG_BT_HCIBTUSB=y
90CONFIG_BT_HCIUART=y
91CONFIG_BT_HCIUART_ATH3K=y
92CONFIG_BT_HCIVHCI=y
93CONFIG_CFG80211=y
94CONFIG_RFKILL=y
95CONFIG_RFKILL_INPUT=y
96CONFIG_DEVTMPFS=y
97CONFIG_DEVTMPFS_MOUNT=y
98CONFIG_CONNECTOR=y
99CONFIG_MTD=y
100CONFIG_MTD_CHAR=y
101CONFIG_MTD_BLOCK=y
102CONFIG_MTD_CFI=y
103CONFIG_MTD_CFI_AMDSTD=y
104CONFIG_MTD_PHYSMAP=y
105CONFIG_MTD_M25P80=y
106CONFIG_MTD_NAND=y
107CONFIG_MTD_NAND_GPMI_NAND=y
108CONFIG_MTD_UBI=y
109CONFIG_BLK_DEV_LOOP=y
110CONFIG_MISC_DEVICES=y
111CONFIG_MXS_PERFMON=m
112CONFIG_BLK_DEV_SD=y
113CONFIG_SCSI_MULTI_LUN=y
114CONFIG_ATA=y
115# CONFIG_SATA_PMP is not set
116CONFIG_SATA_AHCI_PLATFORM=y
117CONFIG_NETDEVICES=y
118CONFIG_MICREL_PHY=y
119CONFIG_NET_ETHERNET=y
120CONFIG_SMSC911X=y
121CONFIG_FEC_NAPI=y
122# CONFIG_NETDEV_1000 is not set
123# CONFIG_NETDEV_10000 is not set
124CONFIG_ATH_COMMON=m
125CONFIG_ATH6KL=m
126CONFIG_HOSTAP=y
127CONFIG_INPUT_POLLDEV=y
128CONFIG_INPUT_EVDEV=y
129CONFIG_KEYBOARD_GPIO=y
130# CONFIG_INPUT_MOUSE is not set
131CONFIG_INPUT_TOUCHSCREEN=y
132CONFIG_TOUCHSCREEN_EGALAX=y
133CONFIG_TOUCHSCREEN_EGALAX_SINGLE_TOUCH=y
134CONFIG_TOUCHSCREEN_ELAN=y
135CONFIG_TOUCHSCREEN_MAX11801=y
136CONFIG_INPUT_MISC=y
137CONFIG_INPUT_UINPUT=y
138CONFIG_INPUT_ISL29023=y
139CONFIG_VT_HW_CONSOLE_BINDING=y
140CONFIG_SERIAL_IMX=y
141CONFIG_SERIAL_IMX_CONSOLE=y
142CONFIG_FSL_OTP=y
143CONFIG_HW_RANDOM=y
144CONFIG_MXS_VIIM=y
145CONFIG_I2C=y
146CONFIG_I2C_CHARDEV=y
147CONFIG_I2C_IMX=y
148CONFIG_SPI=y
149CONFIG_SPI_IMX=y
150CONFIG_GPIO_SYSFS=y
151CONFIG_SABRESD_MAX8903=y
152CONFIG_SENSORS_MAX17135=y
153CONFIG_SENSORS_MAG3110=y
154# CONFIG_MXC_MMA8450 is not set
155CONFIG_WATCHDOG=y
156CONFIG_WATCHDOG_NOWAYOUT=y
157CONFIG_IMX2_WDT=y
158CONFIG_MFD_WM8994=y
159CONFIG_MFD_PFUZE=y
160CONFIG_MFD_MAX17135=y
161CONFIG_REGULATOR=y
162CONFIG_REGULATOR_FIXED_VOLTAGE=y
163CONFIG_REGULATOR_PFUZE100=y
164CONFIG_REGULATOR_MAX17135=y
165CONFIG_MEDIA_SUPPORT=y
166CONFIG_VIDEO_DEV=y
167# CONFIG_RC_CORE is not set
168# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
169CONFIG_VIDEO_MXC_CAMERA=m
170CONFIG_MXC_CAMERA_OV3640=m
171CONFIG_MXC_CAMERA_OV5640=m
172CONFIG_MXC_CAMERA_OV8820_MIPI=m
173CONFIG_MXC_CAMERA_OV5642=m
174CONFIG_MXC_TVIN_ADV7180=m
175CONFIG_MXC_CAMERA_OV5640_MIPI=m
176CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
177CONFIG_USB_VIDEO_CLASS=m
178# CONFIG_RADIO_ADAPTERS is not set
179CONFIG_DRM=m
180CONFIG_DRM_VIVANTE=m
181CONFIG_FB=y
182CONFIG_BACKLIGHT_LCD_SUPPORT=y
183# CONFIG_LCD_CLASS_DEVICE is not set
184CONFIG_BACKLIGHT_CLASS_DEVICE=y
185# CONFIG_BACKLIGHT_GENERIC is not set
186CONFIG_BACKLIGHT_PWM=y
187CONFIG_FB_MXC_LDB=y
188CONFIG_FB_MXC_MIPI_DSI=y
189CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
190CONFIG_FB_MXC_EINK_PANEL=y
191CONFIG_FB_MXC_HDMI=y
192CONFIG_FRAMEBUFFER_CONSOLE=y
193CONFIG_FONTS=y
194CONFIG_FONT_8x16=y
195CONFIG_LOGO=y
196CONFIG_SOUND=y
197CONFIG_SND=y
198CONFIG_SND_USB_AUDIO=y
199CONFIG_SND_SOC=y
200CONFIG_SND_IMX_SOC=y
201CONFIG_SND_SOC_IMX_SGTL5000=y
202CONFIG_SND_SOC_IMX_WM8962=y
203CONFIG_SND_SOC_IMX_CS42888=y
204CONFIG_SND_SOC_IMX_SPDIF=y
205CONFIG_SND_SOC_IMX_HDMI=y
206CONFIG_HIDRAW=y
207CONFIG_HID_A4TECH=m
208CONFIG_HID_APPLE=m
209CONFIG_HID_BELKIN=m
210CONFIG_HID_CHERRY=m
211CONFIG_HID_CHICONY=m
212CONFIG_HID_CYPRESS=m
213CONFIG_HID_EZKEY=m
214CONFIG_HID_GYRATION=m
215CONFIG_HID_LOGITECH=m
216CONFIG_HID_MICROSOFT=m
217CONFIG_HID_MONTEREY=m
218CONFIG_HID_PANTHERLORD=m
219CONFIG_HID_PETALYNX=m
220CONFIG_HID_SAMSUNG=m
221CONFIG_HID_SONY=m
222CONFIG_HID_SUNPLUS=m
223CONFIG_USB=y
224# CONFIG_USB_DEVICE_CLASS is not set
225CONFIG_USB_SUSPEND=y
226# CONFIG_USB_OTG_WHITELIST is not set
227CONFIG_USB_EHCI_HCD=y
228CONFIG_USB_EHCI_ARC=y
229CONFIG_USB_EHCI_ROOT_HUB_TT=y
230# CONFIG_USB_EHCI_TT_NEWSCHED is not set
231CONFIG_USB_STORAGE=y
232CONFIG_USB_GADGET=y
233CONFIG_USB_AUDIO=m
234CONFIG_USB_ETH=m
235CONFIG_USB_FILE_STORAGE=m
236CONFIG_USB_G_SERIAL=m
237CONFIG_MXC_OTG=y
238CONFIG_MMC=y
239CONFIG_MMC_UNSAFE_RESUME=y
240CONFIG_MMC_SDHCI=y
241CONFIG_MMC_SDHCI_PLTFM=y
242CONFIG_MMC_SDHCI_ESDHC_IMX=y
243CONFIG_NEW_LEDS=y
244CONFIG_LEDS_CLASS=y
245CONFIG_LEDS_GPIO=y
246CONFIG_LEDS_TRIGGERS=y
247CONFIG_LEDS_TRIGGER_GPIO=y
248CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
249CONFIG_RTC_CLASS=y
250CONFIG_RTC_INTF_DEV_UIE_EMUL=y
251CONFIG_RTC_DRV_SNVS=y
252CONFIG_DMADEVICES=y
253CONFIG_MXC_PXP_V2=y
254CONFIG_IMX_SDMA=y
255CONFIG_MXC_IPU=y
256# CONFIG_MXC_HMP4E is not set
257# CONFIG_MXC_HWEVENT is not set
258CONFIG_MXC_ASRC=y
259CONFIG_MXC_MLB150=m
260CONFIG_MXC_GPU_VIV=y
261CONFIG_MXC_MIPI_CSI2=y
262CONFIG_EXT2_FS=y
263CONFIG_EXT3_FS=y
264# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
265CONFIG_EXT4_FS=y
266CONFIG_AUTOFS4_FS=m
267CONFIG_MSDOS_FS=y
268CONFIG_VFAT_FS=y
269CONFIG_TMPFS=y
270CONFIG_JFFS2_FS=y
271CONFIG_UBIFS_FS=y
272CONFIG_CRAMFS=y
273CONFIG_NFS_FS=y
274CONFIG_NFS_V3=y
275CONFIG_ROOT_NFS=y
276CONFIG_PARTITION_ADVANCED=y
277CONFIG_EFI_PARTITION=y
278CONFIG_NLS_CODEPAGE_437=y
279CONFIG_NLS_ASCII=m
280CONFIG_NLS_ISO8859_1=y
281CONFIG_NLS_UTF8=m
282CONFIG_MAGIC_SYSRQ=y
283CONFIG_DEBUG_FS=y
284CONFIG_SYSCTL_SYSCALL_CHECK=y
285# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set
286CONFIG_FTRACE=y
287# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
288CONFIG_CRYPTO_TEST=m
289CONFIG_CRYPTO_CCM=y
290CONFIG_CRYPTO_GCM=y
291CONFIG_CRYPTO_CBC=y
292CONFIG_CRYPTO_CTS=y
293CONFIG_CRYPTO_LRW=y
294CONFIG_CRYPTO_PCBC=y
295CONFIG_CRYPTO_XTS=y
296CONFIG_CRYPTO_DES=y
297# CONFIG_CRYPTO_ANSI_CPRNG is not set
298CONFIG_CRYPTO_DEV_FSL_CAAM=y
299CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y
300CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y
301CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y
302CONFIG_CRC_CCITT=m
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6s/defconfig b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6s/defconfig
deleted file mode 100644
index b8f88f7b0..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6s/defconfig
+++ /dev/null
@@ -1,267 +0,0 @@
1CONFIG_ARM_PATCH_PHYS_VIRT=y
2CONFIG_EXPERIMENTAL=y
3CONFIG_SYSVIPC=y
4CONFIG_IKCONFIG=y
5CONFIG_IKCONFIG_PROC=y
6CONFIG_LOG_BUF_SHIFT=14
7CONFIG_CGROUPS=y
8CONFIG_EMBEDDED=y
9CONFIG_PERF_EVENTS=y
10CONFIG_KPROBES=y
11CONFIG_MODULES=y
12CONFIG_MODULE_UNLOAD=y
13CONFIG_MODULE_FORCE_UNLOAD=y
14CONFIG_MODVERSIONS=y
15# CONFIG_BLK_DEV_BSG is not set
16CONFIG_ARCH_MXC=y
17CONFIG_GPIO_PCA953X=y
18CONFIG_ARCH_MX6=y
19CONFIG_FORCE_MAX_ZONEORDER=14
20CONFIG_MACH_MX6Q_ARM2=y
21CONFIG_MACH_MX6SL_ARM2=y
22CONFIG_MACH_MX6SL_EVK=y
23CONFIG_MACH_MX6Q_SABRESD=y
24CONFIG_USB_EHCI_ARC_H1=y
25CONFIG_MX6_INTER_LDO_BYPASS=y
26CONFIG_MXC_PWM=y
27CONFIG_CLK_DEBUG=y
28CONFIG_DMA_ZONE_SIZE=184
29CONFIG_ARM_ERRATA_743622=y
30CONFIG_ARM_ERRATA_754322=y
31CONFIG_NO_HZ=y
32CONFIG_HIGH_RES_TIMERS=y
33CONFIG_VMSPLIT_2G=y
34CONFIG_PREEMPT=y
35CONFIG_AEABI=y
36# CONFIG_OABI_COMPAT is not set
37CONFIG_HIGHMEM=y
38CONFIG_COMPACTION=y
39CONFIG_KSM=y
40CONFIG_ZBOOT_ROM_TEXT=0x0
41CONFIG_ZBOOT_ROM_BSS=0x0
42CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off"
43CONFIG_AUTO_ZRELADDR=y
44CONFIG_CPU_FREQ=y
45CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y
46CONFIG_CPU_FREQ_GOV_POWERSAVE=y
47CONFIG_CPU_FREQ_GOV_USERSPACE=y
48# CONFIG_CPU_FREQ_IMX is not set
49CONFIG_VFP=y
50CONFIG_NEON=y
51# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
52CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y
53CONFIG_PM_RUNTIME=y
54CONFIG_PM_DEBUG=y
55CONFIG_APM_EMULATION=y
56CONFIG_NET=y
57CONFIG_PACKET=y
58CONFIG_UNIX=y
59CONFIG_INET=y
60CONFIG_IP_MULTICAST=y
61CONFIG_IP_PNP=y
62CONFIG_IP_PNP_DHCP=y
63CONFIG_IP_PNP_BOOTP=y
64# CONFIG_INET_LRO is not set
65# CONFIG_IPV6 is not set
66CONFIG_NETFILTER=y
67CONFIG_LLC2=y
68CONFIG_CAN=y
69CONFIG_CAN_RAW=y
70CONFIG_CAN_BCM=y
71CONFIG_CAN_VCAN=y
72CONFIG_CAN_FLEXCAN=y
73CONFIG_BT=y
74CONFIG_BT_L2CAP=y
75CONFIG_BT_SCO=y
76CONFIG_BT_RFCOMM=y
77CONFIG_BT_RFCOMM_TTY=y
78CONFIG_BT_BNEP=y
79CONFIG_BT_BNEP_MC_FILTER=y
80CONFIG_BT_BNEP_PROTO_FILTER=y
81CONFIG_BT_HIDP=y
82CONFIG_BT_HCIBTUSB=y
83CONFIG_BT_HCIUART=y
84CONFIG_BT_HCIUART_ATH3K=y
85CONFIG_BT_HCIVHCI=y
86CONFIG_CFG80211=y
87CONFIG_RFKILL=y
88CONFIG_RFKILL_INPUT=y
89CONFIG_UEVENT_HELPER_PATH=""
90CONFIG_DEVTMPFS=y
91CONFIG_DEVTMPFS_MOUNT=y
92CONFIG_CONNECTOR=y
93CONFIG_MTD=y
94CONFIG_MTD_CMDLINE_PARTS=y
95CONFIG_MTD_CHAR=y
96CONFIG_MTD_BLOCK=y
97CONFIG_MTD_M25P80=y
98CONFIG_MTD_NAND=y
99CONFIG_MTD_UBI=y
100CONFIG_BLK_DEV_LOOP=y
101CONFIG_MISC_DEVICES=y
102CONFIG_MXS_PERFMON=m
103CONFIG_BLK_DEV_SD=y
104CONFIG_SCSI_MULTI_LUN=y
105CONFIG_ATA=y
106# CONFIG_SATA_PMP is not set
107CONFIG_SATA_AHCI_PLATFORM=y
108CONFIG_NETDEVICES=y
109CONFIG_MICREL_PHY=y
110CONFIG_NET_ETHERNET=y
111CONFIG_SMSC911X=y
112# CONFIG_NETDEV_1000 is not set
113# CONFIG_NETDEV_10000 is not set
114CONFIG_ATH_COMMON=m
115CONFIG_ATH6KL=m
116CONFIG_HOSTAP=y
117CONFIG_INPUT_POLLDEV=y
118CONFIG_INPUT_EVDEV=y
119CONFIG_KEYBOARD_GPIO=y
120CONFIG_KEYBOARD_IMX=y
121# CONFIG_INPUT_MOUSE is not set
122CONFIG_INPUT_TOUCHSCREEN=y
123CONFIG_TOUCHSCREEN_EGALAX=y
124CONFIG_TOUCHSCREEN_ELAN=y
125CONFIG_INPUT_MISC=y
126CONFIG_INPUT_UINPUT=y
127CONFIG_INPUT_ISL29023=y
128CONFIG_SERIAL_IMX=y
129CONFIG_SERIAL_IMX_CONSOLE=y
130CONFIG_FSL_OTP=y
131CONFIG_HW_RANDOM=y
132CONFIG_HW_RANDOM_FSL_RNGC=y
133CONFIG_MXS_VIIM=y
134CONFIG_I2C=y
135CONFIG_I2C_CHARDEV=y
136CONFIG_I2C_IMX=y
137CONFIG_SPI=y
138CONFIG_SPI_IMX=y
139CONFIG_GPIO_SYSFS=y
140CONFIG_SABRESD_MAX8903=y
141CONFIG_SENSORS_MAX17135=y
142CONFIG_SENSORS_MAG3110=y
143# CONFIG_MXC_MMA8451 is not set
144CONFIG_WATCHDOG=y
145CONFIG_WATCHDOG_NOWAYOUT=y
146CONFIG_IMX2_WDT=y
147CONFIG_MFD_WM8994=y
148CONFIG_MFD_PFUZE=y
149CONFIG_MFD_MAX17135=y
150CONFIG_REGULATOR=y
151CONFIG_REGULATOR_FIXED_VOLTAGE=y
152CONFIG_REGULATOR_PFUZE100=y
153CONFIG_REGULATOR_MAX17135=y
154CONFIG_MEDIA_SUPPORT=y
155CONFIG_VIDEO_DEV=y
156# CONFIG_RC_CORE is not set
157# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
158CONFIG_VIDEO_MXC_CSI_CAMERA=y
159CONFIG_MXC_CAMERA_OV5640=y
160CONFIG_VIDEO_MXC_PXP_V4L2=y
161CONFIG_USB_VIDEO_CLASS=m
162# CONFIG_RADIO_ADAPTERS is not set
163CONFIG_FB=y
164CONFIG_BACKLIGHT_LCD_SUPPORT=y
165# CONFIG_LCD_CLASS_DEVICE is not set
166CONFIG_BACKLIGHT_CLASS_DEVICE=y
167# CONFIG_BACKLIGHT_GENERIC is not set
168CONFIG_BACKLIGHT_PWM=y
169CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL=y
170CONFIG_FB_MXC_SII902X_ELCDIF=y
171CONFIG_FB_MXC_EINK_PANEL=y
172CONFIG_FB_MXC_ELCDIF_FB=y
173CONFIG_FRAMEBUFFER_CONSOLE=y
174CONFIG_FONTS=y
175CONFIG_FONT_8x16=y
176CONFIG_LOGO=y
177CONFIG_SOUND=y
178CONFIG_SND=y
179CONFIG_SND_USB_AUDIO=y
180CONFIG_SND_SOC=y
181CONFIG_SND_IMX_SOC=y
182CONFIG_SND_SOC_IMX_SGTL5000=y
183CONFIG_SND_SOC_IMX_WM8958=y
184CONFIG_SND_SOC_IMX_WM8962=y
185CONFIG_SND_SOC_IMX_CS42888=y
186CONFIG_SND_SOC_IMX_SPDIF=y
187CONFIG_SND_SOC_IMX_HDMI=y
188CONFIG_HIDRAW=y
189CONFIG_HID_A4TECH=m
190CONFIG_HID_APPLE=m
191CONFIG_HID_BELKIN=m
192CONFIG_HID_CHERRY=m
193CONFIG_HID_CHICONY=m
194CONFIG_HID_CYPRESS=m
195CONFIG_HID_EZKEY=m
196CONFIG_HID_GYRATION=m
197CONFIG_HID_LOGITECH=m
198CONFIG_HID_MICROSOFT=m
199CONFIG_HID_MONTEREY=m
200CONFIG_HID_PANTHERLORD=m
201CONFIG_HID_PETALYNX=m
202CONFIG_HID_SAMSUNG=m
203CONFIG_HID_SONY=m
204CONFIG_HID_SUNPLUS=m
205CONFIG_USB=y
206# CONFIG_USB_DEVICE_CLASS is not set
207CONFIG_USB_SUSPEND=y
208# CONFIG_USB_OTG_WHITELIST is not set
209CONFIG_USB_EHCI_HCD=y
210CONFIG_USB_EHCI_ARC=y
211CONFIG_USB_EHCI_ROOT_HUB_TT=y
212# CONFIG_USB_EHCI_TT_NEWSCHED is not set
213CONFIG_USB_STORAGE=y
214CONFIG_USB_GADGET=y
215CONFIG_USB_AUDIO=m
216CONFIG_USB_ETH=m
217CONFIG_USB_FILE_STORAGE=m
218CONFIG_USB_G_SERIAL=m
219CONFIG_MXC_OTG=y
220CONFIG_MMC=y
221CONFIG_MMC_UNSAFE_RESUME=y
222CONFIG_MMC_SDHCI=y
223CONFIG_MMC_SDHCI_PLTFM=y
224CONFIG_MMC_SDHCI_ESDHC_IMX=y
225CONFIG_NEW_LEDS=y
226CONFIG_LEDS_CLASS=y
227CONFIG_RTC_CLASS=y
228CONFIG_RTC_INTF_DEV_UIE_EMUL=y
229CONFIG_RTC_DRV_SNVS=y
230CONFIG_DMADEVICES=y
231CONFIG_MXC_PXP_V2=y
232CONFIG_IMX_SDMA=y
233# CONFIG_MXC_HMP4E is not set
234# CONFIG_MXC_HWEVENT is not set
235CONFIG_MXC_ASRC=y
236CONFIG_MXC_MLB150=m
237CONFIG_MXC_GPU_VIV=y
238CONFIG_MXC_MIPI_CSI2=y
239CONFIG_EXT2_FS=y
240CONFIG_EXT3_FS=y
241# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
242CONFIG_EXT4_FS=y
243CONFIG_AUTOFS4_FS=m
244CONFIG_MSDOS_FS=y
245CONFIG_VFAT_FS=y
246CONFIG_TMPFS=y
247CONFIG_JFFS2_FS=y
248CONFIG_UBIFS_FS=y
249CONFIG_CRAMFS=y
250CONFIG_NFS_FS=y
251CONFIG_NFS_V3=y
252CONFIG_ROOT_NFS=y
253CONFIG_PARTITION_ADVANCED=y
254CONFIG_EFI_PARTITION=y
255CONFIG_NLS_CODEPAGE_437=y
256CONFIG_NLS_ASCII=m
257CONFIG_NLS_ISO8859_1=y
258CONFIG_NLS_UTF8=m
259CONFIG_DEBUG_FS=y
260CONFIG_SYSCTL_SYSCALL_CHECK=y
261CONFIG_FTRACE=y
262CONFIG_CRYPTO_AUTHENC=m
263CONFIG_CRYPTO_TEST=m
264CONFIG_CRYPTO_CBC=y
265# CONFIG_CRYPTO_ANSI_CPRNG is not set
266CONFIG_CRYPTO_DEV_DCP=y
267CONFIG_CRC_CCITT=m
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6sl/defconfig b/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6sl/defconfig
deleted file mode 100644
index b8f88f7b0..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx-3.0.35/mx6sl/defconfig
+++ /dev/null
@@ -1,267 +0,0 @@
1CONFIG_ARM_PATCH_PHYS_VIRT=y
2CONFIG_EXPERIMENTAL=y
3CONFIG_SYSVIPC=y
4CONFIG_IKCONFIG=y
5CONFIG_IKCONFIG_PROC=y
6CONFIG_LOG_BUF_SHIFT=14
7CONFIG_CGROUPS=y
8CONFIG_EMBEDDED=y
9CONFIG_PERF_EVENTS=y
10CONFIG_KPROBES=y
11CONFIG_MODULES=y
12CONFIG_MODULE_UNLOAD=y
13CONFIG_MODULE_FORCE_UNLOAD=y
14CONFIG_MODVERSIONS=y
15# CONFIG_BLK_DEV_BSG is not set
16CONFIG_ARCH_MXC=y
17CONFIG_GPIO_PCA953X=y
18CONFIG_ARCH_MX6=y
19CONFIG_FORCE_MAX_ZONEORDER=14
20CONFIG_MACH_MX6Q_ARM2=y
21CONFIG_MACH_MX6SL_ARM2=y
22CONFIG_MACH_MX6SL_EVK=y
23CONFIG_MACH_MX6Q_SABRESD=y
24CONFIG_USB_EHCI_ARC_H1=y
25CONFIG_MX6_INTER_LDO_BYPASS=y
26CONFIG_MXC_PWM=y
27CONFIG_CLK_DEBUG=y
28CONFIG_DMA_ZONE_SIZE=184
29CONFIG_ARM_ERRATA_743622=y
30CONFIG_ARM_ERRATA_754322=y
31CONFIG_NO_HZ=y
32CONFIG_HIGH_RES_TIMERS=y
33CONFIG_VMSPLIT_2G=y
34CONFIG_PREEMPT=y
35CONFIG_AEABI=y
36# CONFIG_OABI_COMPAT is not set
37CONFIG_HIGHMEM=y
38CONFIG_COMPACTION=y
39CONFIG_KSM=y
40CONFIG_ZBOOT_ROM_TEXT=0x0
41CONFIG_ZBOOT_ROM_BSS=0x0
42CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off"
43CONFIG_AUTO_ZRELADDR=y
44CONFIG_CPU_FREQ=y
45CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y
46CONFIG_CPU_FREQ_GOV_POWERSAVE=y
47CONFIG_CPU_FREQ_GOV_USERSPACE=y
48# CONFIG_CPU_FREQ_IMX is not set
49CONFIG_VFP=y
50CONFIG_NEON=y
51# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
52CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y
53CONFIG_PM_RUNTIME=y
54CONFIG_PM_DEBUG=y
55CONFIG_APM_EMULATION=y
56CONFIG_NET=y
57CONFIG_PACKET=y
58CONFIG_UNIX=y
59CONFIG_INET=y
60CONFIG_IP_MULTICAST=y
61CONFIG_IP_PNP=y
62CONFIG_IP_PNP_DHCP=y
63CONFIG_IP_PNP_BOOTP=y
64# CONFIG_INET_LRO is not set
65# CONFIG_IPV6 is not set
66CONFIG_NETFILTER=y
67CONFIG_LLC2=y
68CONFIG_CAN=y
69CONFIG_CAN_RAW=y
70CONFIG_CAN_BCM=y
71CONFIG_CAN_VCAN=y
72CONFIG_CAN_FLEXCAN=y
73CONFIG_BT=y
74CONFIG_BT_L2CAP=y
75CONFIG_BT_SCO=y
76CONFIG_BT_RFCOMM=y
77CONFIG_BT_RFCOMM_TTY=y
78CONFIG_BT_BNEP=y
79CONFIG_BT_BNEP_MC_FILTER=y
80CONFIG_BT_BNEP_PROTO_FILTER=y
81CONFIG_BT_HIDP=y
82CONFIG_BT_HCIBTUSB=y
83CONFIG_BT_HCIUART=y
84CONFIG_BT_HCIUART_ATH3K=y
85CONFIG_BT_HCIVHCI=y
86CONFIG_CFG80211=y
87CONFIG_RFKILL=y
88CONFIG_RFKILL_INPUT=y
89CONFIG_UEVENT_HELPER_PATH=""
90CONFIG_DEVTMPFS=y
91CONFIG_DEVTMPFS_MOUNT=y
92CONFIG_CONNECTOR=y
93CONFIG_MTD=y
94CONFIG_MTD_CMDLINE_PARTS=y
95CONFIG_MTD_CHAR=y
96CONFIG_MTD_BLOCK=y
97CONFIG_MTD_M25P80=y
98CONFIG_MTD_NAND=y
99CONFIG_MTD_UBI=y
100CONFIG_BLK_DEV_LOOP=y
101CONFIG_MISC_DEVICES=y
102CONFIG_MXS_PERFMON=m
103CONFIG_BLK_DEV_SD=y
104CONFIG_SCSI_MULTI_LUN=y
105CONFIG_ATA=y
106# CONFIG_SATA_PMP is not set
107CONFIG_SATA_AHCI_PLATFORM=y
108CONFIG_NETDEVICES=y
109CONFIG_MICREL_PHY=y
110CONFIG_NET_ETHERNET=y
111CONFIG_SMSC911X=y
112# CONFIG_NETDEV_1000 is not set
113# CONFIG_NETDEV_10000 is not set
114CONFIG_ATH_COMMON=m
115CONFIG_ATH6KL=m
116CONFIG_HOSTAP=y
117CONFIG_INPUT_POLLDEV=y
118CONFIG_INPUT_EVDEV=y
119CONFIG_KEYBOARD_GPIO=y
120CONFIG_KEYBOARD_IMX=y
121# CONFIG_INPUT_MOUSE is not set
122CONFIG_INPUT_TOUCHSCREEN=y
123CONFIG_TOUCHSCREEN_EGALAX=y
124CONFIG_TOUCHSCREEN_ELAN=y
125CONFIG_INPUT_MISC=y
126CONFIG_INPUT_UINPUT=y
127CONFIG_INPUT_ISL29023=y
128CONFIG_SERIAL_IMX=y
129CONFIG_SERIAL_IMX_CONSOLE=y
130CONFIG_FSL_OTP=y
131CONFIG_HW_RANDOM=y
132CONFIG_HW_RANDOM_FSL_RNGC=y
133CONFIG_MXS_VIIM=y
134CONFIG_I2C=y
135CONFIG_I2C_CHARDEV=y
136CONFIG_I2C_IMX=y
137CONFIG_SPI=y
138CONFIG_SPI_IMX=y
139CONFIG_GPIO_SYSFS=y
140CONFIG_SABRESD_MAX8903=y
141CONFIG_SENSORS_MAX17135=y
142CONFIG_SENSORS_MAG3110=y
143# CONFIG_MXC_MMA8451 is not set
144CONFIG_WATCHDOG=y
145CONFIG_WATCHDOG_NOWAYOUT=y
146CONFIG_IMX2_WDT=y
147CONFIG_MFD_WM8994=y
148CONFIG_MFD_PFUZE=y
149CONFIG_MFD_MAX17135=y
150CONFIG_REGULATOR=y
151CONFIG_REGULATOR_FIXED_VOLTAGE=y
152CONFIG_REGULATOR_PFUZE100=y
153CONFIG_REGULATOR_MAX17135=y
154CONFIG_MEDIA_SUPPORT=y
155CONFIG_VIDEO_DEV=y
156# CONFIG_RC_CORE is not set
157# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
158CONFIG_VIDEO_MXC_CSI_CAMERA=y
159CONFIG_MXC_CAMERA_OV5640=y
160CONFIG_VIDEO_MXC_PXP_V4L2=y
161CONFIG_USB_VIDEO_CLASS=m
162# CONFIG_RADIO_ADAPTERS is not set
163CONFIG_FB=y
164CONFIG_BACKLIGHT_LCD_SUPPORT=y
165# CONFIG_LCD_CLASS_DEVICE is not set
166CONFIG_BACKLIGHT_CLASS_DEVICE=y
167# CONFIG_BACKLIGHT_GENERIC is not set
168CONFIG_BACKLIGHT_PWM=y
169CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL=y
170CONFIG_FB_MXC_SII902X_ELCDIF=y
171CONFIG_FB_MXC_EINK_PANEL=y
172CONFIG_FB_MXC_ELCDIF_FB=y
173CONFIG_FRAMEBUFFER_CONSOLE=y
174CONFIG_FONTS=y
175CONFIG_FONT_8x16=y
176CONFIG_LOGO=y
177CONFIG_SOUND=y
178CONFIG_SND=y
179CONFIG_SND_USB_AUDIO=y
180CONFIG_SND_SOC=y
181CONFIG_SND_IMX_SOC=y
182CONFIG_SND_SOC_IMX_SGTL5000=y
183CONFIG_SND_SOC_IMX_WM8958=y
184CONFIG_SND_SOC_IMX_WM8962=y
185CONFIG_SND_SOC_IMX_CS42888=y
186CONFIG_SND_SOC_IMX_SPDIF=y
187CONFIG_SND_SOC_IMX_HDMI=y
188CONFIG_HIDRAW=y
189CONFIG_HID_A4TECH=m
190CONFIG_HID_APPLE=m
191CONFIG_HID_BELKIN=m
192CONFIG_HID_CHERRY=m
193CONFIG_HID_CHICONY=m
194CONFIG_HID_CYPRESS=m
195CONFIG_HID_EZKEY=m
196CONFIG_HID_GYRATION=m
197CONFIG_HID_LOGITECH=m
198CONFIG_HID_MICROSOFT=m
199CONFIG_HID_MONTEREY=m
200CONFIG_HID_PANTHERLORD=m
201CONFIG_HID_PETALYNX=m
202CONFIG_HID_SAMSUNG=m
203CONFIG_HID_SONY=m
204CONFIG_HID_SUNPLUS=m
205CONFIG_USB=y
206# CONFIG_USB_DEVICE_CLASS is not set
207CONFIG_USB_SUSPEND=y
208# CONFIG_USB_OTG_WHITELIST is not set
209CONFIG_USB_EHCI_HCD=y
210CONFIG_USB_EHCI_ARC=y
211CONFIG_USB_EHCI_ROOT_HUB_TT=y
212# CONFIG_USB_EHCI_TT_NEWSCHED is not set
213CONFIG_USB_STORAGE=y
214CONFIG_USB_GADGET=y
215CONFIG_USB_AUDIO=m
216CONFIG_USB_ETH=m
217CONFIG_USB_FILE_STORAGE=m
218CONFIG_USB_G_SERIAL=m
219CONFIG_MXC_OTG=y
220CONFIG_MMC=y
221CONFIG_MMC_UNSAFE_RESUME=y
222CONFIG_MMC_SDHCI=y
223CONFIG_MMC_SDHCI_PLTFM=y
224CONFIG_MMC_SDHCI_ESDHC_IMX=y
225CONFIG_NEW_LEDS=y
226CONFIG_LEDS_CLASS=y
227CONFIG_RTC_CLASS=y
228CONFIG_RTC_INTF_DEV_UIE_EMUL=y
229CONFIG_RTC_DRV_SNVS=y
230CONFIG_DMADEVICES=y
231CONFIG_MXC_PXP_V2=y
232CONFIG_IMX_SDMA=y
233# CONFIG_MXC_HMP4E is not set
234# CONFIG_MXC_HWEVENT is not set
235CONFIG_MXC_ASRC=y
236CONFIG_MXC_MLB150=m
237CONFIG_MXC_GPU_VIV=y
238CONFIG_MXC_MIPI_CSI2=y
239CONFIG_EXT2_FS=y
240CONFIG_EXT3_FS=y
241# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
242CONFIG_EXT4_FS=y
243CONFIG_AUTOFS4_FS=m
244CONFIG_MSDOS_FS=y
245CONFIG_VFAT_FS=y
246CONFIG_TMPFS=y
247CONFIG_JFFS2_FS=y
248CONFIG_UBIFS_FS=y
249CONFIG_CRAMFS=y
250CONFIG_NFS_FS=y
251CONFIG_NFS_V3=y
252CONFIG_ROOT_NFS=y
253CONFIG_PARTITION_ADVANCED=y
254CONFIG_EFI_PARTITION=y
255CONFIG_NLS_CODEPAGE_437=y
256CONFIG_NLS_ASCII=m
257CONFIG_NLS_ISO8859_1=y
258CONFIG_NLS_UTF8=m
259CONFIG_DEBUG_FS=y
260CONFIG_SYSCTL_SYSCALL_CHECK=y
261CONFIG_FTRACE=y
262CONFIG_CRYPTO_AUTHENC=m
263CONFIG_CRYPTO_TEST=m
264CONFIG_CRYPTO_CBC=y
265# CONFIG_CRYPTO_ANSI_CPRNG is not set
266CONFIG_CRYPTO_DEV_DCP=y
267CONFIG_CRC_CCITT=m
diff --git a/meta-fsl-arm/recipes-kernel/linux/linux-imx_3.0.35.bb b/meta-fsl-arm/recipes-kernel/linux/linux-imx_3.0.35.bb
deleted file mode 100644
index e2d808ec7..000000000
--- a/meta-fsl-arm/recipes-kernel/linux/linux-imx_3.0.35.bb
+++ /dev/null
@@ -1,26 +0,0 @@
1# Copyright (C) 2011-2013 Freescale Semiconductor
2# Released under the MIT license (see COPYING.MIT for the terms)
3
4include linux-imx.inc
5
6PR = "r38"
7
8COMPATIBLE_MACHINE = "(mx6)"
9
10# Revision of 4.1.0 branch
11SRCREV = "bdde708ebfde4a8c1d3829578d3f6481a343533a"
12LOCALVERSION = "-4.1.0+yocto"
13SRCBRANCH = "imx_3.0.35_4.1.0"
14
15# Patches need for Yocto and not applied by Freescale when doing 4.1.0 branch
16SRC_URI += "file://drm-vivante-Add-00-sufix-in-returned-bus-Id.patch \
17 file://epdc-Rename-mxcfb_epdc_kernel.h-to-mxc_epdc.h.patch \
18 file://0001-perf-tools-Fix-getrusage-related-build-failure-on-gl.patch \
19 file://0002-ARM-7668-1-fix-memset-related-crashes-caused-by-rece.patch \
20 file://0003-ARM-7670-1-fix-the-memset-fix.patch \
21 file://0004-ENGR00271136-Fix-build-break-when-CONFIG_CLK_DEBUG-i.patch \
22 file://0005-ENGR00271359-Add-Multi-touch-support.patch \
23 file://0006-Add-support-for-DVI-monitors.patch \
24 file://0007-ARM-mach-mx6-board-mx6q_sabresd-Register-SDHC3-first.patch \
25 file://ENGR00278350-gpu-viante-4.6.9p13-kernel-part-integra.patch \
26"
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-12-18 07:12:07 +0000