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authorEric Bénard <eric@eukrea.com>2012-03-08 17:22:49 +0100
committerOtavio Salvador <otavio@ossystems.com.br>2012-03-08 16:28:17 +0000
commit0b29bf9844e5444026d97d7345fc996ad0578eb2 (patch)
treef1d398bc68e7e9adfa010c83fc23a1d8ebafb974
parentf26ae2af01db7ba6afea511ff6f25d1ac4e7e434 (diff)
downloadmeta-freescale-0b29bf9844e5444026d97d7345fc996ad0578eb2.tar.gz
barebox: add recipe
barebox is a modern bootloader, this recipe adds support for the imx53qsb and includes patches to support both DA9053 and MC34708 based QSB (named MCIMX53-START & MCIMX53-START-R). These patches are now mainlined in the next branch of barebox so they will disapear in the next update (ie barebox-2012.04.0) Signed-off-by: Eric Bénard <eric@eukrea.com>
Diffstat
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0001-add-i2c-clock-support.patch60
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0002-mfd-add-mc34708-driver.patch459
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0003-i.MX53-add-silicn-revision-functions.patch90
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0004-i.MX53-enable-pull-up-on-I2C0-pins.patch54
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0005-mx53-loco-add-i2c-support.patch60
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0006-mx53-loco-add-board-revision-support.patch104
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0007-mx53-loco-update-defconfig.patch51
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/config51
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/defconfig68
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox.inc53
-rw-r--r--meta-fsl-arm/recipes-bsp/barebox/barebox_2012.02.0.bb26
11 files changed, 1076 insertions, 0 deletions
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0001-add-i2c-clock-support.patch b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0001-add-i2c-clock-support.patch
new file mode 100644
index 000000000..83662a3d5
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0001-add-i2c-clock-support.patch
@@ -0,0 +1,60 @@
1From 46db2c424164101964bd88f39d3693d7a786d1a4 Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
3Date: Mon, 20 Feb 2012 22:32:22 +0100
4Subject: [PATCH 1/7] add i2c clock support
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9Signed-off-by: Eric Bénard <eric@eukrea.com>
10---
11Upstream-Status: Applied for 2012.04.0
12
13 arch/arm/mach-imx/speed-imx53.c | 26 ++++++++++++++++++++++++++
14 1 files changed, 26 insertions(+), 0 deletions(-)
15
16diff --git a/arch/arm/mach-imx/speed-imx53.c b/arch/arm/mach-imx/speed-imx53.c
17index 0d6ac24..a2385fa 100644
18--- a/arch/arm/mach-imx/speed-imx53.c
19+++ b/arch/arm/mach-imx/speed-imx53.c
20@@ -169,6 +169,31 @@ unsigned long imx_get_fecclk(void)
21 return imx_get_ipgclk();
22 }
23
24+static unsigned long imx_get_ipg_perclk(void)
25+{
26+ u32 reg;
27+
28+ reg = ccm_readl(MX5_CCM_CBCDR);
29+ if (!(reg & MX5_CCM_CBCDR_PERIPH_CLK_SEL))
30+ return pll2_sw_get_rate();
31+ reg = ccm_readl(MX5_CCM_CBCMR);
32+ switch ((reg & MX5_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >>
33+ MX5_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) {
34+ case 0:
35+ return pll1_main_get_rate();
36+ case 1:
37+ return pll3_sw_get_rate();
38+ /* case 2:
39+ TODO : LP_APM */
40+ }
41+ return 0;
42+}
43+
44+unsigned long imx_get_i2cclk(void)
45+{
46+ return imx_get_ipg_perclk();
47+}
48+
49 unsigned long imx_get_mmcclk(void)
50 {
51 u32 reg, prediv, podf, rate;
52@@ -201,4 +226,5 @@ void imx_dump_clocks(void)
53 printf("ipg: %ld\n", imx_get_ipgclk());
54 printf("fec: %ld\n", imx_get_fecclk());
55 printf("gpt: %ld\n", imx_get_gptclk());
56+ printf("i2c: %ld\n", imx_get_i2cclk());
57 }
58--
591.7.7.6
60
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0002-mfd-add-mc34708-driver.patch b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0002-mfd-add-mc34708-driver.patch
new file mode 100644
index 000000000..a494d63f0
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0002-mfd-add-mc34708-driver.patch
@@ -0,0 +1,459 @@
1From cafc72b3292a6820a01b6c5baed4c821ba2e62e7 Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
3Date: Tue, 21 Feb 2012 01:00:29 +0100
4Subject: [PATCH 2/7] mfd: add mc34708 driver
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9this driver is a copie of the mc13892 one
10
11Signed-off-by: Eric Bénard <eric@eukrea.com>
12---
13Upstream-Status: Applied for 2012.04.0
14
15 drivers/mfd/Kconfig | 4 +
16 drivers/mfd/Makefile | 1 +
17 drivers/mfd/mc34708.c | 294 +++++++++++++++++++++++++++++++++++++++++++++++++
18 include/mfd/mc34708.h | 102 +++++++++++++++++
19 4 files changed, 401 insertions(+), 0 deletions(-)
20 create mode 100644 drivers/mfd/mc34708.c
21 create mode 100644 include/mfd/mc34708.h
22
23diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
24index 87797de..b080c1c 100644
25--- a/drivers/mfd/Kconfig
26+++ b/drivers/mfd/Kconfig
27@@ -8,6 +8,10 @@ config I2C_MC34704
28 depends on I2C
29 bool "MC34704 PMIC driver"
30
31+config I2C_MC34708
32+ depends on I2C
33+ bool "MC34708 PMIC driver"
34+
35 config I2C_MC9SDZ60
36 depends on I2C
37 bool "MC9SDZ60 driver"
38diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
39index 1171335..bc9e0e8 100644
40--- a/drivers/mfd/Makefile
41+++ b/drivers/mfd/Makefile
42@@ -1,5 +1,6 @@
43 obj-$(CONFIG_I2C_MC13892) += mc13892.o
44 obj-$(CONFIG_I2C_MC34704) += mc34704.o
45+obj-$(CONFIG_I2C_MC34708) += mc34708.o
46 obj-$(CONFIG_I2C_MC9SDZ60) += mc9sdz60.o
47 obj-$(CONFIG_I2C_LP3972) += lp3972.o
48 obj-$(CONFIG_I2C_TWLCORE) += twl-core.o
49diff --git a/drivers/mfd/mc34708.c b/drivers/mfd/mc34708.c
50new file mode 100644
51index 0000000..e7f40c0
52--- /dev/null
53+++ b/drivers/mfd/mc34708.c
54@@ -0,0 +1,294 @@
55+/*
56+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
57+ * 2009 Marc Kleine-Budde <mkl@pengutronix.de>
58+ *
59+ * This program is free software; you can redistribute it and/or
60+ * modify it under the terms of the GNU General Public License as
61+ * published by the Free Software Foundation; either version 2 of
62+ * the License, or (at your option) any later version.
63+ *
64+ * This program is distributed in the hope that it will be useful,
65+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
66+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
67+ * GNU General Public License for more details.
68+ *
69+ * You should have received a copy of the GNU General Public License
70+ * along with this program; if not, write to the Free Software
71+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
72+ * MA 02111-1307 USA
73+ *
74+ */
75+
76+#include <common.h>
77+#include <init.h>
78+#include <driver.h>
79+#include <xfuncs.h>
80+#include <errno.h>
81+#include <spi/spi.h>
82+#include <malloc.h>
83+
84+#include <i2c/i2c.h>
85+#include <mfd/mc34708.h>
86+
87+#define DRIVERNAME "mc34708"
88+
89+#define to_mc34708(a) container_of(a, struct mc34708, cdev)
90+
91+static struct mc34708 *mc_dev;
92+
93+struct mc34708 *mc34708_get(void)
94+{
95+ if (!mc_dev)
96+ return NULL;
97+
98+ return mc_dev;
99+}
100+EXPORT_SYMBOL(mc34708_get);
101+
102+#ifdef CONFIG_SPI
103+static int spi_rw(struct spi_device *spi, void * buf, size_t len)
104+{
105+ int ret;
106+
107+ struct spi_transfer t = {
108+ .tx_buf = (const void *)buf,
109+ .rx_buf = buf,
110+ .len = len,
111+ .cs_change = 0,
112+ .delay_usecs = 0,
113+ };
114+ struct spi_message m;
115+
116+ spi_message_init(&m);
117+ spi_message_add_tail(&t, &m);
118+
119+ if ((ret = spi_sync(spi, &m)))
120+ return ret;
121+ return 0;
122+}
123+
124+#define MXC_PMIC_REG_NUM(reg) (((reg) & 0x3f) << 25)
125+#define MXC_PMIC_WRITE (1 << 31)
126+
127+static int mc34708_spi_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
128+{
129+ uint32_t buf;
130+
131+ buf = MXC_PMIC_REG_NUM(reg);
132+
133+ spi_rw(mc34708->spi, &buf, 4);
134+
135+ *val = buf;
136+
137+ return 0;
138+}
139+
140+static int mc34708_spi_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
141+{
142+ uint32_t buf = MXC_PMIC_REG_NUM(reg) | MXC_PMIC_WRITE | (val & 0xffffff);
143+
144+ spi_rw(mc34708->spi, &buf, 4);
145+
146+ return 0;
147+}
148+#endif
149+
150+#ifdef CONFIG_I2C
151+static int mc34708_i2c_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
152+{
153+ u8 buf[3];
154+ int ret;
155+
156+ ret = i2c_read_reg(mc34708->client, reg, buf, 3);
157+ *val = buf[0] << 16 | buf[1] << 8 | buf[2] << 0;
158+
159+ return ret == 3 ? 0 : ret;
160+}
161+
162+static int mc34708_i2c_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
163+{
164+ u8 buf[] = {
165+ val >> 16,
166+ val >> 8,
167+ val >> 0,
168+ };
169+ int ret;
170+
171+ ret = i2c_write_reg(mc34708->client, reg, buf, 3);
172+
173+ return ret == 3 ? 0 : ret;
174+}
175+#endif
176+
177+int mc34708_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val)
178+{
179+#ifdef CONFIG_I2C
180+ if (mc34708->mode == MC34708_MODE_I2C)
181+ return mc34708_i2c_reg_write(mc34708, reg, val);
182+#endif
183+#ifdef CONFIG_SPI
184+ if (mc34708->mode == MC34708_MODE_SPI)
185+ return mc34708_spi_reg_write(mc34708, reg, val);
186+#endif
187+ return -EINVAL;
188+}
189+EXPORT_SYMBOL(mc34708_reg_write);
190+
191+int mc34708_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val)
192+{
193+#ifdef CONFIG_I2C
194+ if (mc34708->mode == MC34708_MODE_I2C)
195+ return mc34708_i2c_reg_read(mc34708, reg, val);
196+#endif
197+#ifdef CONFIG_SPI
198+ if (mc34708->mode == MC34708_MODE_SPI)
199+ return mc34708_spi_reg_read(mc34708, reg, val);
200+#endif
201+ return -EINVAL;
202+}
203+EXPORT_SYMBOL(mc34708_reg_read);
204+
205+int mc34708_set_bits(struct mc34708 *mc34708, enum mc34708_reg reg, u32 mask, u32 val)
206+{
207+ u32 tmp;
208+ int err;
209+
210+ err = mc34708_reg_read(mc34708, reg, &tmp);
211+ tmp = (tmp & ~mask) | val;
212+
213+ if (!err)
214+ err = mc34708_reg_write(mc34708, reg, tmp);
215+
216+ return err;
217+}
218+EXPORT_SYMBOL(mc34708_set_bits);
219+
220+static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset, ulong flags)
221+{
222+ struct mc34708 *priv = to_mc34708(cdev);
223+ u32 *buf = _buf;
224+ size_t i = count >> 2;
225+ int err;
226+
227+ offset >>= 2;
228+
229+ while (i) {
230+ err = mc34708_reg_read(priv, offset, buf);
231+ if (err)
232+ return (ssize_t)err;
233+ buf++;
234+ i--;
235+ offset++;
236+ }
237+
238+ return count;
239+}
240+
241+static ssize_t mc_write(struct cdev *cdev, const void *_buf, size_t count, ulong offset, ulong flags)
242+{
243+ struct mc34708 *mc34708 = to_mc34708(cdev);
244+ const u32 *buf = _buf;
245+ size_t i = count >> 2;
246+ int err;
247+
248+ offset >>= 2;
249+
250+ while (i) {
251+ err = mc34708_reg_write(mc34708, offset, *buf);
252+ if (err)
253+ return (ssize_t)err;
254+ buf++;
255+ i--;
256+ offset++;
257+ }
258+
259+ return count;
260+}
261+
262+static struct file_operations mc_fops = {
263+ .lseek = dev_lseek_default,
264+ .read = mc_read,
265+ .write = mc_write,
266+};
267+
268+static int mc34708_query_revision(struct mc34708 *mc34708)
269+{
270+ unsigned int rev_id;
271+ int rev;
272+
273+ mc34708_reg_read(mc34708, 7, &rev_id);
274+
275+ if (rev_id > 0xFFF)
276+ return -EINVAL;
277+
278+ rev = rev_id & 0xFFF;
279+
280+ dev_info(mc_dev->cdev.dev, "MC34708 ID: 0x%04x\n", rev);
281+
282+ mc34708->revision = rev;
283+
284+ return rev;
285+}
286+
287+static int mc_probe(struct device_d *dev, enum mc34708_mode mode)
288+{
289+ int rev;
290+
291+ if (mc_dev)
292+ return -EBUSY;
293+
294+ mc_dev = xzalloc(sizeof(struct mc34708));
295+ mc_dev->mode = mode;
296+ mc_dev->cdev.name = DRIVERNAME;
297+ if (mode == MC34708_MODE_I2C) {
298+ mc_dev->client = to_i2c_client(dev);
299+ }
300+ if (mode == MC34708_MODE_SPI) {
301+ mc_dev->spi = dev->type_data;
302+ mc_dev->spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
303+ mc_dev->spi->bits_per_word = 32;
304+ }
305+ mc_dev->cdev.size = 256;
306+ mc_dev->cdev.dev = dev;
307+ mc_dev->cdev.ops = &mc_fops;
308+
309+ rev = mc34708_query_revision(mc_dev);
310+ if (rev < 0) {
311+ free(mc_dev);
312+ mc_dev = NULL;
313+ return -EINVAL;
314+ }
315+
316+ devfs_create(&mc_dev->cdev);
317+
318+ return 0;
319+}
320+
321+static int mc_i2c_probe(struct device_d *dev)
322+{
323+ return mc_probe(dev, MC34708_MODE_I2C);
324+}
325+
326+static int mc_spi_probe(struct device_d *dev)
327+{
328+ return mc_probe(dev, MC34708_MODE_SPI);
329+}
330+
331+static struct driver_d mc_i2c_driver = {
332+ .name = "mc34708-i2c",
333+ .probe = mc_i2c_probe,
334+};
335+
336+static struct driver_d mc_spi_driver = {
337+ .name = "mc34708-spi",
338+ .probe = mc_spi_probe,
339+};
340+
341+static int mc_init(void)
342+{
343+ register_driver(&mc_i2c_driver);
344+ register_driver(&mc_spi_driver);
345+ return 0;
346+}
347+
348+device_initcall(mc_init);
349diff --git a/include/mfd/mc34708.h b/include/mfd/mc34708.h
350new file mode 100644
351index 0000000..f384c62
352--- /dev/null
353+++ b/include/mfd/mc34708.h
354@@ -0,0 +1,102 @@
355+/*
356+ * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
357+ *
358+ * This file is released under the GPLv2
359+ *
360+ * Derived from:
361+ * - arch-mxc/pmic_external.h -- contains interface of the PMIC protocol driver
362+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
363+ *
364+ */
365+
366+#ifndef __ASM_ARCH_MC34708_H
367+#define __ASM_ARCH_MC34708_H
368+
369+enum mc34708_reg {
370+ MC34708_REG_INT_STATUS0 = 0x00,
371+ MC34708_REG_INT_MASK0 = 0x01,
372+ MC34708_REG_INT_SENSE0 = 0x02,
373+ MC34708_REG_INT_STATUS1 = 0x03,
374+ MC34708_REG_INT_MASK1 = 0x04,
375+ MC34708_REG_INT_SENSE1 = 0x05,
376+ MC34708_REG_PU_MODE_S = 0x06,
377+ MC34708_REG_IDENTIFICATION = 0x07,
378+ MC34708_REG_REG_FAULT_S = 0x08,
379+ MC34708_REG_ACC0 = 0x09,
380+ MC34708_REG_ACC1 = 0x0a,
381+ MC34708_REG_ACC2 = 0x0b,
382+ MC34708_REG_UNUSED0 = 0x0c,
383+ MC34708_REG_POWER_CTL0 = 0x0d,
384+ MC34708_REG_POWER_CTL1 = 0x0e,
385+ MC34708_REG_POWER_CTL2 = 0x0f,
386+ MC34708_REG_MEM_A = 0x10,
387+ MC34708_REG_MEM_B = 0x11,
388+ MC34708_REG_MEM_C = 0x12,
389+ MC34708_REG_MEM_D = 0x13,
390+ MC34708_REG_RTC_TIME = 0x14,
391+ MC34708_REG_RTC_ALARM = 0x15,
392+ MC34708_REG_RTC_DAY = 0x16,
393+ MC34708_REG_RTC_DAY_ALARM = 0x17,
394+ MC34708_REG_1 = 0x18,
395+ MC34708_REG_2_3 = 0x19,
396+ MC34708_REG_4 = 0x1a,
397+ MC34708_REG_5 = 0x1b,
398+ MC34708_REG_1_2_MODE = 0x1c,
399+ MC34708_REG_3_4_5_MODE = 0x1d,
400+ MC34708_REG_SETTING_0 = 0x1e,
401+ MC34708_REG_SWBST_CTRL = 0x1f,
402+ MC34708_REG_MODE_0 = 0x20,
403+ MC34708_REG_GPIOLV0_CTRL = 0x21,
404+ MC34708_REG_GPIOLV1_CTRL = 0x22,
405+ MC34708_REG_GPIOLV2_CTRL = 0x23,
406+ MC34708_REG_GPIOLV3_CTRL = 0x24,
407+ MC34708_REG_USB_TIMING = 0x25,
408+ MC34708_REG_USB_BUTTON = 0x26,
409+ MC34708_REG_USB_CTRL = 0x27,
410+ MC34708_REG_USB_DEVTYPE = 0x28,
411+ MC34708_REG_UNUSED1 = 0x29,
412+ MC34708_REG_UNUSED2 = 0x2a,
413+ MC34708_REG_ADC0 = 0x2b,
414+ MC34708_REG_ADC1 = 0x2c,
415+ MC34708_REG_ADC2 = 0x2d,
416+ MC34708_REG_ADC3 = 0x2e,
417+ MC34708_REG_ADC4 = 0x2f,
418+ MC34708_REG_ADC5 = 0x30,
419+ MC34708_REG_ADC6 = 0x31,
420+ MC34708_REG_ADC7 = 0x32,
421+ MC34708_REG_BAT_PROFILE = 0x33,
422+ MC34708_REG_CHRG_DEBOUNCE = 0x34,
423+ MC34708_REG_CHRG_SOURCE = 0x35,
424+ MC34708_REG_CHRG_LED_CTRL = 0x36,
425+ MC34708_REG_PWM_CTRL = 0x37,
426+ MC34708_REG_UNUSED3 = 0x38,
427+ MC34708_REG_UNUSED4 = 0x39,
428+ MC34708_REG_UNUSED5 = 0x3a,
429+ MC34708_REG_UNUSED6 = 0x3b,
430+ MC34708_REG_UNUSED7 = 0x3c,
431+ MC34708_REG_UNUSED8 = 0x3d,
432+ MC34708_REG_UNUSED9 = 0x3e,
433+ MC34708_REG_UNUSED10 = 0x3f,
434+};
435+
436+
437+enum mc34708_mode {
438+ MC34708_MODE_I2C,
439+ MC34708_MODE_SPI,
440+};
441+
442+struct mc34708 {
443+ struct cdev cdev;
444+ struct i2c_client *client;
445+ struct spi_device *spi;
446+ enum mc34708_mode mode;
447+ unsigned int revision;
448+};
449+
450+extern struct mc34708 *mc34708_get(void);
451+
452+extern int mc34708_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val);
453+extern int mc34708_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val);
454+extern int mc34708_set_bits(struct mc34708 *mc34708, enum mc34708_reg reg, u32 mask, u32 val);
455+
456+#endif /* __ASM_ARCH_MC34708_H */
457--
4581.7.7.6
459
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0003-i.MX53-add-silicn-revision-functions.patch b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0003-i.MX53-add-silicn-revision-functions.patch
new file mode 100644
index 000000000..9bb2a560e
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0003-i.MX53-add-silicn-revision-functions.patch
@@ -0,0 +1,90 @@
1From 2feeb3198c6d9771f20c03bc1363db40241fd8f5 Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
3Date: Tue, 21 Feb 2012 01:05:43 +0100
4Subject: [PATCH 3/7] i.MX53: add silicn revision functions
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9Signed-off-by: Eric Bénard <eric@eukrea.com>
10---
11Upstream-Status: Applied for 2012.04.0
12
13 arch/arm/mach-imx/imx53.c | 45 +++++++++++++++++++++++++++
14 arch/arm/mach-imx/include/mach/imx53-regs.h | 5 +++
15 2 files changed, 50 insertions(+), 0 deletions(-)
16
17diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c
18index 2fb18e7..ad45be3 100644
19--- a/arch/arm/mach-imx/imx53.c
20+++ b/arch/arm/mach-imx/imx53.c
21@@ -37,6 +37,51 @@ void *imx_gpio_base[] = {
22
23 int imx_gpio_count = ARRAY_SIZE(imx_gpio_base) * 32;
24
25+#define SI_REV 0x48
26+
27+static u32 mx53_silicon_revision;
28+static char *mx53_rev_string = "unknown";
29+
30+int imx_silicon_revision(void)
31+{
32+ return mx53_silicon_revision;
33+}
34+
35+static int query_silicon_revision(void)
36+{
37+ void __iomem *rom = MX53_IROM_BASE_ADDR;
38+ u32 rev;
39+
40+ rev = readl(rom + SI_REV);
41+ switch (rev) {
42+ case 0x10:
43+ mx53_silicon_revision = MX53_CHIP_REV_1_0;
44+ mx53_rev_string = "1.0";
45+ break;
46+ case 0x20:
47+ mx53_silicon_revision = MX53_CHIP_REV_2_0;
48+ mx53_rev_string = "2.0";
49+ break;
50+ case 0x21:
51+ mx53_silicon_revision = MX53_CHIP_REV_2_1;
52+ mx53_rev_string = "2.1";
53+ break;
54+ default:
55+ mx53_silicon_revision = 0;
56+ }
57+
58+ return 0;
59+}
60+core_initcall(query_silicon_revision);
61+
62+static int imx53_print_silicon_rev(void)
63+{
64+ printf("detected i.MX53 rev %s\n", mx53_rev_string);
65+
66+ return 0;
67+}
68+device_initcall(imx53_print_silicon_rev);
69+
70 static int imx53_init(void)
71 {
72 add_generic_device("imx_iim", 0, NULL, MX53_IIM_BASE_ADDR, SZ_4K,
73diff --git a/arch/arm/mach-imx/include/mach/imx53-regs.h b/arch/arm/mach-imx/include/mach/imx53-regs.h
74index 8fefc54..065bf08 100644
75--- a/arch/arm/mach-imx/include/mach/imx53-regs.h
76+++ b/arch/arm/mach-imx/include/mach/imx53-regs.h
77@@ -135,5 +135,10 @@
78 #define MX53_CS2_96MB_BASE_ADDR 0xF6000000
79 #define MX53_CS3_BASE_ADDR 0xF6000000
80
81+/* silicon revisions specific to i.MX53 */
82+#define MX53_CHIP_REV_1_0 0x10
83+#define MX53_CHIP_REV_2_0 0x20
84+#define MX53_CHIP_REV_2_1 0x21
85+
86 #endif /* __MACH_IMX53_REGS_H */
87
88--
891.7.7.6
90
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0004-i.MX53-enable-pull-up-on-I2C0-pins.patch b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0004-i.MX53-enable-pull-up-on-I2C0-pins.patch
new file mode 100644
index 000000000..04fda83e2
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0004-i.MX53-enable-pull-up-on-I2C0-pins.patch
@@ -0,0 +1,54 @@
1From 2099c301274b8273e9cf68fc76dd03225681b5df Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
3Date: Tue, 21 Feb 2012 01:06:51 +0100
4Subject: [PATCH 4/7] i.MX53: enable pull up on I2C0 pins
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9this allows I2C to work on boards which don't have external pull up
10(like LOCO board)
11
12Signed-off-by: Eric Bénard <eric@eukrea.com>
13---
14Upstream-Status: Applied for 2012.04.0
15
16 arch/arm/mach-imx/include/mach/iomux-mx53.h | 8 +++++---
17 1 files changed, 5 insertions(+), 3 deletions(-)
18
19diff --git a/arch/arm/mach-imx/include/mach/iomux-mx53.h b/arch/arm/mach-imx/include/mach/iomux-mx53.h
20index 527f8fe..ac94deb 100644
21--- a/arch/arm/mach-imx/include/mach/iomux-mx53.h
22+++ b/arch/arm/mach-imx/include/mach/iomux-mx53.h
23@@ -30,7 +30,9 @@
24 #define MX53_SDHC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
25 PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH | \
26 PAD_CTL_SRE_FAST)
27-
28+#define MX53_I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
29+ PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_HIGH | \
30+ PAD_CTL_SRE_FAST)
31
32 #define MX53_PAD_GPIO_19__KPP_COL_5 IOMUX_PAD(0x348, 0x020, 0, 0x840, 0, NO_PAD_CTRL)
33 #define MX53_PAD_GPIO_19__GPIO4_5 IOMUX_PAD(0x348, 0x020, 1, __NA_, 0, NO_PAD_CTRL)
34@@ -377,7 +379,7 @@
35 #define MX53_PAD_CSI0_DAT8__KPP_COL_7 IOMUX_PAD(0x40C, 0x0E0, 2, 0x848, 0, NO_PAD_CTRL)
36 #define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK IOMUX_PAD(0x40C, 0x0E0, 3, 0x7B8, 1, NO_PAD_CTRL)
37 #define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC IOMUX_PAD(0x40C, 0x0E0, 4, __NA_, 0, NO_PAD_CTRL)
38-#define MX53_PAD_CSI0_DAT8__I2C1_SDA IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, NO_PAD_CTRL)
39+#define MX53_PAD_CSI0_DAT8__I2C1_SDA IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, MX53_I2C_PAD_CTRL)
40 #define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 IOMUX_PAD(0x40C, 0x0E0, 6, __NA_, 0, NO_PAD_CTRL)
41 #define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 IOMUX_PAD(0x40C, 0x0E0, 7, __NA_, 0, NO_PAD_CTRL)
42 #define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 IOMUX_PAD(0x410, 0x0E4, 0, __NA_, 0, NO_PAD_CTRL)
43@@ -385,7 +387,7 @@
44 #define MX53_PAD_CSI0_DAT9__KPP_ROW_7 IOMUX_PAD(0x410, 0x0E4, 2, 0x854, 0, NO_PAD_CTRL)
45 #define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI IOMUX_PAD(0x410, 0x0E4, 3, 0x7C0, 1, NO_PAD_CTRL)
46 #define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR IOMUX_PAD(0x410, 0x0E4, 4, __NA_, 0, NO_PAD_CTRL)
47-#define MX53_PAD_CSI0_DAT9__I2C1_SCL IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, NO_PAD_CTRL)
48+#define MX53_PAD_CSI0_DAT9__I2C1_SCL IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, MX53_I2C_PAD_CTRL)
49 #define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 IOMUX_PAD(0x410, 0x0E4, 6, __NA_, 0, NO_PAD_CTRL)
50 #define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 IOMUX_PAD(0x410, 0x0E4, 7, __NA_, 0, NO_PAD_CTRL)
51 #define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 IOMUX_PAD(0x414, 0x0E8, 0, __NA_, 0, NO_PAD_CTRL)
52--
531.7.7.6
54
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0005-mx53-loco-add-i2c-support.patch b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0005-mx53-loco-add-i2c-support.patch
new file mode 100644
index 000000000..162a8daec
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0005-mx53-loco-add-i2c-support.patch
@@ -0,0 +1,60 @@
1From dfb46dc4a8e593dca0c0af1dc8ac7ce87fcabb5f Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
3Date: Tue, 21 Feb 2012 01:08:07 +0100
4Subject: [PATCH 5/7] mx53-loco: add i2c support
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9and register mc34708 which is present on MCIMX53-START-R board
10
11Signed-off-by: Eric Bénard <eric@eukrea.com>
12---
13Upstream-Status: Applied for 2012.04.0
14
15 arch/arm/boards/freescale-mx53-loco/board.c | 15 +++++++++++++++
16 1 files changed, 15 insertions(+), 0 deletions(-)
17
18diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c
19index fa3a409..14c053a 100644
20--- a/arch/arm/boards/freescale-mx53-loco/board.c
21+++ b/arch/arm/boards/freescale-mx53-loco/board.c
22@@ -36,6 +36,9 @@
23 #include <mach/iim.h>
24 #include <mach/imx5.h>
25
26+#include <i2c/i2c.h>
27+#include <mfd/mc34708.h>
28+
29 #include <asm/armlinux.h>
30 #include <io.h>
31 #include <asm/mmu.h>
32@@ -88,6 +91,16 @@ static struct pad_desc loco_pads[] = {
33 MX53_PAD_EIM_DA11__GPIO3_11,
34 /* SD3_WP */
35 MX53_PAD_EIM_DA12__GPIO3_12,
36+
37+ /* I2C0 */
38+ MX53_PAD_CSI0_DAT8__I2C1_SDA,
39+ MX53_PAD_CSI0_DAT9__I2C1_SCL,
40+};
41+
42+static struct i2c_board_info i2c_devices[] = {
43+ {
44+ I2C_BOARD_INFO("mc34708-i2c", 0x08),
45+ },
46 };
47
48 static int loco_mem_init(void)
49@@ -131,6 +144,8 @@ static int loco_devices_init(void)
50 imx53_add_fec(&fec_info);
51 imx53_add_mmc0(&loco_sd1_data);
52 imx53_add_mmc2(&loco_sd3_data);
53+ i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
54+ imx53_add_i2c0(NULL);
55
56 loco_fec_reset();
57
58--
591.7.7.6
60
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0006-mx53-loco-add-board-revision-support.patch b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0006-mx53-loco-add-board-revision-support.patch
new file mode 100644
index 000000000..0a08427a1
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0006-mx53-loco-add-board-revision-support.patch
@@ -0,0 +1,104 @@
1From 99324818889fb34c36dd8d15b920bea78bdced35 Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
3Date: Tue, 21 Feb 2012 01:09:15 +0100
4Subject: [PATCH 6/7] mx53-loco: add board revision support
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9- this is taken from freescale-mx35-3-stack/3stack.c and allows
10this board to run Freescale's kernel which relies on the system
11revision to configure the correct PMIC.
12
13- On rev0 boards (with DA9053), the log is :
14detected i.MX53 rev 2.1
15MCIMX53-START board 1.0
16
17On newer boards (rev A or B with MC34708), the log is :
18mc34708-i2c@mc34708-i2c0: MC34708 ID: 0x0014
19detected i.MX53 rev 2.1
20MCIMX53-START-R board 1.0 rev B
21
22Signed-off-by: Eric Bénard <eric@eukrea.com>
23---
24Upstream-Status: Applied for 2012.04.0
25
26 arch/arm/boards/freescale-mx53-loco/board.c | 51 +++++++++++++++++++++++++++
27 1 files changed, 51 insertions(+), 0 deletions(-)
28
29diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c
30index 14c053a..115a8a3 100644
31--- a/arch/arm/boards/freescale-mx53-loco/board.c
32+++ b/arch/arm/boards/freescale-mx53-loco/board.c
33@@ -103,6 +103,31 @@ static struct i2c_board_info i2c_devices[] = {
34 },
35 };
36
37+/*
38+ * Revision to be passed to kernel. The kernel provided
39+ * by freescale relies on this.
40+ *
41+ * C --> CPU type
42+ * S --> Silicon revision
43+ * B --> Board rev
44+ *
45+ * 31 20 16 12 8 4 0
46+ * | Cmaj | Cmin | B | Smaj | Smin|
47+ *
48+ * e.g 0x00053120 --> i.MX35, Cpu silicon rev 2.0, Board rev 2
49+*/
50+static unsigned int loco_system_rev = 0x00053000;
51+
52+static void set_silicon_rev( int rev)
53+{
54+ loco_system_rev = loco_system_rev | (rev & 0xFF);
55+}
56+
57+static void set_board_rev(int rev)
58+{
59+ loco_system_rev = (loco_system_rev & ~(0xF << 8)) | (rev & 0xF) << 8;
60+}
61+
62 static int loco_mem_init(void)
63 {
64 arm_add_mem_device("ram0", 0x70000000, SZ_512M);
65@@ -149,6 +174,8 @@ static int loco_devices_init(void)
66
67 loco_fec_reset();
68
69+ set_silicon_rev(imx_silicon_revision());
70+
71 armlinux_set_bootparams((void *)0x70000100);
72 armlinux_set_architecture(MACH_TYPE_MX53_LOCO);
73
74@@ -177,3 +204,27 @@ static int loco_console_init(void)
75 }
76
77 console_initcall(loco_console_init);
78+
79+static int loco_pmic_init(void)
80+{
81+ struct mc34708 *mc34708;
82+ int rev;
83+
84+ mc34708 = mc34708_get();
85+ if (!mc34708) {
86+ /* so we have a DA9053 based board */
87+ printf("MCIMX53-START board 1.0\n");
88+ armlinux_set_revision(loco_system_rev);
89+ return 0;
90+ }
91+
92+ /* get the board revision from fuse */
93+ rev = readl(MX53_IIM_BASE_ADDR + 0x878);
94+ set_board_rev(rev);
95+ printf("MCIMX53-START-R board 1.0 rev %c\n", (rev == 1) ? 'A' : 'B' );
96+ armlinux_set_revision(loco_system_rev);
97+
98+ return 0;
99+}
100+
101+late_initcall(loco_pmic_init);
102--
1031.7.7.6
104
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0007-mx53-loco-update-defconfig.patch b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0007-mx53-loco-update-defconfig.patch
new file mode 100644
index 000000000..6518886ce
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/0007-mx53-loco-update-defconfig.patch
@@ -0,0 +1,51 @@
1From fdfefcad6edda451b0fd44b0e622f4dfe9699040 Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Eric=20B=C3=A9nard?= <eric@eukrea.com>
3Date: Tue, 21 Feb 2012 01:24:14 +0100
4Subject: [PATCH 7/7] mx53-loco: update defconfig
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9Signed-off-by: Eric Bénard <eric@eukrea.com>
10---
11Upstream-Status: Applied for 2012.04.0
12
13 arch/arm/configs/freescale_mx53_loco_defconfig | 5 ++++-
14 1 files changed, 4 insertions(+), 1 deletions(-)
15
16diff --git a/arch/arm/configs/freescale_mx53_loco_defconfig b/arch/arm/configs/freescale_mx53_loco_defconfig
17index b4e872d..bd2bdbe 100644
18--- a/arch/arm/configs/freescale_mx53_loco_defconfig
19+++ b/arch/arm/configs/freescale_mx53_loco_defconfig
20@@ -21,7 +21,6 @@ CONFIG_DEBUG_INFO=y
21 CONFIG_CMD_EDIT=y
22 CONFIG_CMD_SLEEP=y
23 CONFIG_CMD_SAVEENV=y
24-CONFIG_CMD_LOADENV=y
25 CONFIG_CMD_EXPORT=y
26 CONFIG_CMD_PRINTENV=y
27 CONFIG_CMD_READLINE=y
28@@ -46,6 +45,7 @@ CONFIG_CMD_MAGICVAR=y
29 CONFIG_CMD_MAGICVAR_HELP=y
30 CONFIG_CMD_GPIO=y
31 CONFIG_CMD_UNCOMPRESS=y
32+CONFIG_CMD_I2C=y
33 CONFIG_NET=y
34 CONFIG_NET_DHCP=y
35 CONFIG_NET_NFS=y
36@@ -55,9 +55,12 @@ CONFIG_NET_TFTP_PUSH=y
37 CONFIG_NET_NETCONSOLE=y
38 CONFIG_DRIVER_NET_FEC_IMX=y
39 # CONFIG_SPI is not set
40+CONFIG_I2C=y
41+CONFIG_I2C_IMX=y
42 CONFIG_MCI=y
43 CONFIG_MCI_STARTUP=y
44 CONFIG_MCI_IMX_ESDHC=y
45+CONFIG_I2C_MC34708=y
46 CONFIG_FS_FAT=y
47 CONFIG_FS_FAT_WRITE=y
48 CONFIG_FS_FAT_LFN=y
49--
501.7.7.6
51
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/config b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/config
new file mode 100644
index 000000000..3398c957b
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/config
@@ -0,0 +1,51 @@
1#!/bin/sh
2
3machine=imx53qsb
4eth0.serverip=
5user=
6
7# use 'dhcp' to do dhcp in barebox and in kernel
8# use 'none' if you want to skip kernel ip autoconfiguration
9ip=dhcp
10
11# or set your networking parameters here
12#eth0.ipaddr=a.b.c.d
13#eth0.netmask=a.b.c.d
14#eth0.gateway=a.b.c.d
15#eth0.serverip=a.b.c.d
16
17# can be either 'nfs', 'tftp', 'nor' or 'nand'
18kernel_loc=disk
19# can be either 'net', 'nor', 'nand' or 'initrd'
20rootfs_loc=disk
21
22# boot parameters for SDCard boot
23kernel_part=disk0.kernel
24rootfs_part_linux_dev=mmcblk0p1
25rootfs_type=ext3
26
27# can be either 'jffs2' or 'ubifs'
28#rootfs_type=ubifs
29rootfsimage=rootfs-$machine.$rootfs_type
30
31#kernelimage=zImage-$machine
32kernelimage=uImage-$machine.bin
33#kernelimage=Image-$machine
34#kernelimage=Image-$machine.lzo
35
36if [ -n $user ]; then
37 kernelimage="$user"-"$kernelimage"
38 nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
39 rootfsimage="$user"-"$rootfsimage"
40else
41 nfsroot="$eth0.serverip:/path/to/nfs/root"
42fi
43
44autoboot_timeout=3
45
46bootargs="console=ttymxc0,115200"
47
48disk_parts="512k(barebox)ro,512k(bareboxenv),4M(kernel),-(root)"
49
50# set a fancy prompt (if support is compiled in)
51PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/defconfig b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/defconfig
new file mode 100644
index 000000000..bd2bdbe5a
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox-2012.02.0/imx53qsb/defconfig
@@ -0,0 +1,68 @@
1CONFIG_ARCH_IMX=y
2CONFIG_ARCH_IMX53=y
3CONFIG_IMX_IIM=y
4CONFIG_IMX_IIM_FUSE_BLOW=y
5CONFIG_AEABI=y
6CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
7CONFIG_ARM_UNWIND=y
8CONFIG_MMU=y
9CONFIG_TEXT_BASE=0x7ff00000
10CONFIG_MALLOC_SIZE=0x2000000
11CONFIG_MALLOC_TLSF=y
12CONFIG_KALLSYMS=y
13CONFIG_LONGHELP=y
14CONFIG_GLOB=y
15CONFIG_HUSH_FANCY_PROMPT=y
16CONFIG_CMDLINE_EDITING=y
17CONFIG_AUTO_COMPLETE=y
18CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y
19CONFIG_DEFAULT_ENVIRONMENT_PATH="defaultenv arch/arm/boards/freescale-mx53-loco/env/"
20CONFIG_DEBUG_INFO=y
21CONFIG_CMD_EDIT=y
22CONFIG_CMD_SLEEP=y
23CONFIG_CMD_SAVEENV=y
24CONFIG_CMD_EXPORT=y
25CONFIG_CMD_PRINTENV=y
26CONFIG_CMD_READLINE=y
27CONFIG_CMD_TIME=y
28CONFIG_CMD_ECHO_E=y
29CONFIG_CMD_MEMINFO=y
30CONFIG_CMD_IOMEM=y
31CONFIG_CMD_FLASH=y
32CONFIG_CMD_BOOTM_SHOW_TYPE=y
33CONFIG_CMD_BOOTM_VERBOSE=y
34CONFIG_CMD_BOOTM_INITRD=y
35CONFIG_CMD_BOOTM_OFTREE=y
36CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
37CONFIG_CMD_UIMAGE=y
38# CONFIG_CMD_BOOTZ is not set
39# CONFIG_CMD_BOOTU is not set
40CONFIG_CMD_RESET=y
41CONFIG_CMD_GO=y
42CONFIG_CMD_TIMEOUT=y
43CONFIG_CMD_PARTITION=y
44CONFIG_CMD_MAGICVAR=y
45CONFIG_CMD_MAGICVAR_HELP=y
46CONFIG_CMD_GPIO=y
47CONFIG_CMD_UNCOMPRESS=y
48CONFIG_CMD_I2C=y
49CONFIG_NET=y
50CONFIG_NET_DHCP=y
51CONFIG_NET_NFS=y
52CONFIG_NET_PING=y
53CONFIG_NET_TFTP=y
54CONFIG_NET_TFTP_PUSH=y
55CONFIG_NET_NETCONSOLE=y
56CONFIG_DRIVER_NET_FEC_IMX=y
57# CONFIG_SPI is not set
58CONFIG_I2C=y
59CONFIG_I2C_IMX=y
60CONFIG_MCI=y
61CONFIG_MCI_STARTUP=y
62CONFIG_MCI_IMX_ESDHC=y
63CONFIG_I2C_MC34708=y
64CONFIG_FS_FAT=y
65CONFIG_FS_FAT_WRITE=y
66CONFIG_FS_FAT_LFN=y
67CONFIG_ZLIB=y
68CONFIG_LZO_DECOMPRESS=y
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox.inc b/meta-fsl-arm/recipes-bsp/barebox/barebox.inc
new file mode 100644
index 000000000..1272259ff
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox.inc
@@ -0,0 +1,53 @@
1DESCRIPTION = "Barebox - a bootloader that inherits the best of U-Boot and the Linux kernel"
2HOMEPAGE = "http://www.barebox.org/"
3SECTION = "bootloader"
4PROVIDES = "virtual/bootloader"
5PRIORITY = "optional"
6LICENSE = "GPLv2"
7LIC_FILES_CHKSUM = "file://COPYING;md5=057bf9e50e1ca857d0eb97bfe4ba8e5d"
8
9PACKAGE_ARCH = "${MACHINE_ARCH}"
10
11inherit kernel-arch
12
13EXTRA_OEMAKE = "CROSS_COMPILE=${TARGET_PREFIX}"
14
15BAREBOX_BINARY ?= "barebox.bin"
16BAREBOX_IMAGE ?= "barebox-${MACHINE}-${PV}-${PR}.bin"
17BAREBOXENV_BIN ?= "bareboxenv-${MACHINE}-${PV}-${PR}.bin"
18BAREBOX_SYMLINK ?= "barebox-${MACHINE}.bin"
19BAREBOXENV_SYMLINK ?= "bareboxenv-${MACHINE}.bin"
20
21INSANE_SKIP_${PN} = "True"
22
23do_configure_prepend() {
24 cp ${WORKDIR}/defconfig ${S}/.config
25 oe_runmake oldconfig
26}
27
28do_compile () {
29 unset LDFLAGS
30 unset CFLAGS
31 unset CPPFLAGS
32 oe_runmake all
33}
34
35do_deploy () {
36 install -d ${DEPLOY_DIR_IMAGE}
37 install ${S}/${BAREBOX_BINARY} ${DEPLOY_DIR_IMAGE}/${BAREBOX_IMAGE}
38 install ${S}/barebox_default_env ${DEPLOY_DIR_IMAGE}/${BAREBOXENV_BIN}
39
40 cd ${DEPLOY_DIR_IMAGE}
41 rm -f ${BAREBOX_SYMLINK}
42 rm -f ${BAREBOXENV_SYMLINK}
43 ln -sf ${BAREBOX_IMAGE} ${BAREBOX_SYMLINK}
44 ln -sf ${BAREBOXENV_BIN} ${BAREBOXENV_SYMLINK}
45
46 install -d ${STAGING_BINDIR_NATIVE}
47 cd ${S}
48 install -m 755 scripts/mkimage ${STAGING_BINDIR_NATIVE}/
49 install -m 755 scripts/bareboxenv ${STAGING_BINDIR_NATIVE}/
50}
51
52do_deploy[dirs] = "${S}"
53addtask deploy before do_build after do_compile
diff --git a/meta-fsl-arm/recipes-bsp/barebox/barebox_2012.02.0.bb b/meta-fsl-arm/recipes-bsp/barebox/barebox_2012.02.0.bb
new file mode 100644
index 000000000..3969c79b3
--- /dev/null
+++ b/meta-fsl-arm/recipes-bsp/barebox/barebox_2012.02.0.bb
@@ -0,0 +1,26 @@
1require barebox.inc
2
3PR = "r0"
4
5SRC_URI = "http://barebox.org/download/${PN}-${PV}.tar.bz2 \
6 file://defconfig \
7 "
8
9SRC_URI[md5sum] = "ce876bb3ba1f60b5ee08f13dc648f702"
10SRC_URI[sha256sum] = "5cd1fcbd6596d3fad1b25a79706a9a76508e8c0d2a85e79ef2d91754caa6667b"
11
12SRC_URI_append_imx53qsb = " \
13 file://config \
14 file://0001-add-i2c-clock-support.patch \
15 file://0002-mfd-add-mc34708-driver.patch \
16 file://0003-i.MX53-add-silicn-revision-functions.patch \
17 file://0004-i.MX53-enable-pull-up-on-I2C0-pins.patch \
18 file://0005-mx53-loco-add-i2c-support.patch \
19 file://0006-mx53-loco-add-board-revision-support.patch \
20 file://0007-mx53-loco-update-defconfig.patch \
21 "
22
23do_configure_prepend_imx53qsb() {
24 cp ${WORKDIR}/config ${S}/arch/arm/boards/freescale-mx53-loco/env
25 oe_runmake oldconfig
26}
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-12-17 20:46:11 +0000