linux/meta-altera.git/conf, branch master [no description] https://git.enea.com/cgit/linux/meta-altera.git/atom?h=master 2020-11-07T17:58:30+00:00 layer.conf: Add hardknott to supported releases 2020-11-07T17:58:30+00:00 Khem Raj raj.khem@gmail.com 2020-11-07T17:56:39+00:00 urn:sha1:7e4404941810f57e2423ea10196ec335439670bb Signed-off-by: Khem Raj <raj.khem@gmail.com> layer.conf: Add gatesgarth to LAYERSERIES_COMPAT 2020-10-15T20:42:37+00:00 Khem Raj raj.khem@gmail.com 2020-10-15T16:21:12+00:00 urn:sha1:bcc258d5b77c6f93a3ec528d7edd2435e396f6a4 Signed-off-by: Khem Raj <raj.khem@gmail.com> u-boot-socfpga: move u-boot configs into include file 2020-07-23T06:11:00+00:00 Chang Rebecca Swee Fun rebecca.swee.fun.chang@intel.com 2020-07-22T10:43:39+00:00 urn:sha1:4898be78943d02be9bcbdae2ae970a5d6c2966cb This will provide more flexibility in selecting the configs from machine configurations and better manageability in terms of the recipe parsing and maintenance. Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Add de10-nano configuration 2020-04-21T17:41:10+00:00 Christian Haettich feddischson@gmail.com 2020-04-20T20:46:30+00:00 urn:sha1:0c518d23992fb879bfb71278cf1bfa63aae66066 Signed-off-by: Christian Haettich <feddischson@gmail.com> conf: agilex: set JFFS2 eraseblock size to 64KiB 2020-04-10T04:49:54+00:00 Chang Rebecca Swee Fun rebecca.swee.fun.chang@intel.com 2020-04-10T08:36:51+00:00 urn:sha1:b01a0aa4fd93d364b1358ae5b076ebdad35f9a7e Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> conf: stratix10: set JFFS2 eraseblock size to 64KiB 2020-04-10T04:49:54+00:00 Chang Rebecca Swee Fun rebecca.swee.fun.chang@intel.com 2020-04-10T08:35:31+00:00 urn:sha1:b0374d537840959411fbf494191b59abaca5cada Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> layer.conf: Mark dunfell compatible 2020-03-24T14:22:39+00:00 Khem Raj raj.khem@gmail.com 2020-03-24T14:02:47+00:00 urn:sha1:d521eb199db6cdc11d5c3ce862241d4c694313fa Signed-off-by: Khem Raj <raj.khem@gmail.com> machine: arria10: add options for mkfs.jffs2 2020-03-10T05:12:35+00:00 Chang Rebecca Swee Fun rebecca.swee.fun.chang@intel.com 2020-03-09T09:35:23+00:00 urn:sha1:f238c70e77621a98b34c271eacdec04a7a4a241a Added "-n" to avoid adding cleanmarker to every eraseblock. Added "-q" to squash permissions and owners making all files to be owned by root user. Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> machine: arria10: use supported page size for NAND flash 2020-03-10T05:12:35+00:00 Chang Rebecca Swee Fun rebecca.swee.fun.chang@intel.com 2020-03-09T09:29:21+00:00 urn:sha1:2a2a2f047061755326e9e8940a698aae204fc1ea The supported page size for Arria 10 SoCs NAND flash are 512 bytes, 2KiB, 4KiB or 8KiB. Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> machine: arria10: use bb.utils.contains() to set different eraseblock size 2020-02-12T20:27:15+00:00 Chang Rebecca Swee Fun rebecca.swee.fun.chang@intel.com 2020-02-12T09:18:33+00:00 urn:sha1:beb02eff709df88a8cfc489f7b1839386803e7c6 Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>