From c527fd1f14c27855a37f2e8ac5346ce8d940ced2 Mon Sep 17 00:00:00 2001 From: Tudor Florea Date: Thu, 16 Oct 2014 03:05:19 +0200 Subject: initial commit for Enea Linux 4.0-140929 Migrated from the internal git server on the daisy-enea-point-release branch Signed-off-by: Tudor Florea --- meta/conf/machine/include/README | 100 ++++++++++++++++++++ meta/conf/machine/include/arm/README | 40 ++++++++ meta/conf/machine/include/arm/arch-arm.inc | 17 ++++ meta/conf/machine/include/arm/arch-armv4.inc | 33 +++++++ meta/conf/machine/include/arm/arch-armv5-dsp.inc | 52 +++++++++++ meta/conf/machine/include/arm/arch-armv5.inc | 60 ++++++++++++ meta/conf/machine/include/arm/arch-armv6.inc | 50 ++++++++++ meta/conf/machine/include/arm/arch-armv7a.inc | 75 +++++++++++++++ meta/conf/machine/include/arm/feature-arm-neon.inc | 3 + .../conf/machine/include/arm/feature-arm-thumb.inc | 25 +++++ meta/conf/machine/include/arm/feature-arm-vfp.inc | 9 ++ meta/conf/machine/include/mips/README | 36 ++++++++ meta/conf/machine/include/mips/arch-mips.inc | 102 +++++++++++++++++++++ meta/conf/machine/include/powerpc/README | 17 ++++ meta/conf/machine/include/powerpc/arch-powerpc.inc | 34 +++++++ .../machine/include/powerpc/arch-powerpc64.inc | 14 +++ meta/conf/machine/include/qemu.inc | 29 ++++++ meta/conf/machine/include/sh/README | 11 +++ meta/conf/machine/include/sh/arch-sh.inc | 9 ++ meta/conf/machine/include/soc-family.inc | 2 + meta/conf/machine/include/tune-arm1136jf-s.inc | 11 +++ meta/conf/machine/include/tune-arm920t.inc | 11 +++ meta/conf/machine/include/tune-arm926ejs.inc | 11 +++ meta/conf/machine/include/tune-arm9tdmi.inc | 11 +++ meta/conf/machine/include/tune-atom.inc | 2 + meta/conf/machine/include/tune-c3.inc | 12 +++ meta/conf/machine/include/tune-core2.inc | 35 +++++++ meta/conf/machine/include/tune-corei7.inc | 35 +++++++ meta/conf/machine/include/tune-cortexa15.inc | 36 ++++++++ meta/conf/machine/include/tune-cortexa5.inc | 36 ++++++++ meta/conf/machine/include/tune-cortexa7.inc | 42 +++++++++ meta/conf/machine/include/tune-cortexa8.inc | 36 ++++++++ meta/conf/machine/include/tune-cortexa9.inc | 36 ++++++++ meta/conf/machine/include/tune-cortexm1.inc | 11 +++ meta/conf/machine/include/tune-cortexm3.inc | 14 +++ meta/conf/machine/include/tune-cortexr4.inc | 14 +++ meta/conf/machine/include/tune-ep9312.inc | 12 +++ meta/conf/machine/include/tune-i586.inc | 14 +++ meta/conf/machine/include/tune-iwmmxt.inc | 14 +++ meta/conf/machine/include/tune-mips32.inc | 25 +++++ meta/conf/machine/include/tune-mips64.inc | 3 + meta/conf/machine/include/tune-ppc476.inc | 14 +++ meta/conf/machine/include/tune-ppc603e.inc | 14 +++ meta/conf/machine/include/tune-ppc7400.inc | 14 +++ meta/conf/machine/include/tune-ppce300c2.inc | 11 +++ meta/conf/machine/include/tune-ppce300c3.inc | 23 +++++ meta/conf/machine/include/tune-ppce500.inc | 20 ++++ meta/conf/machine/include/tune-ppce500mc.inc | 14 +++ meta/conf/machine/include/tune-ppce500v2.inc | 20 ++++ meta/conf/machine/include/tune-ppce5500.inc | 20 ++++ meta/conf/machine/include/tune-ppce6500.inc | 21 +++++ meta/conf/machine/include/tune-sh3.inc | 17 ++++ meta/conf/machine/include/tune-sh4.inc | 34 +++++++ meta/conf/machine/include/tune-strongarm1100.inc | 11 +++ meta/conf/machine/include/tune-supersparc.inc | 4 + meta/conf/machine/include/tune-xscale.inc | 16 ++++ meta/conf/machine/include/x86-base.inc | 52 +++++++++++ meta/conf/machine/include/x86/README | 24 +++++ meta/conf/machine/include/x86/arch-x86.inc | 51 +++++++++++ meta/conf/machine/qemuarm.conf | 12 +++ meta/conf/machine/qemumips.conf | 13 +++ meta/conf/machine/qemumips64.conf | 13 +++ meta/conf/machine/qemuppc.conf | 11 +++ meta/conf/machine/qemux86-64.conf | 27 ++++++ meta/conf/machine/qemux86.conf | 26 ++++++ 65 files changed, 1621 insertions(+) create mode 100644 meta/conf/machine/include/README create mode 100644 meta/conf/machine/include/arm/README create mode 100644 meta/conf/machine/include/arm/arch-arm.inc create mode 100644 meta/conf/machine/include/arm/arch-armv4.inc create mode 100644 meta/conf/machine/include/arm/arch-armv5-dsp.inc create mode 100644 meta/conf/machine/include/arm/arch-armv5.inc create mode 100644 meta/conf/machine/include/arm/arch-armv6.inc create mode 100644 meta/conf/machine/include/arm/arch-armv7a.inc create mode 100644 meta/conf/machine/include/arm/feature-arm-neon.inc create mode 100644 meta/conf/machine/include/arm/feature-arm-thumb.inc create mode 100644 meta/conf/machine/include/arm/feature-arm-vfp.inc create mode 100644 meta/conf/machine/include/mips/README create mode 100644 meta/conf/machine/include/mips/arch-mips.inc create mode 100644 meta/conf/machine/include/powerpc/README create mode 100644 meta/conf/machine/include/powerpc/arch-powerpc.inc create mode 100644 meta/conf/machine/include/powerpc/arch-powerpc64.inc create mode 100644 meta/conf/machine/include/qemu.inc create mode 100644 meta/conf/machine/include/sh/README create mode 100644 meta/conf/machine/include/sh/arch-sh.inc create mode 100644 meta/conf/machine/include/soc-family.inc create mode 100644 meta/conf/machine/include/tune-arm1136jf-s.inc create mode 100644 meta/conf/machine/include/tune-arm920t.inc create mode 100644 meta/conf/machine/include/tune-arm926ejs.inc create mode 100644 meta/conf/machine/include/tune-arm9tdmi.inc create mode 100644 meta/conf/machine/include/tune-atom.inc create mode 100644 meta/conf/machine/include/tune-c3.inc create mode 100644 meta/conf/machine/include/tune-core2.inc create mode 100644 meta/conf/machine/include/tune-corei7.inc create mode 100644 meta/conf/machine/include/tune-cortexa15.inc create mode 100644 meta/conf/machine/include/tune-cortexa5.inc create mode 100644 meta/conf/machine/include/tune-cortexa7.inc create mode 100644 meta/conf/machine/include/tune-cortexa8.inc create mode 100644 meta/conf/machine/include/tune-cortexa9.inc create mode 100644 meta/conf/machine/include/tune-cortexm1.inc create mode 100644 meta/conf/machine/include/tune-cortexm3.inc create mode 100644 meta/conf/machine/include/tune-cortexr4.inc create mode 100644 meta/conf/machine/include/tune-ep9312.inc create mode 100644 meta/conf/machine/include/tune-i586.inc create mode 100644 meta/conf/machine/include/tune-iwmmxt.inc create mode 100644 meta/conf/machine/include/tune-mips32.inc create mode 100644 meta/conf/machine/include/tune-mips64.inc create mode 100644 meta/conf/machine/include/tune-ppc476.inc create mode 100644 meta/conf/machine/include/tune-ppc603e.inc create mode 100644 meta/conf/machine/include/tune-ppc7400.inc create mode 100644 meta/conf/machine/include/tune-ppce300c2.inc create mode 100644 meta/conf/machine/include/tune-ppce300c3.inc create mode 100644 meta/conf/machine/include/tune-ppce500.inc create mode 100644 meta/conf/machine/include/tune-ppce500mc.inc create mode 100644 meta/conf/machine/include/tune-ppce500v2.inc create mode 100644 meta/conf/machine/include/tune-ppce5500.inc create mode 100644 meta/conf/machine/include/tune-ppce6500.inc create mode 100644 meta/conf/machine/include/tune-sh3.inc create mode 100644 meta/conf/machine/include/tune-sh4.inc create mode 100644 meta/conf/machine/include/tune-strongarm1100.inc create mode 100644 meta/conf/machine/include/tune-supersparc.inc create mode 100644 meta/conf/machine/include/tune-xscale.inc create mode 100644 meta/conf/machine/include/x86-base.inc create mode 100644 meta/conf/machine/include/x86/README create mode 100644 meta/conf/machine/include/x86/arch-x86.inc create mode 100644 meta/conf/machine/qemuarm.conf create mode 100644 meta/conf/machine/qemumips.conf create mode 100644 meta/conf/machine/qemumips64.conf create mode 100644 meta/conf/machine/qemuppc.conf create mode 100644 meta/conf/machine/qemux86-64.conf create mode 100644 meta/conf/machine/qemux86.conf (limited to 'meta/conf/machine') diff --git a/meta/conf/machine/include/README b/meta/conf/machine/include/README new file mode 100644 index 0000000000..d66130acbc --- /dev/null +++ b/meta/conf/machine/include/README @@ -0,0 +1,100 @@ +2012/03/30 - Mark Hatle + - Initial Revision + + +Introduction +============ +The individual CPU, and ABI tunings are contained in this directory. A +number of local and global variables are used to control the way the +tunings are setup and how they work together to specify an optimized +configuration. + +The following is brief summary of the generic components that are used +in these tunings. + +AVAILTUNES - This is a list of all of the tuning definitions currently +available in the system. Not all tunes in this list may be compatible +with the machine configuration, or each other in a multilib +configuration. Each tuning file can add to this list using "+=", but +should never replace the list using "=". + +DEFAULTTUNE - This specifies the tune to use for a particular build. +Each tune should specify a reasonable default, which can be overriden by +a machine or multilib configuration. The specified tune must be listed +in the AVAILTUNES. + +TUNEVALID[feature] - The is defined with a human readable +explanation for what it does. All architectural, cpu, abi, etc tuning +features must be defined using TUNEVALID. + +TUNECONFLICTS[feature] - A list of features which conflict with . +New sanity checks will try to reject combinations in which a single +tuning ends up with features which conflict with each other. + +TUNE_FEATURES - This is automatically defined as TUNE_FEATURES_tune-. +See TUNE_FEATURES_tune- for more information. + +TUNE_FEATURES_tune- - Specify the features used to describe a +specific tune. This is a list of features that a tune support, each +feature must be in the TUNEVALID list. Note: the tune and a given +feature name may be the same, but they have different purposes. Only +features may be used to change behavior, while tunes are used to +describe an overall set of features. + +ABIEXTENSION - An ABI extension may be specified by a specific feature +or other tuning setting, such as TARGET_FPU. Any ABI extensions either +need to be defined in the architectures base arch file, i.e. +ABIEXTENSION = "eabi" in the arm case, or appended to in specific tune +files with a ".=". Spaces are not allowed in this variable. + +TUNE_CCARGS - Setup the cflags based on the TUNE_FEATURES settings. +These should be additive when defined using "+=". All items in this +list should be dynamic! i.e. +${@bb.utils.contains("TUNE_FEATURES", "feature", "cflag", "!cflag", d)} + +TUNE_ARCH - The GNU canonical arch for a specific architecture. i.e. +arm, armeb, mips, mips64, etc. This value is used by bitbake to setup +configure. TUNE_ARCH definitions are specific to a given architecture. +They may be a single static definition, or may be dynamically adjusted. +See each architecture's README for details for that CPU family. + +TUNE_PKGARCH - The package architecture used by the packaging systems to +define the architecture, abi and tuning of a particular package. +Similarly to TUNE_ARCH, the definition of TUNE_PKGARCH is specific to +each architecture. See each architectures README for details for that +CPU family. + +PACKAGE_EXTRA_ARCHS - Lists all runtime compatible package +architectures. By default this is equal to +PACKAGE_EXTRA_ARCHS_tune-. If an architecture deviates from the +default it will be listed in the architecture README. + +PACKAGE_EXTRA_ARCHS_tune- - List all of the package architectures +that are compatible with this specific tune. The package arch of this +tune must be in the list. + +TARGET_FPU - The FPU setting for a given tune, hard (generate floating +point instructions), soft (generate internal gcc calls), "other" +architecture specific floating point. This is synchronized with the +compiler and other toolchain items. This should be dynamically +configured in the same way that TUNE_CCARGS is. + +BASE_LIB_tune- - The "/lib" location for a specific ABI. This is +used in a multilib configuration to place the libraries in the correct, +non-conflicting locations. + + +Best Practice +============= +The tune infrastructure is designed to be hierarchical. When writing a +new tune file for a "fast-forward" CPU architecture (one that supports +everything from a previous generation), it is recommended to require the +previous generation tune file and specify PACKAGE_EXTRA_ARCHS using the +previous generation's override and appending the new tune. Note that +only one previous tune file should be included to avoid mutiple includes +of the base arch which could lead to a broken configuration due to +multiple prepend and append assignments. + +For example, for x86, there is a common x86/arch-x86.inc which is +included in the base i586 tune file. The core2 tune builds +on that, and corei7 builds on core2. diff --git a/meta/conf/machine/include/arm/README b/meta/conf/machine/include/arm/README new file mode 100644 index 0000000000..a1beb75fdf --- /dev/null +++ b/meta/conf/machine/include/arm/README @@ -0,0 +1,40 @@ +2012/03/30 - Mark Hatle + - Initial Revision + +The ARM architecture definitions are split among a number of files. +The primary definitions for the variables are handled by the core +arch-arm.inc file. + +TUNE_ARCH is set to either "arm" or "armeb" depending on the value +of the existence of the "bigendian" feature in a given tune. + +A small set of ARM specific variables have been defined to allow +TUNE_PKGARCH to be automatically defined. Optimized tunings must NOT +change the definiton of TUNE_PKGARCH. TUNE_PKGACH_tune- will be +ignored. The format of the package arch is enforced by the TUNE_PKGARCH +default. The format must be of the form: +[t][e][hf][b][-vfp][-neon] + +TUNE_PKGARCH is defined as: +${ARMPKGARCH}${ARMPKGSFX_THUMB}${ARMPKGSFX_DSP}${ARMPKGSFX_EABI}${ARMPKGSFX_ENDIAN}${ARMPKGSFX_FPU} + +ARMPKGARCH - This is the core package arch component specified by each +tuning. This is the primary identifier of a tuning. Usual values are: +arm, armv4, armv5, armv6, armv7a, etc. + +ARMPKGSFX_THUMB - This is the thumb specific suffix. Curently it is +defined in feature-arm-thumb.inc. + +ARMPKGSFX_DSP - This is the DSP specific suffix. Currently this is set +to 'e' when on armv5 and the dsp feature is enabled. + +ARMPKGSFX_EABI - This is the eabi specific suffix. There are currently +two defined ABIs specificed, standard EABI and Hard Float (VFP) EABI. +When the callconvention-hard is enabled, "hf" is specified, otherwise it +is blank. + +ARMPKGSFX_ENDIAN - This is the endian specific suffix. It is defined in +the core arch-arm.inc file. + +ARMPKGSFX_FPU - This is the FPU specific suffix. The suffix indicates +specific FPU optimizations. 'vfp' and 'neon' are both defined. diff --git a/meta/conf/machine/include/arm/arch-arm.inc b/meta/conf/machine/include/arm/arch-arm.inc new file mode 100644 index 0000000000..90b80c4c36 --- /dev/null +++ b/meta/conf/machine/include/arm/arch-arm.inc @@ -0,0 +1,17 @@ + +TUNEVALID[bigendian] = "Enable big-endian mode." + +ARMPKGARCH = "${ARMPKGARCH_tune-${DEFAULTTUNE}}" +ARMPKGSFX_ENDIAN = "${@bb.utils.contains("TUNE_FEATURES", "bigendian", "b", "", d)}" +ARMPKGSFX_FPU ??= "" +ARMPKGSFX_DSP ??= "" +ARMPKGSFX_EABI ??= "" +ARMPKGSFX_THUMB ??= "" + +TUNE_ARCH = "${@bb.utils.contains("TUNE_FEATURES", "bigendian", "armeb", "arm", d)}" +TUNE_PKGARCH = "${ARMPKGARCH}${ARMPKGSFX_THUMB}${ARMPKGSFX_DSP}${ARMPKGSFX_EABI}${ARMPKGSFX_ENDIAN}${ARMPKGSFX_FPU}" + +ABIEXTENSION = "eabi" + +TARGET_FPU = "${@d.getVar('ARMPKGSFX_FPU', True).strip('-') or 'soft'}" + diff --git a/meta/conf/machine/include/arm/arch-armv4.inc b/meta/conf/machine/include/arm/arch-armv4.inc new file mode 100644 index 0000000000..c33c81690c --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv4.inc @@ -0,0 +1,33 @@ +DEFAULTTUNE ?= "armv4" + +TUNEVALID[armv4] = "Enable instructions for ARMv4" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "armv4", " -march=armv4${ARMPKGSFX_THUMB}", "", d)}" +# enable --fix-v4bx when we have armv4 in TUNE_FEATURES, but then disable it when we have also armv5 or thumb +# maybe we should extend bb.utils.contains to support check for any checkvalues in value, now it does +# checkvalues.issubset(val) which cannot be used for negative test of foo neither bar in value +FIX_V4BX_ARMV4 = "${@bb.utils.contains("TUNE_FEATURES", "armv4", "--fix-v4bx", "", d)}" +FIX_V4BX_ARMV5 = "${@bb.utils.contains("TUNE_FEATURES", "armv5", "", "${FIX_V4BX_ARMV4}", d)}" +FIX_V4BX = "${@bb.utils.contains("TUNE_FEATURES", "thumb", "", "${FIX_V4BX_ARMV5}", d)}" +TARGET_LD_KERNEL_ARCH += "${FIX_V4BX}" +MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "armv4", "armv4:", "" ,d)}" + +require conf/machine/include/arm/arch-arm.inc +require conf/machine/include/arm/feature-arm-thumb.inc + +# Little Endian +AVAILTUNES += "armv4 armv4t" +ARMPKGARCH_tune-armv4 ?= "armv4" +ARMPKGARCH_tune-armv4t ?= "armv4" +TUNE_FEATURES_tune-armv4 ?= "armv4" +TUNE_FEATURES_tune-armv4t ?= "${TUNE_FEATURES_tune-armv4} thumb" +PACKAGE_EXTRA_ARCHS_tune-armv4 = "arm armv4" +PACKAGE_EXTRA_ARCHS_tune-armv4t = "${PACKAGE_EXTRA_ARCHS_tune-armv4} armv4t" + +# Big Endian +AVAILTUNES += "armv4b armv4tb" +ARMPKGARCH_tune-armv4b ?= "armv4" +ARMPKGARCH_tune-armv4tb ?= "armv4" +TUNE_FEATURES_tune-armv4b ?= "${TUNE_FEATURES_tune-armv4} bigendian" +TUNE_FEATURES_tune-armv4tb ?= "${TUNE_FEATURES_tune-armv4t} bigendian" +PACKAGE_EXTRA_ARCHS_tune-armv4b = "armeb armv4b" +PACKAGE_EXTRA_ARCHS_tune-armv4tb = "${PACKAGE_EXTRA_ARCHS_tune-armv4b} armv4tb" diff --git a/meta/conf/machine/include/arm/arch-armv5-dsp.inc b/meta/conf/machine/include/arm/arch-armv5-dsp.inc new file mode 100644 index 0000000000..524a62aec9 --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv5-dsp.inc @@ -0,0 +1,52 @@ +ARMPKGSFX_DSP = "${@bb.utils.contains("TUNE_FEATURES", [ "armv5", "dsp" ], "e", "", d)}" +TUNEVALID[dsp] = "ARM DSP functionality" + +require conf/machine/include/arm/arch-armv5.inc + +# Little Endian +AVAILTUNES += "armv5e armv5te" +ARMPKGARCH_tune-armv5e ?= "armv5" +ARMPKGARCH_tune-armv5te ?= "armv5" +TUNE_FEATURES_tune-armv5e ?= "${TUNE_FEATURES_tune-armv5} dsp" +TUNE_FEATURES_tune-armv5te ?= "${TUNE_FEATURES_tune-armv5t} dsp" +PACKAGE_EXTRA_ARCHS_tune-armv5e = "${PACKAGE_EXTRA_ARCHS_tune-armv5} armv5e" +PACKAGE_EXTRA_ARCHS_tune-armv5te = "${PACKAGE_EXTRA_ARCHS_tune-armv5t} armv5e armv5te" + +# Little Endian + VFP/DSP +AVAILTUNES += "armv5e-vfp armv5te-vfp armv5ehf-vfp armv5tehf-vfp" +ARMPKGARCH_tune-armv5e-vfp ?= "armv5" +ARMPKGARCH_tune-armv5te-vfp ?= "armv5" +ARMPKGARCH_tune-armv5ehf-vfp ?= "armv5" +ARMPKGARCH_tune-armv5tehf-vfp ?= "armv5" +TUNE_FEATURES_tune-armv5e-vfp ?= "${TUNE_FEATURES_tune-armv5e} vfp" +TUNE_FEATURES_tune-armv5te-vfp ?= "${TUNE_FEATURES_tune-armv5te} vfp" +TUNE_FEATURES_tune-armv5ehf-vfp ?= "${TUNE_FEATURES_tune-armv5e-vfp} callconvention-hard" +TUNE_FEATURES_tune-armv5tehf-vfp ?= "${TUNE_FEATURES_tune-armv5te-vfp} callconvention-hard" +PACKAGE_EXTRA_ARCHS_tune-armv5e-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5-vfp} armv5e armv5e-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5te-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5t-vfp} armv5e armv5te armv5e-vfp armv5te-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5ehf-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5hf-vfp} armv5ehf-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5tehf-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5thf-vfp} armv5ehf-vfp armv5tehf-vfp" + +# Big Endian +AVAILTUNES += "armv5eb armv5teb" +ARMPKGARCH_tune-armv5eb ?= "armv5" +ARMPKGARCH_tune-armv5teb ?= "armv5" +TUNE_FEATURES_tune-armv5eb ?= "${TUNE_FEATURES_tune-armv5e} bigendian" +TUNE_FEATURES_tune-armv5teb ?= "${TUNE_FEATURES_tune-armv5te} bigendian" +PACKAGE_EXTRA_ARCHS_tune-armv5eb = "${PACKAGE_EXTRA_ARCHS_tune-armv5b} armv5eb" +PACKAGE_EXTRA_ARCHS_tune-armv5teb = "${PACKAGE_EXTRA_ARCHS_tune-armv5tb} armv5eb armv5teb" + +# Big Endian + VFP/DSP +AVAILTUNES += "armv5eb-vfp armv5teb-vfp armv5ehfb-vfp armv5tehfb-vfp" +ARMPKGARCH_tune-armv5eb-vfp ?= "armv5" +ARMPKGARCH_tune-armv5teb-vfp ?= "armv5" +ARMPKGARCH_tune-armv5ehfb-vfp ?= "armv5" +ARMPKGARCH_tune-armv5tehfb-vfp ?= "armv5" +TUNE_FEATURES_tune-armv5eb-vfp ?= "${TUNE_FEATURES_tune-armv5e-vfp} bigendian" +TUNE_FEATURES_tune-armv5teb-vfp ?= "${TUNE_FEATURES_tune-armv5te-vfp} bigendian" +TUNE_FEATURES_tune-armv5ehfb-vfp ?= "${TUNE_FEATURES_tune-armv5ehf-vfp} bigendian" +TUNE_FEATURES_tune-armv5tehfb-vfp ?= "${TUNE_FEATURES_tune-armv5tehf-vfp} bigendian" +PACKAGE_EXTRA_ARCHS_tune-armv5eb-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5b-vfp} armv5eb armv5eb-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5teb-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5tb-vfp} armv5eb armv5teb armv5eb-vfp armv5teb-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5ehfb-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5hfb-vfp} armv5ehfb-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5tehfb-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5thfb-vfp} armv5ehfb-vfp armv5tehfb-vfp" diff --git a/meta/conf/machine/include/arm/arch-armv5.inc b/meta/conf/machine/include/arm/arch-armv5.inc new file mode 100644 index 0000000000..9e8d1fa0a5 --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv5.inc @@ -0,0 +1,60 @@ +DEFAULTTUNE ?= "armv5" + +TUNEVALID[armv5] = "Enable instructions for ARMv5" +TUNECONFLICTS[armv5] = "armv4" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "armv5", " -march=armv5${ARMPKGSFX_THUMB}${ARMPKGSFX_DSP}", "", d)}" +MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "armv5", "armv5:", "" ,d)}" + +ARMPKGSFX_DSP = "${@bb.utils.contains("TUNE_FEATURES", [ "armv5", "dsp" ], "e", "", d)}" + +require conf/machine/include/arm/arch-armv4.inc +require conf/machine/include/arm/feature-arm-vfp.inc + +# Little Endian +AVAILTUNES += "armv5 armv5t" +ARMPKGARCH_tune-armv5 ?= "armv5" +ARMPKGARCH_tune-armv5t ?= "armv5" +TUNE_FEATURES_tune-armv5 ?= "armv5" +TUNE_FEATURES_tune-armv5t ?= "${TUNE_FEATURES_tune-armv5} thumb" +PACKAGE_EXTRA_ARCHS_tune-armv5 = "${PACKAGE_EXTRA_ARCHS_tune-armv4} armv5" +PACKAGE_EXTRA_ARCHS_tune-armv5t = "${PACKAGE_EXTRA_ARCHS_tune-armv4t} armv5 armv5t" + +# Little Endian + VFP/DSP +AVAILTUNES += "armv5-vfp armv5t-vfp armv5hf-vfp armv5thf-vfp" +ARMPKGARCH_tune-armv5-vfp ?= "armv5" +ARMPKGARCH_tune-armv5t-vfp ?= "armv5" +ARMPKGARCH_tune-armv5hf-vfp ?= "armv5" +ARMPKGARCH_tune-armv5thf-vfp ?= "armv5" +TUNE_FEATURES_tune-armv5-vfp ?= "${TUNE_FEATURES_tune-armv5} vfp" +TUNE_FEATURES_tune-armv5t-vfp ?= "${TUNE_FEATURES_tune-armv5t} vfp" +TUNE_FEATURES_tune-armv5hf-vfp ?= "${TUNE_FEATURES_tune-armv5-vfp} callconvention-hard" +TUNE_FEATURES_tune-armv5thf-vfp ?= "${TUNE_FEATURES_tune-armv5t-vfp} callconvention-hard" +PACKAGE_EXTRA_ARCHS_tune-armv5-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5} armv5-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5t-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5t} armv5-vfp armv5t-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5hf-vfp = "armv5hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5thf-vfp = "armv5hf-vfp armv5thf-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5tehf-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5thf-vfp} armv5ehf-vfp armv5tehf-vfp" + +# Big Endian +AVAILTUNES += "armv5b armv5tb" +ARMPKGARCH_tune-armv5b ?= "armv5" +ARMPKGARCH_tune-armv5tb ?= "armv5" +TUNE_FEATURES_tune-armv5b ?= "${TUNE_FEATURES_tune-armv5} bigendian" +TUNE_FEATURES_tune-armv5tb ?= "${TUNE_FEATURES_tune-armv5t} bigendian" +PACKAGE_EXTRA_ARCHS_tune-armv5b = "${PACKAGE_EXTRA_ARCHS_tune-armv4b} armv5b" +PACKAGE_EXTRA_ARCHS_tune-armv5tb = "${PACKAGE_EXTRA_ARCHS_tune-armv4tb} armv5b armv5tb" + +# Big Endian + VFP/DSP +AVAILTUNES += "armv5b-vfp armv5tb-vfp armv5hfb-vfp armv5thfb-vfp" +ARMPKGARCH_tune-armv5b-vfp ?= "armv5" +ARMPKGARCH_tune-armv5tb-vfp ?= "armv5" +ARMPKGARCH_tune-armv5hfb-vfp ?= "armv5" +ARMPKGARCH_tune-armv5thfb-vfp ?= "armv5" +TUNE_FEATURES_tune-armv5b-vfp ?= "${TUNE_FEATURES_tune-armv5-vfp} bigendian" +TUNE_FEATURES_tune-armv5tb-vfp ?= "${TUNE_FEATURES_tune-armv5t-vfp} bigendian" +TUNE_FEATURES_tune-armv5hfb-vfp ?= "${TUNE_FEATURES_tune-armv5hf-vfp} bigendian" +TUNE_FEATURES_tune-armv5thfb-vfp ?= "${TUNE_FEATURES_tune-armv5thf-vfp} bigendian" +PACKAGE_EXTRA_ARCHS_tune-armv5b-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5b} armv5b-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5tb-vfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5tb} armv5b-vfp armv5tb-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5hfb-vfp = "armv5hfb-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv5thfb-vfp = "armv5hfb-vfp armv5thfb-vfp" diff --git a/meta/conf/machine/include/arm/arch-armv6.inc b/meta/conf/machine/include/arm/arch-armv6.inc new file mode 100644 index 0000000000..0adf73fae2 --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv6.inc @@ -0,0 +1,50 @@ +DEFAULTTUNE ?= "armv6" + +TUNEVALID[armv6] = "Enable instructions for ARMv6" +TUNECONFLICTS[armv6] = "armv4 armv5" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "armv6", " -march=armv6", "", d)}" +MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "armv6", "armv6:", "" ,d)}" + +require conf/machine/include/arm/arch-armv5-dsp.inc + +# Little Endian +AVAILTUNES += "armv6-novfp armv6t-novfp armv6 armv6t armv6hf armv6thf" +ARMPKGARCH_tune-armv6-novfp ?= "armv6" +ARMPKGARCH_tune-armv6t-novfp ?= "armv6" +ARMPKGARCH_tune-armv6 ?= "armv6" +ARMPKGARCH_tune-armv6t ?= "armv6" +ARMPKGARCH_tune-armv6hf ?= "armv6" +ARMPKGARCH_tune-armv6thf ?= "armv6" +TUNE_FEATURES_tune-armv6-novfp ?= "armv6" +TUNE_FEATURES_tune-armv6t-novfp ?= "${TUNE_FEATURES_tune-armv6-novfp} thumb" +TUNE_FEATURES_tune-armv6 ?= "${TUNE_FEATURES_tune-armv6-novfp} vfp" +TUNE_FEATURES_tune-armv6t ?= "${TUNE_FEATURES_tune-armv6t-novfp} vfp" +TUNE_FEATURES_tune-armv6hf ?= "${TUNE_FEATURES_tune-armv6} callconvention-hard" +TUNE_FEATURES_tune-armv6thf ?= "${TUNE_FEATURES_tune-armv6t} callconvention-hard" +PACKAGE_EXTRA_ARCHS_tune-armv6-novfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5e} armv6" +PACKAGE_EXTRA_ARCHS_tune-armv6t-novfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5te} armv6 armv6t" +PACKAGE_EXTRA_ARCHS_tune-armv6 = "${PACKAGE_EXTRA_ARCHS_tune-armv5e-vfp} armv6 armv6-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv6t = "${PACKAGE_EXTRA_ARCHS_tune-armv5te-vfp} armv6 armv6t armv6-vfp armv6t-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv6hf = "${PACKAGE_EXTRA_ARCHS_tune-armv5ehf-vfp} armv6hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv6thf = "${PACKAGE_EXTRA_ARCHS_tune-armv5tehf-vfp} armv6hf-vfp armv6thf-vfp" + +# Big Endian +AVAILTUNES += "armv6b-novfp armv6tb-novfp armv6b armv6tb armv6hfb armv6thfb" +ARMPKGARCH_tune-armv6b-novfp ?= "armv6" +ARMPKGARCH_tune-armv6tb-novfp ?= "armv6" +ARMPKGARCH_tune-armv6b ?= "armv6" +ARMPKGARCH_tune-armv6tb ?= "armv6" +ARMPKGARCH_tune-armv6hfb ?= "armv6" +ARMPKGARCH_tune-armv6thfb ?= "armv6" +TUNE_FEATURES_tune-armv6b-novfp ?= "${TUNE_FEATURES_tune-armv6-novfp} bigendian" +TUNE_FEATURES_tune-armv6tb-novfp ?= "${TUNE_FEATURES_tune-armv6t-novfp} bigendian" +TUNE_FEATURES_tune-armv6b ?= "${TUNE_FEATURES_tune-armv6} bigendian" +TUNE_FEATURES_tune-armv6tb ?= "${TUNE_FEATURES_tune-armv6t} bigendian" +TUNE_FEATURES_tune-armv6hfb ?= "${TUNE_FEATURES_tune-armv6hf} bigendian" +TUNE_FEATURES_tune-armv6thfb ?= "${TUNE_FEATURES_tune-armv6thf} bigendian" +PACKAGE_EXTRA_ARCHS_tune-armv6b-novfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5eb} armv6b" +PACKAGE_EXTRA_ARCHS_tune-armv6tb-novfp = "${PACKAGE_EXTRA_ARCHS_tune-armv5teb} armv6b armv6tb" +PACKAGE_EXTRA_ARCHS_tune-armv6b = "${PACKAGE_EXTRA_ARCHS_tune-armv5eb-vfp} armv6b armv6b-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv6tb = "${PACKAGE_EXTRA_ARCHS_tune-armv5teb-vfp} armv6b armv6tb armv6b-vfp armv6tb-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv6hfb = "${PACKAGE_EXTRA_ARCHS_tune-armv5ehfb-vfp} armv6hfb-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv6thfb = "${PACKAGE_EXTRA_ARCHS_tune-armv5tehfb-vfp} armv6hfb-vfp armv6thfb-vfp" diff --git a/meta/conf/machine/include/arm/arch-armv7a.inc b/meta/conf/machine/include/arm/arch-armv7a.inc new file mode 100644 index 0000000000..bb36c39739 --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv7a.inc @@ -0,0 +1,75 @@ +DEFAULTTUNE ?= "armv7a" + +TUNEVALID[armv7a] = "Enable instructions for ARMv7-a" +TUNECONFLICTS[armv7a] = "armv4 armv5 armv6 armv7" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "armv7a", " -march=armv7-a", "", d)}" +MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "armv7a", "armv7a:", "" ,d)}" + +require conf/machine/include/arm/arch-armv6.inc +require conf/machine/include/arm/feature-arm-neon.inc + +# Little Endian base configs +AVAILTUNES += "armv7a armv7at armv7a-neon armv7at-neon" +ARMPKGARCH_tune-armv7a ?= "armv7a" +ARMPKGARCH_tune-armv7at ?= "armv7a" +ARMPKGARCH_tune-armv7a-neon?= "armv7a" +ARMPKGARCH_tune-armv7at-neon ?= "armv7a" +TUNE_FEATURES_tune-armv7a ?= "armv7a vfp" +TUNE_FEATURES_tune-armv7at ?= "${TUNE_FEATURES_tune-armv7a} thumb" +TUNE_FEATURES_tune-armv7a-neon ?= "${TUNE_FEATURES_tune-armv7a} neon" +TUNE_FEATURES_tune-armv7at-neon ?= "${TUNE_FEATURES_tune-armv7at} neon" +PACKAGE_EXTRA_ARCHS_tune-armv7a = "${PACKAGE_EXTRA_ARCHS_tune-armv6} armv7a armv7a-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv7a-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} armv7a-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-armv7at = "${PACKAGE_EXTRA_ARCHS_tune-armv6t} armv7a armv7a-vfp armv7at2-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv7at-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} armv7a-vfp-neon armv7at2-vfp-neon" + +# VFP Tunes +AVAILTUNES += "armv7ahf armv7athf armv7ahf-neon armv7athf-neon armv7ahf-neon-vfpv4 armv7athf-neon-vfpv4" +ARMPKGARCH_tune-armv7ahf ?= "armv7a" +ARMPKGARCH_tune-armv7athf ?= "armv7a" +ARMPKGARCH_tune-armv7ahf-neon?= "armv7a" +ARMPKGARCH_tune-armv7athf-neon ?= "armv7a" +ARMPKGARCH_tune-armv7ahf-neon-vfpv4 ?= "armv7a" +ARMPKGARCH_tune-armv7athf-neon-vfpv4 ?= "armv7a" +TUNE_FEATURES_tune-armv7ahf ?= "${TUNE_FEATURES_tune-armv7a} callconvention-hard" +TUNE_FEATURES_tune-armv7athf ?= "${TUNE_FEATURES_tune-armv7at} callconvention-hard" +TUNE_FEATURES_tune-armv7ahf-neon ?= "${TUNE_FEATURES_tune-armv7a-neon} callconvention-hard" +TUNE_FEATURES_tune-armv7athf-neon ?= "${TUNE_FEATURES_tune-armv7at-neon} callconvention-hard" +TUNE_FEATURES_tune-armv7ahf-neon-vfpv4 ?= "${TUNE_FEATURES_tune-armv7ahf-neon} vfpv4" +TUNE_FEATURES_tune-armv7athf-neon-vfpv4 ?= "${TUNE_FEATURES_tune-armv7athf-neon} vfpv4" +PACKAGE_EXTRA_ARCHS_tune-armv7ahf = "${PACKAGE_EXTRA_ARCHS_tune-armv6hf} armv7ahf-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv7athf = "${PACKAGE_EXTRA_ARCHS_tune-armv6thf} armv7ahf-vfp armv7at2hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} armv7ahf-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} armv7ahf-vfp-neon armv7at2hf-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} armv7ahf-vfp-neon-vfpv4" +PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} armv7athf-vfp-neon-vfpv4" + +# Big Endian +AVAILTUNES += "armv7ab armv7atb armv7ab-neon armv7atb-neon" +ARMPKGARCH_tune-armv7ab ?= "armv7a" +ARMPKGARCH_tune-armv7atb ?= "armv7a" +ARMPKGARCH_tune-armv7ab-neon?= "armv7a" +ARMPKGARCH_tune-armv7atb-neon ?= "armv7a" +TUNE_FEATURES_tune-armv7ab ?= "${TUNE_FEATURES_tune-armv7a} bigendian" +TUNE_FEATURES_tune-armv7atb ?= "${TUNE_FEATURES_tune-armv7at} bigendian" +TUNE_FEATURES_tune-armv7ab-neon ?= "${TUNE_FEATURES_tune-armv7a-neon} bigendian" +TUNE_FEATURES_tune-armv7atb-neon ?= "${TUNE_FEATURES_tune-armv7at-neon} bigendian" +PACKAGE_EXTRA_ARCHS_tune-armv7ab = "${PACKAGE_EXTRA_ARCHS_tune-armv6b} armv7ab-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv7atb = "${PACKAGE_EXTRA_ARCHS_tune-armv6tb} armv7ab-vfp armv7at2b-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv7ab-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ab} armv7ab-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-armv7atb-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7atb} armv7ab-vfp-neon armv7at2b-vfp-neon" + +# Big Endian + VFP +AVAILTUNES += "armv7ahfb armv7athfb armv7ahfb-neon armv7athfb-neon" +ARMPKGARCH_tune-armv7ahfb ?= "armv7a" +ARMPKGARCH_tune-armv7athfb ?= "armv7a" +ARMPKGARCH_tune-armv7ahfb-neon?= "armv7a" +ARMPKGARCH_tune-armv7athfb-neon ?= "armv7a" +TUNE_FEATURES_tune-armv7ahfb ?= "${TUNE_FEATURES_tune-armv7ahf} bigendian" +TUNE_FEATURES_tune-armv7athfb ?= "${TUNE_FEATURES_tune-armv7athf} bigendian" +TUNE_FEATURES_tune-armv7ahfb-neon ?= "${TUNE_FEATURES_tune-armv7ahf-neon} bigendian" +TUNE_FEATURES_tune-armv7athfb-neon ?= "${TUNE_FEATURES_tune-armv7athf-neon} bigendian" +PACKAGE_EXTRA_ARCHS_tune-armv7ahfb = "${PACKAGE_EXTRA_ARCHS_tune-armv6hfb} armv7ahfb-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv7athfb = "${PACKAGE_EXTRA_ARCHS_tune-armv6thfb} armv7ahfb-vfp armv7at2hfb-vfp" +PACKAGE_EXTRA_ARCHS_tune-armv7ahfb-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahfb} armv7ahfb-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-armv7athfb-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athfb} armv7ahfb-vfp-neon armv7at2hfb-vfp-neon" diff --git a/meta/conf/machine/include/arm/feature-arm-neon.inc b/meta/conf/machine/include/arm/feature-arm-neon.inc new file mode 100644 index 0000000000..e8b2b85d5a --- /dev/null +++ b/meta/conf/machine/include/arm/feature-arm-neon.inc @@ -0,0 +1,3 @@ +TUNEVALID[neon] = "Enable Neon SIMD accelerator unit." +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "neon", bb.utils.contains("TUNE_FEATURES", "vfpv4", " -mfpu=neon-vfpv4", " -mfpu=neon", d), "" , d)}" +ARMPKGSFX_FPU .= "${@bb.utils.contains("TUNE_FEATURES", "neon", "-neon", "", d)}" diff --git a/meta/conf/machine/include/arm/feature-arm-thumb.inc b/meta/conf/machine/include/arm/feature-arm-thumb.inc new file mode 100644 index 0000000000..fa3a4e5c1f --- /dev/null +++ b/meta/conf/machine/include/arm/feature-arm-thumb.inc @@ -0,0 +1,25 @@ +# The instruction set the compiler should use when generating application +# code. The kernel is always compiled with arm code at present. arm code +# is the original 32 bit ARM instruction set, thumb code is the 16 bit +# encoded RISC sub-set. Thumb code is smaller (maybe 70% of the ARM size) +# but requires more instructions (140% for 70% smaller code) so may be +# slower. +TUNEVALID[thumb] = "Use thumb instructions instead of ARM" +ARM_THUMB_M_OPT = "${@['-marm', '-mthumb'][d.getVar('ARM_INSTRUCTION_SET', True) == 'thumb']}" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "thumb", " ${ARM_THUMB_M_OPT}", "", d)}" +OVERRIDES .= "${@bb.utils.contains("TUNE_FEATURES", "thumb", ":thumb", "", d)}" + +ARMPKGSFX_THUMB .= "${@bb.utils.contains("TUNE_FEATURES", [ "armv4", "thumb" ], "t", "", d)}" +ARMPKGSFX_THUMB .= "${@bb.utils.contains("TUNE_FEATURES", [ "armv5", "thumb" ], "t", "", d)}" +ARMPKGSFX_THUMB .= "${@bb.utils.contains("TUNE_FEATURES", [ "armv6", "thumb" ], "t", "", d)}" +ARMPKGSFX_THUMB .= "${@bb.utils.contains("TUNE_FEATURES", [ "armv7a", "thumb" ], "t2", "", d)}" + +# Whether to compile with code to allow interworking between the two +# instruction sets. This allows thumb code to be executed on a primarily +# arm system and vice versa. It is strongly recommended that DISTROs not +# turn this off - the actual cost is very small. +TUNEVALID[no-thumb-interwork] = "Disable mixing of thumb and ARM functions" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "no-thumb-interwork", " -mno-thumb-interwork", " -mthumb-interwork", d)}" +OVERRIDES .= "${@bb.utils.contains("TUNE_FEATURES", "no-thumb-interwork", ":thumb-interwork", "", d)}" + +TARGET_CC_KERNEL_ARCH += "-mno-thumb-interwork -marm" diff --git a/meta/conf/machine/include/arm/feature-arm-vfp.inc b/meta/conf/machine/include/arm/feature-arm-vfp.inc new file mode 100644 index 0000000000..13927ffc12 --- /dev/null +++ b/meta/conf/machine/include/arm/feature-arm-vfp.inc @@ -0,0 +1,9 @@ +TUNEVALID[vfp] = "Enable Vector Floating Point (vfp) unit." +ARMPKGSFX_FPU .= "${@bb.utils.contains("TUNE_FEATURES", "vfp", "-vfp", "" ,d)}" + +TUNEVALID[vfpv4] = "Enable Vector Floating Point Version 4 (vfpv4) unit." +ARMPKGSFX_FPU .= "${@bb.utils.contains("TUNE_FEATURES", "vfpv4", "-vfpv4", "" ,d)}" + +TUNEVALID[callconvention-hard] = "Enable EABI hard float call convention, requires VFP." +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "vfp", bb.utils.contains("TUNE_FEATURES", "callconvention-hard", " -mfloat-abi=hard", " -mfloat-abi=softfp", d), "" ,d)}" +ARMPKGSFX_EABI .= "${@bb.utils.contains("TUNE_FEATURES", [ "callconvention-hard", "vfp" ], "hf", "", d)}" diff --git a/meta/conf/machine/include/mips/README b/meta/conf/machine/include/mips/README new file mode 100644 index 0000000000..c375f316df --- /dev/null +++ b/meta/conf/machine/include/mips/README @@ -0,0 +1,36 @@ +2012/03/30 - Mark Hatle + - Initial Version + +MIPS currently defines 12 ABIs. Combinations of: + *) Big/Little Endian + *) Hardware/Software Floating Point + *) o32, n32, n64 ABI + +TUNE_ARCH, the GNU canonical arch, is defined as: + +mips${MIPSPKGSFX_BYTE}${MIPSPKGSFX_ENDIAN} + +The package arch is defined in such a way to generated a standard naming +scheme. The scheme is: [-nf][-n32] + +TUNE_PKGARCH is defined as: + +${MIPSPKGSFX_VARIANT_tune-${DEFAULTTUNE}}${MIPSPKGSFX_FPU}${MIPSPKGSFX_ABI} + +The following is a list of MIPS specific variables: + +MIPSPKGSFX_BYTE - This is defined as either blank and "64" for MIPS64 CPUs. + +MIPSPKGSFX_ENDIAN - For bigendian hardware this is blank, otherwise it's +defined as "el". + +MIPSPKGSFX_VARIANT_tune- - In the default tunings it is set to the +same value as TUNE_ARCH. In custom, optimized tunings, the value should +be modified to more precisely describe the tuning. + +MIPSPKGSFX_FPU - The value is set to "" or "-nf", where "-nf" indicates +that the tune is using a non-floating point ABI. + +MIPSPKGSFX_ABI - This is used to specify an alternative ABI when the previous +values are not enough to distringuish the package. "-n32" is added when +building for N32 ABI. diff --git a/meta/conf/machine/include/mips/arch-mips.inc b/meta/conf/machine/include/mips/arch-mips.inc new file mode 100644 index 0000000000..02626d300e --- /dev/null +++ b/meta/conf/machine/include/mips/arch-mips.inc @@ -0,0 +1,102 @@ +# MIPS Architecture definition +# 12 defined ABIs, all combinations of: +# *) Big/Little Endian +# *) Hardware/Software Floating Point +# *) o32, n32, n64 ABI + +DEFAULTTUNE ?= "mips" + +# Endianess +TUNEVALID[bigendian] = "Enable big-endian mode" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "bigendian", " -meb", " -mel", d)}" + +# ABI flags +TUNEVALID[o32] = "MIPS o32 ABI" +TUNECONFLICTS[o32] = "n32 n64" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "o32", " -mabi=32", "", d)}" + +TUNEVALID[n32] = "MIPS64 n32 ABI" +TUNECONFLICTS[n32] = "o32 n64" +ABIEXTENSION .= "${@bb.utils.contains("TUNE_FEATURES", "n32", "n32", "" ,d)}" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "n32", " -mabi=n32", "", d)}" + +TUNEVALID[n64] = "MIPS64 n64 ABI" +TUNECONFLICTS[n64] = "o32 n32" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "n64", " -mabi=64", "", d)}" + +# Floating point +TUNEVALID[fpu-hard] = "Use hardware FPU" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "fpu-hard", " -mhard-float", " -msoft-float", d)}" +TARGET_FPU = "${@bb.utils.contains("TUNE_FEATURES", "fpu-hard", "", "soft", d)}" + +# Package naming +MIPSPKGSFX_ENDIAN = "${@bb.utils.contains("TUNE_FEATURES", "bigendian", "", "el", d)}" +MIPSPKGSFX_BYTE = "${@bb.utils.contains("TUNE_FEATURES", "n64" , "64", "", d)}" +MIPSPKGSFX_BYTE .= "${@bb.utils.contains("TUNE_FEATURES", "n32" , "64", "", d)}" +MIPSPKGSFX_FPU = "${@bb.utils.contains("TUNE_FEATURES", "fpu-hard" , "", "-nf", d)}" +MIPSPKGSFX_ABI = "${@bb.utils.contains("TUNE_FEATURES", "n32", "-n32", "", d)}" + +TUNE_ARCH = "mips${MIPSPKGSFX_BYTE}${MIPSPKGSFX_ENDIAN}" +TUNE_PKGARCH = "${MIPSPKGSFX_VARIANT_tune-${DEFAULTTUNE}}${MIPSPKGSFX_FPU}${MIPSPKGSFX_ABI}" + +# Base tunes +AVAILTUNES += "mips mips64-n32 mips64 mipsel mips64el-n32 mips64el mips-nf mips64-nf-n32 mips64-nf mipsel-nf mips64el-nf-n32 mips64el-nf" +TUNE_FEATURES_tune-mips = "o32 bigendian fpu-hard" +BASE_LIB_tune-mips = "lib" +MIPSPKGSFX_VARIANT_tune-mips = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips = "mips" + +TUNE_FEATURES_tune-mips64-n32 = "n32 bigendian fpu-hard" +BASE_LIB_tune-mips64-n32 = "lib32" +MIPSPKGSFX_VARIANT_tune-mips64-n32 = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips64-n32 = "mips64-n32" + +TUNE_FEATURES_tune-mips64 = "n64 bigendian fpu-hard" +BASE_LIB_tune-mips64 = "lib64" +MIPSPKGSFX_VARIANT_tune-mips64 = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips64 = "mips64" + +TUNE_FEATURES_tune-mipsel = "o32 fpu-hard" +BASE_LIB_tune-mipsel = "lib" +MIPSPKGSFX_VARIANT_tune-mipsel = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mipsel = "mipsel" + +TUNE_FEATURES_tune-mips64el-n32 = "n32 fpu-hard" +BASE_LIB_tune-mips64el-n32 = "lib32" +MIPSPKGSFX_VARIANT_tune-mips64el-n32 = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips64el-n32 = "mips64el-n32" + +TUNE_FEATURES_tune-mips64el = "n64 fpu-hard" +BASE_LIB_tune-mips64el = "lib64" +MIPSPKGSFX_VARIANT_tune-mips64el = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips64el = "mips64el" + +TUNE_FEATURES_tune-mips-nf = "o32 bigendian" +BASE_LIB_tune-mips-nf = "lib" +MIPSPKGSFX_VARIANT_tune-mips-nf = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips-nf = "mips-nf" + +TUNE_FEATURES_tune-mips64-nf-n32 = "n32 bigendian" +BASE_LIB_tune-mips64-nf-n32 = "lib32" +MIPSPKGSFX_VARIANT_tune-mips64-nf-n32 = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips64-nf-n32 = "mips64-nf-n32" + +TUNE_FEATURES_tune-mips64-nf = "n64 bigendian" +BASE_LIB_tune-mips64-nf = "lib64" +MIPSPKGSFX_VARIANT_tune-mips64-nf = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips64-nf = "mips64-nf" + +TUNE_FEATURES_tune-mipsel-nf = "o32" +BASE_LIB_tune-mipsel-nf = "lib" +MIPSPKGSFX_VARIANT_tune-mipsel-nf = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mipsel-nf = "mipsel-nf" + +TUNE_FEATURES_tune-mips64el-nf-n32 = "n32" +BASE_LIB_tune-mips64el-nf-n32 = "lib32" +MIPSPKGSFX_VARIANT_tune-mips64el-nf-n32 = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips64el-nf-n32 = "mips64el-nf-n32" + +TUNE_FEATURES_tune-mips64el-nf = "n64" +BASE_LIB_tune-mips64el-nf = "lib64" +MIPSPKGSFX_VARIANT_tune-mips64el-nf = "${TUNE_ARCH}" +PACKAGE_EXTRA_ARCHS_tune-mips64el-nf = "mips64el-nf" diff --git a/meta/conf/machine/include/powerpc/README b/meta/conf/machine/include/powerpc/README new file mode 100644 index 0000000000..e87fb5082c --- /dev/null +++ b/meta/conf/machine/include/powerpc/README @@ -0,0 +1,17 @@ +2012/03/30 - Mark Hatle + - Initial revision + +There are 4 primary PowerPC ABIs. +# *) Hard/Soft Floating Point +# *) 32-bit/64-bit + +TUNE_ARCH is defined as either "powerpc" or "powerpc64" based on the m32 +or m64 feature. + +May of the PowerPC package archictures are based on legacy Linux names. +However, a general naming scheme should be similar to: ppc[64][][-nf]. +(Note: the default package architectures are "powerpc" and "powerpc64".) + +TUNE_PKGARCH is defined as TUNE_PKGARCH_tune-${DEFAULTTUNE}. All +PowerPC tunings are required to define TUNE_PKGARCH_tune-. + diff --git a/meta/conf/machine/include/powerpc/arch-powerpc.inc b/meta/conf/machine/include/powerpc/arch-powerpc.inc new file mode 100644 index 0000000000..036ca3c974 --- /dev/null +++ b/meta/conf/machine/include/powerpc/arch-powerpc.inc @@ -0,0 +1,34 @@ +# Power Architecture definition +# Four defined ABIs, all combinations of: +# *) Hard/Soft Floating Point +# *) 32-bit/64-bit + +DEFAULTTUNE ?= "powerpc" + +TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}" +ABIEXTENSION ?= "" + +TUNEVALID[m32] = "Power ELF32 standard ABI" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "m32", " -m32", "", d)}" +TUNE_ARCH .= "${@bb.utils.contains("TUNE_FEATURES", "m32", "powerpc", "", d)}" + +TUNEVALID[fpu-hard] = "Use hardware FPU." +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "fpu-hard", " -mhard-float", "", d)}" + +TUNEVALID[fpu-soft] = "Use software FPU." +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "fpu-soft", " -msoft-float", "", d)}" +TARGET_FPU .= "${@bb.utils.contains("TUNE_FEATURES", "fpu-soft", "soft", "", d)}" + +TUNEVALID[altivec] = "Altivec" + +# Basic tune definitions +AVAILTUNES += "powerpc powerpc-nf" +TUNE_FEATURES_tune-powerpc-nf = "m32 fpu-soft" +BASE_LIB_tune-powerpc-nf = "lib" +TUNE_PKGARCH_tune-powerpc-nf = "powerpc-nf" +PACKAGE_EXTRA_ARCHS_tune-powerpc-nf = "powerpc-nf" + +TUNE_FEATURES_tune-powerpc = "m32 fpu-hard" +BASE_LIB_tune-powerpc = "lib" +TUNE_PKGARCH_tune-powerpc = "powerpc" +PACKAGE_EXTRA_ARCHS_tune-powerpc = "powerpc" diff --git a/meta/conf/machine/include/powerpc/arch-powerpc64.inc b/meta/conf/machine/include/powerpc/arch-powerpc64.inc new file mode 100644 index 0000000000..8476dec8a0 --- /dev/null +++ b/meta/conf/machine/include/powerpc/arch-powerpc64.inc @@ -0,0 +1,14 @@ +DEFAULTTUNE ?= "powerpc64" + +require conf/machine/include/powerpc/arch-powerpc.inc + +TUNEVALID[m64] = "Power ELF64 standard ABI" +TUNECONFLICTS[m64] = "m32 nf" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "m64", " -m64", "", d)}" +TUNE_ARCH .= "${@bb.utils.contains("TUNE_FEATURES", [ "m64" ], "powerpc64", "", d)}" + +AVAILTUNES += "powerpc64" +TUNE_FEATURES_tune-powerpc64 ?= "m64 fpu-hard" +BASE_LIB_tune-powerpc64 = "lib64" +TUNE_PKGARCH_tune-powerpc64 = "powerpc64" +PACKAGE_EXTRA_ARCHS_tune-powerpc64 = "powerpc64" diff --git a/meta/conf/machine/include/qemu.inc b/meta/conf/machine/include/qemu.inc new file mode 100644 index 0000000000..591f6b4a62 --- /dev/null +++ b/meta/conf/machine/include/qemu.inc @@ -0,0 +1,29 @@ +PREFERRED_PROVIDER_virtual/xserver ?= "xserver-xorg" +PREFERRED_PROVIDER_virtual/egl ?= "mesa" +PREFERRED_PROVIDER_virtual/libgl ?= "mesa" +PREFERRED_PROVIDER_virtual/libgles1 ?= "mesa" +PREFERRED_PROVIDER_virtual/libgles2 ?= "mesa" + +XSERVER ?= "xserver-xorg \ + ${@base_contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-swrast', '', d)} \ + xf86-input-evdev \ + xf86-input-mouse \ + xf86-video-fbdev \ + xf86-input-keyboard" + +MACHINE_FEATURES = "alsa bluetooth usbgadget screen" + +MACHINEOVERRIDES =. "qemuall:" + +IMAGE_FSTYPES += "tar.bz2 ext3" + +# Don't include kernels in standard images +RDEPENDS_kernel-base = "" + +# Use a common kernel recipe for all QEMU machines +PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto" + +EXTRA_IMAGEDEPENDS += "qemu-native qemu-helper-native" + +# Provide the nfs server kernel module for all qemu images +KERNEL_FEATURES_append_pn-linux-yocto = " features/nfsd/nfsd-enable.scc" diff --git a/meta/conf/machine/include/sh/README b/meta/conf/machine/include/sh/README new file mode 100644 index 0000000000..b351acdd28 --- /dev/null +++ b/meta/conf/machine/include/sh/README @@ -0,0 +1,11 @@ +2012/03/30 - Mark Hatle + - Initial Revision + +Both big endian and little endian are defined for SH. + +Experimental -- SH tunings have not been validated. + +The TUNE_ARCH is defined as ${TUNE_ARCH_tune-${DEFAULTTUNE}}. + +The TUNE_PKGARCH is defind as ${TUNE_PKGARCH_tune-${DEFAULTTUNE}}. + diff --git a/meta/conf/machine/include/sh/arch-sh.inc b/meta/conf/machine/include/sh/arch-sh.inc new file mode 100644 index 0000000000..64d4cac829 --- /dev/null +++ b/meta/conf/machine/include/sh/arch-sh.inc @@ -0,0 +1,9 @@ +# SH Architecture definition + +DEFAULTTUNE ?= "sh" + +TUNE_ARCH = "${TUNE_ARCH_tune-${DEFAULTTUNE}}" +TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}" + +TUNEVALID[bigendian] = "Enabled big-endian mode." +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "bigendian", " -mb", " -ml", d)}" diff --git a/meta/conf/machine/include/soc-family.inc b/meta/conf/machine/include/soc-family.inc new file mode 100644 index 0000000000..0251da079c --- /dev/null +++ b/meta/conf/machine/include/soc-family.inc @@ -0,0 +1,2 @@ +# Add SOC_FAMILY to machine overrides so we get access to e.g. 'omap3' and 'ti335x' +MACHINEOVERRIDES =. "${@['', '${SOC_FAMILY}:']['${SOC_FAMILY}' != '']}" diff --git a/meta/conf/machine/include/tune-arm1136jf-s.inc b/meta/conf/machine/include/tune-arm1136jf-s.inc new file mode 100644 index 0000000000..4a131b64c3 --- /dev/null +++ b/meta/conf/machine/include/tune-arm1136jf-s.inc @@ -0,0 +1,11 @@ +DEFAULTTUNE ?= "armv6" + +require conf/machine/include/arm/arch-armv6.inc + +TUNEVALID[arm1136jfs] = "Enable arm1136jfs specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "arm1136jfs", " -mtune=arm1136jf-s", "", d)}" + +AVAILTUNES += "arm1136jfs" +ARMPKGARCH_tune-arm1136jfs = "arm1136jfs" +TUNE_FEATURES_tune-arm1136jfs = "${TUNE_FEATURES_tune-armv6} arm1136jfs" +PACKAGE_EXTRA_ARCHS_tune-arm1136jfs = "${PACKAGE_EXTRA_ARCHS_tune-armv6} arm1136jfs-vfp" diff --git a/meta/conf/machine/include/tune-arm920t.inc b/meta/conf/machine/include/tune-arm920t.inc new file mode 100644 index 0000000000..5cadcc7dc3 --- /dev/null +++ b/meta/conf/machine/include/tune-arm920t.inc @@ -0,0 +1,11 @@ +DEFAULTTUNE ?= "armv4t" + +require conf/machine/include/arm/arch-armv4.inc + +TUNEVALID[arm920t] = "Enable arm920t specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "arm920t", " -mtune=arm920t", "", d)}" + +AVAILTUNES += "arm920t" +ARMPKGARCH_tune-arm920t = "arm920t" +TUNE_FEATURES_tune-arm920t = "${TUNE_FEATURES_tune-armv4t} arm920t" +PACKAGE_EXTRA_ARCHS_tune-arm920t = "${PACKAGE_EXTRA_ARCHS_tune-armv4t} arm920tt" diff --git a/meta/conf/machine/include/tune-arm926ejs.inc b/meta/conf/machine/include/tune-arm926ejs.inc new file mode 100644 index 0000000000..335e4e020d --- /dev/null +++ b/meta/conf/machine/include/tune-arm926ejs.inc @@ -0,0 +1,11 @@ +DEFAULTTUNE ?= "armv5te" + +require conf/machine/include/arm/arch-armv5-dsp.inc + +TUNEVALID[arm926ejs] = "Enable arm926ejs specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "arm926ejs", " -mtune=arm926ej-s", "", d)}" + +AVAILTUNES += "arm926ejs" +ARMPKGARCH_tune-arm926ejs = "arm926ejs" +TUNE_FEATURES_tune-arm926ejs = "${TUNE_FEATURES_tune-armv5te} arm926ejs" +PACKAGE_EXTRA_ARCHS_tune-arm926ejs = "${PACKAGE_EXTRA_ARCHS_tune-armv5te} arm926ejste" diff --git a/meta/conf/machine/include/tune-arm9tdmi.inc b/meta/conf/machine/include/tune-arm9tdmi.inc new file mode 100644 index 0000000000..dee57c9858 --- /dev/null +++ b/meta/conf/machine/include/tune-arm9tdmi.inc @@ -0,0 +1,11 @@ +DEFAULTTUNE ?= "armv4t" + +require conf/machine/include/arm/arch-armv4.inc + +TUNEVALID[arm9tdmi] = "Enable arm9tdmi specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "arm9tdmi", " -mtune=arm9tdmi", "", d)}" + +AVAILTUNES += "arm9tdmi" +ARMPKGARCH_tune-arm9tdmi = "arm9tdmi" +TUNE_FEATURES_tune-arm9tdmi = "${TUNE_FEATURES_tune-armv4t} arm9tdmi" +PACKAGE_EXTRA_ARCHS_tune-arm9tdmi = "${PACKAGE_EXTRA_ARCHS_tune-armv4t} arm9tdmit" diff --git a/meta/conf/machine/include/tune-atom.inc b/meta/conf/machine/include/tune-atom.inc new file mode 100644 index 0000000000..5e1bb74c6c --- /dev/null +++ b/meta/conf/machine/include/tune-atom.inc @@ -0,0 +1,2 @@ +# Atom tunings are the same as core2 for now... +require conf/machine/include/tune-core2.inc diff --git a/meta/conf/machine/include/tune-c3.inc b/meta/conf/machine/include/tune-c3.inc new file mode 100644 index 0000000000..fafc28ada0 --- /dev/null +++ b/meta/conf/machine/include/tune-c3.inc @@ -0,0 +1,12 @@ +require conf/machine/include/x86/arch-x86.inc + +TUNEVALID[c3] = "VIA Cyrix III or VIA C3 specific optimizations" +TUNECONFLICTS[c3] = "m64 mx32" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "c3", " -march=c3 -mtune=c3", "", d)}" + +AVAILTUNES += "c3" +TUNE_FEATURES_tune-c3 = "${TUNE_FEATURES_tune-x86} c3" +BASE_LIBS_tune-c3 = "${BASE_LIB_tune-x86}" +# The following should likely be something other then i586... +TUNE_PKGARCH_tune-c3 = "i586" +PACKAGE_EXTRA_ARCHS_tune-c3 = "${PACKAGE_EXTRA_ARCHS_tune-x86} i386 i486 i586" diff --git a/meta/conf/machine/include/tune-core2.inc b/meta/conf/machine/include/tune-core2.inc new file mode 100644 index 0000000000..078e22d192 --- /dev/null +++ b/meta/conf/machine/include/tune-core2.inc @@ -0,0 +1,35 @@ +# Settings for the GCC(1) cpu-type "core2": +# +# Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3 +# instruction set support. +# +# This tune is recommended for the Intel Core 2 CPU family, including Conroe, +# Merom and beyond, as well as the first Atom CPUs, Diamondville, and beyond. +# +DEFAULTTUNE ?= "core2-32" + +# Include the previous tune to pull in PACKAGE_EXTRA_ARCHS +require conf/machine/include/tune-i586.inc + +# Extra tune features +TUNEVALID[core2] = "Enable core2 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "core2", " -march=core2 -mtune=core2 -msse3 -mfpmath=sse", "", d)}" + +# Extra tune selections +AVAILTUNES += "core2-32" +TUNE_FEATURES_tune-core2-32 = "${TUNE_FEATURES_tune-x86} core2" +BASE_LIB_tune-core2-32 = "lib" +TUNE_PKGARCH_tune-core2-32 = "core2-32" +PACKAGE_EXTRA_ARCHS_tune-core2-32 = "${PACKAGE_EXTRA_ARCHS_tune-i586} core2-32" + +AVAILTUNES += "core2-64" +TUNE_FEATURES_tune-core2-64 = "${TUNE_FEATURES_tune-x86-64} core2" +BASE_LIB_tune-core2-64 = "lib64" +TUNE_PKGARCH_tune-core2-64 = "core2-64" +PACKAGE_EXTRA_ARCHS_tune-core2-64 = "${PACKAGE_EXTRA_ARCHS_tune-x86-64} core2-64" + +AVAILTUNES += "core2-64-x32" +TUNE_FEATURES_tune-core2-64-x32 = "${TUNE_FEATURES_tune-x86-64-x32} core2" +BASE_LIB_tune-core2-64-x32 = "libx32" +TUNE_PKGARCH_tune-core2-64-x32 = "core2-64-x32" +PACKAGE_EXTRA_ARCHS_tune-core2-64-x32 = "${PACKAGE_EXTRA_ARCHS_tune-x86-64-x32} core2-64-x32" diff --git a/meta/conf/machine/include/tune-corei7.inc b/meta/conf/machine/include/tune-corei7.inc new file mode 100644 index 0000000000..42cf93261c --- /dev/null +++ b/meta/conf/machine/include/tune-corei7.inc @@ -0,0 +1,35 @@ +# Settings for the GCC(1) cpu-type "corei7": +# +# Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 +# and SSE4.2 instruction set support. +# +# This tune is recommended for Intel Nehalem and Silvermont (e.g. Bay Trail) CPUs +# (and beyond). +# +DEFAULTTUNE ?= "corei7-64" + +# Pull in the previous tune in to pull in PACKAGE_EXTRA_ARCHS +require conf/machine/include/tune-core2.inc + +# Extra tune features +TUNEVALID[corei7] = "Enable corei7 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "corei7", " -march=corei7 -mtune=corei7 -mfpmath=sse -msse4.2", "", d)}" + +# Extra tune selections +AVAILTUNES += "corei7-32" +TUNE_FEATURES_tune-corei7-32 = "${TUNE_FEATURES_tune-x86} corei7" +BASE_LIB_tune-corei7-32 = "lib" +TUNE_PKGARCH_tune-corei7-32 = "corei7-32" +PACKAGE_EXTRA_ARCHS_tune-corei7-32 = "${PACKAGE_EXTRA_ARCHS_tune-core2} corei7-32" + +AVAILTUNES += "corei7-64" +TUNE_FEATURES_tune-corei7-64 = "${TUNE_FEATURES_tune-x86-64} corei7" +BASE_LIB_tune-corei7-64 = "lib64" +TUNE_PKGARCH_tune-corei7-64 = "corei7-64" +PACKAGE_EXTRA_ARCHS_tune-corei7-64 = "${PACKAGE_EXTRA_ARCHS_tune-core2-64} corei7-64" + +AVAILTUNES += "corei7-64-x32" +TUNE_FEATURES_tune-corei7-64-x32 = "${TUNE_FEATURES_tune-x86-64-x32} corei7" +BASE_LIB_tune-corei7-64-x32 = "libx32" +TUNE_PKGARCH_tune-corei7-64-x32 = "corei7-64-x32" +PACKAGE_EXTRA_ARCHS_tune-corei7-64-x32 = "${PACKAGE_EXTRA_ARCHS_tune-core2-64-x32} corei7-64-x32" diff --git a/meta/conf/machine/include/tune-cortexa15.inc b/meta/conf/machine/include/tune-cortexa15.inc new file mode 100644 index 0000000000..552977722f --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa15.inc @@ -0,0 +1,36 @@ +DEFAULTTUNE ?= "armv7a-neon" + +require conf/machine/include/arm/arch-armv7a.inc + +TUNEVALID[cortexa15] = "Enable Cortex-A15 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa15", " -mtune=cortex-a15", "", d)}" + +# Little Endian base configs +AVAILTUNES += "cortexa15 cortexa15t cortexa15-neon cortexa15t-neon" +ARMPKGARCH_tune-cortexa15 = "cortexa15" +ARMPKGARCH_tune-cortexa15t = "cortexa15" +ARMPKGARCH_tune-cortexa15-neon = "cortexa15" +ARMPKGARCH_tune-cortexa15t-neon = "cortexa15" +TUNE_FEATURES_tune-cortexa15 = "${TUNE_FEATURES_tune-armv7a} cortexa15" +TUNE_FEATURES_tune-cortexa15t = "${TUNE_FEATURES_tune-armv7at} cortexa15" +TUNE_FEATURES_tune-cortexa15-neon = "${TUNE_FEATURES_tune-armv7a-neon} cortexa15" +TUNE_FEATURES_tune-cortexa15t-neon = "${TUNE_FEATURES_tune-armv7at-neon} cortexa15" +PACKAGE_EXTRA_ARCHS_tune-cortexa15 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa15-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa15t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa15-vfp cortexa15t2-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa15-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa15-vfp cortexa15-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa15t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa15-vfp cortexa15-vfp-neon cortexa15t2-vfp cortexa15t2-vfp-neon" + +# VFP Tunes +AVAILTUNES += "cortexa15hf cortexa15thf cortexa15hf-neon cortexa15thf-neon" +ARMPKGARCH_tune-cortexa15hf = "cortexa15" +ARMPKGARCH_tune-cortexa15thf = "cortexa15" +ARMPKGARCH_tune-cortexa15hf-neon = "cortexa15" +ARMPKGARCH_tune-cortexa15thf-neon = "cortexa15" +TUNE_FEATURES_tune-cortexa15hf ?= "${TUNE_FEATURES_tune-armv7ahf} cortexa15" +TUNE_FEATURES_tune-cortexa15thf ?= "${TUNE_FEATURES_tune-armv7athf} cortexa15" +TUNE_FEATURES_tune-cortexa15hf-neon ?= "${TUNE_FEATURES_tune-armv7ahf-neon} cortexa15" +TUNE_FEATURES_tune-cortexa15thf-neon ?= "${TUNE_FEATURES_tune-armv7athf-neon} cortexa15" +PACKAGE_EXTRA_ARCHS_tune-cortexa15hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa15hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa15thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa15hf-vfp cortexa15t2hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa15hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa15hf-vfp cortexa15hf-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa15thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa15hf-vfp cortexa15hf-vfp-neon cortexa15t2hf-vfp cortexa15t2hf-vfp-neon" diff --git a/meta/conf/machine/include/tune-cortexa5.inc b/meta/conf/machine/include/tune-cortexa5.inc new file mode 100644 index 0000000000..139e65c828 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa5.inc @@ -0,0 +1,36 @@ +DEFAULTTUNE ?= "armv7a-neon" + +require conf/machine/include/arm/arch-armv7a.inc + +TUNEVALID[cortexa5] = "Enable Cortex-A5 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa5", " -mtune=cortex-a5", "", d)}" + +# Little Endian base configs +AVAILTUNES += "cortexa5 cortexa5t cortexa5-neon cortexa5t-neon" +ARMPKGARCH_tune-cortexa5 = "cortexa5" +ARMPKGARCH_tune-cortexa5t = "cortexa5" +ARMPKGARCH_tune-cortexa5-neon = "cortexa5" +ARMPKGARCH_tune-cortexa5t-neon = "cortexa5" +TUNE_FEATURES_tune-cortexa5 = "${TUNE_FEATURES_tune-armv7a} cortexa5" +TUNE_FEATURES_tune-cortexa5t = "${TUNE_FEATURES_tune-armv7at} cortexa5" +TUNE_FEATURES_tune-cortexa5-neon = "${TUNE_FEATURES_tune-armv7a-neon} cortexa5" +TUNE_FEATURES_tune-cortexa5t-neon = "${TUNE_FEATURES_tune-armv7at-neon} cortexa5" +PACKAGE_EXTRA_ARCHS_tune-cortexa5 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa5-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa5t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa5-vfp cortexa5t2-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa5-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa5-vfp cortexa5-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa5t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa5-vfp cortexa5-vfp-neon cortexa5t2-vfp cortexa5t2-vfp-neon" + +# VFP Tunes +AVAILTUNES += "cortexa5hf cortexa5thf cortexa5hf-neon cortexa5thf-neon" +ARMPKGARCH_tune-cortexa5hf = "cortexa5" +ARMPKGARCH_tune-cortexa5thf = "cortexa5" +ARMPKGARCH_tune-cortexa5hf-neon = "cortexa5" +ARMPKGARCH_tune-cortexa5thf-neon = "cortexa5" +TUNE_FEATURES_tune-cortexa5hf ?= "${TUNE_FEATURES_tune-armv7ahf} cortexa5" +TUNE_FEATURES_tune-cortexa5thf ?= "${TUNE_FEATURES_tune-armv7athf} cortexa5" +TUNE_FEATURES_tune-cortexa5hf-neon ?= "${TUNE_FEATURES_tune-armv7ahf-neon} cortexa5" +TUNE_FEATURES_tune-cortexa5thf-neon ?= "${TUNE_FEATURES_tune-armv7athf-neon} cortexa5" +PACKAGE_EXTRA_ARCHS_tune-cortexa5hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa5hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa5thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa5hf-vfp cortexa5t2hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa5hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa5hf-vfp cortexa5hf-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa5thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa5hf-vfp cortexa5hf-vfp-neon cortexa5t2hf-vfp cortexa5t2hf-vfp-neon" diff --git a/meta/conf/machine/include/tune-cortexa7.inc b/meta/conf/machine/include/tune-cortexa7.inc new file mode 100644 index 0000000000..9d069100f0 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa7.inc @@ -0,0 +1,42 @@ +DEFAULTTUNE ?= "armv7a-neon" + +require conf/machine/include/arm/arch-armv7a.inc + +TUNEVALID[cortexa7] = "Enable Cortex-A7 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa7", " -mtune=cortex-a7", "", d)}" + +# Little Endian base configs +AVAILTUNES += "cortexa7 cortexa7t cortexa7-neon cortexa7t-neon" +ARMPKGARCH_tune-cortexa7 = "cortexa7" +ARMPKGARCH_tune-cortexa7t = "cortexa7" +ARMPKGARCH_tune-cortexa7-neon = "cortexa7" +ARMPKGARCH_tune-cortexa7t-neon = "cortexa7" +TUNE_FEATURES_tune-cortexa7 = "${TUNE_FEATURES_tune-armv7a} cortexa7" +TUNE_FEATURES_tune-cortexa7t = "${TUNE_FEATURES_tune-armv7at} cortexa7" +TUNE_FEATURES_tune-cortexa7-neon = "${TUNE_FEATURES_tune-armv7a-neon} cortexa7" +TUNE_FEATURES_tune-cortexa7t-neon = "${TUNE_FEATURES_tune-armv7at-neon} cortexa7" +PACKAGE_EXTRA_ARCHS_tune-cortexa7 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa7-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa7t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa7-vfp cortexa7t2-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa7-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa7-vfp cortexa7-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa7t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa7-vfp cortexa7-vfp-neon cortexa7t2-vfp cortexa7t2-vfp-neon" + +# VFP Tunes +AVAILTUNES += "cortexa7hf cortexa7thf cortexa7hf-neon cortexa7thf-neon cortexa7hf-neon-vfpv4 cortexa7thf-neon-vfpv4" +ARMPKGARCH_tune-cortexa7hf = "cortexa7" +ARMPKGARCH_tune-cortexa7thf = "cortexa7" +ARMPKGARCH_tune-cortexa7hf-neon = "cortexa7" +ARMPKGARCH_tune-cortexa7thf-neon = "cortexa7" +ARMPKGARCH_tune-cortexa7hf-neon-vfpv4 = "cortexa7" +ARMPKGARCH_tune-cortexa7thf-neon-vfpv4 = "cortexa7" +TUNE_FEATURES_tune-cortexa7hf ?= "${TUNE_FEATURES_tune-armv7ahf} cortexa7" +TUNE_FEATURES_tune-cortexa7thf ?= "${TUNE_FEATURES_tune-armv7athf} cortexa7" +TUNE_FEATURES_tune-cortexa7hf-neon ?= "${TUNE_FEATURES_tune-armv7ahf-neon} cortexa7" +TUNE_FEATURES_tune-cortexa7thf-neon ?= "${TUNE_FEATURES_tune-armv7athf-neon} cortexa7" +TUNE_FEATURES_tune-cortexa7hf-neon-vfpv4 ?= "${TUNE_FEATURES_tune-armv7ahf-neon-vfpv4} cortexa7" +TUNE_FEATURES_tune-cortexa7thf-neon-vfpv4 ?= "${TUNE_FEATURES_tune-armv7athf-neon-vfpv4} cortexa7" +PACKAGE_EXTRA_ARCHS_tune-cortexa7hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa7hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa7thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa7hf-vfp cortexa7t2hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa7hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa7hf-vfp cortexa7hf-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa7thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa7hf-vfp cortexa7hf-vfp-neon cortexa7t2hf-vfp cortexa7t2hf-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa7hf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon-vfpv4} cortexa7hf-vfp cortexa7hf-vfp-neon cortexa7hf-vfp-vfpv4-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa7thf-neon-vfpv4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon-vfpv4} cortexa7hf-vfp cortexa7hf-vfp-neon cortexa7t2hf-vfp cortexa7t2hf-vfp-neon cortexa7hf-vfp-vfpv4-neon cortexa7t2hf-vfp-vfpv4-neon" diff --git a/meta/conf/machine/include/tune-cortexa8.inc b/meta/conf/machine/include/tune-cortexa8.inc new file mode 100644 index 0000000000..771537ff84 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa8.inc @@ -0,0 +1,36 @@ +DEFAULTTUNE ?= "armv7a-neon" + +require conf/machine/include/arm/arch-armv7a.inc + +TUNEVALID[cortexa8] = "Enable Cortex-A8 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa8", " -mtune=cortex-a8", "", d)}" + +# Little Endian base configs +AVAILTUNES += "cortexa8 cortexa8t cortexa8-neon cortexa8t-neon" +ARMPKGARCH_tune-cortexa8 = "cortexa8" +ARMPKGARCH_tune-cortexa8t = "cortexa8" +ARMPKGARCH_tune-cortexa8-neon = "cortexa8" +ARMPKGARCH_tune-cortexa8t-neon = "cortexa8" +TUNE_FEATURES_tune-cortexa8 = "${TUNE_FEATURES_tune-armv7a} cortexa8" +TUNE_FEATURES_tune-cortexa8t = "${TUNE_FEATURES_tune-armv7at} cortexa8" +TUNE_FEATURES_tune-cortexa8-neon = "${TUNE_FEATURES_tune-armv7a-neon} cortexa8" +TUNE_FEATURES_tune-cortexa8t-neon = "${TUNE_FEATURES_tune-armv7at-neon} cortexa8" +PACKAGE_EXTRA_ARCHS_tune-cortexa8 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa8-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa8t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa8-vfp cortexa8t2-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa8-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa8-vfp cortexa8-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa8t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa8-vfp cortexa8-vfp-neon cortexa8t2-vfp cortexa8t2-vfp-neon" + +# VFP Tunes +AVAILTUNES += "cortexa8hf cortexa8thf cortexa8hf-neon cortexa8thf-neon" +ARMPKGARCH_tune-cortexa8hf = "cortexa8" +ARMPKGARCH_tune-cortexa8thf = "cortexa8" +ARMPKGARCH_tune-cortexa8hf-neon = "cortexa8" +ARMPKGARCH_tune-cortexa8thf-neon = "cortexa8" +TUNE_FEATURES_tune-cortexa8hf ?= "${TUNE_FEATURES_tune-armv7ahf} cortexa8" +TUNE_FEATURES_tune-cortexa8thf ?= "${TUNE_FEATURES_tune-armv7athf} cortexa8" +TUNE_FEATURES_tune-cortexa8hf-neon ?= "${TUNE_FEATURES_tune-armv7ahf-neon} cortexa8" +TUNE_FEATURES_tune-cortexa8thf-neon ?= "${TUNE_FEATURES_tune-armv7athf-neon} cortexa8" +PACKAGE_EXTRA_ARCHS_tune-cortexa8hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa8hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa8thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa8hf-vfp cortexa8t2hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa8hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa8hf-vfp cortexa8hf-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa8thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa8hf-vfp cortexa8hf-vfp-neon cortexa8t2hf-vfp cortexa8t2hf-vfp-neon" diff --git a/meta/conf/machine/include/tune-cortexa9.inc b/meta/conf/machine/include/tune-cortexa9.inc new file mode 100644 index 0000000000..700394b824 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa9.inc @@ -0,0 +1,36 @@ +DEFAULTTUNE ?= "armv7a-neon" + +require conf/machine/include/arm/arch-armv7a.inc + +TUNEVALID[cortexa9] = "Enable Cortex-A9 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa9", " -mtune=cortex-a9", "", d)}" + +# Little Endian base configs +AVAILTUNES += "cortexa9 cortexa9t cortexa9-neon cortexa9t-neon" +ARMPKGARCH_tune-cortexa9 = "cortexa9" +ARMPKGARCH_tune-cortexa9t = "cortexa9" +ARMPKGARCH_tune-cortexa9-neon = "cortexa9" +ARMPKGARCH_tune-cortexa9t-neon = "cortexa9" +TUNE_FEATURES_tune-cortexa9 = "${TUNE_FEATURES_tune-armv7a} cortexa9" +TUNE_FEATURES_tune-cortexa9t = "${TUNE_FEATURES_tune-armv7at} cortexa9" +TUNE_FEATURES_tune-cortexa9-neon = "${TUNE_FEATURES_tune-armv7a-neon} cortexa9" +TUNE_FEATURES_tune-cortexa9t-neon = "${TUNE_FEATURES_tune-armv7at-neon} cortexa9" +PACKAGE_EXTRA_ARCHS_tune-cortexa9 = "${PACKAGE_EXTRA_ARCHS_tune-armv7a} cortexa9-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa9t = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexa9-vfp cortexa9t2-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa9-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7a-neon} cortexa9-vfp cortexa9-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa9t-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7at-neon} cortexa9-vfp cortexa9-vfp-neon cortexa9t2-vfp cortexa9t2-vfp-neon" + +# VFP Tunes +AVAILTUNES += "cortexa9hf cortexa9thf cortexa9hf-neon cortexa9thf-neon" +ARMPKGARCH_tune-cortexa9hf = "cortexa9" +ARMPKGARCH_tune-cortexa9thf = "cortexa9" +ARMPKGARCH_tune-cortexa9hf-neon = "cortexa9" +ARMPKGARCH_tune-cortexa9thf-neon = "cortexa9" +TUNE_FEATURES_tune-cortexa9hf ?= "${TUNE_FEATURES_tune-armv7ahf} cortexa9" +TUNE_FEATURES_tune-cortexa9thf ?= "${TUNE_FEATURES_tune-armv7athf} cortexa9" +TUNE_FEATURES_tune-cortexa9hf-neon ?= "${TUNE_FEATURES_tune-armv7ahf-neon} cortexa9" +TUNE_FEATURES_tune-cortexa9thf-neon ?= "${TUNE_FEATURES_tune-armv7athf-neon} cortexa9" +PACKAGE_EXTRA_ARCHS_tune-cortexa9hf = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf} cortexa9hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa9thf = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf} cortexa9hf-vfp cortexa9t2hf-vfp" +PACKAGE_EXTRA_ARCHS_tune-cortexa9hf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7ahf-neon} cortexa9hf-vfp cortexa9hf-vfp-neon" +PACKAGE_EXTRA_ARCHS_tune-cortexa9thf-neon = "${PACKAGE_EXTRA_ARCHS_tune-armv7athf-neon} cortexa9hf-vfp cortexa9hf-vfp-neon cortexa9t2hf-vfp cortexa9t2hf-vfp-neon" diff --git a/meta/conf/machine/include/tune-cortexm1.inc b/meta/conf/machine/include/tune-cortexm1.inc new file mode 100644 index 0000000000..3b652796d2 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexm1.inc @@ -0,0 +1,11 @@ +DEFAULTTUNE ?= "armv7a" + +require conf/machine/include/arm/arch-armv7a.inc + +TUNEVALID[cortexm1] = "Enable Cortex-M1 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexm1", " -mtune=cortex-m1", "", d)}" + +AVAILTUNES += "cortexm1" +ARMPKGARCH_tune-cortexm1 = "cortexm1" +TUNE_FEATURES_tune-cortexm1 = "${TUNE_FEATURES_tune-armv7a} cortexm1" +PACKAGE_EXTRA_ARCHS_tune-cortexm1 = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} cortexm1-vfp" diff --git a/meta/conf/machine/include/tune-cortexm3.inc b/meta/conf/machine/include/tune-cortexm3.inc new file mode 100644 index 0000000000..cbc4c0dd49 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexm3.inc @@ -0,0 +1,14 @@ +DEFAULTTUNE ?= "cortexm3" + +require conf/machine/include/arm/arch-armv7a.inc + +TUNEVALID[cortexm3] = "Enable Cortex-M3 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexm3", " -mtune=cortex-m3", "", d)}" + +TUNEVALID[armv7m] = "Enable Cortex-M3 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "armv7m", " -march=armv7-m", "", d)}" + +AVAILTUNES += "cortexm3" +ARMPKGARCH_tune-cortexm3 = "armv7m" +TUNE_FEATURES_tune-cortexm3 = "armv7m vfp cortexm3" +PACKAGE_EXTRA_ARCHS_tune-cortexm3 = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} armv7m-vfp" diff --git a/meta/conf/machine/include/tune-cortexr4.inc b/meta/conf/machine/include/tune-cortexr4.inc new file mode 100644 index 0000000000..57b6717e58 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexr4.inc @@ -0,0 +1,14 @@ +DEFAULTTUNE ?= "cortexr4" + +require conf/machine/include/arm/arch-armv7a.inc + +TUNEVALID[cortexr4] = "Enable Cortex-R4 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexr4", " -mtune=cortex-r4", "", d)}" + +TUNEVALID[armv7r] = "Enable Cortex-R4 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "armv7r", " -march=armv7-r", "", d)}" + +AVAILTUNES += "cortexr4" +ARMPKGARCH_tune-cortexr4 = "armv7r" +TUNE_FEATURES_tune-cortexr4 = "armv7r vfp cortexr4" +PACKAGE_EXTRA_ARCHS_tune-cortexr4 = "${PACKAGE_EXTRA_ARCHS_tune-armv7at} armv7r-vfp" diff --git a/meta/conf/machine/include/tune-ep9312.inc b/meta/conf/machine/include/tune-ep9312.inc new file mode 100644 index 0000000000..b19b438125 --- /dev/null +++ b/meta/conf/machine/include/tune-ep9312.inc @@ -0,0 +1,12 @@ +DEFAULTTUNE ?= "ep9312" + +require conf/machine/include/arm/arch-armv4.inc + +TUNEVALID[ep9312] = "Enable Intel PXA27x specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ep9312", " -march=ep9312 -mtune=ep9312", "", d)}" + +AVAILTUNES += "ep9312" +ARMPKGARCH_tune-ep9312 = "ep9312" +# this tune does not include TUNE_FEATURES_tune-armv4t, so there is no armv4 TUNE_FEATURES => no 't' in ARMPKGSFX_THUMB +TUNE_FEATURES_tune-ep9312 = "thumb ep9312" +PACKAGE_EXTRA_ARCHS_tune-ep9312 = "${PACKAGE_EXTRA_ARCHS_tune-armv4t} ep9312" diff --git a/meta/conf/machine/include/tune-i586.inc b/meta/conf/machine/include/tune-i586.inc new file mode 100644 index 0000000000..5fbb3c74d2 --- /dev/null +++ b/meta/conf/machine/include/tune-i586.inc @@ -0,0 +1,14 @@ +DEFAULTTUNE ?= "i586" + +require conf/machine/include/x86/arch-x86.inc + +# Extra tune features +TUNEVALID[i586] = "Enable i586 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "i586", " -march=i586", "", d)}" + +# Extra tune selections +AVAILTUNES += "i586" +TUNE_FEATURES_tune-i586 = "${TUNE_FEATURES_tune-x86} i586" +BASE_LIB_tune-i586 = "lib" +TUNE_PKGARCH_tune-i586 = "i586" +PACKAGE_EXTRA_ARCHS_tune-i586 = "${PACKAGE_EXTRA_ARCHS_tune-x86} i586" diff --git a/meta/conf/machine/include/tune-iwmmxt.inc b/meta/conf/machine/include/tune-iwmmxt.inc new file mode 100644 index 0000000000..748ca0d0aa --- /dev/null +++ b/meta/conf/machine/include/tune-iwmmxt.inc @@ -0,0 +1,14 @@ +# Configurations for the Intel PXA27x Appications Processor Family. +# Please use tune-xscale for PXA255/PXA26x based processors. + +DEFAULTTUNE ?= "iwmmxt" + +require conf/machine/include/arm/arch-armv5-dsp.inc + +TUNEVALID[iwmmxt] = "Enable Intel PXA27x specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "iwmmxt", " -march=iwmmxt -mtune=iwmmxt", "", d)}" + +AVAILTUNES += "iwmmxt" +ARMPKGARCH_tune-iwmmxt = "iwmmxt" +TUNE_FEATURES_tune-iwmmxt = "thumb iwmmxt" +PACKAGE_EXTRA_ARCHS_tune-iwmmxt = "${PACKAGE_EXTRA_ARCHS_tune-armv5te} iwmmxt iwmmxtt" diff --git a/meta/conf/machine/include/tune-mips32.inc b/meta/conf/machine/include/tune-mips32.inc new file mode 100644 index 0000000000..ae326cedf3 --- /dev/null +++ b/meta/conf/machine/include/tune-mips32.inc @@ -0,0 +1,25 @@ +DEFAULTTUNE ?= "mips32" + +require conf/machine/include/mips/arch-mips.inc + +TUNEVALID[mips32] = "Enable mips32 specific processor optimizations" +TUNECONFLICTS[mips32] = "n64 n32" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "mips32", " -march=mips32", "", d)}" + +AVAILTUNES += "mips32 mips32el mips32-nf mips32el-nf" + +TUNE_FEATURES_tune-mips32 = "${TUNE_FEATURES_tune-mips} mips32" +MIPSPKGSFX_VARIANT_tune-mips32 = "mips32" +PACKAGE_EXTRA_ARCHS_tune-mips32 = "mips mips32" + +TUNE_FEATURES_tune-mips32el = "${TUNE_FEATURES_tune-mipsel} mips32" +MIPSPKGSFX_VARIANT_tune-mips32el = "mips32el" +PACKAGE_EXTRA_ARCHS_tune-mips32el = "mipsel mips32el" + +TUNE_FEATURES_tune-mips32-nf = "${TUNE_FEATURES_tune-mips-nf} mips32" +MIPSPKGSFX_VARIANT_tune-mips32-nf = "mips32" +PACKAGE_EXTRA_ARCHS_tune-mips32-nf = "mips-nf mips32-nf" + +TUNE_FEATURES_tune-mips32el-nf = "${TUNE_FEATURES_tune-mipsel-nf} mips32" +MIPSPKGSFX_VARIANT_tune-mips32el-nf = "mips32el" +PACKAGE_EXTRA_ARCHS_tune-mips32el-nf = "mipsel-nf mips32el-nf" diff --git a/meta/conf/machine/include/tune-mips64.inc b/meta/conf/machine/include/tune-mips64.inc new file mode 100644 index 0000000000..ba79e2b53f --- /dev/null +++ b/meta/conf/machine/include/tune-mips64.inc @@ -0,0 +1,3 @@ +DEFAULTTUNE ?= "mips64" + +require conf/machine/include/mips/arch-mips.inc diff --git a/meta/conf/machine/include/tune-ppc476.inc b/meta/conf/machine/include/tune-ppc476.inc new file mode 100644 index 0000000000..4ed185d2e2 --- /dev/null +++ b/meta/conf/machine/include/tune-ppc476.inc @@ -0,0 +1,14 @@ +DEFAULTTUNE ?= "ppc476" + +require conf/machine/include/powerpc/arch-powerpc.inc + +TUNEVALID[ppc476] = "Enable ppc476 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppc476", " -mcpu=476", "", d)}" + +AVAILTUNES += "ppc476" +TUNE_FEATURES_tune-ppc476 = "m32 fpu-hard ppc476" +TUNE_PKGARCH_tune-ppc476 = "ppc476" +PACKAGE_EXTRA_ARCHS_tune-ppc476 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc} ppc476" + +# glibc configure options to get 476 specific library (for sqrt) +GLIBC_EXTRA_OECONF += "${@bb.utils.contains("TUNE_FEATURES", "ppc476", "-with-cpu=476", "", d)}" diff --git a/meta/conf/machine/include/tune-ppc603e.inc b/meta/conf/machine/include/tune-ppc603e.inc new file mode 100644 index 0000000000..d744a0053f --- /dev/null +++ b/meta/conf/machine/include/tune-ppc603e.inc @@ -0,0 +1,14 @@ +DEFAULTTUNE ?= "ppc603e" + +require conf/machine/include/powerpc/arch-powerpc.inc + +TUNEVALID[ppc603e] = "Enable ppc603e specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppc603e", " -mcpu=603e", "", d)}" + +AVAILTUNES += "ppc603e" +TUNE_FEATURES_tune-ppc603e = "m32 fpu-hard ppc603e" +TUNE_PKGARCH_tune-ppc603e = "ppc603e" +PACKAGE_EXTRA_ARCHS_tune-ppc603e = "${PACKAGE_EXTRA_ARCHS_tune-powerpc} ppc603e" + +# glibc configure options to get 603e specific library (for sqrt) +GLIBC_EXTRA_OECONF += "${@bb.utils.contains("TUNE_FEATURES", "ppc603e", "-with-cpu=603e", "", d)}" diff --git a/meta/conf/machine/include/tune-ppc7400.inc b/meta/conf/machine/include/tune-ppc7400.inc new file mode 100644 index 0000000000..4ac0403e1f --- /dev/null +++ b/meta/conf/machine/include/tune-ppc7400.inc @@ -0,0 +1,14 @@ +DEFAULTTUNE ?= "ppc7400" + +require conf/machine/include/powerpc/arch-powerpc.inc + +TUNEVALID[ppc7400] = "Enable ppc7400 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppc7400", " -mcpu=7400", "", d)}" + +AVAILTUNES += "ppc7400" +TUNE_FEATURES_tune-ppc7400 = "m32 fpu-hard ppc7400 altivec" +TUNE_PKGARCH_tune-ppc7400 = "ppc7400" +PACKAGE_EXTRA_ARCHS_tune-ppc7400 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc} ppc7400" + +# glibc configure options to get 7400 specific library (for sqrt) +#GLIBC_EXTRA_OECONF += "${@bb.utils.contains("TUNE_FEATURES", "ppc7400", "--with-cpu=power4", "", d)}" diff --git a/meta/conf/machine/include/tune-ppce300c2.inc b/meta/conf/machine/include/tune-ppce300c2.inc new file mode 100644 index 0000000000..05a9505f74 --- /dev/null +++ b/meta/conf/machine/include/tune-ppce300c2.inc @@ -0,0 +1,11 @@ +DEFAULTTUNE ?= "ppce300c2" + +require conf/machine/include/powerpc/arch-powerpc.inc + +TUNEVALID[ppce300c2] = "Enable ppce300c2 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppce300c2", " -mcpu=e300c2", "", d)}" + +AVAILTUNES += "ppce300c2" +TUNE_FEATURES_tune-ppce300c2 = "m32 fpu-soft ppce300c2" +TUNE_PKGARCH_tune-ppce300c2 = "ppce300c2" +PACKAGE_EXTRA_ARCHS_tune-ppce300c2 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc-nf} ppce300c2" diff --git a/meta/conf/machine/include/tune-ppce300c3.inc b/meta/conf/machine/include/tune-ppce300c3.inc new file mode 100644 index 0000000000..b19cf220ba --- /dev/null +++ b/meta/conf/machine/include/tune-ppce300c3.inc @@ -0,0 +1,23 @@ +DEFAULTTUNE ?= "ppce300c3" + +require conf/machine/include/powerpc/arch-powerpc.inc + +AVAILTUNES += "ppce300c3 ppce300c3-nf" + +# hard-float +TUNEVALID[ppce300c3] = "Enable ppce300c3 specific processor optimizations" +TUNE_FEATURES_tune-ppce300c3 = "${TUNE_FEATURES_tune-powerpc} ppce300c3" +TUNE_PKGARCH_tune-ppce300c3 = "ppce300c3" +PACKAGE_EXTRA_ARCHS_tune-ppce300c3 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc} ppce300c3" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppce300c3", " -mcpu=e300c3", "", d)}" + +# glibc config options to make use of e300c3 (603e) specific sqrt/sqrtf routines +GLIBC_EXTRA_OECONF += "${@bb.utils.contains("TUNE_FEATURES", "ppce300c3", "--with-cpu=e300c3", "", d)}" + +# soft-float +TUNEVALID[ppce300c3-nf] = "Enable ppce300c3 specific processor optimizations (no fpu)" +TUNE_FEATURES_tune-ppce300c3-nf = "${TUNE_FEATURES_tune-powerpc-nf} ppce300c3-nf" +TUNE_PKGARCH_tune-ppce300c3-nf = "ppce300c3-nf" +PACKAGE_EXTRA_ARCHS_tune-ppce300c3-nf = "${PACKAGE_EXTRA_ARCHS_tune-powerpc-nf} ppce300c3-nf" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppce300c3-nf", " -mcpu=e300c3", "", d)}" + diff --git a/meta/conf/machine/include/tune-ppce500.inc b/meta/conf/machine/include/tune-ppce500.inc new file mode 100644 index 0000000000..70c1f8b253 --- /dev/null +++ b/meta/conf/machine/include/tune-ppce500.inc @@ -0,0 +1,20 @@ +DEFAULTTUNE ?= "ppce500" + +require conf/machine/include/powerpc/arch-powerpc.inc + +TUNEVALID[ppce500] = "Enable ppce500 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppce500", " -mcpu=8540", "", d)}" + +TUNEVALID[spe] = "Enable SPE ABI extensions" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", [ "ppce500", "spe" ], " -mabi=spe -mspe -mfloat-gprs=single", "", d)}" +TARGET_FPU .= "${@bb.utils.contains("TUNE_FEATURES", [ "ppce500" , "spe" ], "ppc-efs", "", d)}" + +# spe is defined potentially in two places, so we want to be sure it will +# only write spe once to the ABIEXTENSIONS field. +SPEABIEXTENSION = "${@bb.utils.contains("TUNE_FEATURES", "spe", "spe", "", d)}" +ABIEXTENSION .= "${SPEABIEXTENSION}" + +AVAILTUNES += "ppce500" +TUNE_FEATURES_tune-ppce500 = "m32 spe ppce500" +TUNE_PKGARCH_tune-ppce500 = "ppce500" +PACKAGE_EXTRA_ARCHS_tune-ppce500 = "ppce500" diff --git a/meta/conf/machine/include/tune-ppce500mc.inc b/meta/conf/machine/include/tune-ppce500mc.inc new file mode 100644 index 0000000000..744d8e55e7 --- /dev/null +++ b/meta/conf/machine/include/tune-ppce500mc.inc @@ -0,0 +1,14 @@ +DEFAULTTUNE ?= "ppce500mc" + +require conf/machine/include/powerpc/arch-powerpc.inc + +TUNEVALID[ppce500mc] = "Enable ppce500mc specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppce500mc", " -mcpu=e500mc", "", d)}" + +AVAILTUNES += "ppce500mc" +TUNE_FEATURES_tune-ppce500mc = "m32 fpu-hard ppce500mc" +TUNE_PKGARCH_tune-ppce500mc = "ppce500mc" +PACKAGE_EXTRA_ARCHS_tune-ppce500mc = "${PACKAGE_EXTRA_ARCHS_tune-powerpc} ppce500mc" + +# glibc configure options to get e500mc specific library (for sqrt) +GLIBC_EXTRA_OECONF += "${@bb.utils.contains("TUNE_FEATURES", "ppce500mc", "-with-cpu=e500mc", "", d)}" diff --git a/meta/conf/machine/include/tune-ppce500v2.inc b/meta/conf/machine/include/tune-ppce500v2.inc new file mode 100644 index 0000000000..d014d70a6e --- /dev/null +++ b/meta/conf/machine/include/tune-ppce500v2.inc @@ -0,0 +1,20 @@ +DEFAULTTUNE ?= "ppce500v2" + +require conf/machine/include/powerpc/arch-powerpc.inc + +TUNEVALID[ppce500v2] = "Enable ppce500v2 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "ppce500v2", " -mcpu=8548", "", d)}" + +TUNEVALID[spe] = "Enable SPE ABI extensions" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", [ "ppce500v2", "spe" ], " -mabi=spe -mspe -mfloat-gprs=double", "", d)}" +TARGET_FPU .= "${@bb.utils.contains("TUNE_FEATURES", [ "ppce500v2" , "spe" ], "ppc-efd", "", d)}" + +# spe is defined potentially in two places, so we want to be sure it will +# only write spe once to the ABIEXTENSIONS field. +SPEABIEXTENSION = "${@bb.utils.contains("TUNE_FEATURES", "spe", "spe", "", d)}" +ABIEXTENSION .= "${SPEABIEXTENSION}" + +AVAILTUNES += "ppce500v2" +TUNE_FEATURES_tune-ppce500v2 = "m32 spe ppce500v2" +TUNE_PKGARCH_tune-ppce500v2 = "ppce500v2" +PACKAGE_EXTRA_ARCHS_tune-ppce500v2 = "ppce500v2" diff --git a/meta/conf/machine/include/tune-ppce5500.inc b/meta/conf/machine/include/tune-ppce5500.inc new file mode 100644 index 0000000000..25231ef4f2 --- /dev/null +++ b/meta/conf/machine/include/tune-ppce5500.inc @@ -0,0 +1,20 @@ +DEFAULTTUNE ?= "ppce5500" + +require conf/machine/include/powerpc/arch-powerpc64.inc + +TUNEVALID[e5500] = "Enable Freescale e5500 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "e5500", " -mcpu=e5500", "", d)}" + +AVAILTUNES += "ppce5500 ppc64e5500" +TUNE_FEATURES_tune-ppce5500 = "m32 fpu-hard e5500" +BASE_LIB_tune-ppce5500 = "lib" +TUNE_PKGARCH_tune-ppce5500 = "ppce5500" +PACKAGE_EXTRA_ARCHS_tune-ppce5500 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc} ppce5500" + +TUNE_FEATURES_tune-ppc64e5500 = "m64 fpu-hard e5500" +BASE_LIB_tune-ppc64e5500 = "lib64" +TUNE_PKGARCH_tune-ppc64e5500 = "ppc64e5500" +PACKAGE_EXTRA_ARCHS_tune-ppc64e5500 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc64} ppc64e5500" + +# glibc configure options to get e5500 specific library (for sqrt) +GLIBC_EXTRA_OECONF += "${@bb.utils.contains("TUNE_FEATURES", "e5500", "--with-cpu=e5500", "", d)}" diff --git a/meta/conf/machine/include/tune-ppce6500.inc b/meta/conf/machine/include/tune-ppce6500.inc new file mode 100644 index 0000000000..ea743a3edc --- /dev/null +++ b/meta/conf/machine/include/tune-ppce6500.inc @@ -0,0 +1,21 @@ +DEFAULTTUNE ?= "ppce6500" + +require conf/machine/include/powerpc/arch-powerpc64.inc + +TUNEVALID[e6500] = "Enable Freescale e6500 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "e6500", " -mcpu=e6500", "", d)}" + +AVAILTUNES += "ppce6500 ppc64e6500" +TUNE_FEATURES_tune-ppce6500 = "m32 fpu-hard e6500 altivec" +BASE_LIB_tune-ppce6500 = "lib" +TUNE_PKGARCH_tune-ppce6500 = "ppce6500" +PACKAGE_EXTRA_ARCHS_tune-ppce6500 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc} ppce6500" + +TUNE_FEATURES_tune-ppc64e6500 = "m64 fpu-hard e6500 altivec" +BASE_LIB_tune-ppc64e6500 = "lib64" +TUNE_PKGARCH_tune-ppc64e6500 = "ppc64e6500" +PACKAGE_EXTRA_ARCHS_tune-ppc64e6500 = "${PACKAGE_EXTRA_ARCHS_tune-powerpc64} ppc64e6500" + +# glibc configure options to get e6500 specific library +GLIBC_EXTRA_OECONF_powerpc64 += "${@bb.utils.contains("TUNE_FEATURES", "e6500", "--with-cpu=e6500", "", d)}" +GLIBC_EXTRA_OECONF_powerpc += "${@bb.utils.contains("TUNE_FEATURES", "e6500", "--with-cpu=e6500", "", d)}" diff --git a/meta/conf/machine/include/tune-sh3.inc b/meta/conf/machine/include/tune-sh3.inc new file mode 100644 index 0000000000..c5ed7bab96 --- /dev/null +++ b/meta/conf/machine/include/tune-sh3.inc @@ -0,0 +1,17 @@ +DEFAULTTUNE ?= "sh3" + +require conf/machine/include/sh/arch-sh.inc + +TUNEVALID[sh3] = "Enable SH3 optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "sh3", " -m3", "", d)}" + +AVAILTUNES += "sh3 sh3eb" +TUNE_FEATURES_tune-sh3 = "sh3" +TUNE_ARCH_tune-sh3 = "sh3" +TUNE_PKGARCH_tune-sh3 = "sh3" +PACKAGE_EXTRA_ARCHS_tune-sh3 = "sh sh3" + +TUNE_FEATURES_tune-sh3eb = "sh3 bigendian" +TUNE_ARCH_tune-sh3eb = "sh3eb" +TUNE_PKGARCH_tune-sh3eb = "sh3eb" +PACKAGE_EXTRA_ARCHS_tune-sh3eb = "sheb sh3eb" diff --git a/meta/conf/machine/include/tune-sh4.inc b/meta/conf/machine/include/tune-sh4.inc new file mode 100644 index 0000000000..56e23b9369 --- /dev/null +++ b/meta/conf/machine/include/tune-sh4.inc @@ -0,0 +1,34 @@ +DEFAULTTUNE ?= "sh4" + +# Pull in sh4 for compatibility... +require conf/machine/include/sh/arch-sh.inc + +TUNEVALID[sh4] = "Enable SH4 optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "sh4", " -m4", "", d)}" + +# NOTE: If you want to optimize to sh4a, conf/machine/include/tune-sh4a.inc. +# But it is not compatible for sh4. +# The binary optimized by m4a doesn't operate on sh4. It works on sh4a only. +TUNEVALID[sh4a] = "Enable SH4a optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "sh4a", " -m4a", "", d)}" + +AVAILTUNES += "sh4 sh4eb sh4a sh4aeb" +TUNE_FEATURES_tune-sh4 = "sh4" +TUNE_ARCH_tune-sh4 = "sh4" +TUNE_PKGARCH_tune-sh4 = "sh4" +PACKAGE_EXTRA_ARCHS_tune-sh4 = "sh sh4" + +TUNE_FEATURES_tune-sh4eb = "sh4 bigendian" +TUNE_ARCH_tune-sh4eb = "sh4eb" +TUNE_PKGARCH_tune-sh4eb = "sh4eb" +PACKAGE_EXTRA_ARCHS_tune-sh4eb = "sheb sh4eb" + +TUNE_FEATURES_tune-sh4a = "sh4a" +TUNE_ARCH_tune-sh4a = "sh4" +TUNE_PKGARCH_tune-sh4a = "sh4a" +PACKAGE_EXTRA_ARCHS_tune-sh4a = "sh sh4 sh4a" + +TUNE_FEATURES_tune-sh4aeb = "sh4a bigendian" +TUNE_ARCH_tune-sh4aeb = "sh4eb" +TUNE_PKGARCH_tune-sh4aeb = "sh4aeb" +PACKAGE_EXTRA_ARCHS_tune-sh4aeb = "sheb sh4eb sh4aeb" diff --git a/meta/conf/machine/include/tune-strongarm1100.inc b/meta/conf/machine/include/tune-strongarm1100.inc new file mode 100644 index 0000000000..ea2fba89fe --- /dev/null +++ b/meta/conf/machine/include/tune-strongarm1100.inc @@ -0,0 +1,11 @@ +DEFAULTTUNE ?= "armv4" + +require conf/machine/include/arm/arch-armv4.inc + +TUNEVALID[strongarm] = "Enable Strongarm 1100 series processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "strongarm", " -mtune=strongarm1100", "", d)}" + +AVAILTUNES += "strongarm" +ARMPKGARCH_tune-strongarm = "strongarm" +TUNE_FEATURES_tune-strongarm = "${TUNE_FEATURES_tune-armv4} strongarm" +PACKAGE_EXTRA_ARCHS_tune-strongarm = "${PACKAGE_EXTRA_ARCHS_tune-armv4} strongarm" diff --git a/meta/conf/machine/include/tune-supersparc.inc b/meta/conf/machine/include/tune-supersparc.inc new file mode 100644 index 0000000000..0faa361f18 --- /dev/null +++ b/meta/conf/machine/include/tune-supersparc.inc @@ -0,0 +1,4 @@ +TUNE_ARCH = "sparc" + +TUNE_CCARGS = "-mcpu=supersparc" +TUNE_PKGARCH = "supersparc" diff --git a/meta/conf/machine/include/tune-xscale.inc b/meta/conf/machine/include/tune-xscale.inc new file mode 100644 index 0000000000..0c5ca8d171 --- /dev/null +++ b/meta/conf/machine/include/tune-xscale.inc @@ -0,0 +1,16 @@ +DEFAULTTUNE ?= "armv5te" + +require conf/machine/include/arm/arch-armv5-dsp.inc + +TUNEVALID[xscale] = "Enable PXA255/PXA26x Xscale specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "xscale", " -mtune=xscale", "", d)}" + +AVAILTUNES += "xscale" +ARMPKGARCH_tune-xscale = "xscale" +TUNE_FEATURES_tune-xscale = "${TUNE_FEATURES_tune-armv5te} xscale" +PACKAGE_EXTRA_ARCHS_tune-xscale = "${PACKAGE_EXTRA_ARCHS_tune-armv5te} xscale xscalet xscalee xscalete" + +AVAILTUNES += "xscale-be" +ARMPKGARCH_tune-xscale-be = "xscale" +TUNE_FEATURES_tune-xscale-be = "${TUNE_FEATURES_tune-armv5teb} xscale bigendian" +PACKAGE_EXTRA_ARCHS_tune-xscale-be = "${PACKAGE_EXTRA_ARCHS_tune-armv5teb} xscaleb xscaletb xscaleeb xscaleteb" diff --git a/meta/conf/machine/include/x86-base.inc b/meta/conf/machine/include/x86-base.inc new file mode 100644 index 0000000000..d6c4d6010f --- /dev/null +++ b/meta/conf/machine/include/x86-base.inc @@ -0,0 +1,52 @@ +# +# Base machine settings for X86 architecture BSPs +# + +# +# common settings for X86 machines +# +MACHINE_FEATURES += "screen keyboard pci usbhost ext2 ext3 x86 \ + acpi serial usbgadget alsa" + +MACHINE_EXTRA_RRECOMMENDS += "kernel-modules" + +IMAGE_FSTYPES += "live" + +KERNEL_IMAGETYPE ?= "bzImage" + +SERIAL_CONSOLE ?= "115200 ttyS0" + +# +# kernel-related variables +# +PREFERRED_PROVIDER_virtual/kernel ??= "linux-yocto" +PREFERRED_VERSION_linux-yocto ??= "3.0%" + +# +# XSERVER subcomponents, used to build the XSERVER variable +# +XSERVER_X86_BASE = "xserver-xorg \ + xf86-input-mouse \ + xf86-input-keyboard \ + xf86-input-evdev \ + xf86-input-synaptics \ + " + +XSERVER_X86_EXT = " \ + ${@base_contains('DISTRO_FEATURES', 'opengl', 'xserver-xorg-extension-glx', '', d)} \ + xserver-xorg-module-libint10 \ + " + +XSERVER_X86_I915 = "xf86-video-intel \ + ${@base_contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-i915', '', d)} \ + " + +XSERVER_X86_I965 = "xf86-video-intel \ + ${@base_contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-i965', '', d)} \ + " + +XSERVER_X86_VESA = "xf86-video-vesa" + +XSERVER_X86_FBDEV = "xf86-video-fbdev" + +XSERVER_X86_MODESETTING = "xf86-video-modesetting" diff --git a/meta/conf/machine/include/x86/README b/meta/conf/machine/include/x86/README new file mode 100644 index 0000000000..2b6c46c7eb --- /dev/null +++ b/meta/conf/machine/include/x86/README @@ -0,0 +1,24 @@ +2012/03/30 - Mark Hatle + - Initial version + +Most of the items for the X86 architectures are defined in the single +arch-x86 file. + +Three ABIs are define, m32, mx32 and m64. + +The following is the list of X86 specific variables: + +X86ARCH32 - This is the 32-bit architecture GNU canonical arch, TUNE_ARCH. + +X86ARCH64 - This is the 64-bit architecture GNU canonical arch, TUNE_ARCH. + +The TUNE_PKGARCH is defined as follows: + +TUNE_PKGARCH = ${TUNE_PKGARCH_tune-${DEFAULTTUNE}} + +The package architecture for 32-bit targets is historical and generally +set to to match the core compatible processor type, i.e. i386. + +For 64-bit architectures, the architecture is expected to end in '_64'. + +If the x32 ABI is used, then the _64 is further extended with a '_x32'. diff --git a/meta/conf/machine/include/x86/arch-x86.inc b/meta/conf/machine/include/x86/arch-x86.inc new file mode 100644 index 0000000000..298bddc6a1 --- /dev/null +++ b/meta/conf/machine/include/x86/arch-x86.inc @@ -0,0 +1,51 @@ +# +# X86 Architecture definition (IA32, X86_64, and X32) +# + +DEFAULTTUNE ?= "x86" +TARGET_FPU ?= "" +X86ARCH32 ?= "i586" +X86ARCH64 ?= "x86_64" + +TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}" + +# ELF32 ABI +TUNEVALID[m32] = "IA32 ELF32 standard ABI" +TUNECONFLICTS[m32] = "m64 mx32" +TUNE_ARCH .= "${@bb.utils.contains("TUNE_FEATURES", "m32", "${X86ARCH32}", "" ,d)}" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "m32", " -m32", "", d)}" +MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "m32", "x86:", "" ,d)}" + +# x32 ABI +TUNEVALID[mx32] = "IA32e (x86_64) ELF32 standard ABI" +TUNECONFLICTS[mx32] = "m64 m32" +TUNE_ARCH .= "${@bb.utils.contains("TUNE_FEATURES", "mx32", "${X86ARCH64}", "" ,d)}" +ABIEXTENSION .= "${@bb.utils.contains("TUNE_FEATURES", "mx32", "x32", "" ,d)}" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "mx32", " -mx32", "", d)}" +TUNE_LDARGS += "${@bb.utils.contains("TUNE_FEATURES", "mx32", "-m elf32_x86_64", "", d)}" +TUNE_ASARGS += "${@bb.utils.contains("TUNE_FEATURES", "mx32", "-x32", "", d)}" + +# ELF64 ABI +TUNEVALID[m64] = "IA32e (x86_64) ELF64 standard ABI" +TUNECONFLICTS[m64] = "m32 mx32" +TUNE_ARCH .= "${@bb.utils.contains("TUNE_FEATURES", "m64", "${X86ARCH64}", "" ,d)}" +TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "m64", " -m64", "", d)}" + +# Default Tune configurations +AVAILTUNES += "x86" +TUNE_FEATURES_tune-x86 = "m32" +BASE_LIB_tune-x86 = "lib" +TUNE_PKGARCH_tune-x86 = "x86" +PACKAGE_EXTRA_ARCHS_tune-x86 = "${TUNE_PKGARCH_tune-x86}" + +AVAILTUNES += "x86-64" +TUNE_FEATURES_tune-x86-64 = "m64" +BASE_LIB_tune-x86-64 = "lib64" +TUNE_PKGARCH_tune-x86-64 = "x86_64" +PACKAGE_EXTRA_ARCHS_tune-x86-64 = "${TUNE_PKGARCH_tune-x86-64}" + +AVAILTUNES += "x86-64-x32" +TUNE_FEATURES_tune-x86-64-x32 = "mx32" +BASE_LIB_tune-x86-64-x32 = "libx32" +TUNE_PKGARCH_tune-x86-64-x32 = "x86_64_x32" +PACKAGE_EXTRA_ARCHS_tune-x86-64-x32 = "${TUNE_PKGARCH_tune-x86-64-x32}" diff --git a/meta/conf/machine/qemuarm.conf b/meta/conf/machine/qemuarm.conf new file mode 100644 index 0000000000..d07084bcf3 --- /dev/null +++ b/meta/conf/machine/qemuarm.conf @@ -0,0 +1,12 @@ +#@TYPE: Machine +#@NAME: arm_versatile_926ejs +#@DESCRIPTION: arm_versatile_926ejs + +require conf/machine/include/qemu.inc +require conf/machine/include/tune-arm926ejs.inc +#require conf/machine/include/tune-arm1136jf-s.inc + +KERNEL_IMAGETYPE = "zImage" + +SERIAL_CONSOLE = "115200 ttyAMA0" + diff --git a/meta/conf/machine/qemumips.conf b/meta/conf/machine/qemumips.conf new file mode 100644 index 0000000000..ce1c419d1e --- /dev/null +++ b/meta/conf/machine/qemumips.conf @@ -0,0 +1,13 @@ +#@TYPE: Machine +#@NAME: mti_malta32_be MIPS +#@DESCRIPTION: mti_malta32_be + +require conf/machine/include/qemu.inc +require conf/machine/include/tune-mips32.inc + +KERNEL_IMAGETYPE = "vmlinux" +KERNEL_ALT_IMAGETYPE = "vmlinux.bin" + +SERIAL_CONSOLE = "115200 ttyS0" + +MACHINE_EXTRA_RRECOMMENDS = " kernel-modules" diff --git a/meta/conf/machine/qemumips64.conf b/meta/conf/machine/qemumips64.conf new file mode 100644 index 0000000000..b2c7998a66 --- /dev/null +++ b/meta/conf/machine/qemumips64.conf @@ -0,0 +1,13 @@ +#@TYPE: Machine +#@NAME: mti-malta64-be MIPS64 +#@DESCRIPTION: mti-malta64-be + +require conf/machine/include/qemu.inc +require conf/machine/include/tune-mips64.inc + +KERNEL_IMAGETYPE = "vmlinux" +KERNEL_ALT_IMAGETYPE = "vmlinux.bin" + +SERIAL_CONSOLE = "115200 ttyS0" + +MACHINE_EXTRA_RRECOMMENDS = " kernel-modules" diff --git a/meta/conf/machine/qemuppc.conf b/meta/conf/machine/qemuppc.conf new file mode 100644 index 0000000000..93145a1e2f --- /dev/null +++ b/meta/conf/machine/qemuppc.conf @@ -0,0 +1,11 @@ +#@TYPE: Machine +#@NAME: qemu PPC Emulator setup +#@DESCRIPTION: Machine configuration for running an PPC system under qemu emulation + +require conf/machine/include/qemu.inc +require conf/machine/include/tune-ppc7400.inc + +KERNEL_IMAGETYPE = "vmlinux" + +SERIAL_CONSOLE = "115200 ttyS0" + diff --git a/meta/conf/machine/qemux86-64.conf b/meta/conf/machine/qemux86-64.conf new file mode 100644 index 0000000000..6533e56b59 --- /dev/null +++ b/meta/conf/machine/qemux86-64.conf @@ -0,0 +1,27 @@ +#@TYPE: Machine +#@NAME: common_pc +#@DESCRIPTION: Machine configuration for running a common x86 + +PREFERRED_PROVIDER_virtual/xserver ?= "xserver-xorg" +PREFERRED_PROVIDER_virtual/libgl ?= "mesa" +PREFERRED_PROVIDER_virtual/libgles1 ?= "mesa" +PREFERRED_PROVIDER_virtual/libgles2 ?= "mesa" + +require conf/machine/include/qemu.inc +DEFAULTTUNE ?= "core2-64" +require conf/machine/include/tune-core2.inc + +KERNEL_IMAGETYPE = "bzImage" + +SERIAL_CONSOLE = "115200 ttyS0" + +XSERVER = "xserver-xorg \ + ${@base_contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-swrast', '', d)} \ + xf86-input-vmmouse \ + xf86-input-keyboard \ + xf86-input-evdev \ + xf86-video-vmware" + +MACHINE_FEATURES += "x86" + +MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "v86d" diff --git a/meta/conf/machine/qemux86.conf b/meta/conf/machine/qemux86.conf new file mode 100644 index 0000000000..94ee57392d --- /dev/null +++ b/meta/conf/machine/qemux86.conf @@ -0,0 +1,26 @@ +#@TYPE: Machine +#@NAME: common_pc +#@DESCRIPTION: Machine configuration for running a common x86 + +PREFERRED_PROVIDER_virtual/xserver ?= "xserver-xorg" +PREFERRED_PROVIDER_virtual/libgl ?= "mesa" +PREFERRED_PROVIDER_virtual/libgles1 ?= "mesa" +PREFERRED_PROVIDER_virtual/libgles2 ?= "mesa" + +require conf/machine/include/qemu.inc +require conf/machine/include/tune-i586.inc + +KERNEL_IMAGETYPE = "bzImage" + +SERIAL_CONSOLE = "115200 ttyS0" + +XSERVER = "xserver-xorg \ + ${@base_contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-swrast', '', d)} \ + xf86-input-vmmouse \ + xf86-input-keyboard \ + xf86-input-evdev \ + xf86-video-vmware" + +MACHINE_FEATURES += "x86" + +MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "v86d" -- cgit v1.2.3-54-g00ecf