From 5fdfa9e3cdcc316548414573437c751c57cc76dc Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Mon, 22 Mar 2021 08:51:33 -0700 Subject: valgrind: Fix ptests on ppc64 LE Backport a patch to avoid lsw/lmw instructions (From OE-Core rev: 834923cbf36d028da56208ad1e2a1b8623a88bd7) Signed-off-by: Khem Raj Signed-off-by: Richard Purdie --- ...d-related-PowerPC-insns-aren-t-allowed-on.patch | 62 ++++++++++++++++++++++ meta/recipes-devtools/valgrind/valgrind_3.16.1.bb | 1 + 2 files changed, 63 insertions(+) create mode 100644 meta/recipes-devtools/valgrind/valgrind/0001-lmw-lswi-and-related-PowerPC-insns-aren-t-allowed-on.patch diff --git a/meta/recipes-devtools/valgrind/valgrind/0001-lmw-lswi-and-related-PowerPC-insns-aren-t-allowed-on.patch b/meta/recipes-devtools/valgrind/valgrind/0001-lmw-lswi-and-related-PowerPC-insns-aren-t-allowed-on.patch new file mode 100644 index 0000000000..7c62144978 --- /dev/null +++ b/meta/recipes-devtools/valgrind/valgrind/0001-lmw-lswi-and-related-PowerPC-insns-aren-t-allowed-on.patch @@ -0,0 +1,62 @@ +From 0748ed5403a75c12ad9137b3fabf9d8397206ed8 Mon Sep 17 00:00:00 2001 +From: Mark Wielaard +Date: Tue, 1 Dec 2020 13:57:39 +0100 +Subject: [PATCH] lmw, lswi and related PowerPC insns aren't allowed on ppc64le + +lmw, lswi and related PowerPC insns aren't allowed on ppc64le + +Newer binutils produce an error when the assembly contains lmw, stmw, +lswi, lswx, stswi, or stswx instructions in little-endian mode. + +Only build and run the lsw and ldst_multiple testcases on ppc64[be]. + +https://bugs.kde.org/show_bug.cgi?id=427870 +Upstream-Status: Backport [https://sourceware.org/git/?p=valgrind.git;a=commit;h=74b74174d572fee4015b8f4e326db3cd949bcdc3] +Signed-off-by: Khem Raj +--- + none/tests/ppc64/Makefile.am | 9 ++++++--- + none/tests/ppc64/ldst_multiple.vgtest | 1 + + 2 files changed, 7 insertions(+), 3 deletions(-) + +diff --git a/none/tests/ppc64/Makefile.am b/none/tests/ppc64/Makefile.am +index 9bc0d0a..9d1e8b7 100644 +--- a/none/tests/ppc64/Makefile.am ++++ b/none/tests/ppc64/Makefile.am +@@ -54,16 +54,20 @@ EXTRA_DIST = \ + + check_PROGRAMS = \ + allexec \ +- lsw jm-insns round \ ++ jm-insns round \ + test_isa_2_06_part1 test_isa_2_06_part2 test_isa_2_06_part3 \ + test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \ + test_isa_2_07_part1 test_isa_2_07_part2 \ + test_isa_3_0 \ + subnormal_test \ +- test_tm test_touch_tm ldst_multiple data-cache-instructions \ ++ test_tm test_touch_tm data-cache-instructions \ + power6_mf_gpr std_reg_imm \ + twi_tdi tw_td power6_bcmp + ++# lmw, stmw, lswi, lswx, stswi, stswx compile (and run) only on big endian. ++if VGCONF_PLATFORMS_INCLUDE_PPC64BE_LINUX ++check_PROGRAMS += lsw ldst_multiple ++endif + + AM_CFLAGS += @FLAG_M64@ + AM_CXXFLAGS += @FLAG_M64@ +@@ -175,4 +179,3 @@ test_isa_2_07_part2_LDADD = -lm + test_tm_LDADD = -lm + test_touch_tm_LDADD = -lm + test_isa_3_0_LDADD = -lm +- +diff --git a/none/tests/ppc64/ldst_multiple.vgtest b/none/tests/ppc64/ldst_multiple.vgtest +index 87e668e..22dd46c 100644 +--- a/none/tests/ppc64/ldst_multiple.vgtest ++++ b/none/tests/ppc64/ldst_multiple.vgtest +@@ -1 +1,2 @@ ++prereq: ../../../tests/is_ppc64_BE + prog: ldst_multiple +-- +2.31.0 + diff --git a/meta/recipes-devtools/valgrind/valgrind_3.16.1.bb b/meta/recipes-devtools/valgrind/valgrind_3.16.1.bb index 9dbd9f74c4..2b1d185575 100644 --- a/meta/recipes-devtools/valgrind/valgrind_3.16.1.bb +++ b/meta/recipes-devtools/valgrind/valgrind_3.16.1.bb @@ -46,6 +46,7 @@ SRC_URI = "https://sourceware.org/pub/valgrind/valgrind-${PV}.tar.bz2 \ file://0001-drd-musl-fix.patch \ file://0001-helgrind-Intercept-libc-functions.patch \ file://0001-Fix-nlcontrolc.vgtest-hanging-on-newer-glibc-and-or-.patch \ + file://0001-lmw-lswi-and-related-PowerPC-insns-aren-t-allowed-on.patch \ " SRC_URI[md5sum] = "d1b153f1ab17cf1f311705e7a83ef589" SRC_URI[sha256sum] = "c91f3a2f7b02db0f3bc99479861656154d241d2fdb265614ba918cc6720a33ca" -- cgit v1.2.3-54-g00ecf