From 5731777f62b340d3c0c300da5a0290153e0fc10c Mon Sep 17 00:00:00 2001 From: Jonathan Richardson Date: Tue, 18 Aug 2020 15:42:07 -0700 Subject: cortex-m0plus.inc: Add tuning for cortex M0 plus Add tuning files for ARM cortex m0 plus and the armv6-m architecture that it is based on. (From OE-Core rev: 1a2d05b504c7a6f5a917cb2e7d026e57bb2daf8f) Signed-off-by: Jonathan Richardson Signed-off-by: Richard Purdie --- meta/conf/machine/include/arm/arch-armv6m.inc | 19 +++++++++++++++++++ meta/conf/machine/include/tune-cortex-m0plus.inc | 11 +++++++++++ 2 files changed, 30 insertions(+) create mode 100755 meta/conf/machine/include/arm/arch-armv6m.inc create mode 100755 meta/conf/machine/include/tune-cortex-m0plus.inc diff --git a/meta/conf/machine/include/arm/arch-armv6m.inc b/meta/conf/machine/include/arm/arch-armv6m.inc new file mode 100755 index 0000000000..68768106c6 --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv6m.inc @@ -0,0 +1,19 @@ +# Tuning for ARMV6-m defined in ARM v6-M ArchitectureReference Manual +# at https://static.docs.arm.com/ddi0419/d/DDI0419D_armv6m_arm.pdf +DEFAULTTUNE ?= "armv6m" + +TUNEVALID[armv6m] = "Enable instructions for ARMv6-m" +TUNECONFLICTS[armv6m] = "armv4 armv5 armv6 armv7a" + +# Use armv6s-m instead of armv6-m to avoid gcc bug "SVC is not permitted on this architecture". +# SVC is a valid instruction. +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv6m', ' -march=armv6s-m', '', d)}" +MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv6m', 'armv6m:', '' ,d)}" + +require conf/machine/include/arm/arch-armv5.inc + +# Little Endian +AVAILTUNES += "armv6m" +ARMPKGARCH_tune-armv6m = "armv6m" +TUNE_FEATURES_tune-armv6m = "armv6m" +PACKAGE_EXTRA_ARCHS_tune-armv6m = "armv6m" diff --git a/meta/conf/machine/include/tune-cortex-m0plus.inc b/meta/conf/machine/include/tune-cortex-m0plus.inc new file mode 100755 index 0000000000..1c7512b061 --- /dev/null +++ b/meta/conf/machine/include/tune-cortex-m0plus.inc @@ -0,0 +1,11 @@ +DEFAULTTUNE ?= "cortexm0-plus" +require conf/machine/include/arm/arch-armv6m.inc + +TUNEVALID[cortexm0-plus] = "Enable Cortex-M0 Plus specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm0-plus', ' -mcpu=cortex-m0plus', '', d)}" +AVAILTUNES += "cortexm0-plus" + +ARMPKGARCH_tune-cortexm0-plus = "cortexm0-plus" +TUNE_FEATURES_tune-cortexm0-plus = "${TUNE_FEATURES_tune-armv6m} cortexm0-plus" + +PACKAGE_EXTRA_ARCHS_tune-cortexm0-plus = "${PACKAGE_EXTRA_ARCHS_tune-armv6m} cortexm0-plus" -- cgit v1.2.3-54-g00ecf