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* site: Drop ORBit2 relared cached variablesKhem Raj2021-09-231-14/+0
| | | | | | | | | ORBit2 is long gone (From OE-Core rev: a5c5dd9229553e0e364f083d661382fe0c15600c) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* siteinfo: Move apr configure cache to common-linuxKhem Raj2016-03-201-3/+0
| | | | | | | | | | | | | | There are variables which are used in all target specific sitefiles. Move it to common-linux, so it can be effective for all targets. Usually they will vary based upon libc e.g. musl does not have process shared mutexes so apr_cv_process_shared_works should be no for it. For glibc though it should be yes but existing behaviour is to use 'no' so its left as it is. (From OE-Core rev: 2c5135f2106842e1b5ef880a08dbd4e50c9e0d04) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* site: add more alignment values for at-spi2-coreRoss Burton2013-06-131-0/+10
| | | | | | | | | | | | x86 and x86_64 values were added in 8c46ec. The x86-64 values were missing an entry, add MIPS and PowerPC values from myself in qemu, and ARM values from Martin Jansa. (From OE-Core rev: a6a12ef5cad0dbb2d773bdccc340f1f767c5a782) Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* site/mips-common: alignment values for guin32, guin64 and unsigned longSaul Wold2012-05-071-0/+4
| | | | | | | | | These are required to build recent versions of glib-2.0 (From OE-Core rev: 8fa607c1430674bee1f1f80d33f8939d7f0b1100) Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* Various siteinfo files: Consolidate va_copy/__va_copy/va_val_copyTom Rini2011-08-041-5/+13
| | | | | | | | | | | | Providing va_copy / __va_copy come down to the libc. va_val_copy comes down to the architecture. Unfortunately it's assumed true if not set, so we need to make sure to set this to false for x86_64 where it is not true. (From OE-Core rev: a54a803ed89969c2416bfa9d911fe4cf558e2391) Signed-off-by: Tom Rini <tom_rini@mentor.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* siteinfo: Move general realloc/malloc values to common-$libcTom Rini2011-07-271-3/+0
| | | | | | | | | | | | These are tests for glibc behavior which we have enabled in uclibc. Note that if we ever disable MALLOC_GLIBC_COMPAT the uclibc tests will need to be changed (but I believe this would also entail massive patching to the rest of userspace so this should be unlikely). (From OE-Core rev: cab512d7ee50fb55b9412c0e1a52a589de09e0a7) Signed-off-by: Tom Rini <tom_rini@mentor.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* site/mips-common: Cache cvs_cv_func_printf_ptrKhem Raj2011-07-081-0/+3
| | | | | | | (From OE-Core rev: 1dd820ed5e426578cac485d63e8c350447332dcb) Signed-off-by: Jessica Zhang <jessica.zhang@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* apr: add configure for NODELAY to mips-commonSaul Wold2010-12-231-0/+3
| | | | Signed-off-by: Saul Wold <sgw@linux.intel.com>
* dpkg: fix powerpc and mips build failureDongxiao Xu2010-09-021-0/+4
| | | | | | | set dpkg va_copy value in corresponding site files for powerpc and mips Fixes [BUGID #219] Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
* qemumips: Add qemumips machine from OE.devJoshua Lock2010-01-061-0/+27
Site and machine configuration for Mips architecture and a qemumips target from Openembedded. Signed-off-by: Joshua Lock <josh@linux.intel.com>
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