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* machine/qemu: Fix OpenGL/GLX support with xserver-xorg.Carlos Alberto Lopez Perez2015-10-123-3/+3
| | | | | | | | | | | | | | | | | | | | | | | * The Xorg server needs to load the GLX extension in order to enable proper OpenGL support. * Before this patch, glxinfo aborted with: root@qemux86:~# glxinfo name of display: :0.0 Error: couldn't find RGB GLX visual or fbconfig * After this patch, it works as expected: root@qemux86:~# glxinfo | grep " render" direct rendering: Yes OpenGL renderer string: Software Rasterizer (From OE-Core rev: 8f33627684755899c5b1fd7eeefdd89c42e68fec) Signed-off-by: Carlos Alberto Lopez Perez <clopez@igalia.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* ThunderX: Add initial tune fileArmin Kuster2015-10-071-0/+19
| | | | | | | | | changed upper case "X" to lower case "x" (From OE-Core rev: ff8bf4907ff3b1a9c479fe158c31607da07f9b55) Signed-off-by: Armin Kuster <akuster@mvista.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-octeon.inc: add BASE_LIB settingsDmitry Eremin-Solenikov2015-08-301-0/+4
| | | | | | | | | | | | | Provide BASE_LIB settings for octeon* tunes that follow the practice of mips64/mips64-n32 tunes (lib64 for N64 ABI, lib32 for N32 ABI). (From OE-Core rev: 2b52312174e52886b0a978ece41f66b4fb455604) (From OE-Core rev: 9531dbe2106d5ba5a9e7d66b3c640a98e4fb6ec4) Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-octeon.inc: correct packaging suffixDmitry Eremin-Solenikov2015-08-301-6/+7
| | | | | | | | | | | | | | | Octeon II/III binaries can contain instructions that are not compatible with MIPS64 processors. Thus Octeon II/III packages should go to separate directories. Set MIPSPKGSFX_VARIANT_tune-* to Octeon-specific values and update PACKAGE_EXTRA_ARCHS_tune-* accordingly. (From OE-Core rev: 69798449a8c1049728674dd352cf828063974cd0) (From OE-Core rev: 3f16f76868105aae7c82ae33831d3317903b58ac) Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* qemuarm64.conf: Make the second serial console /dev/hvc0Randy Witt2015-08-291-1/+1
| | | | | | | | | | | | Since the qemu for aarch64 must use a virtual console for the second serial port rather than emulating actual hardware, make sure the correct device is specified so that a tty is actually started. (From OE-Core rev: 5b720a69f0d181ab2de6032a6e3f5a0ee4a14302) Signed-off-by: Randy Witt <randy.e.witt@linux.intel.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* qemurunner: Use two serial ports and log console with a threadRandy Witt2015-08-247-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | qemu can freeze and stop responding if the socket buffer connected to a tcp serial connection fills up. This happens of course when the reader of the serial data doesn't actually read it. This happened in the qemurunner code, because after checking for the "login:" sentinel, data was never again read from the serial connection. This patch solves the potential freeze by adding a thread to continuously read the data from the console and log it. So it also will give a full log of the console, rather than just up to the login prompt. To simplify this patch, another serial port was also added to use for the sole purpose of watching for the sentinel as well as being the interactive serial port. This will also prevent the possibility of lots of debug data on the console preventing the sentinel value from being seen due to interleaved text. (From OE-Core rev: 2da3fee6b6d9f4dd4c4cb529f4ba393c20aa0f13) Signed-off-by: Randy Witt <randy.e.witt@linux.intel.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-octeon: add tune file for MIPS OcteonArmin Kuster2015-08-191-0/+27
| | | | | | | | | | This add MIPS Octeon tune features. (From OE-Core rev: 151ee1ace5bc5237d361ffb5c8a152b7d56ff0b9) Signed-off-by: Armin Kuster <akuster@mvista.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* arch-mips.inc: don't override TRANSLATED_TARGET_ARCHDmitry Eremin-Solenikov2015-08-011-4/+0
| | | | | | | | | | | | | | Currently MIPS64 N32 is broken. There is internal disagreement between TARGET_ARCH (which doesn't contain ABIEXTENSION) and TRANSLATED_TARGET_ARCH (which contains ABIEXTENSION). ABI is already encoded into the TARGET_OS. ARM tunes in the same situation override neither the TARGET_ARCH nor the TRANSLATED_TARGET_ARCH. So let's drop this override. (From OE-Core rev: 3ee5c9ad302bc05c75badbe29dd983a043a114c2) Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* arch-armv7a.inc, feature-arm-vfp.inc: add tunes for vfpv3 and vfpv3d16André Draszik2015-07-312-4/+60
| | | | | | | | | | | | | | This adds tunes for ARM's v3 Vector Floating Point unit for 16 and 32 bit implementation: http://www.arm.com/products/processors/technologies/vector-floating-point.php See also https://wiki.debian.org/ArmHardFloatPort/VfpComparison for a nice comparison and why vfpv3d16 is useful. (From OE-Core rev: f9de9521477a1de8f6a399bcdc8260e28e34dfb3) Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-cortexa17: add tunes for ARM Cortex-A17Trevor Woerner2015-07-231-0/+36
| | | | | | | | | | http://www.arm.com/products/processors/cortex-a/cortex-a17-processor.php (From OE-Core rev: bf6fea14d0575e7f2dd6a35c79efb45412d70b76) Signed-off-by: Trevor Woerner <twoerner@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-core2.inc: set X86ARCH32 to i686 (instead of i586)Andre McCurdy2015-07-021-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use i686 as TARGET_ARCH for 32bit core2 (and corei7 and atom) builds. In most cases, i586 and i686 are equivalent values for TARGET_ARCH, however one important exception is glibc. When configured for i686, glibc enables optimised string functions (SSE, SSE2, etc), which are not used when building for i586. The benefits of i686 optimised string functions vary depending on the application and the CPU, however in some cases the improvements are significant. In one test, a 50% increase in FPS was seen when running the 'smashcat' benchmark [1] in a qtwebkit browser on an Intel Atom based SoC. The gain seems to comes from a 3x improvement in memcpy performance when copying graphics buffer lines (5120 bytes, or 1280 x 4 bytes/pixel), from the CPU to GPU. Note that very large memcpy's (e.g. 32MB) on the same machine show no particular performance increase between i586 and i686. [1] http://www.smashcat.org/av/canvas_test/ Warning: The change in TARGET_ARCH means that _i586 architecture specific over-rides will no longer take effect. Both oe-core and meta-oe have been updated to replace _i586 over-rides with _x86, however other layers may still need review and updating. (From OE-Core rev: dd09fab685de2eaf04aa5ab60f8220b89c1deae9) Signed-off-by: Andre McCurdy <armccurdy@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* feature-arm-thumb.inc: Fix ARMPKGSFX_THUMB valueMartin Jansa2015-07-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * my previous thumb related commit: commit 3e760031f91fb87c3e2f62b77a117eb41164f259 Author: Martin Jansa <martin.jansa@gmail.com> Date: Wed Feb 18 15:40:35 2015 +0100 feature-arm-thumb.inc: respect ARM_INSTRUCTION_SET when adding thumb suffix unfortunately removed conditional on "thumb" in TUNE_FEATURES, when setting ARMPKGSFX_THUMB * in case we have MACHINE without "thumb" in TUNE_FEATURES and distro setting ARM_INSTRUCTION_SET to "thumb" we end with: ARM_INSTRUCTION_SET="thumb" ARM_THUMB_OPT="thumb" ARM_M_OPT="thumb" # TUNE_CCARGS correctly not adding -mthumb TUNE_CCARGS=" -march=armv7-a -mthumb-interwork -mfloat-abi=softfp -mfpu=neon" # but ARMPKGSFX_THUMB and TUNE_PKGARCH including "t2": ARMPKGSFX_THUMB="t2" TUNE_PKGARCH="armv7at2-vfp-neon" # causing following error: Error, the PACKAGE_ARCHS variable does not contain TUNE_PKGARCH (armv7at2-vfp-neon). (From OE-Core rev: 951200673af27538beaef647a33308b4f15d1fb0) Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-i586-nlp: Add new tune file to support Quark/X1000 CPUSaul Wold2015-07-011-0/+19
| | | | | | | | | | This tune file is needed to enable a GAS option specific to this cpu family in order to disable the usage of lock prefix instructions. (From OE-Core rev: 7eb0abc5f4d971d9a511c93cfb2eb52b72e6f228) Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* soc-family.inc: Add a default SOC_FAMILY valueRichard Purdie2015-06-031-0/+1
| | | | | | | | | | | | | | | | | Otherwise, if MACHINEOVERRIDES is expanded before SOC_FAMILY is set (which may happen as MACHINEOVERRIDES is included in OVERRIDES) we can see: ExpansionError: Failure expanding variable MACHINEOVERRIDES, expression was ${@['', '${SOC_FAMILY}:']['${SOC_FAMILY}' != '']}p1022ds which triggered exception SyntaxError: EOL while scanning string literal (MACHINEOVERRIDES, line 1) To avoid this, give SOC_FAMILY a default empty value so it doesn't get read as None. (From OE-Core rev: dee005b6e1bc353230f9f27a469b2054a644e542) Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* machine/qemu: Switch from ext3 to ext4Richard Purdie2015-02-211-1/+1
| | | | | | | | | | There is no good reason not to use ext4 at this point, it has advantages and few drawbacks. Therefore switch the qemu machines over (and the default runqemu script options). (From OE-Core rev: 430b9ae71b1aa76f8421127d17e0e0723d4818d3) Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* arch-armv7a.inc, tune-arm920t.inc: Fix PACKAGE_EXTRA_ARCHSMartin Jansa2015-02-212-2/+2
| | | | | | | | | | | | | * each DEFAULTTUNE with thumb enabled should list it's arm variants in PACKAGE_EXTRA_ARCHS, otherwise packages which force arm ISA won't be found in do_rootfs * armv7athf-neon-vfpv4 was missing its own PACKAGE_ARCH and also the arm variant (From OE-Core rev: fd7f3cd9affbfb9ce483a5a1d6054da2365fcb0e) Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* feature-arm-thumb.inc: respect ARM_INSTRUCTION_SET when adding thumb suffixMartin Jansa2015-02-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * this means that recipes with ARM_INSTRUCTION_SET explicitly changed to arm will be built in feed without thumb suffix, the same does apply for workdir, e.g. after "bitbake glib-2.0" you can see: tmp-glibc/work/armv5e-oe-linux-gnueabi: glib-2.0 glibc glibc-initial tmp-glibc/work/armv5te-oe-linux-gnueabi: acl db gdk-pixbuf kmod .... and tmp-glibc/deploy/ipk: all armv5e armv5te qemuarm * feed config should be ok, because all default DEFAULTTUNEs always include "arm" variants of all supported PACKAGE_ARCHs * for more details see http://lists.openembedded.org/pipermail/openembedded-core/2014-April/091960.html the toolchain path issues were resolved in 1.8 * add ARM_INSTRUCTION_SET = "arm" to glibc-collateral.inc and comment in glibc.inc to fix glibc-locale and glibc-scripts build (From OE-Core rev: 3e760031f91fb87c3e2f62b77a117eb41164f259) Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* arch-mips.inc: Change definition of TRANSLATED_TARGET_ARCHMark Hatle2015-01-291-1/+3
| | | | | | | | | | | | | | | | | | | | | | | [YOCTO #7230] In certain system configurations TRANSLATED_TARGET_ARCH will not expand in the right order for gcc-cross-candian-mips64n32 to be generated properly. This will cause SDKs to fail to generate properly. Changing the global definition of TRANSLATED_TARGET_ARCH always expands the ABIEXTENSION, which causes the OVERRIDES to pick it up as well. This effectively defines a new class of overrides for the 'n32'. The side effect is that we need to duplicate some mips64 overrides, and redefine others that were previously 'n32' or 'mips64' exclusive to have the correct semantics. (From OE-Core rev: 4b3a2b703b20583bd107f00a297d972e9bfb514a) Signed-off-by: Mark Hatle <mark.hatle@windriver.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* feature-arm-thumb.inc: Remove extra space on thumb overrideMark Hatle2015-01-291-1/+1
| | | | | | | | | | | | The extra space makes the overrides look like "foo:bar: thumb:foobar". This may prevent thumb from working properly, and the space was never intended in the original fix. (From OE-Core rev: 330119da319a08c13ca3350270a95d66d18ffb94) Signed-off-by: Mark Hatle <mark.hatle@windriver.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* arch-mips.inc: Add the MIPS ABIEXTENSION to toolchain nameMark Hatle2015-01-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | [YOCTO #7143] When the system is configured for a multilib SDK, such as: require conf/multilib.conf MULTILIBS = "multilib:lib32 multilib:lib64" DEFAULTTUNE = "mips32r2" DEFAULTTUNE_virtclass-multilib-lib32 = "mips64-n32" DEFAULTTUNE_virtclass-multilib-lib64 = "mips64" Only one of the mips64-n32 or mips64 toolchains is built. Causing the other to be unavailable. This is due to both recipes ending up with the same PN. The toolchain uses the TRANSLATED_TARGET_ARCH in it's name, however the target for mips64 and mips64 n32 were the same, causing the conflict. Avoid this conflict by adding the ABIEXTENSION to the name. (From OE-Core rev: 0bcc01121e928d0be7a0550e500425852c63cf98) Signed-off-by: Mark Hatle <mark.hatle@windriver.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* aarch-arm64: Update tune filesMark Hatle2014-12-233-23/+44
| | | | | | | | | | | | | | | | arch-arm64 is the base tune file for aarch64. Update this to allow the system to work with both aarch32 and aarch64 (multilib). arch-armv8 is for compatibility, it simply uses the base config for now. feature-arm-thumb was updated, since aarch64 mode does NOT have thumb support. We should only be processing warnings and additional arguments if thumb support is enabled on the processor core. (From OE-Core rev: 03d2f5646485b565cc14a0009b7d5224ab298f4c) Signed-off-by: Mark Hatle <mark.hatle@windriver.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* Add machine qemuarm64Kai Kang2014-12-232-0/+32
| | | | | | | | | | | | | | | | | Add machine qemuarm64. The configure files are derived from linaro. Update: * rename genericarmv8 to qemuarm64 for coordination in oe-core * include qemu.inc then remove common part of config * disable using autoserial * move arch-armv8.inc from machine/include/arm64 to machine/include/arm [YOCTO #6487] (From OE-Core rev: d7314c3bc804b7bcc921b0a6c5b63d71ca2e73db) Signed-off-by: Kai Kang <kai.kang@windriver.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* IBM power7 v2: Add new tune file for PPC power7Armin Kuster2014-08-271-0/+21
| | | | | | | | | v2: rename file (From OE-Core rev: 14c773f61a6380f76b58ea0c1cca6e6010d581f8) Signed-off-by: Armin Kuster <akuster808@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* IBM power6 v2: Add new tune file for PPC power6Armin Kuster2014-08-271-0/+21
| | | | | | | | | v2: rename file (From OE-Core rev: b41be209514c2cb69359ee5e26f87beb078f01b2) Signed-off-by: Armin Kuster <akuster808@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* IBM Power5 v2: Add new tune file for PPC power5 cpuArmin Kuster2014-08-271-0/+21
| | | | | | | | V2: rename file (From OE-Core rev: fd46da6f37acbbac8a8b14d5991f75947688a9c2) Signed-off-by: Armin Kuster <akuster808@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* qemux86-64: support X11 when QEMU is emulating a different GPU than vmwareMax Eliaser2014-08-271-0/+2
| | | | | | | | | | | | | | | | | QEMU is capable of emulating four different VGA adapters: cirrus, std, vmware, and QXL. By adding the cirrus and fbdev X.Org drivers to the qemux86-64 image, the image can be made to launch an X server on when cirrus and std are chosen, in addition to just vmware. (The build of QEMU in OE-Core appears to have QXL disabled, meaning a driver for it is unnecessary.) The runqemu script now allows the choice of emulated VGA adapter to be specified manually, so it's important that qemux86-64 supports any configuration the user might choose without requiring the image to be rebuilt. (From OE-Core rev: 1216de77a7f23fa10e34aee1ebe27fcc6a6589c0) Signed-off-by: Max Eliaser <max.eliaser@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* qemux86: support X11 when QEMU is emulating a different GPU than vmwareMax Eliaser2014-08-271-0/+2
| | | | | | | | | | | | | | | | | QEMU is capable of emulating four different VGA adapters: cirrus, std, vmware, and QXL. By adding the cirrus and fbdev X.Org drivers to the qemux86 image, the image can be made to launch an X server on when cirrus and std are chosen, in addition to just vmware. (The build of QEMU in OE-Core appears to have QXL disabled, meaning a driver for it is unnecessary.) The runqemu script now allows the choice of emulated VGA adapter to be specified manually, so it's important that qemux86 supports any configuration the user might choose without requiring the image to be rebuilt. (From OE-Core rev: 9e4ca6739d65716fcb0a1b7d635749083da98c52) Signed-off-by: Max Eliaser <max.eliaser@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* qemumips.conf: Default to (and support) mips32r2Peter Seebach2014-08-231-1/+1
| | | | | | | | | | | | | | | | The MIPS emulation for qemumips actually supports mips32r2: isa : mips1 mips2 mips32r1 mips32r2 We should probably use that tuning file. This implicitly changes the default value of DEFAULTTUNE to mips32r2. (From OE-Core rev: 5d64516d81750e4e0d65792a3215568d652bec6c) Signed-off-by: Peter Seebach <peter.seebach@windriver.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-mips*: Ensure tunes are inherited in orderMark Hatle2014-08-022-2/+2
| | | | | | | | | | | | Without this, you are not able to use mips32r2 on a mips64 based tune. We want to be able to do a tri-lib system of mips64, mips64-n32 and mips32r2. (From OE-Core rev: ccacfd3460b47494f687c696ff985b7c1c6ca1cd) Signed-off-by: Mark Hatle <mark.hatle@windriver.com> Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* mips: add tune file for mips32r2 (only hard-float)Andrea Adami2014-05-151-0/+17
| | | | | | | | | | Kernel and initramfs built and tested on GCW Zero (jz4770) (From OE-Core rev: 149885560e2fbc91c7f60226d015ba9842373e26) Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* feature-arm-thumb.inc: set ARMPKGSFX_THUMB only when thumb is in TUNE_FEATURESMartin Jansa2014-04-291-1/+1
| | | | | | | | | | * there is issue for TUNE_PKGARCH missing in PACKAGE_ARCHS for machines without thumb enabled, it was reported by Jacob Kroon on IRC (From OE-Core rev: 1e1b42f687b5cd34623fe2682218958e1947eb92) Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* feature-arm-thumb.inc: Suppress false warningJacob Kroon2014-04-291-0/+2
| | | | | | | | | | | | | If a recipe does not explicitly set ARM_INSTRUCTION_SET, then there is no need to throw a warning: WARNING: Recipe 'foobar' selects ARM_INSTRUCTION_SET to be 'None', but tune configuration overrides it to 'arm' (From OE-Core rev: e457d71641af8802e47eb4854072e3cfb957b001) Signed-off-by: Jacob Kroon <jacob.kroon@mikrodidakt.se> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-cortexr4.inc: Add thumb and arm to TUNE_FEATURESMartin Jansa2014-04-291-1/+1
| | | | | | | | (From OE-Core rev: 1ebcbc6d77171b81dfe6432ffad6cae3148dcf2e) Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* feature-arm-thumb.inc, arch-armv4.inc: Add "arm" to TUNE_FEATURESMartin Jansa2014-04-295-10/+28
| | | | | | | | | | | | | | | | * it will be inherited by most DEFAULTTUNEs, except few exceptions which support only thumb and not arm * respect missing "arm" in TUNE_FEATURES in feature-arm-thumb.inc, so when recipe asks for "arm" and MACHINE supports only "thumb" ignore recipe and try to build with "thumb" * show warning when overriding ARM_INSTRUCTION_SET set by recipe from tune config (From OE-Core rev: 1250d3e009363d20f15bbfaced622c5912a7fb93) Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* feature-arm-thumb.inc: Replace inner quotes with apostrophesMartin Jansa2014-04-291-8/+8
| | | | | | | | | * so that it's highlighted correctly (From OE-Core rev: 31a3525504ad7cf9fe0a4f8da27ad11e6311f299) Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* Globally replace 'base_contains' calls with 'bb.utils.contains'Otavio Salvador2014-04-254-6/+6
| | | | | | | | | | | The base_contains is kept as a compatibility method and we ought to not use it in OE-Core so we can remove it from base metadata in future. (From OE-Core rev: d83b16dbf0862be387f84228710cb165c6d2b03b) Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* Make ppce300c3 tune hard-float by defaultMats Kärrman2014-04-011-4/+16
| | | | | | | | | | | | | | | | | | | The tuning file for PowerPC e300c3 is soft-float. In OE-classic it was hard- float and it should be as the c3 has an fpu. I have modified the tuning file to include both a hard-float version (using the existing ppce300c3 name) and an optional soft-float version (called ppce300c3-nf). The following patch also passes a "--with-cpu=e300c3" argument to GLIBC. For this to have any effect the sqrt/sqrtf implementations added by the "glibc.fix_sqrt2.patch" are required and also an additional "Implies" file (added to the mentioned patch as a separate patch for eglibc_2.19). Tested with eglibc 2.19 on PowerPC MPC5125. (From OE-Core rev: 9d502ca8551fd461f869395b1b7e62d6dcf59a84) Signed-off-by: Mats Karrman <mats.karrman@tritech.se> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-ppce6500: Fixes a typo in tune config file for e6500.Valentin Cobelea2014-03-251-1/+1
| | | | | | | | | | This patch fixes a typo in the tune config file for ppc64 e6500 where the cpu type is a wrong one. (From OE-Core rev: 168d57f594f559d8f0cb5a9298055b62ff192f27) Signed-off-by: Valentin Cobelea <valentin.cobelea@enea.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* Add Cortex A7 support for NEONv2 & FPv4Kristof Robot2014-02-024-4/+19
| | | | | | | | | | | | | | [YOCTO #5710] Add tuning options for Cortex-A7 with NEONv2 & FPv4: - cortexa7hf-neon-vfpv4 - cortexa7thf-neon-vfpv4 (From OE-Core rev: e97d152ca13556b41a236c1a4cfb11e77ff857d7) Signed-off-by: Kristof Robot <krirobo@gmail.com> Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* feature-arm-thumb: Fix missing t2 suffix for armv7a MACHINEsMartin Jansa2014-01-281-2/+1
| | | | | | | | | | | | | | | | | | | | | * unfortunatelly that note about armv7 matching also armv7a is no longer valid since armv7 include in armv7 was replaced with armv6+neon in this commit: commit 75b8adbc042e0f65fb1286bc550d02becd3b6aea Author: Khem Raj <raj.khem@gmail.com> Date: Tue Mar 27 18:37:45 2012 -0700 tune/armv7: Delete since then thumb and arm feeds had the same architecture * be aware that this will rename lots of feeds (From OE-Core rev: 8e8839215032b57763a07363a560c3fd9d6f8e01) Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com> Signed-off-by: Saul Wold <sgw@linux.intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* qemux86_64: Use the core2-64 tuneDarren Hart2014-01-281-1/+2
| | | | | | | | | | | | | | | | | As x86_64 has been "demoted" to an ABI definition rather than a concrete tune file, replace it with core2-64 for the qemux86-64 machine. (From OE-Core rev: 65c1ba225a410d2ee1913d55c6f986db9f54cc8e) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune: README: Typographical correctionsDarren Hart2014-01-281-3/+3
| | | | | | | | | | | | | | | | No new content, just correcting a few typographical errors. (From OE-Core rev: 8df13f5013d92954ee76943dad58db75704c3cc5) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune: README: Document best practiceDarren Hart2014-01-281-0/+19
| | | | | | | | | | | | | | | | | Describe the expected usage of base architecture tune files and arch-specific files, specifically the stacking of generations. (From OE-Core rev: 282735d7c8fcbd7e354f544c45461b095700fb77) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune: README: Whitespace cleanupDarren Hart2014-01-281-44/+44
| | | | | | | | | | | | | | | | | Before making content changes, cleanup the various whitespace errors in this file. Mostly end-of-line whitepsace. (From OE-Core rev: 112e291c14ce4c3b8d074b71e63500dce609784e) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune: Remove tune-x86_64.incDarren Hart2014-01-281-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tune-x86_64.inc file is conceptually flawed. x86_64 is more akin to the x86 and x86-32 ABIs defined in arch-x86.inc than it is a concrete tune file, such as i586 or core2 - to the extent that everything but the default tune is defined in the arch-x86.inc file. This becomes very apparant when attempting to include tune-x86_64.inc in the x86 tune hierarchy. Remove the tune-x86_64.inc tune file in favor of it being an ABI definition in arch-x86.inc and relying on the linear hierarchy of concrete cpu-types in tune-i586, tune-core2, and tune-corei7. core2_64 should suffice in lieu of x86_64 for all but a couple esoteric corner cases involving older pre-core2 CPUs. In these cases, if they exist at all, the BSP can replace the include tune-x86_64.inc with arch-x86.inc and set the default tune to x86_64. (From OE-Core rev: d8884649b2b3e76519bc10f5908f98d940a9c0cb) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-corei7: Add support for cpu-type corei7Darren Hart2014-01-281-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | corei7 offers a significant advancement since the previous core2 cpu-type described in the tune-core2 file. From the GCC(1): Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 instruction set support. This offers optimizations for Nehalem and Silvermont (e.g. Bay Trail) CPUs (and beyond). (From OE-Core rev: 21f8ce2a4b94034284eb74b9c3b4c9cc638511d6) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune: Make 32b or 64b explicit in tune name for core2Darren Hart2014-01-281-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | Core2 has both a 32b and a 64b variant. Currently, core2 implies 32b, while core2_64 is the 64b version. This implicit 32b mode will become confusing in later architectures, such as corei7, where it would be natural for people to assume "corei7" meant 64 bit. Rather than carrying forward an implicit 32b mode and rather than changing the naming scheme part way through the architecture hiearchy, make the 32b and 64b variant explicit in the tune name by changing core2 to core2-32. This patch also standardises on using '-' in the names. (From OE-Core rev: 69e6395b8d11e2940892a6293ecbbe645c2a478b) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-core2: Only add the current ARCH to PACKAGE_EXTRA_ARCHSDarren Hart2014-01-281-1/+2
| | | | | | | | | | | | | | | | | Inherit the PACKAGE_EXTRA_ARCHS from i586 and only explicitly add core2 here. (From OE-Core rev: 2a10d570560c37eb1d23cf853c0e541bc08a2878) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* tune-core2: Replace -mtune=generic with -mtune=core2Darren Hart2014-01-281-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | -march specifies which ISA to use. -mtune specifies which cpu-type to optimize instruction ordering for, but not which ISA to use. There are times when it may make sense to specify mtune=generic and use a more specific march, such as core2, but the opposite makes little sense at all: use cpu-type specific ISA, but order the instructions generically. While the -mtune is implied by -march, gcc does not verify it is using -mtune=core2 with: gcc -Q -march=core2 --help=target Explicitly specify -mtune=core2 to be sure. Add a comment header describing the CPUs targeted by this tune file. (From OE-Core rev: 4cd33193b2db6c281275db2fb5cc169181955217) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
* i586: Only add the current tune to PACKAGE_EXTRA_ARCHSDarren Hart2014-01-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The generic x86 build supports i586 by default, so this specific tune file technically doesn't add any specific ARCHes to PACKAGE_EXTRA_ARCHS. For consistency, append the current tune to PACKAGE_EXTRA_ARCHS. Since we do not have specific tune files for i386 and i486, just drop them. These could be added to tune-x86 version if there is a need to maintain them, but they really do not belong here. (From OE-Core rev: 1ff914118bdfb19d7f3d794a92ba3735c06ab97b) Signed-off-by: Darren Hart <dvhart@linux.intel.com> Cc: Richard Purdie <richard.purdie@linuxfoundation.org> Cc: Paul Eggleton <paul.eggleton@intel.com> Cc: Tom Zanussi <tom.zanussi@intel.com> Cc: Nitin Kamble <nitin.a.kamble@intel.com> Cc: Mark Hatle <mark.hatle@windriver.com> Cc: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Martin Jansa <martin.jansa@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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