linux/poky.git - Mirror of git.yoctoproject.org/poky

	Commit message (Collapse)	Author	Age	Files	Lines
*	riscv: Add tunes for rv64 without compressed instructions	Khem Raj	2022-04-19	1	-0/+2
\| \| \| \| \| \| \| \|	(From OE-Core rev: 4790eaf98e030ffeecfbde6644137c9d6d1873d7) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
*	Convert to new override syntax	Richard Purdie	2021-08-02	1	-6/+6
\| \| \| \| \| \| \| \| \| \| \| \|	This is the result of automated script conversion: scripts/contrib/convert-overrides.py <oe-core directory> converting the metadata to use ":" as the override character instead of "_". (From OE-Core rev: 42344347be29f0997cc2f7636d9603b1fe1875ae) Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
*	arch-riscv: Enable qemu-usermode on rv32	Khem Raj	2020-11-17	1	-3/+0
\| \| \| \| \| \| \| \| \| \|	Current version of Qemu in OE-core now works fine in rv32/user-mode the said nvalid instruction errors are gone, so we can enable it now (From OE-Core rev: f3fa54f91eef5b1b967a6a14b53a07de052dd17a) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
*	tune-riscv: Add support for no float	Alistair Francis	2019-12-30	1	-1/+2
\| \| \| \| \| \| \|	(From OE-Core rev: 5263b2ebc57fe289d64c74bfb10da39ed7c98828) Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
*	machine/arch-riscv: Fix newlib and baremetal builds	Alistair Francis	2019-11-29	1	-0/+5
\| \| \| \| \| \| \| \| \| \| \| \|	Fix the following errors for newlib and baremetal libcs: ld: unrecognized option '--hash-style=sysv' ld: unrecognized option '--hash-style=gnu' (From OE-Core rev: 8ae998fa8dd216d008cc9ddbea98bbb945501e41) Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
*	qemuriscv64: Add the QEMU RISC-V 64-bit machine	Alistair Francis	2019-06-19	1	-0/+10
	The include is split ready to add the 32-bit RISC-V machine as soon as glibc supports 32-bit RISC-V. This is based on the work in the meta-riscv layer, thanks to Khem for starting this. (From OE-Core rev: 11b6020dff4550fc3a42e04bc1e86baf37942c62) Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>