diff options
Diffstat (limited to 'meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch')
-rw-r--r-- | meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch b/meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch new file mode 100644 index 0000000000..182693079a --- /dev/null +++ b/meta/recipes-support/boost/boost/0001-Removed-clang-specific-branch-for-x86-DCAS-based-loa.patch | |||
@@ -0,0 +1,76 @@ | |||
1 | From 39b027171e0a619d49b9dd2e8471d10b6c41bc25 Mon Sep 17 00:00:00 2001 | ||
2 | From: Andrey Semashev <andrey.semashev@gmail.com> | ||
3 | Date: Tue, 17 Jul 2018 12:37:29 +0300 | ||
4 | Subject: [PATCH] Removed clang-specific branch for x86 DCAS-based loads. | ||
5 | |||
6 | The storage to load from is const-qualified and DCAS via compiler intrinsics | ||
7 | require an unqualified pointer. Use asm implementation instead, which should be | ||
8 | as efficient as intrinsics, if not better, in this case. | ||
9 | |||
10 | Fixes https://github.com/boostorg/atomic/issues/15. | ||
11 | |||
12 | Upstream-Status: Backport [https://github.com/boostorg/atomic/commit/6e14ca24dab50ad4c1fa8c27c7dd6f1cb791b534] | ||
13 | Signed-off-by: Khem Raj <raj.khem@gmail.com> | ||
14 | --- | ||
15 | boost/atomic/detail/ops_gcc_x86_dcas.hpp | 23 ++++++++++++----------- | ||
16 | 1 file changed, 12 insertions(+), 11 deletions(-) | ||
17 | |||
18 | diff --git a/boost/atomic/detail/ops_gcc_x86_dcas.hpp b/boost/atomic/detail/ops_gcc_x86_dcas.hpp | ||
19 | index 4dacc66f..b43ef23a 100644 | ||
20 | --- a/boost/atomic/detail/ops_gcc_x86_dcas.hpp | ||
21 | +++ b/boost/atomic/detail/ops_gcc_x86_dcas.hpp | ||
22 | @@ -158,11 +158,13 @@ struct gcc_dcas_x86 | ||
23 | } | ||
24 | else | ||
25 | { | ||
26 | -#if defined(__clang__) | ||
27 | - // Clang cannot allocate eax:edx register pairs but it has sync intrinsics | ||
28 | - value = __sync_val_compare_and_swap(&storage, (storage_type)0, (storage_type)0); | ||
29 | -#elif defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) | ||
30 | + // Note that despite const qualification cmpxchg8b below may issue a store to the storage. The storage value | ||
31 | + // will not change, but this prevents the storage to reside in read-only memory. | ||
32 | + | ||
33 | +#if defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) | ||
34 | + | ||
35 | uint32_t value_bits[2]; | ||
36 | + | ||
37 | // We don't care for comparison result here; the previous value will be stored into value anyway. | ||
38 | // Also we don't care for ebx and ecx values, they just have to be equal to eax and edx before cmpxchg8b. | ||
39 | __asm__ __volatile__ | ||
40 | @@ -175,7 +177,9 @@ struct gcc_dcas_x86 | ||
41 | : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory" | ||
42 | ); | ||
43 | BOOST_ATOMIC_DETAIL_MEMCPY(&value, value_bits, sizeof(value)); | ||
44 | + | ||
45 | #else // defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) | ||
46 | + | ||
47 | // We don't care for comparison result here; the previous value will be stored into value anyway. | ||
48 | // Also we don't care for ebx and ecx values, they just have to be equal to eax and edx before cmpxchg8b. | ||
49 | __asm__ __volatile__ | ||
50 | @@ -187,6 +191,7 @@ struct gcc_dcas_x86 | ||
51 | : [storage] "m" (storage) | ||
52 | : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory" | ||
53 | ); | ||
54 | + | ||
55 | #endif // defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) | ||
56 | } | ||
57 | |||
58 | @@ -401,15 +406,11 @@ struct gcc_dcas_x86_64 | ||
59 | |||
60 | static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order) BOOST_NOEXCEPT | ||
61 | { | ||
62 | -#if defined(__clang__) | ||
63 | + // Note that despite const qualification cmpxchg16b below may issue a store to the storage. The storage value | ||
64 | + // will not change, but this prevents the storage to reside in read-only memory. | ||
65 | |||
66 | - // Clang cannot allocate rax:rdx register pairs but it has sync intrinsics | ||
67 | - storage_type value = storage_type(); | ||
68 | - return __sync_val_compare_and_swap(&storage, value, value); | ||
69 | - | ||
70 | -#elif defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) | ||
71 | +#if defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS) | ||
72 | |||
73 | - // Some compilers can't allocate rax:rdx register pair either and also don't support 128-bit __sync_val_compare_and_swap | ||
74 | uint64_t value_bits[2]; | ||
75 | |||
76 | // We don't care for comparison result here; the previous value will be stored into value anyway. | ||