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Diffstat (limited to 'meta/recipes-kernel/lttng/lttng-modules/0005-Fix-mmap-caches-aliased-on-virtual-addresses.patch')
-rw-r--r-- | meta/recipes-kernel/lttng/lttng-modules/0005-Fix-mmap-caches-aliased-on-virtual-addresses.patch | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/meta/recipes-kernel/lttng/lttng-modules/0005-Fix-mmap-caches-aliased-on-virtual-addresses.patch b/meta/recipes-kernel/lttng/lttng-modules/0005-Fix-mmap-caches-aliased-on-virtual-addresses.patch new file mode 100644 index 0000000000..7f25c6a709 --- /dev/null +++ b/meta/recipes-kernel/lttng/lttng-modules/0005-Fix-mmap-caches-aliased-on-virtual-addresses.patch | |||
@@ -0,0 +1,100 @@ | |||
1 | From 90715ba61e3fa66c1bb438138c8716c6e72356f9 Mon Sep 17 00:00:00 2001 | ||
2 | From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> | ||
3 | Date: Tue, 19 Sep 2017 12:16:58 -0400 | ||
4 | Subject: [PATCH 5/8] Fix: mmap: caches aliased on virtual addresses | ||
5 | Organization: O.S. Systems Software LTDA. | ||
6 | |||
7 | Some architectures (e.g. implementations of arm64) implement their | ||
8 | caches based on the virtual addresses (rather than physical address). | ||
9 | It has the upside of making the cache access faster (no TLB lookup | ||
10 | required to access the cache line), but the downside of requiring | ||
11 | virtual mappings (e.g. kernel vs user-space) to be aligned on the number | ||
12 | of bits used for cache aliasing. | ||
13 | |||
14 | Perform dcache flushing for the entire sub-buffer in the get_subbuf | ||
15 | operation on those architectures, thus ensuring we don't end up with | ||
16 | cache aliasing issues. | ||
17 | |||
18 | An alternative approach we could eventually take would be to create a | ||
19 | kernel mapping for the ring buffer that is aligned with the user-space | ||
20 | mapping. | ||
21 | |||
22 | Upstream-Status: Backport [2.9.4] | ||
23 | |||
24 | Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> | ||
25 | --- | ||
26 | lib/ringbuffer/ring_buffer_frontend.c | 44 +++++++++++++++++++++++++++++++++++ | ||
27 | 1 file changed, 44 insertions(+) | ||
28 | |||
29 | diff --git a/lib/ringbuffer/ring_buffer_frontend.c b/lib/ringbuffer/ring_buffer_frontend.c | ||
30 | index dc1ee45..e77d789 100644 | ||
31 | --- a/lib/ringbuffer/ring_buffer_frontend.c | ||
32 | +++ b/lib/ringbuffer/ring_buffer_frontend.c | ||
33 | @@ -54,6 +54,7 @@ | ||
34 | #include <linux/delay.h> | ||
35 | #include <linux/module.h> | ||
36 | #include <linux/percpu.h> | ||
37 | +#include <asm/cacheflush.h> | ||
38 | |||
39 | #include <wrapper/ringbuffer/config.h> | ||
40 | #include <wrapper/ringbuffer/backend.h> | ||
41 | @@ -1149,6 +1150,47 @@ void lib_ring_buffer_move_consumer(struct lib_ring_buffer *buf, | ||
42 | } | ||
43 | EXPORT_SYMBOL_GPL(lib_ring_buffer_move_consumer); | ||
44 | |||
45 | +#if ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE | ||
46 | +static void lib_ring_buffer_flush_read_subbuf_dcache( | ||
47 | + const struct lib_ring_buffer_config *config, | ||
48 | + struct channel *chan, | ||
49 | + struct lib_ring_buffer *buf) | ||
50 | +{ | ||
51 | + struct lib_ring_buffer_backend_pages *pages; | ||
52 | + unsigned long sb_bindex, id, i, nr_pages; | ||
53 | + | ||
54 | + if (config->output != RING_BUFFER_MMAP) | ||
55 | + return; | ||
56 | + | ||
57 | + /* | ||
58 | + * Architectures with caches aliased on virtual addresses may | ||
59 | + * use different cache lines for the linear mapping vs | ||
60 | + * user-space memory mapping. Given that the ring buffer is | ||
61 | + * based on the kernel linear mapping, aligning it with the | ||
62 | + * user-space mapping is not straightforward, and would require | ||
63 | + * extra TLB entries. Therefore, simply flush the dcache for the | ||
64 | + * entire sub-buffer before reading it. | ||
65 | + */ | ||
66 | + id = buf->backend.buf_rsb.id; | ||
67 | + sb_bindex = subbuffer_id_get_index(config, id); | ||
68 | + pages = buf->backend.array[sb_bindex]; | ||
69 | + nr_pages = buf->backend.num_pages_per_subbuf; | ||
70 | + for (i = 0; i < nr_pages; i++) { | ||
71 | + struct lib_ring_buffer_backend_page *backend_page; | ||
72 | + | ||
73 | + backend_page = &pages->p[i]; | ||
74 | + flush_dcache_page(pfn_to_page(backend_page->pfn)); | ||
75 | + } | ||
76 | +} | ||
77 | +#else | ||
78 | +static void lib_ring_buffer_flush_read_subbuf_dcache( | ||
79 | + const struct lib_ring_buffer_config *config, | ||
80 | + struct channel *chan, | ||
81 | + struct lib_ring_buffer *buf) | ||
82 | +{ | ||
83 | +} | ||
84 | +#endif | ||
85 | + | ||
86 | /** | ||
87 | * lib_ring_buffer_get_subbuf - get exclusive access to subbuffer for reading | ||
88 | * @buf: ring buffer | ||
89 | @@ -1291,6 +1333,8 @@ retry: | ||
90 | buf->get_subbuf_consumed = consumed; | ||
91 | buf->get_subbuf = 1; | ||
92 | |||
93 | + lib_ring_buffer_flush_read_subbuf_dcache(config, chan, buf); | ||
94 | + | ||
95 | return 0; | ||
96 | |||
97 | nodata: | ||
98 | -- | ||
99 | 2.14.1 | ||
100 | |||