diff options
Diffstat (limited to 'meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-06.patch')
-rw-r--r-- | meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-06.patch | 179 |
1 files changed, 179 insertions, 0 deletions
diff --git a/meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-06.patch b/meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-06.patch new file mode 100644 index 0000000000..67b837c454 --- /dev/null +++ b/meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-06.patch | |||
@@ -0,0 +1,179 @@ | |||
1 | TWL4030: change init-time IMR mask code to WARN if error | ||
2 | |||
3 | From: Paul Walmsley <paul@pwsan.com> | ||
4 | |||
5 | twl_init_irq() prints error messages and returns if any interrupt mask | ||
6 | register writes fail. Change this to generate a warning traceback and | ||
7 | to continue execution rather than skipping TWL init. (These mask | ||
8 | writes should not fail at all unless either the I2C bus or the TWL4030 | ||
9 | is somehow wedged.) | ||
10 | |||
11 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
12 | --- | ||
13 | |||
14 | drivers/i2c/chips/twl4030-core.c | 100 +++++++------------------------------- | ||
15 | 1 files changed, 18 insertions(+), 82 deletions(-) | ||
16 | |||
17 | diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c | ||
18 | index eae0634..99cc143 100644 | ||
19 | --- a/drivers/i2c/chips/twl4030-core.c | ||
20 | +++ b/drivers/i2c/chips/twl4030-core.c | ||
21 | @@ -778,18 +778,10 @@ static void twl_init_irq(void) | ||
22 | |||
23 | |||
24 | /* PWR_IMR1 */ | ||
25 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x1); | ||
26 | - if (res < 0) { | ||
27 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
28 | - return; | ||
29 | - } | ||
30 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff, 0x1) < 0); | ||
31 | |||
32 | /* PWR_IMR2 */ | ||
33 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x3); | ||
34 | - if (res < 0) { | ||
35 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
36 | - return; | ||
37 | - } | ||
38 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xff, 0x3) < 0); | ||
39 | |||
40 | /* Clear off any other pending interrupts on power */ | ||
41 | |||
42 | @@ -807,32 +799,16 @@ static void twl_init_irq(void) | ||
43 | /* Slave address 0x4A */ | ||
44 | |||
45 | /* BCIIMR1A */ | ||
46 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x2); | ||
47 | - if (res < 0) { | ||
48 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
49 | - return; | ||
50 | - } | ||
51 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff, 0x2) < 0); | ||
52 | |||
53 | - /* BCIIMR2A */ | ||
54 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x3); | ||
55 | - if (res < 0) { | ||
56 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
57 | - return; | ||
58 | - } | ||
59 | + /* BCIIMR2A */ | ||
60 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff, 0x3) < 0); | ||
61 | |||
62 | - /* BCIIMR1B */ | ||
63 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x6); | ||
64 | - if (res < 0) { | ||
65 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
66 | - return; | ||
67 | - } | ||
68 | + /* BCIIMR2A */ | ||
69 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff, 0x6) < 0); | ||
70 | |||
71 | /* BCIIMR2B */ | ||
72 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x7); | ||
73 | - if (res < 0) { | ||
74 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
75 | - return; | ||
76 | - } | ||
77 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xff, 0x7) < 0); | ||
78 | |||
79 | /* Are BCI interrupt status bits cleared by reads or writes? */ | ||
80 | cor = twl4030_read_cor_bit(TWL4030_MODULE_INTERRUPTS, | ||
81 | @@ -853,18 +829,10 @@ static void twl_init_irq(void) | ||
82 | |||
83 | /* MAD C */ | ||
84 | /* MADC_IMR1 */ | ||
85 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xFF, 0x62); | ||
86 | - if (res < 0) { | ||
87 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
88 | - return; | ||
89 | - } | ||
90 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff, 0x62) < 0); | ||
91 | |||
92 | /* MADC_IMR2 */ | ||
93 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xFF, 0x64); | ||
94 | - if (res < 0) { | ||
95 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
96 | - return; | ||
97 | - } | ||
98 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xff, 0x64) < 0); | ||
99 | |||
100 | /* Are MADC interrupt status bits cleared by reads or writes? */ | ||
101 | cor = twl4030_read_cor_bit(TWL4030_MODULE_MADC, | ||
102 | @@ -879,11 +847,7 @@ static void twl_init_irq(void) | ||
103 | |||
104 | /* key Pad */ | ||
105 | /* KEYPAD - IMR1 */ | ||
106 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xFF, (0x12)); | ||
107 | - if (res < 0) { | ||
108 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
109 | - return; | ||
110 | - } | ||
111 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, 0x12) < 0); | ||
112 | |||
113 | /* Are keypad interrupt status bits cleared by reads or writes? */ | ||
114 | cor = twl4030_read_cor_bit(TWL4030_MODULE_KEYPAD, | ||
115 | @@ -895,57 +859,29 @@ static void twl_init_irq(void) | ||
116 | WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x11, cor) < 0); | ||
117 | |||
118 | /* KEYPAD - IMR2 */ | ||
119 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xFF, (0x14)); | ||
120 | - if (res < 0) { | ||
121 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
122 | - return; | ||
123 | - } | ||
124 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_KEYPAD, 0xff, 0x14) < 0); | ||
125 | |||
126 | /* KEYPAD - ISR2 */ | ||
127 | WARN_ON(twl4030_i2c_clear_isr(TWL4030_MODULE_KEYPAD, 0x13, cor) < 0); | ||
128 | |||
129 | /* Slave address 0x49 */ | ||
130 | /* GPIO_IMR1A */ | ||
131 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, (0x1C)); | ||
132 | - if (res < 0) { | ||
133 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
134 | - return; | ||
135 | - } | ||
136 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x1c) < 0); | ||
137 | |||
138 | /* GPIO_IMR2A */ | ||
139 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, (0x1D)); | ||
140 | - if (res < 0) { | ||
141 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
142 | - return; | ||
143 | - } | ||
144 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x1d) < 0); | ||
145 | |||
146 | /* GPIO_IMR3A */ | ||
147 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, (0x1E)); | ||
148 | - if (res < 0) { | ||
149 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
150 | - return; | ||
151 | - } | ||
152 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x1e) < 0); | ||
153 | |||
154 | /* GPIO_IMR1B */ | ||
155 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, (0x22)); | ||
156 | - if (res < 0) { | ||
157 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
158 | - return; | ||
159 | - } | ||
160 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x22) < 0); | ||
161 | |||
162 | /* GPIO_IMR2B */ | ||
163 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, (0x23)); | ||
164 | - if (res < 0) { | ||
165 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
166 | - return; | ||
167 | - } | ||
168 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x23) < 0); | ||
169 | |||
170 | /* GPIO_IMR3B */ | ||
171 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, (0x24)); | ||
172 | - if (res < 0) { | ||
173 | - pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
174 | - return; | ||
175 | - } | ||
176 | + WARN_ON(twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xff, 0x24) < 0); | ||
177 | |||
178 | /* Are GPIO interrupt status bits cleared by reads or writes? */ | ||
179 | cor = twl4030_read_cor_bit(TWL4030_MODULE_GPIO, | ||