diff options
Diffstat (limited to 'meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-03.patch')
-rw-r--r-- | meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-03.patch | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-03.patch b/meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-03.patch new file mode 100644 index 0000000000..fe1bea5398 --- /dev/null +++ b/meta/recipes-kernel/linux/linux-omap2-git/beagleboard/TWL4030-03.patch | |||
@@ -0,0 +1,82 @@ | |||
1 | TWL4030: use correct register addresses for BCI IMR registers | ||
2 | |||
3 | From: Paul Walmsley <paul@pwsan.com> | ||
4 | |||
5 | The existing code to mask and clear BCI interrupts in twl_init_irq() is | ||
6 | wrong. It uses the wrong register offsets, it does not mask all of the | ||
7 | BCI IMR registers, and it does not clear all of the BCI ISR registers. | ||
8 | |||
9 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
10 | --- | ||
11 | |||
12 | drivers/i2c/chips/twl4030-core.c | 40 ++++++++++++++++++++++++++++++++------ | ||
13 | 1 files changed, 34 insertions(+), 6 deletions(-) | ||
14 | |||
15 | diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c | ||
16 | index dfc3805..bb0732c 100644 | ||
17 | --- a/drivers/i2c/chips/twl4030-core.c | ||
18 | +++ b/drivers/i2c/chips/twl4030-core.c | ||
19 | @@ -750,29 +750,57 @@ static void twl_init_irq(void) | ||
20 | /* POWER HACK (END) */ | ||
21 | /* Slave address 0x4A */ | ||
22 | |||
23 | - /* BCIIMR1_1 */ | ||
24 | + /* BCIIMR1A */ | ||
25 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x2); | ||
26 | + if (res < 0) { | ||
27 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
28 | + return; | ||
29 | + } | ||
30 | + | ||
31 | + /* BCIIMR2A */ | ||
32 | res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x3); | ||
33 | if (res < 0) { | ||
34 | pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
35 | return; | ||
36 | } | ||
37 | |||
38 | - /* BCIIMR1_2 */ | ||
39 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x4); | ||
40 | + /* BCIIMR1B */ | ||
41 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x6); | ||
42 | if (res < 0) { | ||
43 | pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
44 | return; | ||
45 | } | ||
46 | |||
47 | - /* BCIIMR2_1 */ | ||
48 | + /* BCIIMR2B */ | ||
49 | res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x7); | ||
50 | if (res < 0) { | ||
51 | pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
52 | return; | ||
53 | } | ||
54 | |||
55 | - /* BCIIMR2_2 */ | ||
56 | - res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x8); | ||
57 | + /* BCIISR1A */ | ||
58 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x0); | ||
59 | + if (res < 0) { | ||
60 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
61 | + return; | ||
62 | + } | ||
63 | + | ||
64 | + /* BCIISR2A */ | ||
65 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x1); | ||
66 | + if (res < 0) { | ||
67 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
68 | + return; | ||
69 | + } | ||
70 | + | ||
71 | + /* BCIISR1B */ | ||
72 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x4); | ||
73 | + if (res < 0) { | ||
74 | + pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
75 | + return; | ||
76 | + } | ||
77 | + | ||
78 | + /* BCIISR2B */ | ||
79 | + res = twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x5); | ||
80 | if (res < 0) { | ||
81 | pr_err("%s[%d][%d]\n", msg, res, __LINE__); | ||
82 | return; | ||